CN109038586A - A kind of middle pressure CS-APF fault tolerant control method based on selective current limliting - Google Patents
A kind of middle pressure CS-APF fault tolerant control method based on selective current limliting Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
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- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/20—Active power filtering [APF]
Abstract
The present invention provides a kind of middle pressure CS-APF fault tolerant control method based on selective current limliting, is related to cascading APF Fault Tolerance Control Technology field.This method utilizes selective current-limiting mode stage by stage, after to instruction current current limliting, make full use of cascaded inverter redundancy voltage vector more, and the characteristic that position is often overlapped, the substitution false voltage vector that optimal non-faulting voltage vector is as equivalent as possible is selected, accurate track reference value under enabling the output electric current of CS-APF to nonserviceable.The present invention is while the redundancy voltage vector for making full use of cascaded inverter realizes faults-tolerant control, the off-capacity of inverter under fault-tolerant operation state is solved the problems, such as using selective current-limiting mode, improve harmonic compensation precision of the CS-APF under fault-tolerant operation state, the failure tolerant ability of CS-APF is improved, hardware cost is reduced.
Description
Technical field
The present invention relates to cascade APF Fault Tolerance Control Technology field more particularly to a kind of middle pressure CS- based on selective current limliting
APF fault tolerant control method.
Background technique
Active Power Filter-APF (active power filter, APF) have height controllability and response it is quick
Property, it is to administer harmonic pollution, improve the more satisfactory filter of one kind of power quality.Two level APF of tradition are opened by power
The shutdown voltage class of device receiving and the limitation that capacity is small are closed, is difficult to meet the powerful application of mesohigh at this stage,
Therefore more level concatenated schemes and multiplex main circuit structure are the main trends of present APF development.Especially more level grades are associated with
Active power filter (cascade shunt active power filter, CS-APF) have capacity is big, switching frequency is low,
The advantages that flexible structure, replacement are conveniently, current ripples are small, the lance being able to solve between power electronic devices capacity and switching frequency
Shield is highly suitable to be applied for middle pressure large capacity field.
Power electronic devices compared to two level APF, CS-APF of tradition is more, and probability of failure is accordingly higher.In CS-
Each concatenation unit is series connection in the topological structure of APF, when any one concatenation unit breaks down, if taken no action to,
It will be so that can not mutually work on where the trouble unit, making CS-APF instead becomes new harmonic source, can cause very to power grid
Large impact.Therefore, to the research of CS-APF Fault Tolerance Control Technology be very it is necessary to.At the same time, under fault-tolerant operation state
The capacity problem of CS-APF tends to ignored.Before failure, the CS-APF in fault-tolerant operation state is due to series connection
Unit number is reduced, therefore is easier off-capacity problem occur.Long term overloading operation easily causes main circuit power electronics device
Part is burnt, and tolerant fail algorithm is made to fail, and system is caused to entirely collapse, and directly jeopardizes power grid security.
Application No. is 201310434169.3 patent of invention, " the middle pressure CS-APF double hysteresis based on voltage vector method is fault-tolerant
Control method " proposes a kind of method for realizing faults-tolerant control using cascaded inverter Redundanter schalter state, realizes CS-APF grades
It is operated normally under receipts or other documents in duplicate member malfunction, but does not consider the off-capacity problem for being easier to occur under fault-tolerant state.Therefore exist
While improving CS-APF faults-tolerant control ability, the off-capacity problem for taking into account inverter under fault-tolerant operation state is also to have very much
It is necessary.
The method for solving inverter off-capacity under CS-APF fault-tolerant operation state at present mainly has following 4 kinds:
First is that clean cut system current-limiting mode.When reference current value is less than or equal to the maximum allowed current of CS-APF, keep
Actual output current is constant；When reference current value is greater than maximum allowed current, using clean cut system current limliting, i.e., system is exported into electricity
Ductility limit is made as maximum allowed current.But treated that instruction current may derive original load current for clean cut system current-limiting mode
In the harmonic component that is not present, cause system harmonics pollution to aggravate, therefore there are obvious shortcomings for this current-limiting mode.
Second is that proportion expression current-limiting mode.Different from clean cut system current limliting, proportion expression current limliting is maximum by system reference electric current first
Modulus value is compared with system maximum allowed current；When reference current maximum modulus value is less than or equal to maximum allowed current, no
Carry out current limliting；Otherwise, carry out proportional current limliting, i.e., using maximum permissible value divided by reference current maximum modulus value as proportionality coefficient,
Former reference current calculated value is obtaining final reference current value multiplied by proportionality coefficient.Although this current-limiting mode is during current limliting
New frequency spectrum will not be introduced, but processing method is obviously lack of pertinence, only carry out simple Current limited Control in system output,
The content and harmfulness for being not bound with individual harmonic current carry out targeted Current limited Control, so that the harmonic wave in this time
It compensates out of control.
Third is that more CS-APF paired runnings.When 1 CS-APF off-capacity, increases other identical equipment and come more
It mends, and the capacity of reasonable distribution individual device.The higher cost of this method, and the coordinated control between each CS-APF will increase
The difficulty of algorithm, it is also possible to generate circulation problem.
Fourth is that selective current-limiting mode.This method is on the basis of selective harmonic compensation policy, for dangerous biggish
Emphasis subharmonic is selectively compensated, and casts out the compensation to content compared with low harmony wave and higher hamonic wave, and then rationally drop
Low output current value.Document " demand analysis of active power filtering output violent change and implementation strategy " proposes in two level APF of tradition
The method of variable step carries out limited capacity to main frequency harmonic component is preferentially compensated, and improves harmonic compensation effect when off-capacity
Fruit.But for the document when harmonic current instruction is more than rated current, the compensation electric current of block output immediately waits instruction current to press
Load current value is increased to from zero according to the preferential clipping strategy of variable step, this process generally requires 2~3 power frequency periods, and CS-
APF load current value is much larger than the load current value of two level APF of tradition, and regulating time is longer, therefore the strategy dynamic property
It is poor.
Summary of the invention
It is a kind of based on selective current limliting the technical problem to be solved by the present invention is in view of the above shortcomings of the prior art, provide
Middle pressure CS-APF fault tolerant control method, make full use of cascaded inverter redundancy voltage vector realize faults-tolerant control it is same
When, the off-capacity of inverter under fault-tolerant operation state is solved the problems, such as using selective current-limiting mode, improves CS-APF fault-tolerant
Harmonic compensation precision under operating status improves the failure tolerant ability of CS-APF, reduces hardware cost.
In order to solve the above technical problems, the technical solution used in the present invention is:
A kind of middle pressure CS-APF fault tolerant control method based on selective current limliting, includes the following steps:
Step 1: selective current limliting；
The harmonic wave in load current is gradually detected according to priority according to Harmonic Detecting Algorithm, by the way that phase compensation is added
Angle compensates system delay, improves harmonic compensation precision；Cast out the harmonic wave that harmonic wave occupation rate is lower than 1% simultaneously, it will be remaining
Each harmonic sets the penalty coefficient of each harmonic as δ according to priority arrangement5、δ7、δ9、...、δN, wherein N accounts for for harmonic wave
There is rate to be greater than 1% highest compensation harmonic number, N=6m ± 1, m are positive integer, and the penalty coefficient of each harmonic is in 0~1 model
Enclose interior value；Selective current limliting process is divided into two stages:
Stage 1: when the harmonic wave instruction current compensated entirely exceeds the rated current range of CS-APF main circuit switch device,
The instruction current of the selective current-limiting mode of unit compensation coefficient is directlyed adopt, i.e. each harmonic penalty coefficient is δ5=δ7=...
=δN=1, needed during this current limliting combine clean cut system current-limiting mode be more than to the instruction current instantaneous value of selective current-limiting mode
Rated current part carries out truncation clipping；The instruction current virtual value of each harmonic at this time are as follows:
Wherein,For for maintaining the fundamental active current component of DC voltage,For compensating reactive power component,It is each
Secondary compensation harmonic component；
Stage 2: by the current limliting in stage 1, then the penalty coefficient by adjusting each harmonic component, until instruction current is small
In the load current value of device, the instruction current virtual value of each harmonic at this time are as follows:
Wherein, the penalty coefficient δ of each harmonic componentnInitial value be 1, since n times harmonic compensation coefficient, δNWith
Fixed step size τ output is gradually successively decreased, if δNWhen being decremented to 0, does not meet current limliting requirement also, then allow N-2 subharmonic penalty coefficient δN-2After
It is continuous gradually to be successively decreased with fixed step size τ output, and so on, until the instruction current of selective harmonic compensation is in device rated current
Critical value；
Step 2: current follow-up control；
By determining that CS-APF is exported using electric current double hysteresis to the instruction current amplitude limiting processing after CS-APF fault-tolerant operation
Compensate the actual value vector i of electric currentcWith reference value vector ic *Between current track error vector Δ i, current track error arrow
Measure mould | Δ i | the alternatively foundation of voltage vector；Current follow-up control is divided into the control under non-faulting state and under malfunction
System, specific as follows:
(1) control method under non-faulting state；
When current track error Vector Mode | Δ i | when being more than or equal to outer ring width h2, i.e., | and Δ i | >=h2 does not consider to refer to
The spatial position of voltage vector, selection make | Δ i | the most fast voltage vector of decrease speed, i.e. its corresponding d Δ i/dt have with
Current track error vector Δ i contrary largest component, makes | Δ i | inner ring is approached with most fast speed, thus realization pair
The quick tracking of reference current；
When | Δ i | when between inner ring and outer rings, i.e. h2 > | Δ i | >=h1 selects corresponding error current differential amplitude
The smallest voltage vector with steady state error, and reduces switching frequency；
When | Δ i | when being less than inner ring width h1, i.e. h1 > | Δ i | >=0, output voltage vector will remain unchanged as, to reduce
Average frequency of switching, the selection for not needing to carry out voltage vector in such cases again calculate；
(2) control method under malfunction；
When one or several concatenation unit of CS-APF breaks down, the phase level number can be caused to reduce, at this point, first
It is shorted trouble unit rapidly, and makes full use of the characteristic that more than cascaded inverter redundancy voltage vector and position is often overlapped, selection
Optimal non-faulting voltage vector replaces false voltage vector, i.e., selection position be overlapped or the immediate non-faulting vector of effect into
Row substitution, makes the output electric current i of CS-APFcAccurate track reference value under capable of nonserviceabling；
Optimal voltage vector is selected according to above-mentioned steps, so that the output electric current of CS-APF is in non-faulting state and failure
It can accurate track reference value, the i.e. effective compensation of realization harmonic wave under state.
The Harmonic Detecting Algorithm specifically:
When detecting n-th harmonic electric current, first by the load current i under three-phase static coordinate systemL, iSuccessively it is converted into two
Under phase rest frame and under n ω or-n ω speed synchronous rotating frame counterclockwise, wherein i indicates current phase, i=a,
B, speed when c, n ω and-n ω respectively indicate detection n-th positive sequence and negative sequence harmonic current in coordinate transform；N-th at this time
Harmonic current is DC component, and other primary currents are AC compounent, and low-pass filtered device filters out other than specified subharmonic
AC compounent obtains n-th harmonic current component using coordinate inverse transformationIt will test resultAfter negating, it can be used as
The reference current of selectivity compensation nth harmonic；
When needing to compensate multiple specified subharmonic current values simultaneously according to priority, by each specified subharmonic testing result
It is added and is used as reference current；
With v speed to the matrix of synchronous rotating frame down conversion under two-phase stationary coordinate system are as follows:
Wherein, v=n ω or-n ω；
Coordinate reverse transform matrix are as follows:
Wherein, Δ θnFor the equivalent phase difference of system, when detecting positive sequence harmonic component, Δ θn=n ω Δ T, when detection is negative
When sequence harmonic component, Δ θn=-n ω Δ T；Δ T is system delay, needs to estimate during system debug.
The beneficial effects of adopting the technical scheme are that the middle pressure provided by the invention based on selective current limliting
CS-APF fault tolerant control method takes into account inverter under fault-tolerant operation state while improving CS-APF faults-tolerant control ability
Off-capacity problem solves the problems, such as that CS-APF probability of failure is larger, is very suitable to middle pressure, powerful occasion.Work as CS-
When APF fault-tolerant operation leads to off-capacity, it is not blindness to compensation electric current progress clipping, is adopted according to the priority of harmonic compensation
With selective current-limiting mode, and using current-limiting mode stage by stage, the dynamic of current limliting process is taken into account, and then rationally reduce
Output current value solves the problems, such as off-capacity.This method does not need additional hardware redundancy resource, and hardware cost is low.It can show
The functional reliability for being pressed with source filter in improving is write, space is had a vast market.
Detailed description of the invention
Fig. 1 is CS-APF topology diagram；
Fig. 2 is CS-APF concatenation unit topology mechanism map and balanced auxiliary clamp circuit；
Fig. 3 is the middle pressure CS-APF fault tolerant control method overall flow provided in an embodiment of the present invention based on selective current limliting
Figure；
Fig. 4 is specific subharmonic detection method flow chart provided in an embodiment of the present invention；
Fig. 5 is selective current-limiting method flow chart provided in an embodiment of the present invention；
Fig. 6 is the middle pressure CS-APF fault tolerant control method schematic diagram provided in an embodiment of the present invention based on selective current limliting；
It is the corresponding five level voltages vector distribution map of 2 rank CS-APF that Fig. 7, which is provided in an embodiment of the present invention,；
The five-level switch magnetic state scattergram that Fig. 8 is provided in an embodiment of the present invention when being a 1 cell failure of phase.
Specific embodiment
With reference to the accompanying drawings and examples, specific embodiments of the present invention will be described in further detail.Implement below
Example is not intended to limit the scope of the invention for illustrating the present invention.
The middle pressure CS-APF main circuit topological structure that the present embodiment is related to is as shown in Figure 1, since APF requires have very high move
State response speed and switching frequency, therefore switching device has selected IGBT, voltage rating 1700V.Often be connected in series order N needs
It is determined according to application, by taking 10KV distribution as an example, retains 2 times of safety margins, then each concatenation unit voltage 800-1000V is
Preferably, the concatenation unit order N being often connected in series is about 10 or so, can similarly calculate the corresponding order of other medium voltage networks.
The cascaded H-bridges unit topological diagram for the middle pressure CS-APF that the present embodiment is related to and pressure auxiliary clamp circuit such as Fig. 2 institute
Show, the auxiliary circuit of each unit is connected by isolating transformer with auxiliary circuit ac bus by a full-bridge inverter, often
Mutually share an ac bus.Wherein Sac is auxiliary switch, and T is auxiliary transformer, and auxiliary inversion bridge and main inverter bridge share straight
Bus is flowed, Udc is DC capacitor voltage.
The control circuit and driving circuit for the middle pressure CS-APF that the present embodiment is related to are as follows: control circuit uses two CSTR knot
Structure is communicated by dual port RAM (IDT70V24s15), can be with data sharing；Wherein, DSP1 is responsible for detecting harmonic current work
For current reference value, and complete the control of DC side total voltage and auxiliary circuit pwm signal generates；DSP2 is responsible for compensating electric current
Tracing control generates the Bypass Control of PWM drive signal and trouble unit.IGBT drive circuit is using Beijing Luo Muyuan company
IGBT Integrate Design.
In order to improve the failure tolerant ability of CS-APF, and hardware cost is reduced as far as possible, the present invention is making full use of
While the redundancy voltage vector of cascaded inverter realizes faults-tolerant control, fault-tolerant operation state is solved using selective current-limiting mode
The off-capacity problem of lower inverter improves harmonic compensation precision of the CS-APF under fault-tolerant operation state.Using selective limit
Stream mode mainly considers following problems:
First is that with the higher harmonic wave of content and to based on the biggish harmonic wave of harm to the system, the content of usual low-order harmonic compared with
Height, therefore compensated mainly for this fractional harmonic；
Two are to give up the harmonic wave of higher hamonic wave and content lower than 1%；Digital display circuit certainly exists latency issue, similarly prolongs
When equivalent relative to higher hamonic wave phase error it is bigger than low-order harmonic, cause the compensation precision of higher hamonic wave usually to compare
It is low, or even will appear the situation that compensated higher harmonic content is higher than before compensation and therefore when power system capacity deficiency, abandon
Higher hamonic wave part is very wise；Also it is not necessarily in addition, the harmonic wave for harmonic content lower than 1% compensates；
Third is that drop, which can be obtained, according to the superposition of certain algorithm in each compensation target value according to the priority of setting holds operation
Reference current value under state, and consider the dynamic property of current limliting process.
As shown in figure 3, for the whole of the middle pressure CS-APF fault tolerant control method provided in this embodiment based on selective current limliting
Body flow chart, including selective current limliting strategy and current follow-up control algorithm, wherein selective current limliting policy section includes: humorous
Wave electric current gradually detects and selective current limliting；Current follow-up control algorithm is using redundancy voltage vector " equivalent substitution " come real
Existing faults-tolerant control, tracks the reference current determined in Harmonic Detecting Algorithm.That the specific method is as follows is described for the present embodiment.
(1) harmonic current gradually detects.
Under CS-APF fault-tolerant operation inverter off-capacity state, in conjunction with harmonic source characteristic, using selective current limliting plan
Slightly, the dangerous biggish emphasis subharmonic of preferential compensation, it is therefore desirable to which the specific of load current is isolated according to the priority of setting
Subharmonic.
The method flow of specific subharmonic detection is as shown in Figure 4.For detecting n-th positive sequence harmonic electric current, first will
Load current i under three-phase static coordinate systemL, i(i=a, b, c) is successively converted under two-phase stationary coordinate system and with n ω speed
Under synchronous rotating frame counterclockwise, n-th harmonic is DC component at this time, and other primary currents are AC compounent；Through low
After bandpass filter, the AC compounent other than specified subharmonic can be filtered out；N-th harmonic can be obtained using coordinate inverse transformation
Component.Wherein, under two-phase stationary coordinate system with n ω speed to the matrix of synchronous rotating frame down conversion are as follows:
When harmonic wave if necessary to detection is negative phase-sequence harmonic component, only the n ω t in transformation matrix need to be become-n ω t i.e.
It can.In order to compensate for system delay, phase difference θ that can be equivalent by systemnCoordinate reverse transform matrix is addedIn, following two formulas institute
Show；
Δθn=n ω Δ T；
In formula, Δ T is system delay, and variable needs are estimated during system debug.It will test resultAfter negating,
It can be used as the reference current that selectivity compensates nth harmonic.It is electric when needing to compensate multiple specified subharmonic simultaneously according to priority
When flow valuve, each specified subharmonic testing result need to be only added and be used as reference current.
(2) selective current limliting.
The maximization for guaranteeing device harmonic compensation performance when under CS-APF normal operating condition, using full compensation side
Formula；It is not being carried out to compensation electric current for blindness when CS-APF fault-tolerant operation causes instruction current to be more than device load current value
Clipping, but it is higher for content in load current or the biggish harmonic wave of harm to the system is targetedly compensated, it puts
The lower higher hamonic wave of content is abandoned, i.e., according to the priority of harmonic compensation using selective current-limiting mode.As shown in figure 5, selecting
On the basis of selecting property current limliting, in conjunction with the phase sequence of harmonic source characteristic and harmonic wave, the compensation priority of setting be followed successively by fundamental wave reactive power,
5 negative phase-sequences, 7 positive sequences, 11 negative phase-sequences, 13 positive sequences ..., according to above-mentioned Harmonic Detecting Algorithm to the harmonic wave in load current
It is gradually detected according to priority, while casting out the harmonic wave that harmonic wave occupation rate is lower than 1%, remaining each harmonic is arranged according to priority
Column, and the penalty coefficient of each harmonic is set as δ5、δ7、δ9、...、δN, wherein N is that highest of the harmonic wave occupation rate greater than 1% is mended
Repay overtone order, N=6m ± 1, m is positive integer, and the penalty coefficient of each harmonic value in 0~1 range.Selective current limliting
Process is divided into two stages:
Stage 1: when the harmonic wave instruction current compensated entirely exceeds the rated current range of CS-APF main circuit switch device,
In order to accelerate to export the response speed of electric current after current limliting, it is not necessary to so that instruction current is zeroed immediately, but directly adopt unit compensation
The instruction current of the selective current-limiting mode of coefficient, the instruction current virtual value of each harmonic at this time are as follows:
In above formula,For for maintaining the fundamental active current component of DC voltage,For compensating reactive power component,For
Each secondary compensation harmonic component.Each harmonic penalty coefficient at this time is δ5=δ7=...=δN=1, each harmonic compensates component category
State is repaid in complete.
This selective current-limiting mode plays the role of rationally dropping to fault-tolerant operation to be held, and has good dynamic response
Can, but do not ensure that instruction current needs within the scope of rated current, therefore during this current limliting in conjunction with clean cut system current-limiting mode pair
The instruction current instantaneous value of selective current-limiting mode is more than that rated current part carries out truncation clipping.
Stage 2: by the current limliting in stage 1, then the penalty coefficient by adjusting each harmonic component, until instruction current is small
In the load current value of device, the instruction current virtual value of each harmonic at this time are as follows:
In above formula, the penalty coefficient δ of each harmonic componentnInitial value be 1, since n times harmonic compensation coefficient, δN
Gradually successively decreased with fixed step size τ output, if δNWhen being decremented to 0, does not meet current limliting requirement also, then allow N-2 subharmonic penalty coefficient δN-2
Continue gradually to successively decrease with fixed step size τ output, and so on, until the instruction current of selective harmonic compensation is in the specified electricity of device
The critical value of stream.
In conclusion by the selective current limliting in above 2 stages, solves under fault-tolerant operation state CS-APF capacity not
The problem of foot, and has taken into account the dynamic property of current limliting process, make filtering performance when device fault-tolerant operation obtain rationalizing and
It maximizes.
(3) current follow-up control algorithm.
By to the instruction current amplitude limiting processing after CS-APF fault-tolerant operation, as shown in fig. 6, then passing through electric current double hysteresis
Determine the actual value vector i of CS-APF output compensation electric currentcWith reference value vector ic *Between current track error vector Δ i,
Wherein the outer ring of electric current double hysteresis guarantees that the rapidity of current tracking, inner ring guarantee accuracy, current track error Vector Mode | Δ
I | by the foundation of alternatively voltage vector.Current follow-up control is divided into the control under non-faulting state and under malfunction, tool
Body is as follows.
1) under non-faulting state voltage vector equivalent substitution method
When | Δ i | when between inner ring and outer rings, i.e. h2 > | Δ i | >=h1 selects corresponding error current differential amplitude
The smallest voltage vector with steady state error, and reduces switching frequency.By formula (1) as it can be seen that working as the optimal vector U of voltagekAnd reference
Voltage vector u*When equal, i.e. Uk=u*When be best suitable for requirement.
When | Δ i | when being less than inner ring width h1, i.e. h1 > | Δ i | >=0, output voltage vector will remain unchanged as, to reduce
Average frequency of switching, the selection for not needing to carry out voltage vector in such cases again calculates, and to reduce average frequency of switching, improves
System stability.
By taking 2 rank CS-APF as an example, specific implementation method is as follows:
As shown in fig. 7, being the corresponding 5 level voltage polar plot of 2 rank CS-APF, reference voltage vector u*Positioned at sector I, accidentally
Spill current Δ i is located at sector V.At this point, Δ i in three-phase currentbError is maximum, and bigger than normal.
When current track error Vector Mode | Δ i | when being more than or equal to outer ring width h2, i.e., | and Δ i | >=h2 does not consider to refer to
The spatial position of voltage vector, selection make | △ i | the most fast voltage vector of decrease speed, i.e. its corresponding d Δ i/dt have with
Current track error vector △ i contrary largest component, makes | Δ i | inner ring is approached with most fast speed, thus realization pair
The quick tracking of reference current.
When | Δ i | when >=h2,8 voltages to be selected are selected in 125 voltage vectors first with level rounding theory
Vector, if ua *、ub *、uc *For reference voltage vector u*Component under three-phase abc coordinate system, Ua *、Ub *、Uc *It is three-phase with reference to electricity
Piezoelectricity level values (0≤Ua *、Ub *、Uc *≤ 4), both sides relation such as formula (2), N is cascade level order herein.
Then level vector is U*=Ua *+ρUb *+ρ2Uc *(ρ=ej120°).Due to Ua *、Ub *、Uc *Not necessarily integer, because
This, is rounded to the level closed on up and down, such as work as U respectivelya *When=1.5, being rounded up and down is level 1 and 2.Such U*It will appear 23
=8 kinds of combinations.By formula (1) discretization, obtain:
In formula, Δ in、Δin+1For the discrete value of current error, T is system communication cycle.Make Δ i reduction, it is necessary to protect
Demonstrate,prove (u*-Uk) and Δ i it is contrary, i.e. inner product < Δ in, (u*-Uk) > is less than 0, according to this condition to 8 vectors progress to be selected
Primary screening.Change minimum principle according to vector, optimal voltage vector will be as close possible to u*, i.e. UkMeet:
Primary screening is carried out to remaining vector to be selected according to this condition, selects optimal value.
2) under malfunction voltage vector equivalent substitution method
When there is n (0 < n < N) a concatenation unit to break down in certain phase of N rank cascade circuit, influenced by trouble unit,
The phase level number reduces 2n, and the voltage vector of certain sectors in voltage vector-diagram can be reduced.When list occur respectively in a, b, c phase
It is different to the influence situation of each sector vector when first failure.As shown in table 1, √ indicates that failure has an impact to the sector, ×
No influence is indicated, wherein not including the voltage vector of sector intersection.Wherein, the voltage vector not being available due to the failure
Referred to as false voltage vector, and be not affected by the failure and influence the voltage vector that can be used normally and be known as non-faulting voltage vector.
When short circuit occurs for concatenation unit or when open circuit fault, blocks the trouble unit PWM drive signal, and on the left of switching units with it is public
The switch of bus connection will also carry out corresponding faults-tolerant control in hair fault code to host computer.
Influence of the 1 concatenation unit failure of table to each sector
| Sector I | Sector] I | Sector III | Sector IV | Sector V | Sector VI | |
| A phase | √ | × | √ | √ | × | √ |
| B phase | × | √ | √ | × | √ | √ |
| C phase | √ | √ | × | √ | √ | × |
Firstly, selecting optimal voltage vector U by former control strategykIf UkFor non-faulting voltage vector (i.e. UkIt is not affected by this
The influence of failure, can be used normally), then calculating terminates, UkFor final selected value；If UkFor fault vector, then selection is made with it
It is replaced with the immediate other non-faulting voltage vectors of effect, the non-faulting vector that preferred position is overlapped, if all positions
The vector for setting coincidence is all fault vector, can only be replaced at this time by the immediate other vectors in position and effect.
The specific replacement method of fault vector is as follows:
In the voltage vector-diagram of N rank cascaded inverter, 2N regular hexagon (not including midpoint) is shared by midpoint outward,
It is respectively designated as hexagon 1,2...2N, by taking a phase has n (0 < n < N) a concatenation unit to break down as an example.
1. working as UkWhen=(x, y, z) is located in voltage vector-diagram around outermost n hexagon, it is overlapped at this time without position
Non-faulting voltage vector may be selected, vector alternative is as follows:
When reference voltage vector is located at sector I or VI, selection voltage vector (x-1, y, z) first；If voltage vector
(x-1, y, z) is also false voltage vector, then selects voltage vector (x-2, y, z)；And so on, to select non-faulting voltage to swear
Amount；
When reference voltage vector is located at sector III or IV, selection voltage vector (x+1, y, z) first；If voltage is sweared
Measuring (x+1, y, z) also is false voltage vector, then selects voltage vector (x+2, y, z)；And so on, to select non-faulting voltage
Vector；
When reference voltage vector is located at sector II or V, do not influenced by a phase fault；
Cascade order N is bigger, and the phase error and Size Error of vector replacement front and back are lower, and current tracking is more accurate；
The method is equivalent to Ua *When being rounded to the level closed on up and down, being shorted by a phase fault unit influences, so that on
Level-one level is not present, therefore just continuous two level are rounded downwards.Such as work as Ua *When=2.5, it should be rounded electricity up and down
Flat 2 and 3.If level 3 is since failure may be not present, Ua *Then continuous be rounded downwards is 2 and 1.
2. working as UkWhen=(x, y, z) is located at around hexagon j, wherein 1≤j≤2N-n, the non-event for thering is position to be overlapped at this time
Hindering voltage vector may be selected, and vector alternative is as follows:
When reference voltage vector is located at sector I or VI, selection voltage vector (x-1, y-1, z-1) first；If voltage
Vector (x-1, y-1, z-1) is also false voltage vector, then selects voltage vector (x-2, y-2, z-2)；And so on, to select
Non-faulting voltage vector；
When reference voltage vector is located at sector III or IV, selection voltage vector (x+1, y+1, z+1) first；If electric
Pressing vector (x+1, y+1, z+1) also is false voltage vector, then selects voltage vector (x+2, y+2, z+2)；And so on, to select
Select non-faulting voltage vector；When reference voltage vector is located in the region II or V of sector, do not influenced by a phase fault.
By taking 2 rank CS-APF as an example, specific implementation method is as follows:
When a phase has a concatenation unit to break down, voltage vector-diagram is as shown in figure 8, vector table in figure on dotted line
Show false voltage vector, the point on solid line indicates non-faulting vector.The voltage vector replacement vector of proposed adoption is shown in Table 2.
It can be obtained using same method operating procedure, the voltage vector when b or c phase has a concatenation unit to break down
Replacement method.
Voltage vector substitution when Unit 1 breaks down in 2 a phase of table
(4) hysteresis band selection and switching loss.
Usual hysteresis band approximate with the switching frequency of device is in inverse ratio.Hysteresis band is narrower, and switching frequency is higher, but this
When compensation electric current tracking accuracy can also improve；On the contrary, hysteresis band is wider, switching frequency is lower, but tracking accuracy is also low.Drop
Low switching losses are not exclusively equal to reduction switching frequency, and the electric current of device and soft switch technique are also flowed through with switching time to be had
It closes.As it can be seen that in the case where control population mean switching frequency is basically unchanged, according to the tune of the size reasonable of three-phase current norm
Whole hysteresis band can be effectively reduced master switch loss, while facilitate DC side voltage of converter control.
APF requires devices switch frequency higher, and the loss of IGBT is based on switching losses.Assuming that every in unit time T
Phase switch motion n times, when ignoring on-state loss and off-state is lost, every phase switching loss power are as follows:
UdcFor DC side voltage of converter, it is assumed that size is constant.tonFor service time, i(k)For the switching current of kth time,
Formula (5) can simplify are as follows:
As it can be seen that switching loss and switching frequency, DC voltage, service time and switch average current iavIt is related.When three
When phase current norm is larger, relax hysteresis band, to reduce switching frequency；When three-phase current norm is smaller, appropriateness reduces
Width is replaced, switching frequency is improved, so that master switch loss is reduced in the case where population mean switching frequency is basically unchanged,
And then it lays the foundation for the Balance route of DC voltage.
(5) Pressure and Control of concatenation unit DC voltage.
As shown in Fig. 2, keep constant every mutually N number of unit DC voltage summation by the PI adjusting of software program first,
Reasonable driving auxiliary circuit again, realizes the Power Exchange between each unit by ac bus, is finally reached electric voltage equalization, steady
It is fixed.
It should be noted that usually can all retain 2-3 times of safety allowance when due to IGBT voltage rating type selecting, so working as
1 in N rank cascaded inverter or a few cells break down after being shorted, and IGBT bears voltage in remaining unit
Permissible value is not exceeded.
(6) trouble unit bypass technology.
When short circuit occurs for concatenation unit or when open circuit fault, as shown in Fig. 2, firstly, block the unit PWM drive signal,
The unit to break down is shorted by the switch Sac being closed on the right side of this element, and what is connect on the left of switching units with common bus opens
Close Sac.In addition, also to carry out corresponding faults-tolerant control in hair fault code to host computer.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: it still may be used
To modify to technical solution documented by previous embodiment, or some or all of the technical features are equal
Replacement；And these are modified or replaceed, model defined by the claims in the present invention that it does not separate the essence of the corresponding technical solution
It encloses.
Claims (2)
1. a kind of middle pressure CS-APF fault tolerant control method based on selective current limliting, characterized by the following steps:
Step 1: selective current limliting；
The harmonic wave in load current is gradually detected according to priority according to Harmonic Detecting Algorithm, by the way that phase compensation angle pair is added
System delay compensates, and improves harmonic compensation precision；Cast out the harmonic wave that harmonic wave occupation rate is lower than 1% simultaneously, it will be each time remaining
Harmonic wave sets the penalty coefficient of each harmonic as δ according to priority arrangement5、δ7、δ9、...、δN, wherein N is harmonic wave occupation rate
Highest compensation harmonic number greater than 1%, N=6m ± 1, m are positive integer, and the penalty coefficient of each harmonic is in 0~1 range
Value；Selective current limliting process is divided into two stages:
Stage 1: when the harmonic wave instruction current compensated entirely exceeds the rated current range of CS-APF main circuit switch device, directly
Using the instruction current of the selective current-limiting mode of unit compensation coefficient, i.e. each harmonic penalty coefficient is δ5=δ7=...=δN
=1, it needs to combine clean cut system current-limiting mode during this current limliting to be more than specified to the instruction current instantaneous value of selective current-limiting mode
Current segment carries out truncation clipping；The instruction current virtual value of each harmonic at this time are as follows:
Wherein,For for maintaining the fundamental active current component of DC voltage,For compensating reactive power component,It is compensated for each time
Harmonic component；
Stage 2: by the current limliting in stage 1, then the penalty coefficient by adjusting each harmonic component, until instruction current is less than dress
The load current value set, the instruction current virtual value of each harmonic at this time are as follows:
Wherein, the penalty coefficient δ of each harmonic componentnInitial value be 1, since n times harmonic compensation coefficient, δNTo determine step
Long τ output is gradually successively decreased, if δNWhen being decremented to 0, does not meet current limliting requirement also, then allow N-2 subharmonic penalty coefficient δN-2Continue with
Fixed step size τ output is gradually successively decreased, and so on, until the instruction current of selective harmonic compensation is in facing for device rated current
Dividing value；
Step 2: current follow-up control；
By determining CS-APF output compensation using electric current double hysteresis to the instruction current amplitude limiting processing after CS-APF fault-tolerant operation
The actual value vector i of electric currentcWith reference value vector ic *Between current track error vector Δ i, current track error Vector Mode |
Δ i | the alternatively foundation of voltage vector；Current follow-up control is divided into the control under non-faulting state and under malfunction, tool
Body is as follows:
(1) control method under non-faulting state；
When current track error Vector Mode | Δ i | when being more than or equal to outer ring width h2, i.e., | and Δ i | >=h2 does not consider reference voltage
The spatial position of vector, selection make | Δ i | the most fast voltage vector of decrease speed, i.e. its corresponding d Δ i/dt have and electric current
Tracking error vector Δ i contrary largest component, makes | Δ i | inner ring is approached with most fast speed, to realize to reference
The quick tracking of electric current；
When | Δ i | when between inner ring and outer rings, i.e. h2 > | Δ i | >=h1 selects corresponding error current differential amplitude minimum
Voltage vector, with steady state error, and reduce switching frequency；
When | Δ i | when being less than inner ring width h1, i.e. h1 > | Δ i | >=0, output voltage vector will remain unchanged as, average to reduce
Switching frequency, the selection for not needing to carry out voltage vector in such cases again calculate；
(2) control method under malfunction；
When one or several concatenation unit of CS-APF breaks down, the phase level number can be caused to reduce, at this point, first rapidly
It is shorted trouble unit, and makes full use of the characteristic that more than cascaded inverter redundancy voltage vector and position is often overlapped, is selected optimal
Non-faulting voltage vector replace false voltage vector, i.e., selection position be overlapped or the immediate non-faulting vector of effect replaced
In generation, makes the output electric current i of CS-APFcAccurate track reference value under capable of nonserviceabling；
Optimal voltage vector is selected according to above-mentioned steps, so that the output electric current of CS-APF is in non-faulting state and malfunction
Under can accurate track reference value, that is, realize the effective compensation of harmonic wave.
2. the middle pressure CS-APF fault tolerant control method according to claim 1 based on selective current limliting, it is characterised in that: institute
State Harmonic Detecting Algorithm specifically:
When detecting n-th harmonic electric current, first by the load current i under three-phase static coordinate systemL, iIt is quiet to be successively converted into two-phase
Only under coordinate system and under n ω or-n ω speed synchronous rotating frame counterclockwise, wherein i indicates current phase, i=a, b, c,
Speed when n ω and-n ω respectively indicates detection n-th positive sequence and negative sequence harmonic current in coordinate transform；N-th harmonic at this time
Electric current is DC component, and other primary currents are AC compounent, and low-pass filtered device filters out the exchange other than specified subharmonic
Component obtains n-th harmonic current component using coordinate inverse transformationIt will test resultAfter negating, it can be used as selecting
Property compensation nth harmonic reference current；
When needing to compensate multiple specified subharmonic current values simultaneously according to priority, each specified subharmonic testing result is added
As reference current；
With v speed to the matrix of synchronous rotating frame down conversion under two-phase stationary coordinate system are as follows:
Wherein, v=n ω or-n ω；
Coordinate reverse transform matrix are as follows:
Wherein, Δ θnFor the equivalent phase difference of system, when detecting positive sequence harmonic component, Δ θn=n ω Δ T, when detection negative phase-sequence is humorous
When wave component, Δ θn=-n ω Δ T；Δ T is system delay, needs to estimate during system debug.
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