CN109032845A - A kind of circuit and method of intelligent control power-off - Google Patents
A kind of circuit and method of intelligent control power-off Download PDFInfo
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- CN109032845A CN109032845A CN201810870329.1A CN201810870329A CN109032845A CN 109032845 A CN109032845 A CN 109032845A CN 201810870329 A CN201810870329 A CN 201810870329A CN 109032845 A CN109032845 A CN 109032845A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3466—Performance evaluation by tracing or monitoring
- G06F11/348—Circuit details, i.e. tracer hardware
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Abstract
The invention belongs to down circuitry technical fields, the circuit and method of a kind of intelligent control power-off are disclosed, the circuit of intelligent control power-off includes: power supply module, current detection module, voltage detection module, main control module, circuit monitoring module, power failure test module, alarm module, display module.The present invention writes the power failure test in data command implementation procedure and the power failure test in data recovery execution process instruction to smart card by power failure test module; Test coverage is comprehensive, solves the problems, such as whether existing single instrction power failure test can not detect the power-off protection mechanism when card executes data recovery correct；Simultaneously by circuit monitoring module, alarm module can detection circuit failure in time, and give a warning, staff reminded to properly protect measure.
Description
Technical field
The invention belongs to down circuitry technical fields, more particularly to a kind of circuit and method of intelligent control power-off.
Background technique
Currently, the prior art commonly used in the trade is such that
Circuit is the path or electronic loop that electric current is flowed through, and is by electrical equipment and component；Join by certain way
It picks up and.Such as resistance, capacitor, inductance, diode, triode, power supply and switch, the network of composition.The size of circuit scale,
It can differ greatly, the small integrated circuit on silicon wafer arrives greatly high-low pressure power transmission network.According to the difference of handled signal, electronics
Circuit can be divided into analog circuit and digital circuit.However, available circuit, when power blackout situation occurs, IC card piece is executing data
If card powers off again in recovery process, it is likely that cause card data to restore imperfect, or even occurs restoring mistake, and it is existing
Single instrction power failure test be undetectable to this card design defect；If fault simultaneously, can not power off；Then not
It can notify in time, cause energy waste.
Static random access memory (SRAM) is very important a part in SoC system, and 6 traditional pipe units are due to read-write
The integrity problem of operation determines that its minimum operating voltage is difficult to be followed by the preceding of manufacturing process and then continue reduction.
Traditional 6T SRAM memory cell: two MP1, MN1 and MP2, MN2 phase inverters form latch, outside write-in
Data are stored in Q or QB, and MN3, MN4 are switching tube, and WL is wordline, and BL, BLB are bit line.When write operation: if to Q (original state
For " 1 ") write-in " 0 ", bit line BL first and BLB are precharged to " 1 ", then according to the data type to be written by BL and BLB points
It is not set to " 0 " and " 1 "；Wordline WL is set to " 1 " again, so that two switching tube conductings of MN3, MN4；The end Q is from " 1 " change " 0 ", QB
Become " 1 " from " 0 ", write operation terminates.When read operation (assuming that " 0 " is deposited at the end Q): BL, BLB are precharged to " 1 " first；Wordline WL
It draws high as " 1 ", two switching tubes conductings of MN3, MN4, BLB keeps one state, and BL is slowly pulled low to " 0 ", and sense amplifier will
Voltage difference amplifies and reads the 0 state of storage unit between BL, BLB.
Due to device size constantly reduce with the continuous reduction of device operating voltages so that traditional 6T sram cell exists
Face more challenges challenge in stability.With the reduction of operating voltage, due to the driving force of transfer tube MN3 and MN4 reduction with
And the reduction of the voltage overturning point of the phase inverter of MP1, MN1 (or MP2, MN2) composition, so that traditional 6T SRAM stores list
The ability degradation of the write-in data of member；And the decline of VDD, static noise margin (SNM) can also decline.
In conclusion problem of the existing technology is:
Available circuit is when power blackout situation occurs, if IC card piece card in executing data recovery procedure powers off again, very
It may cause card data and restore imperfect, or even occur restoring mistake, and existing single instrction power failure test is to this card
Design defect is undetectable；If fault simultaneously, can not power off；It cannot then notify in time, cause energy waste.
Traditional 6T SRAM memory cell can be taken into account in the higher situation stability inferior of operating voltage and area cost
It arrives, still, the requirement due to reducing power consumption drives, and as minimum operating voltage gradually reduces, storage unit is difficult to be written into number
According to or write-in data failure, and with the decline of VDD, static noise margin also and then declines, and the stability of storage unit exists
It is on the hazard under low voltage condition.
During electric current, voltage prediction, between time and spatial coherence be and deposit, and not with distance
With and it is different, document consider around between correlation, remaining all do not consider between spatial coherence, to prediction essence
Degree certainly exists large effect, so prediction model can be further perfect.
Summary of the invention
In view of the problems of the existing technology, the present invention provides the circuits and method of a kind of intelligent control power-off.
The invention is realized in this way a kind of circuit of intelligent control power-off, the circuit of the intelligent control power-off
Include:
Power supply module is connect with main control module, for being powered to circuit；
Current detection module is connect with main control module, the current data for detection circuit；
Voltage detection module is connect with main control module, the voltage data for detection circuit；
The wordline of the integrated 9T SRAM cell circuit unit use reading data of voltage detection module, the wordline for writing data are each
It from separating, and reads the bit line of data, write the circuit framework that the bit line of data is individually separated, and in the defeated of second phase inverter
A transmission gate is inserted between outlet and the input terminal of first phase inverter to be used to control write-in data action；
9T SRAM cell circuit unit includes:
One transmission gate PG, for receiving the word-line signal WWL/WWLB from control write-in data, when needing that number is written
According to when, WWL=1, WWLB=0, PG are closed, and work as WWL=0, and when WWLB=1, PG conducting, data are latched；
Two phase inverters are used to latch data；
Two concatenated NMOS tubes, for reading data；
One metal-oxide-semiconductor, for receiving the word-line signal WWL/WWLB from control write-in data, when needing that data are written
When, at this moment the end Q is written in the data of WBL by WWL=1, metal-oxide-semiconductor conducting；
Described two phase inverters include: the phase inverter INV1 of MP1/MN1 composition, are used to latch data；
The phase inverter INV2 of MP2/MN2 composition, is used to latch data；
Two concatenated NMOS tubes include:
MN3: for reading data, grid connects QB, if QB is " 1 " MN3 conducting, if QB is " 0 ", MN3 shutdown；
MN4: for reading data, data wordline RWL is read in grid connection, and when reading data, RWL=1, MN3 conducting are read
Data bit line RBL send the information that storage unit stores to sense amplifier；
The metal-oxide-semiconductor is MNS or MPS；For receiving the word-line signal WWL/WWLB from control write-in data, work as needs
When data are written, at this moment the end Q is written in the data of WBL by WWL=1, MNS conducting；
Main control module, with power supply module, current detection module, voltage detection module, circuit monitoring module, power failure test mould
Block, alarm module, display module connection, work normally for controlling modules；
Circuit monitoring module, connect with main control module, is monitored for the operating condition to circuit；Circuit monitoring module
Monitoring method include:
1) initial data, electric current, voltage operating condition dataset acquisition data in circuit, to the data being collected into are selected
It carries out shortage of data inspection and supplements complete；
2): its rank correlation coefficient is calculated according to copula function to complete data are supplemented, according to the big of rank correlation coefficient
It is small to select suitable electric current, voltage input data；
3): the calculating of grey Absolute data relating extent being carried out to selected electric current, voltage data, according to grey Absolute data relating extent
What size relation determined model finally enters data；
4): modeling analysis being carried out to the data that finally enter of selection, establishes nonlinear state according to support vector regression
The state equation and measurement equation of spatial model, and estimation prediction is carried out by state of the Unscented kalman filtering to model；
5): according to the selection criteria of setting, the scale parameter in Unscented kalman filtering being optimized and updated, is obtained
Prediction result；
Power failure test module, connect with main control module, tests for the power-off mechanism to circuit；
Alarm module is connect with main control module, for by buzzer to the fault messages of circuit monitoring module monitors into
Row alarm；
Display module is connect with main control module, for showing the data information of detection.
Further, the detailed process of step 1) are as follows: select the data of the same period of electric current, voltage；The 22 of selection altogether
Then group, every group of 192 data carry out missing inspection to all collected data and are more than 30 data for missing data
Directly delete, it is remaining to be filled using averaging method, if aiFor missing data, then the data of the position are filled into
If aiWhen the data of front and back 12 also have missing, recursion of drawing back forward, until obtaining the data of front and back 12；If aiFor
First data, then at this timeSimilarly, aiWhen for the last one data,If aiBefore in data set
When 12 and rear 12 data, still selection and the identical fill method of head and the tail；And then it obtains except No. 1, No. 8, No. 12, No. 13,15
The complete data set of other outer electric currents of number electric current, voltage, voltage.
Further, the step 5) is excellent to the scale parameter progress in Unscented kalman filtering according to error minimum principle
Change obtains prediction result.
Further, the process of the step 5) is as follows:
The feasible set λ ∈ [0,12] of a specified scale parameter λ, update method is as follows:
(1) initial λ is selected；
Take it to beWherein λmax=12, λmin=0
(2) when updating, every time in original λjOn the basis of be added a random value ej, the value meet normal state variation, the phase
Hope to be 0, variance very little；
κj+=κj+ej ej∈N(0,Pe j), enable j=0,1 ...
(3) by above-mentioned λj+And λjIt substitutes into Unscented kalman filtering respectively and carries out prediction calculating；
(4) the prediction error for calculating the two takes the small person of error to enter and updates in next step；
If [zk|k-1(λj+)Tzk|k-1(λj+)] < [zk|k-1(λj)Tzk|k-1(λj)]
Then take λj+1=λj+
Otherwise λj+1=λj
(5) (2)-(4) step is recycled, until predicting that error reaches the threshold value of setting or update times reach established standards
When, it updates and stops, obtaining optimal scale parameter λ.
Further, Kendall rank correlation coefficient includes:
Enable (x1,y1) and (x2,y2) it is independent identically distributed stochastic variable, definition
τ≡P[(x1-x2)(y1-y2) > 0]-P [(x1-x2)(y1-y2) < 0]
=2P [(x1-x2)(y1-y2) > 0] -1
For kendall rank correlation coefficient, it is denoted as τ.
If the edge distribution of stochastic variable X, Y are respectively F (x), G (y), corresponding copula function is C (u, v), wherein u
=F (x), v=G (y), u, v ∈ [0,1], then kendall rank correlation coefficient τ can have corresponding copula function C (u, v) to provide
Spearman rank correlation coefficient includes:
Enable (x1,y1),(x2,y2) and (x3,y3) it is independent identically distributed stochastic variable, definition
ρ≡3{P[(x1-x2)(y1-y3) > 0]-P [(x1-x2)(y1-y3) < 0]
For Spearman rank correlation coefficient, it is denoted as ρ.
If the edge distribution of stochastic variable X, Y are respectively F (x), G (y), corresponding copula function is C (u, v), wherein u
=F (x), v=G (y), u, v ∈ [0,1], then kendall rank correlation coefficient τ can have corresponding copula function C (u, v) to provide
Another object of the present invention is to provide a kind of intelligent control power-off method the following steps are included:
Step 1 is powered circuit by power supply module；Pass through the current data of current detection module detection circuit；
Pass through the voltage data of voltage detection module detection circuit；
Step 2, main control module dispatch circuit monitoring modular are monitored the operating condition of circuit；
Step 3 is tested by power-off mechanism of the power failure test module to circuit；Circuit is supervised by alarm module
The fault message for surveying module monitors is alarmed；
Step 4 passes through the data information of display module display detection.
Further, the power failure test module test method is as follows:
Firstly, writing holding for data command to where more new record during smart card and reader are executed and traded
The power-off of row process；
Then, after the smart card electrification reset, judge whether record data in the smart card described in this transaction
It updates；
Finally, instructing if it is not, successively executing each item that this is traded by the smart card, and data command is write in execution
When, the implementation procedure that write data instruct is powered off according to the time of the first power-off timer setting；
Wherein, in the implementation procedure instructed every time according to the time that first power-off timer is set to write data
After power-off, circulation executes following process: to the smart card, electrification reset, each item for successively executing this transaction are instructed again,
When executing data recovery instruction, according to the time of the second power-off timer setting the data are restored with the implementation procedure of instruction
Power-off, and detect the data and restore whether instruction runs succeeded, then stop following until data occur and restoring instruction execution success
Ring.
Further, described when executing data recovery instruction, according to the time of the second power-off timer setting to the number
Include: according to the implementation procedure power-off for restoring instruction
After the reader issues data recovery instruction to the smart card, the second power-off timer institute is reached
When at the time of setting, the implementation procedure for restoring instruction to the data is powered off, and second power-off timer is expressed as T2=t2+
(Δt2* j), wherein t2Indicate power-off start time point, Δ t2Indicate power-off step-length, j indicates the execution that data are restored with instruction
Journey power-off number, j since 1 ing value and be less than preset value, and every time to data restore instruction implementation procedure power off after j
Value add one.
Another object of the present invention is to provide a kind of information data processing for realizing the intelligent control power-off method
Terminal.
Another object of the present invention is to provide a kind of computer readable storage mediums, including instruction, when it is in computer
When upper operation, so that computer executes the intelligent control power-off method.
Advantages of the present invention and good effect are as follows:
The present invention by power failure test module writes power failure test in data command implementation procedure to smart card and in number
According to the power failure test restored in execution process instruction, Test coverage is comprehensive, and solving existing single instrction power failure test can not examine
It surveys and executes power-off protection mechanism whether correct problem when data are restored in card；Pass through circuit monitoring module, alarm mould simultaneously
Block can detection circuit failure in time, and give a warning, staff reminded to properly protect measure.
The present invention realizes the write-in of correct data under the conditions of supply voltage is lower, reduces when reading data to being deposited
The interference for storing up data, improves the static noise margin of storage unit.
The present invention can effectively improve precision of prediction compared to more general traditional prediction method.
The present invention not only realizes the real-time prediction of electric current, voltage, but also the spatial coherence between considering.
The present invention not only allows for the spatial coherence of same period electric current, voltage data, and between considering when
Between correlation.Processing and the utilization degree of association for shortage of data judge the Similarity measures of different time segment data, compare
With the similitude between time segment data, precision of prediction is improved.
The present invention not only allows for the correlation between data during prediction, and what is established is nonlinear model,
Preferably reduce the problem of the deficiency of the precision of prediction as caused by randomness, fluctuation.
It has fully considered the spatial coherence between electric current, voltage, has been more in line with actual conditions.
It goes to predict electric current, voltage by a nonlinear prediction technique, be gone pair using Unscented kalman filtering
Electric current, voltage are predicted, it is ensured that its real-time predicted, and it is more in line with the practical rule of electric current, voltage, as a result more
It is accurate.
Pre-processing to data can be to avoid the predicted impact as caused by terms of data in subsequent steps.
Detailed description of the invention
Fig. 1 is that the present invention implements the intelligent control power-off method flow chart provided.
Fig. 2 is the circuit structure block diagram that the present invention implements the intelligent control provided power-off.
In Fig. 2: 1, power supply module；2, current detection module；3, voltage detection module；4, main control module；5, circuit monitoring
Module；6, power failure test module；7, alarm module；8, display module.
Fig. 3 is novel 9T SRAM cell circuit cell schematics provided in an embodiment of the present invention.
Fig. 4 is second schematic diagram of novel 9T SRAM cell circuit unit provided in an embodiment of the present invention.
Fig. 5 is third schematic diagram provided in an embodiment of the present invention.
Fig. 6 is the 4th schematic diagram provided in an embodiment of the present invention.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to embodiments, to the present invention
It is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not used to
Limit the present invention.
As shown in Figure 1, intelligent control power-off method provided in an embodiment of the present invention the following steps are included:
S101 is powered circuit by power supply module；Pass through the current data of current detection module detection circuit；It is logical
The voltage data of Zenith tracking module detection circuit；
S102, main control module dispatch circuit monitoring modular are monitored the operating condition of circuit；
S103 is tested by power-off mechanism of the power failure test module to circuit；By alarm module to circuit monitoring
The fault message of module monitors is alarmed；
S104 passes through the data information of display module display detection.
As shown in Fig. 2, the circuit of intelligent control power-off provided by the invention includes: power supply module 1, current detection module
2, voltage detection module 3, main control module 4, circuit monitoring module 5, power failure test module 6, alarm module 7, display module 8.
Power supply module 1 is connect with main control module 4, for being powered to circuit；
Current detection module 2 is connect with main control module 4, the current data for detection circuit；
Voltage detection module 3 is connect with main control module 4, the voltage data for detection circuit；
Main control module 4, with power supply module 1, current detection module 2, voltage detection module 3, circuit monitoring module 5, power-off
Test module 6, alarm module 7, display module 8 connect, and work normally for controlling modules；
Circuit monitoring module 5 is connect with main control module 4, is monitored for the operating condition to circuit；
Power failure test module 6 is connect with main control module 4, is tested for the power-off mechanism to circuit；
Alarm module 7 is connect with main control module 4, the fault message for being monitored by buzzer to circuit monitoring module 5
It alarms；
Display module 8 is connect with main control module 4, for showing the data information of detection.
6 test method of power failure test module provided by the invention is as follows:
Firstly, writing holding for data command to where more new record during smart card and reader are executed and traded
The power-off of row process；
Then, after the smart card electrification reset, judge whether record data in the smart card described in this transaction
It updates；
Finally, instructing if it is not, successively executing each item that this is traded by the smart card, and data command is write in execution
When, the implementation procedure that write data instruct is powered off according to the time of the first power-off timer setting；
Wherein, in the implementation procedure instructed every time according to the time that first power-off timer is set to write data
After power-off, circulation executes following process: to the smart card, electrification reset, each item for successively executing this transaction are instructed again,
When executing data recovery instruction, according to the time of the second power-off timer setting the data are restored with the implementation procedure of instruction
Power-off, and detect the data and restore whether instruction runs succeeded, then stop following until data occur and restoring instruction execution success
Ring.
It is provided by the invention execute data restore instruction when, according to the second power-off timer setting time to the number
Include: according to the implementation procedure power-off for restoring instruction
After the reader issues data recovery instruction to the smart card, the second power-off timer institute is reached
When at the time of setting, the implementation procedure for restoring instruction to the data is powered off, and second power-off timer is expressed as T2=t2+
(Δt2* j), wherein t2Indicate power-off start time point, Δ t2Indicate power-off step-length, j indicates the execution that data are restored with instruction
Journey power-off number, j since 1 ing value and be less than preset value, and every time to data restore instruction implementation procedure power off after j
Value add one.
Below with reference to concrete analysis, the invention will be further described.
The wordline of the integrated 9T SRAM cell circuit unit use reading data of voltage detection module, the wordline for writing data are each
It from separating, and reads the bit line of data, write the circuit framework that the bit line of data is individually separated, and in the defeated of second phase inverter
A transmission gate is inserted between outlet and the input terminal of first phase inverter to be used to control write-in data action；
9T SRAM cell circuit unit includes:
One transmission gate PG, for receiving the word-line signal WWL/WWLB from control write-in data, when needing that number is written
According to when, WWL=1, WWLB=0, PG are closed, and work as WWL=0, and when WWLB=1, PG conducting, data are latched；
Two phase inverters are used to latch data；
Two concatenated NMOS tubes, for reading data；
One metal-oxide-semiconductor, for receiving the word-line signal WWL/WWLB from control write-in data, when needing that data are written
When, at this moment the end Q is written in the data of WBL by WWL=1, metal-oxide-semiconductor conducting；
Described two phase inverters include: the phase inverter INV1 of MP1/MN1 composition, are used to latch data；
The phase inverter INV2 of MP2/MN2 composition, is used to latch data；
Two concatenated NMOS tubes include:
MN3: for reading data, grid connects QB, if QB is " 1 " MN3 conducting, if QB is " 0 ", MN3 shutdown；
MN4: for reading data, data wordline RWL is read in grid connection, and when reading data, RWL=1, MN3 conducting are read
Data bit line RBL send the information that storage unit stores to sense amplifier；
The metal-oxide-semiconductor is MNS or MPS；For receiving the word-line signal WWL/WWLB from control write-in data, work as needs
When data are written, at this moment the end Q is written in the data of WBL by WWL=1, MNS conducting；
Main control module, with power supply module, current detection module, voltage detection module, circuit monitoring module, power failure test mould
Block, alarm module, display module connection, work normally for controlling modules；
Circuit monitoring module, connect with main control module, is monitored for the operating condition to circuit；Circuit monitoring module
Monitoring method include:
1) initial data, electric current, voltage operating condition dataset acquisition data in circuit, to the data being collected into are selected
It carries out shortage of data inspection and supplements complete；
2): its rank correlation coefficient is calculated according to copula function to complete data are supplemented, according to the big of rank correlation coefficient
It is small to select suitable electric current, voltage input data；
3): the calculating of grey Absolute data relating extent being carried out to selected electric current, voltage data, according to grey Absolute data relating extent
What size relation determined model finally enters data；
4): modeling analysis being carried out to the data that finally enter of selection, establishes nonlinear state according to support vector regression
The state equation and measurement equation of spatial model, and estimation prediction is carried out by state of the Unscented kalman filtering to model；
5): according to the selection criteria of setting, the scale parameter in Unscented kalman filtering being optimized and updated, is obtained
Prediction result；
Power failure test module, connect with main control module, tests for the power-off mechanism to circuit；
Alarm module is connect with main control module, for by buzzer to the fault messages of circuit monitoring module monitors into
Row alarm；
Display module is connect with main control module, for showing the data information of detection.
The detailed process of step 1) are as follows: select the data of the same period of electric current, voltage；22 groups, every group of selection altogether
Then 192 data carry out missing to all collected data and check that being more than the direct of 30 data for missing data deletes
It removes, it is remaining to be filled using averaging method, if aiFor missing data, then the data of the position are filled into
If aiWhen the data of front and back 12 also have missing, recursion of drawing back forward, until obtaining the data of front and back 12；If aiFor
First data, then at this timeSimilarly, aiWhen for the last one data,If aiBefore in data set
When 12 and rear 12 data, still selection and the identical fill method of head and the tail；And then it obtains except No. 1, No. 8, No. 12, No. 13,15
The complete data set of other outer electric currents of number electric current, voltage, voltage.
The step 5) is to optimize to obtain to the scale parameter in Unscented kalman filtering according to error minimum principle
Prediction result.
The process of the step 5) is as follows:
The feasible set λ ∈ [0,12] of a specified scale parameter λ, update method is as follows:
(2) initial λ is selected；
Take it to beWherein λmax=12, λmin=0
(2) when updating, every time in original λjOn the basis of be added a random value ej, the value meet normal state variation, the phase
Hope to be 0, variance very little；
κj+=κj+ej ej∈N(0,Pe j), enable j=0,1 ...
(3) by above-mentioned λj+And λjIt substitutes into Unscented kalman filtering respectively and carries out prediction calculating；
(4) the prediction error for calculating the two takes the small person of error to enter and updates in next step；
If [zk|k-1(λj+)Tzk|k-1(λj+)] < [zk|k-1(λj)Tzk|k-1(λj)]
Then take λj+1=λj+
Otherwise λj+1=λj
(5) (2)-(4) step is recycled, until predicting that error reaches the threshold value of setting or update times reach established standards
When, it updates and stops, obtaining optimal scale parameter λ.
Kendall rank correlation coefficient includes:
Enable (x1,y1) and (x2,y2) it is independent identically distributed stochastic variable, definition
τ≡P[(x1-x2)(y1-y2) > 0]-P [(x1-x2)(y1-y2) < 0]
=2P [(x1-x2)(y1-y2) > 0] -1
For kendall rank correlation coefficient, it is denoted as τ.
If the edge distribution of stochastic variable X, Y are respectively F (x), G (y), corresponding copula function is C (u, v), wherein u
=F (x), v=G (y), u, v ∈ [0,1], then kendall rank correlation coefficient τ can have corresponding copula function C (u, v) to provide
Spearman rank correlation coefficient includes:
Enable (x1,y1),(x2,y2) and (x3,y3) it is independent identically distributed stochastic variable, definition
ρ≡3{P[(x1-x2)(y1-y3) > 0]-P [(x1-x2)(y1-y3) < 0]
For Spearman rank correlation coefficient, it is denoted as ρ.
If the edge distribution of stochastic variable X, Y are respectively F (x), G (y), corresponding copula function is C (u, v), wherein u
=F (x), v=G (y), u, v ∈ [0,1], then kendall rank correlation coefficient τ can have corresponding copula function C (u, v) to provide
Below with reference to concrete analysis, the invention will be further described.
As shown in Figures 3 to 6,9T SRAM cell circuit unit provided in an embodiment of the present invention,
Include a transmission gate (PG), two phase inverters (MP1/MN1 forms INV1 and MP2/MN2 and forms INV2), two
Concatenated NMOS tube (MN3 and MN4) and a metal-oxide-semiconductor (MNS or MPS).
Application principle of the invention is further described below with reference to working principle.
The MNS of the metal-oxide-semiconductor of novel 9T SRAM cell circuit unit provided in an embodiment of the present invention: it receives and is write from control
The word-line signal WWL/WWLB for entering data, when needing that data are written, at this moment Q is written in the data of WBL by WWL=1, MNS conducting
End；
PG: receiving the word-line signal WWL/WWLB from control write-in data, when needing that data are written, WWL=1,
WWLB=0, PG are closed, and work as WWL=0, and when WWLB=1, PG conducting, data are latched；
INV1, INV2: the phase inverter INV1 being made of MP1 and MN1 form phase inverter INV2 by MP2 and MN2, for locking
Deposit data；
MN3: for reading data, grid connects QB, if QB is " 1 " MN3 conducting, if QB is " 0 ", MN3 shutdown；
MN4: for reading data, data wordline RWL is read in grid connection, and when reading data, RWL=1, MN3 conducting are read
Data bit line RBL send the information that storage unit stores to sense amplifier.
Below with reference to basic read-write operation method, the invention will be further described.
Write operation: the waveform diagram of display data writing (assuming that the end Q becomes " 0 " from " 1 "), write data bits line first rush supreme in advance
Level, if writing " 0 " (original deposits " 1 ") into storage unit from the end Q, WBL is set to " 0 " by outside input circuit；Write data wordline
It is high level (WWLB=" 0 ") that WWL, which chooses drawing, and MNS is connected, and data write storage unit, PG is not turned at this time, and Q ' will not be with Q
It competes, the end Q is easier to be written into.After write-in, WWL=0, WWLB=1, PG conducting interlock INV1 and INV2.
Q ' will not be competed with Q when due to data write-in, even if vdd voltage declines, external data can also be successfully written.
Below with reference to read operation, the invention will be further described.
When reading data, WWL is " 0 ", and RBL is rushed to " 1 " in advance first, if the deposited state of storage unit is " 0 ", QB
=1 after read data words line RWL is drawn high, and MN3 is in the conductive state with MN4, and RBL is pulled low, and at this moment data output end is read
Data be " 0 "；If the deposited state of storage unit is " 1 ", for QB=0 after read data words line RWL is drawn high, MN3 is not
Conducting, MN4 is in the conductive state, and RBL remains high level state, and the data that at this moment data output end is read are " 1 ".
In the present invention, also it is individually separated due to not shared and reading and writing data the bit line of the wordline using reading and writing data
Method, interference when reading data unlike traditional 6T unit to storing data, has bigger noise margin.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within mind and principle.
Claims (10)
1. a kind of circuit of intelligent control power-off, which is characterized in that the circuit of the intelligent control power-off includes:
Power supply module is connect with main control module, for being powered to circuit；
Current detection module is connect with main control module, the current data for detection circuit；
Voltage detection module is connect with main control module, the voltage data for detection circuit；
The integrated 9T SRAM cell circuit unit of voltage detection module is respectively divided using the wordline for reading data, the wordline for writing data
It opens, and reads the bit line of data, writes the circuit framework that the bit line of data is individually separated, and in the output end of second phase inverter
A transmission gate is inserted between the input terminal of first phase inverter to be used to control write-in data action；
9T SRAM cell circuit unit includes:
One transmission gate PG, for receiving the word-line signal WWL/WWLB from control write-in data, when needing that data are written,
WWL=1, WWLB=0, PG are closed, and work as WWL=0, and when WWLB=1, PG conducting, data are latched；
Two phase inverters are used to latch data；
Two concatenated NMOS tubes, for reading data；
One metal-oxide-semiconductor, for receiving the word-line signal WWL/WWLB from control write-in data, when needing that data are written, WWL
=1, at this moment the end Q is written in the data of WBL by metal-oxide-semiconductor conducting；
Described two phase inverters include: the phase inverter INV1 of MP1/MN1 composition, are used to latch data；
The phase inverter INV2 of MP2/MN2 composition, is used to latch data；
Two concatenated NMOS tubes include:
MN3: for reading data, grid connects QB, if QB is " 1 " MN3 conducting, if QB is " 0 ", MN3 shutdown；
MN4: for reading data, data wordline RWL is read in grid connection, and when reading data, data are read in RWL=1, MN3 conducting
Bit line RBL send the information that storage unit stores to sense amplifier；
The metal-oxide-semiconductor is MNS or MPS；For receiving the word-line signal WWL/WWLB from control write-in data, when needing to be written
When data, at this moment the end Q is written in the data of WBL by WWL=1, MNS conducting；
Main control module, with power supply module, current detection module, voltage detection module, circuit monitoring module, power failure test module,
Alarm module, display module connection, work normally for controlling modules；
Circuit monitoring module, connect with main control module, is monitored for the operating condition to circuit；The prison of circuit monitoring module
Survey method includes:
1) initial data is selected, electric current, voltage operating condition dataset acquisition data in circuit carry out the data being collected into
Shortage of data is examined and is supplemented complete；
2): calculating its rank correlation coefficient according to copula function to complete data are supplemented, selected according to the size of rank correlation coefficient
Select suitable electric current, voltage input data；
3): the calculating of grey Absolute data relating extent being carried out to selected electric current, voltage data, the size according to grey Absolute data relating extent
What relationship determined model finally enters data；
4): modeling analysis being carried out to the data that finally enter of selection, establishes non-linear state space according to support vector regression
The state equation and measurement equation of model, and estimation prediction is carried out by state of the Unscented kalman filtering to model；
5): according to the selection criteria of setting, the scale parameter in Unscented kalman filtering being optimized and updated, is predicted
As a result；
Power failure test module, connect with main control module, tests for the power-off mechanism to circuit；
Alarm module is connect with main control module, for being reported by fault message of the buzzer to circuit monitoring module monitors
It is alert；
Display module is connect with main control module, for showing the data information of detection.
2. the circuit of intelligent control power-off as described in claim 1, which is characterized in that the detailed process of step 1) are as follows: choosing
Select the data of the same period of electric current, voltage；22 groups of selection altogether, every group of 192 data, then to all collected numbers
The direct deletion for being more than 30 data for missing data according to missing inspection is carried out, it is remaining to be filled using averaging method, if
aiFor missing data, then the data of the position are filled into
If aiWhen the data of front and back 12 also have missing, recursion of drawing back forward, until obtaining the data of front and back 12；If aiIt is first
A data, then at this timeSimilarly, aiWhen for the last one data,If aiFor 12 He preceding in data set
Afterwards when 12 data, still selection and the identical fill method of head and the tail；And then it obtains except No. 1, No. 8, No. 12, No. 13, No. 15 electricity
The complete data set of other outer electric currents of stream, voltage, voltage.
3. the circuit of intelligent control power-off as described in claim 1, which is characterized in that the step 5) be according to error most
Small principle optimizes to obtain prediction result to the scale parameter in Unscented kalman filtering.
4. the circuit of intelligent control power-off as described in claim 1, which is characterized in that the process of the step 5) is as follows:
The feasible set λ ∈ [0,12] of a specified scale parameter λ, update method is as follows:
(1) initial λ is selected；
Take it to beWherein λmax=12, λmin=0
(2) when updating, every time in original λjOn the basis of be added a random value ej, the value meet normal state variation, be desired for
0, variance very little；
κj+=κj+ej J=0,1 is enabled ...
(3) by above-mentioned λj+And λjIt substitutes into Unscented kalman filtering respectively and carries out prediction calculating；
(4) the prediction error for calculating the two takes the small person of error to enter and updates in next step；
If [zk|k-1(λj+)Tzk|k-1(λj+)] < [zk|k-1(λj)Tzk|k-1(λj)]
Then take λj+1=λj+
Otherwise λj+1=λj
(5) (2)-(4) step is recycled, when prediction error reaches the threshold value of setting or update times reach established standards, more
It is new to stop, obtaining optimal scale parameter λ.
5. the circuit of intelligent control power-off as described in claim 1, which is characterized in that
Kendall rank correlation coefficient includes:
Enable (x1,y1) and (x2,y2) it is independent identically distributed stochastic variable, definition
τ≡P[(x1-x2)(y1-y2) > 0]-P [(x1-x2)(y1-y2) < 0]
=2P [(x1-x2)(y1-y2) > 0] -1
For kendall rank correlation coefficient, it is denoted as τ.
If the edge distribution of stochastic variable X, Y are respectively F (x), G (y), corresponding copula function is C (u, v), wherein u=F
(x), v=G (y), u, v ∈ [0,1], then kendall rank correlation coefficient τ can have corresponding copula function C (u, v) to provide
Spearman rank correlation coefficient includes:
Enable (x1,y1),(x2,y2) and (x3,y3) it is independent identically distributed stochastic variable, definition
ρ≡3{P[(x1-x2)(y1-y3) > 0]-P [(x1-x2)(y1-y3) < 0]
For Spearman rank correlation coefficient, it is denoted as ρ.
If the edge distribution of stochastic variable X, Y are respectively F (x), G (y), corresponding copula function is C (u, v), wherein u=F
(x), v=G (y), u, v ∈ [0,1], then kendall rank correlation coefficient τ can have corresponding copula function C (u, v) to provide
6. a kind of intelligent control power-off method of the circuit of control power-off intelligent as described in claim 1, which is characterized in that
The intelligent control power-off method the following steps are included:
Step 1 is powered circuit by power supply module；Pass through the current data of current detection module detection circuit；Pass through
The voltage data of voltage detection module detection circuit；
Step 2, main control module dispatch circuit monitoring modular are monitored the operating condition of circuit；
Step 3 is tested by power-off mechanism of the power failure test module to circuit；By alarm module to circuit monitoring mould
The fault message of block monitoring is alarmed；
Step 4 passes through the data information of display module display detection.
7. intelligent control power-off method as claimed in claim 6, which is characterized in that the power failure test module test method
It is as follows:
Firstly, during smart card and reader are executed and traded, to the execution for writing data command where more new record
Journey power-off；
Then, after the smart card electrification reset, judge whether record data update in the smart card described in this transaction；
Finally, instructed if it is not, successively executing each item that this is traded by the smart card, and when data command is write in execution,
The implementation procedure that write data instruct is powered off according to the time of the first power-off timer setting；
Wherein, the implementation procedure that write data instruct is powered off in the time every time according to first power-off timer setting
Afterwards, circulation executes following process: to the smart card, electrification reset, each item for successively executing this transaction are instructed, are being held again
When row data restore instruction, the implementation procedure for restoring instruction to the data according to the time of the second power-off timer setting is disconnected
Electricity, and detect the data and restore whether instruction runs succeeded, then stop recycling until data occur and restoring instruction execution success.
8. intelligent control power-off method as claimed in claim 7, which is characterized in that described to execute data recovery instruction
When, include: according to the implementation procedure power-off that the time of the second power-off timer setting restores instruction to the data
After the reader issues data recovery instruction to the smart card, reach set by second power-off timer
At the time of when, the implementation procedure for restoring instruction to the data powers off, and second power-off timer is expressed as T2=t2+(Δ
t2* j), wherein t2Indicate power-off start time point, Δ t2Indicate power-off step-length, j indicates the implementation procedure that data are restored with instruction
The number of power-off, j value and is less than preset value since 1, and the j after the implementation procedure power-off that every time data are restored with instruction
Value adds one.
9. a kind of information data processing terminal for realizing intelligent control power-off method described in claim 6~8 any one.
10. a kind of computer readable storage medium, including instruction, when run on a computer, so that computer executes such as
Intelligent control power-off method described in claim 6~8 any one.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110880743A (en) * | 2019-12-02 | 2020-03-13 | 华北电力大学 | Kendel rank correlation-based pilot protection method for outgoing line of wind power plant |
| CN111013120A (en) * | 2019-12-23 | 2020-04-17 | 重庆工商大学 | Sliding seesaw control system and method for snowfield entertainment |
| CN117929973A (en) * | 2024-03-21 | 2024-04-26 | 星汉智能科技股份有限公司 | Smart card aging test method, smart card aging test device and storage medium |
| CN118016143A (en) * | 2024-03-21 | 2024-05-10 | 星汉智能科技股份有限公司 | Smart card power-off test method, terminal and storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105320809A (en) * | 2015-09-30 | 2016-02-10 | 西安电子科技大学 | Wind speed prediction method for wind farm spatial correlation |
| CN107123440A (en) * | 2017-04-27 | 2017-09-01 | 苏州无离信息技术有限公司 | A kind of new 9TSRAM element circuits system |
| CN107729196A (en) * | 2017-09-30 | 2018-02-23 | 东信和平科技股份有限公司 | Smart card power failure test method |
-
2018
- 2018-08-02 CN CN201810870329.1A patent/CN109032845A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105320809A (en) * | 2015-09-30 | 2016-02-10 | 西安电子科技大学 | Wind speed prediction method for wind farm spatial correlation |
| CN107123440A (en) * | 2017-04-27 | 2017-09-01 | 苏州无离信息技术有限公司 | A kind of new 9TSRAM element circuits system |
| CN107729196A (en) * | 2017-09-30 | 2018-02-23 | 东信和平科技股份有限公司 | Smart card power failure test method |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110880743A (en) * | 2019-12-02 | 2020-03-13 | 华北电力大学 | Kendel rank correlation-based pilot protection method for outgoing line of wind power plant |
| CN111013120A (en) * | 2019-12-23 | 2020-04-17 | 重庆工商大学 | Sliding seesaw control system and method for snowfield entertainment |
| CN117929973A (en) * | 2024-03-21 | 2024-04-26 | 星汉智能科技股份有限公司 | Smart card aging test method, smart card aging test device and storage medium |
| CN118016143A (en) * | 2024-03-21 | 2024-05-10 | 星汉智能科技股份有限公司 | Smart card power-off test method, terminal and storage medium |
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