CN109031722B - Circuit and method for detecting overline electrostatic short circuit defect of liquid crystal panel - Google Patents
Circuit and method for detecting overline electrostatic short circuit defect of liquid crystal panel Download PDFInfo
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- CN109031722B CN109031722B CN201810960048.5A CN201810960048A CN109031722B CN 109031722 B CN109031722 B CN 109031722B CN 201810960048 A CN201810960048 A CN 201810960048A CN 109031722 B CN109031722 B CN 109031722B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
Abstract
The invention discloses a detection circuit for the overline electrostatic short circuit defect of a liquid crystal panel, which comprises: a first signal circuit including a plurality of first signal input terminals and a plurality of first signal lines; the first detection circuit comprises a plurality of first detection ends and a plurality of first detection lines; a second signal circuit including a plurality of second signal input terminals and a plurality of second signal lines; the second liquid crystal panel and the first liquid crystal panel are different in size; the second detection circuit comprises a plurality of second detection ends and a plurality of second detection lines; the first detection circuit further includes a third detection terminal connected to the second detection line through a third detection line. The invention also discloses a detection method of the detection circuit. The circuit and the method for detecting the overline electrostatic defect of the liquid crystal panel can detect the overline electrostatic short circuit defect during the line detection of the liquid crystal panel, intercept defective products in time and avoid the cost waste caused by the flowing of the defective products into the next procedure.
Description
Technical Field
The invention belongs to the technical field of liquid crystal display, and particularly relates to a detection circuit and a detection method for an overline electrostatic short circuit defect of a liquid crystal panel.
Background
The MMG (Multi-model Glass) cutting technology is to mix two liquid crystal panels with different sizes on the same Glass substrate, and the utilization rate of the Glass substrate is greatly improved by the technology. For example, the cutting utilization rate of the 43-inch liquid crystal panel is only 75 percent in the G8.5 generation line; and the cutting utilization rate of mixing the 43-inch liquid crystal panel and the 22-inch liquid crystal panel is up to 97 percent.
However, the current traces (alignment traces) of MMG mode products (e.g. 22&43 inches) are generally single-sided traces, and the trace cross-line density of the liquid crystal panels with different peripheral dimensions is large, which causes ESD (Electro-Static discharge) to be easily generated in the manufacturing process, damage to the traces and affect the yield. The adjacent routing wires are easy to generate electrostatic discharge at the cross-wire part, so that the upper and lower layers of metal circuits at the cross-wire part are short-circuited. In the production process of the liquid crystal panel, the circuits of the liquid crystal panel are detected through an ATS TEST (automatic TEST) process, but the ATS TEST detection can only be used for respectively detecting the liquid crystal panels with different sizes, for example, the circuits of the 22-inch liquid crystal panel and the 43-inch liquid crystal panel are respectively detected, so that the electrostatic short circuit defect at the cross-line position of the circuits of the 43-inch liquid crystal panel and the circuits of the 22-inch liquid crystal panel cannot be detected, the product with the cross-line electrostatic short circuit defect is leaked to a next process, the cost is wasted, and the difficulty of subsequently analyzing the defect is increased.
Therefore, how to detect the overline electrostatic short defect when performing ATS TEST is a problem to be solved in the industry.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a detection circuit and a detection method for detecting the cross-line electrostatic short defect of the liquid crystal panel, which can effectively detect the cross-line electrostatic short defect.
In order to achieve the purpose of the invention, the invention adopts the following technical scheme:
according to an aspect of the present invention, there is provided a detection circuit of a flying electrostatic short defect of a liquid crystal panel, the detection circuit including:
a first signal circuit including a plurality of first signal input terminals and a plurality of first signal lines, the plurality of first signal input terminals being connected to a first liquid crystal panel formed on the substrate through the plurality of first signal lines;
a first detection circuit including a plurality of first detection terminals and a plurality of first detection lines, the plurality of first detection terminals being connected to the plurality of first signal lines through the plurality of first detection lines;
a second signal circuit including a plurality of second signal input terminals connected to a second liquid crystal panel formed on the substrate through a plurality of second signal lines and a plurality of second signal lines; wherein the second liquid crystal panel and the first liquid crystal panel are different in size;
a second detection circuit including a plurality of second detection terminals and a plurality of second detection lines, the plurality of second detection terminals being connected to the plurality of second signal lines through the plurality of second detection lines, each of the second detection lines being arranged to cross the plurality of first signal lines;
the first detection circuit further comprises a third detection terminal connected to the second detection line through a third detection line, and the connection between the third detection line and the second detection line is located between the plurality of second detection terminals and the plurality of first signal lines;
the third detection end is used for applying a first detection voltage to the third detection line, the first signal input end is used for applying a second detection voltage different from the first detection voltage to the first signal line, and the first detection end is used for detecting whether the feedback voltage on the first signal line is within a preset normal voltage range.
Further, the third detection terminal is connected to a second detection line crossing the first signal line and the second signal line most through the third detection line.
Further, the direction sequence of the plurality of first signal lines from the plurality of second detection terminals to the plurality of second signal lines includes: the display panel comprises a first color film substrate common electrode signal line, a first array substrate common electrode signal line, a first grid even electrode signal line, a first grid odd electrode signal line, a first red pixel signal line, a first green pixel signal line and a first blue pixel signal line.
Further, the direction of the plurality of second signal lines from the plurality of second detection terminals to the plurality of first signal input terminals sequentially includes: the second array substrate common electrode signal line, the second grid even electrode signal line, the second grid odd electrode signal line, the second red pixel signal line, the second green pixel signal line, the second blue pixel signal line and the second color film substrate common electrode signal line.
Further, the direction order of the plurality of first detection lines from the plurality of first signal lines to the plurality of first signal input terminals includes: the liquid crystal display panel comprises a first color film substrate common electrode detection line, a first array substrate common electrode detection line, a first grid even electrode detection line, a first grid odd electrode detection line, a first red pixel detection line, a first green pixel detection line and a first blue pixel detection line.
Further, the direction order of the plurality of second detection lines from the plurality of first signal lines to the plurality of first signal input terminals includes:
a second color film substrate common electrode detection line crossing the plurality of first signal lines, the second array substrate common electrode signal lines, the second gate even electrode signal lines, the second gate odd electrode signal lines, the second red pixel signal lines, and the second blue pixel signal lines, and the second color film substrate common electrode detection line being connected to the second color film substrate common electrode signal lines;
the second array substrate common electrode detection lines cross the plurality of first signal lines and are connected with the second color film substrate common electrode signal lines;
a second gate couple electrode detection line crossing the plurality of first signal lines and the second array substrate common electrode signal line, and connected to the second gate couple electrode signal line;
a second gate odd electrode detection line crossing the plurality of first signal lines, the second array substrate common electrode signal line, and the second gate even electrode signal line, and connected to the second gate odd electrode signal line;
a second red pixel detection line crossing the plurality of first signal lines, the second array substrate common electrode signal line, the second gate even electrode signal line, and the second gate odd electrode signal line, and connected to the second red pixel signal line;
a second green pixel detection line crossing the plurality of first signal lines, the second array substrate common electrode signal line, the second gate even electrode signal line, the second gate odd electrode signal line, the second red pixel signal line, and connected to the second green pixel signal line;
a second blue pixel detection line crossing the plurality of first signal lines, the second array substrate common electrode signal line, the second gate even electrode signal line, the second gate odd electrode signal line, the second red pixel signal line, the second green pixel signal line, and connected to the second blue pixel signal line.
Further, the third detection line is connected with the second color film substrate common electrode detection line.
Further, if the plurality of first signal lines are detected simultaneously, the third detection end is configured to apply a first detection voltage to the third detection line, each first signal input end is configured to apply a second detection voltage different from each other to each first signal line, the second detection voltage is different from the first detection voltage, and each first detection end is configured to detect whether the feedback voltage on each first signal line is within a preset normal voltage range.
According to another aspect of the present invention, there is also provided a detection method of the detection circuit described above, the detection method including the steps of:
the third detection terminal applies a first detection voltage to the third detection line;
the first signal input terminal applies a second detection voltage to the first signal line; wherein the second detection voltage is different from the first detection voltage;
the first detection end detects whether the feedback voltage on the first signal line is within a preset normal voltage range;
and if not, the cross-line electrostatic short circuit defect exists between the first signal line and the second detection line connected with the third detection line.
Further, if the plurality of first signal lines are simultaneously detected, second detection voltages applied to different first signal lines are different from each other, and the second detection voltages are different from the first detection voltages.
The invention has the beneficial effects that: the circuit and the method for detecting the overline electrostatic defect of the liquid crystal panel can detect the overline electrostatic short circuit defect during the line detection of the liquid crystal panel, intercept defective products in time and avoid the cost waste caused by the flowing of the defective products into the next procedure.
Drawings
The above and other aspects, features and advantages of embodiments of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:
fig. 1 is a schematic structural diagram of a circuit for detecting a cross-line electrostatic short defect of a liquid crystal panel according to a first embodiment of the invention;
fig. 2 is a flowchart of a method for detecting a cross-line electrostatic short defect of a liquid crystal panel according to a second embodiment of the invention.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. Rather, these embodiments are provided to explain the principles of the invention and its practical application to thereby enable others skilled in the art to understand the invention for various embodiments and with various modifications as are suited to the particular use contemplated. In the drawings, the shapes and sizes of elements may be exaggerated for clarity, and the same reference numerals will be used throughout to designate the same or similar elements.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.
Example one
Fig. 1 is a schematic structural diagram of a circuit for detecting a cross-line electrostatic short defect of a liquid crystal panel according to a first embodiment of the invention. The lines in the figure are marked by solid black dots at the line-to-line crossing positions, and the lines at the line-to-line crossing positions are not marked by the solid black dots, so that the lines at the line-to-line crossing positions are mutually insulated and are not mutually conducted.
Referring to fig. 1, a first embodiment of the invention provides a circuit for detecting a cross-line electrostatic short defect of a liquid crystal panel. The circuit comprises: a first signal circuit 200, a first detection circuit 300, a second signal circuit 500, and a second detection circuit 600. The first detecting circuit 300 further includes a third detecting terminal 340 and a third detecting line 330 for detecting the cross-line electrostatic short defect between the first liquid crystal panel 100 and the second liquid crystal panel 400. It is to be understood that the present invention is not limited thereto, and the detection circuit of the flying lead electrostatic short defect of the liquid crystal panel according to the embodiment of the present invention may also include other necessary components, such as a built-in detection line of the first liquid crystal panel 100 and a built-in detection line of the second liquid crystal panel 400.
Specifically, the first signal circuit 200 includes a plurality of first signal input terminals 220 and a plurality of first signal lines 210, and the plurality of first signal input terminals 220 are connected to the first liquid crystal panel 100 formed on the substrate through the plurality of first signal lines 210. The first signal circuit 200 is used to provide an input signal of the first liquid crystal panel 100.
The first sensing circuit 300 includes a plurality of first sensing terminals 320 and a plurality of first sensing lines 310. The first sensing terminals 320 are connected to the first signal lines 210 through the first sensing lines 310. Specifically, the first detection terminals 320 correspond to the first detection lines 310 one to one. And the plurality of first detection lines 310 correspond to the plurality of first signal lines 210 one to one. In one embodiment of the present invention, the first detection terminal 320 is disposed on a side of the first signal circuit 200 away from the first liquid crystal panel 100. The first detection circuit 300 is used for detecting the first signal circuit 200. As an embodiment of the present invention, the first sensing circuit 300 further includes at least one third sensing terminal 340 and at least one third sensing line 330 corresponding to the third sensing terminal 340. The connection relationship between the third detection line 330 and the third detection terminal 340 will be described in the following.
Specifically, the second signal circuit 500 includes a plurality of second signal input terminals 520 and a plurality of second signal lines 510, and the plurality of second signal input terminals 520 are connected to the second liquid crystal panel 400 formed on the substrate through the plurality of second signal lines 510. The second signal circuit 500 is used to provide an input signal to the second liquid crystal panel 400. In one embodiment of the present invention, the second signal circuit 500 is disposed between the first signal circuit 200 and the second liquid crystal panel 400.
The second sensing circuit 600 includes a plurality of second sensing terminals 620 and a plurality of second sensing lines 610. The second sensing terminals 620 are connected to the second signal lines 510 through the second sensing lines 610. Specifically, the plurality of second detection terminals 620 corresponds to the plurality of second detection lines 610 one to one. And the plurality of second detection lines 610 correspond to the plurality of second signal lines 510 one to one. In one embodiment of the present invention, the plurality of second detecting terminals 620 are disposed on a side of the first signal circuit 200 away from the second signal circuit 500. Accordingly, the second sensing line 610 connecting the second sensing terminal 620 and the second signal line 510 crosses the plurality of first signal lines 210, and the second sensing line 610 crosses a portion of the second signal lines 510. The second detection circuit 600 is used for detecting the second signal circuit 500.
As an embodiment of the present invention, the third sensing terminal 340 is connected to the second sensing line 610 through the third sensing line 330. The connection of the third sensing line 330 and the second sensing line 610 is between the second sensing terminal 620 and the plurality of first signal lines 210. Thus, when the detection voltage is applied to the third detection line 330, a voltage difference exists between the second detection line 610 connected to the third detection line 330 and the first signal line 210 to be detected, and whether or not the cross-line electrostatic short defect occurs between the first signal line 210 and the second detection line 610 can be detected by detecting the feedback voltage of the first detection line 310. As is clear from the background art, since the lines of the first liquid crystal panel 100 and the second liquid crystal panel 400 are detected separately, the cross-line electrostatic defect between the lines of the first liquid crystal panel 100 and the second liquid crystal panel 400 cannot be detected. In the present embodiment, the third detection line 330 is added in the first detection circuit 300 and connected to the second detection line 610 having a risk of cross-line static electricity, and detection is performed simultaneously when the first liquid crystal panel 100 detects, so as to detect whether a cross-line reduction defect exists between the second detection line 610 connected to the third detection line 330 and the first signal circuit 200.
When the lines of the first liquid crystal panel 100 are detected, a first detection voltage is applied to the third detection line 330 through the third detection terminal 340, and a second detection voltage different from the first detection voltage is applied to the first signal line 210 through the first signal input terminal 220. Whether the feedback voltage on the first signal line 210 is within a preset normal voltage range is detected through the first detection terminal 320, if there is no cross-line electrostatic short defect between the second detection line 610 and the first signal line 210, the detected feedback voltage is within the normal voltage range, and if there is a cross-line electrostatic short defect between the second detection line 610 and the first signal line 210, the detected feedback voltage is not within the normal voltage range.
If the plurality of first signal lines 210 are simultaneously detected, the third detection terminal 340 is configured to apply a first detection voltage to the third detection line 330, and each of the first signal input terminals 220 is configured to apply a second detection voltage different from each other to each of the first signal lines 210. When the plurality of first signal lines 210 are detected simultaneously, it is only necessary to apply different second detection voltages to the respective first signal lines 210 to detect which one of the first signal lines 210 and the second detection line 610 has the cross-line electrostatic short defect. And the second detection voltage is different from the first detection voltage. Each first detection terminal 320 is used for detecting whether the feedback voltage on each first signal line 210 is within a preset normal voltage range.
As an embodiment of the present invention, the third sensing terminal 340 is connected to the second sensing line 610 that crosses the first signal line 210 and the second signal line 510 most through the third sensing line 330. Since the second detection line 610 crosses the plurality of first signal lines 210 and the second detection line 610 crosses a portion of the second signal lines 510, the more intersections, the greater the risk of the cross-line electrostatic short defect.
As an embodiment of the present invention, the direction of the plurality of first signal lines 210 from the plurality of second detection terminals 620 to the plurality of second signal lines 510 sequentially includes: a first color filter substrate common electrode signal line 217, a first array substrate common electrode signal line 216, a first gate even electrode signal line 215, a first gate odd electrode signal line 214, a first red pixel signal line 213, a first green pixel signal line 212, and a first blue pixel signal line 211. It is understood that the present invention is not limited thereto, and the first signal lines 210 may be arranged in other orders in other embodiments. As another embodiment of the present invention, the plurality of first signal lines 210 may not include the first array substrate common electrode signal line 216.
As an embodiment of the present invention, the direction of the plurality of second signal lines 510 from the plurality of second detection terminals 620 to the plurality of first signal input terminals 220 sequentially includes: a second array substrate common electrode signal line 511, a second gate even electrode signal line 512, a second gate odd electrode signal line 513, a second red pixel signal line 514, a second green pixel signal line 515, a second blue pixel signal line 516, and a second color film substrate common electrode signal line 517. It is understood that the present invention is not limited thereto, and the second signal lines 510 may be arranged in other orders in other embodiments. As another embodiment of the present invention, the plurality of second signal lines 510 may not include the second array substrate common electrode signal line 511.
As an embodiment of the present invention, the direction of the plurality of first detection lines 310 from the plurality of first signal lines 210 to the plurality of first signal input terminals 220 sequentially includes: the color filter substrate common electrode detection line 311, the first array substrate common electrode detection line 312, the first gate even electrode detection line 313, the first gate odd electrode detection line 314, the first red pixel detection line 315, the first green pixel detection line 316, and the first blue pixel detection line 317. It is understood that the present invention is not limited thereto, and the order of the first detection lines 310 may be in other arrangements in other embodiments.
As an embodiment of the present invention, the direction of the plurality of second detection lines 610 from the plurality of first signal lines 210 to the plurality of first signal input terminals 220 sequentially includes: a second color film substrate common electrode detection line 611, a second array substrate common electrode detection line 612, a second gate even electrode detection line 613, a second gate odd electrode detection line 614, a second red pixel detection line 615, a second green pixel detection line 616, and a second blue pixel detection line 617. It is understood that the present invention is not limited thereto, and the order of the second detection lines 610 may be in other arrangements in other embodiments.
Specifically, the second color filter substrate common electrode detection line 611 crosses over a plurality of first signal lines 210, a plurality of second array substrate common electrode signal lines 511, a plurality of second gate even electrode signal lines 512, a plurality of second gate odd electrode signal lines 513, a plurality of second red pixel signal lines 514, and a plurality of second blue pixel signal lines 516; and the second color filter substrate common electrode detection line 611 is connected to the second color filter substrate common electrode signal line 517.
The second array substrate common electrode detection line 612 crosses the plurality of first signal lines 210, and the second array substrate common electrode detection line 612 is connected to the second array substrate common electrode signal line 511.
The second gate couple electrode detection line 613 crosses the plurality of first signal lines 210 and the second array substrate common electrode signal line 511; and the second gate couple electrode detection line 613 is connected to the second gate couple electrode signal line 512.
The second gate odd electrode detection line 614 crosses over the plurality of first signal lines 210, the second array substrate common electrode signal line 511, and the second gate even electrode signal line 512; and the second gate odd electrode detection line 614 is connected to the second gate odd electrode signal line 513.
The second red pixel detection line 615 crosses over the plurality of first signal lines 210, the second array substrate common electrode signal line 511, the second gate even electrode signal line 512, and the second gate odd electrode signal line 513; and the second red pixel detection line 615 is connected to the second red pixel signal line 514.
The second green pixel detection line 616 crosses the plurality of first signal lines 210, the second array substrate common electrode signal line 511, the second gate even electrode signal line 512, the second gate odd electrode signal line 513, and the second red pixel signal line 514; and the second green pixel detection line 616 is connected to the second green pixel signal line 515.
The second blue pixel detection line 617 crosses the plurality of first signal lines 210, the second array substrate common electrode signal line 511, the second gate even electrode signal line 512, the second gate odd electrode signal line 513, the second red pixel signal line 514, and the second green pixel signal line 515; and the second blue pixel detection line 617 is connected to the second blue pixel signal line 516.
As an embodiment of the present invention, the third inspection line 330 is connected to the second color filter substrate common electrode inspection line 611. The second color filter substrate common electrode detection line 611 intersects with the plurality of first signal lines 210 and the plurality of second signal lines 510 most, so that the risk of the second color filter substrate common electrode detection line 611 and the plurality of first signal lines 210 having an inter-line electrostatic short defect is the greatest. It is understood that the third sensing line 330 may also be connected to other second sensing lines 610 for detecting whether there is a cross-line electrostatic defect in the other second sensing lines 610, which is not limited in the present invention.
As described in the background, the present invention is directed to a detection circuit for MMG mode products. In one embodiment of the present invention, the first liquid crystal panel 100 has a size of 22 inches, and the second liquid crystal panel 400 has a size of 43 inches. It is to be understood that the present invention is not limited thereto, and the sizes of the first and second liquid crystal panels 100 and 400 may be other sizes.
The circuit for detecting the overline electrostatic defect of the liquid crystal panel can detect the overline electrostatic short circuit defect when detecting the line of the liquid crystal panel, intercept defective products in time and avoid the cost waste caused by the fact that the defective products flow into the next procedure.
Example two
Fig. 2 is a flowchart of a method for detecting a cross-line electrostatic short defect of a liquid crystal panel according to a second embodiment of the invention.
Referring to fig. 2, a second embodiment of the invention provides a method for detecting an array of crossing line electrostatic short defects. The method comprises the following steps:
s100, the third detection terminal 340 applies a first detection voltage to the third detection line 330;
s200, the first signal input terminal 220 applies a second detection voltage to the first signal line 210; wherein the second detection voltage is different from the first detection voltage;
specifically, the first detection voltage is different from the second detection voltage, and a voltage difference exists between the second detection line 610 connected to the cross-line electrostatic detection line and the first signal line 210 to be detected, and the presence of the cross-line electrostatic defect can be detected only by the existence of the voltage difference.
S300, the first detection terminal 320 detects whether the feedback voltage on the first signal line 210 is within a preset normal voltage range;
if there is no cross-line electrostatic short defect between the second detection line 610 connected to the third detection line 330 and the first signal line 210 to be detected, the measured feedback voltage is within the threshold range of normal operation. The threshold range of the feedback voltage for normal operation is related to the second detection voltage applied to the first signal line 210 to be detected. If there is a cross-line electrostatic short defect between the second detection line 610 connected to the third detection line 330 and the first signal line 210 to be detected, a short circuit occurs in a line at the cross-line between the second detection line 610 connected to the third detection line 330 and the first signal line 210 to be detected, which causes an abnormal magnitude of the feedback voltage.
S400, if not, an overline electrostatic short circuit defect exists between the first signal line 210 and a second detection line 610 connected with the third detection line 330.
In one embodiment of the present invention, when the plurality of first signal lines 210 are simultaneously detected, the second detection voltages applied to the different first signal lines 210 are different from each other, and the second detection voltage is different from the first detection voltage. If the second detection voltages applied to the first signal lines 210 to be detected at the same time are the same, the magnitude of the feedback voltage is affected, and it cannot be determined which of the first signal lines 210 has a problem. The first detection voltage has to be different from the second detection voltage, so that the voltage difference between the second detection line 610 connected to the third detection line 330 and the first signal line 210 to be detected is only generated, and the presence of the cross-line electrostatic defect can be detected only when the voltage difference exists.
The detection method of the circuit for detecting the overline electrostatic defect of the liquid crystal panel can detect the overline electrostatic short circuit defect during the line detection of the liquid crystal panel, intercept defective products in time and avoid the cost waste caused by the fact that the defective products flow into the next procedure.
While the invention has been shown and described with reference to certain embodiments, those skilled in the art will understand that: various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims and their equivalents.
Claims (10)
1. A detection circuit for a flying electrostatic short defect of a liquid crystal panel is characterized by comprising:
a first signal circuit (200) including a plurality of first signal input terminals (220) and a plurality of first signal lines (210), the plurality of first signal input terminals (220) being connected to a first liquid crystal panel (100) formed on a substrate through the plurality of first signal lines (210);
a first sensing circuit (300) including a plurality of first sensing terminals (320) and a plurality of first sensing lines (310), the plurality of first sensing terminals (320) being connected to the plurality of first signal lines (210) through the plurality of first sensing lines (310);
a second signal circuit (500) including a plurality of second signal input terminals (520) and a plurality of second signal lines (510), the plurality of second signal input terminals (520) being connected to a second liquid crystal panel (400) formed on the substrate through the plurality of second signal lines (510); wherein the second liquid crystal panel (400) and the first liquid crystal panel (100) are different in size;
a second sensing circuit (600) including a plurality of second sensing terminals (620) and a plurality of second sensing lines (610), the plurality of second sensing terminals (620) being connected to the plurality of second signal lines (510) through the plurality of second sensing lines (610), each of the second sensing lines (610) being disposed to cross the plurality of first signal lines (210);
the first detection circuit (300) further comprises a third detection terminal (340), the third detection terminal (340) is connected to the second detection line (610) through a third detection line (330), and the connection position of the third detection line (330) and the second detection line (610) is located between the plurality of second detection terminals (620) and the plurality of first signal lines (210);
wherein the third detection terminal (340) is configured to apply a first detection voltage to the third detection line (330), the first signal input terminal (220) is configured to apply a second detection voltage different from the first detection voltage to the first signal line (210), and the first detection terminal (320) is configured to detect whether a feedback voltage on the first signal line (210) is within a preset normal voltage range.
2. The circuit of claim 1, wherein the third detection terminal (340) is connected to a second detection line (610) crossing the first signal line (210) and the second signal line (510) most through the third detection line (330).
3. The circuit of claim 2, wherein the direction of the first plurality of signal lines (210) from the second plurality of sensing terminals (620) to the second plurality of signal lines (510) sequentially comprises: the display panel comprises a first color film substrate common electrode signal line (217), a first array substrate common electrode signal line (216), a first grid even electrode signal line (215), a first grid odd electrode signal line (214), a first red pixel signal line (213), a first green pixel signal line (212) and a first blue pixel signal line (211).
4. The circuit of claim 3, wherein the direction of the second plurality of signal lines (510) from the second plurality of detection terminals (620) to the first plurality of signal input terminals (220) sequentially comprises: the display panel comprises a second array substrate common electrode signal line (511), a second grid even electrode signal line (512), a second grid odd electrode signal line (513), a second red pixel signal line (514), a second green pixel signal line (515), a second blue pixel signal line (516) and a second color film substrate common electrode signal line (517).
5. The circuit of claim 4, wherein the directional sequence of the plurality of first detection lines (310) from the plurality of first signal lines (210) to the plurality of first signal inputs (220) comprises: the liquid crystal display panel comprises a first color film substrate common electrode detection line (311), a first array substrate common electrode detection line (312), a first grid even electrode detection line (313), a first grid odd electrode detection line (314), a first red pixel detection line (315), a first green pixel detection line (316) and a first blue pixel detection line (317).
6. The circuit of claim 4, wherein the directional sequence of the plurality of second detection lines (610) from the plurality of first signal lines (210) to the plurality of first signal inputs (220) comprises:
a second color filter substrate common electrode detection line (611) crossing the plurality of first signal lines (210), the second array substrate common electrode signal line (511), the second gate even electrode signal line (512), the second gate odd electrode signal line (513), the second red pixel signal line (515), and the second blue pixel signal line (516), and the second color filter substrate common electrode detection line (611) is connected to the second color filter substrate common electrode signal line (517);
a second array substrate common electrode detection line (612) crossing the plurality of first signal lines (210), and the second array substrate common electrode detection line (612) being connected with the second array substrate common electrode signal line (511);
a second gate couple electrode detecting line (613) crossing the plurality of first signal lines (210), the second array substrate common electrode signal line (511), and the second gate couple electrode detecting line (613) being connected with the second gate couple electrode signal line (512);
a second gate odd electrode detection line (614) crossing the plurality of first signal lines (210), the second array substrate common electrode signal line (511), the second gate even electrode signal line (512), and the second gate odd electrode detection line (614) being connected with the second gate odd electrode signal line (513);
a second red pixel detection line (615) crossing the plurality of first signal lines (210), the second array substrate common electrode signal line (511), the second gate even electrode signal line (512), the second gate odd electrode signal line (513), and the second red pixel detection line (615) being connected to the second red pixel signal line (514);
a second green pixel detection line (616) crossing the plurality of first signal lines (210), the second array substrate common electrode signal line (511), the second gate even electrode signal line (512), the second gate odd electrode signal line (513), the second red pixel signal line (514), and the second green pixel detection line (616) being connected to the second green pixel signal line (515);
a second blue pixel detection line (617) crossing the plurality of first signal lines (210), the second array substrate common electrode signal line (511), the second gate even electrode signal line (512), the second gate odd electrode signal line (513), the second red pixel signal line (515), and the second green pixel signal line (515), and the second blue pixel detection line (617) is connected to the second blue pixel signal line (516).
7. The circuit of claim 6, wherein the third inspection line (330) is connected to the second color filter substrate common electrode inspection line (611).
8. The detection circuit according to claim 1, wherein if the plurality of first signal lines (210) are detected simultaneously, the third detection terminal (340) is configured to apply a first detection voltage to the third detection line (330), each first signal input terminal (220) is configured to apply a second detection voltage different from each other to each first signal line (210), and the second detection voltage is different from the first detection voltage, and each first detection terminal (320) is configured to detect whether the feedback voltage on each first signal line (210) is within a preset normal voltage range.
9. A method of testing the test circuit of claim 1, wherein the method comprises the steps of:
the third detection terminal (340) applies the first detection voltage to the third detection line (330);
the first signal input terminal (220) applies a second detection voltage to the first signal line (210); wherein the second detection voltage is different from the first detection voltage;
the first detection terminal (320) detects whether the feedback voltage on the first signal line (210) is within a preset normal voltage range;
if not, an over-line electrostatic short circuit defect exists between the first signal line (210) and a second detection line (610) connected with the third detection line (330).
10. The detection method according to claim 9, wherein if the plurality of first signal lines (210) are simultaneously detected, second detection voltages applied to different first signal lines (210) are different from each other, and the second detection voltages are different from the first detection voltages.
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