CN1089974C - Method and apparatus for periodically producing OAM signal source in ATM network - Google Patents
Method and apparatus for periodically producing OAM signal source in ATM network Download PDFInfo
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Abstract
Description
本发明涉及一种异步传送方式((以下简称ATM)网络,更具体地说,涉及ATM网络中定期进行OAM((操作、管理和保养)operation、admimistration and maintenance)的方法和设备。The present invention relates to a kind of asynchronous transfer mode (hereinafter referred to as ATM) network, more specifically, relate to the method and the equipment that regularly carry out OAM ((operation, management and maintenance) operation, admission and maintenance) in the ATM network.
ATM网络中发生故障时,为处理故障,需要给当时工作的连接线路(connection)产生定期故障处理OAM信号元。产生定期OAM信号元所需要的所有工作连接线路的数目随故障的等级而异。故障严重时,可以给所有工作的连接线路或任何特定连接线路产生信号元(cells)。When a fault occurs in the ATM network, in order to handle the fault, it is necessary to generate a periodic fault processing OAM signal element for the connection line (connection) that is working at that time. The number of all working connections required to generate periodic OAM signal elements varies with the level of the fault. In severe cases, cells can be generated for all working links or for any particular link.
通常,ATM网络的用户-网络接口/网络-节点接口(UNI/NNI)中配备的连接线路数约为1024(1K)-65 536(64K,其中K=210),这可压缩在一个终端中。因此,在最坏的情况下,每秒钟往往需要产生650,000 OAM信号元。这是根据ITU-T(国际电信联盟电信标准部门)I.610号建议的规定的。该建议规定:ATM网络处于故障状态时,每秒钟应给各连接线路产生警报(即,给各连接线路产生OAM信号元的周期是1秒钟)。Usually, the number of connection lines equipped in the user-network interface/network-node interface (UNI/NNI) of an ATM network is about 1024 (1K)-65 536 (64K, wherein K=2 10 ), which can be compressed in one terminal middle. Therefore, in the worst case, it is often necessary to generate 650,000 OAM signal elements per second. This is in accordance with the provisions of ITU-T (International Telecommunication Union Telecommunication Standardization Sector) Recommendation I.610. This proposal stipulates that: when the ATM network is in a fault state, an alarm should be generated for each connecting line every second (that is, the cycle for generating OAM signal elements for each connecting line is 1 second).
目前,ATM交换系统(支援1024条连接线路)采用软件程序产生OAM信号元。随着连接线路数量的增加,软件程序会大大增加CPU的负荷,从而导致故障。有的地方研制出了供产生OAM信号元的硬件芯片(例如Igt WAC 186)。通常,产生OAM信号元的硬件芯片具有较小的CPU负荷。然而如图1中所示,这种芯片通过从参考时钟获得1秒脉冲的信息而同时产生未定的OAM信号元,从而产生CDV(信号元时延变化)因用户各信号元之间同时插入如此多的OAM信号元而增加的问题。图1是说明因采用硬件芯片在采用产生OAM信号元的方法的情况下产生的上述问题。此外,由于OAM信号元(信号样本)集中在某特定的时段,因而在下一阶段缓存溢出的可能性很大,从而妨碍了用户信号元的进程。Currently, ATM switching systems (supporting 1024 connection lines) use software programs to generate OAM signal elements. As the number of connected lines increases, the software program can greatly increase the load on the CPU, which can lead to malfunctions. Some places have developed a hardware chip (such as Igt WAC 186) for generating OAM signal elements. Usually, the hardware chip that generates the OAM semaphore has a small CPU load. However, as shown in Figure 1, this chip simultaneously generates undetermined OAM signal elements by obtaining the information of 1-second pulses from the reference clock, thereby generating CDV (signal element delay variation) due to simultaneous insertion between each signal element of the user The problem of increasing the number of OAM signal elements. FIG. 1 illustrates the above-mentioned problems arising from the use of a hardware chip in the case of a method for generating OAM signal elements. In addition, since OAM semaphores (signal samples) are concentrated in a certain period of time, there is a high possibility of buffer overflow in the next stage, thereby hindering the process of user semaphores.
本发明的目的是提供一种能有效定期产生OAM信号元的设备和方法。The object of the present invention is to provide a device and method capable of efficiently and regularly generating OAM signal elements.
本发明的另一目的是提供一种能防止OAM信号元集中产生所引起的在下一阶段原用户信号元流的CDV和缓存器溢出的设备和方法。Another object of the present invention is to provide a device and method capable of preventing CDV and buffer overflow of the original user signal element stream in the next stage caused by centralized generation of OAM signal elements.
本发明的再一个目的是提供一种产生OAM信号元时减小CPU负荷的设备和方法。Another object of the present invention is to provide an apparatus and method for reducing CPU load when generating OAM signal elements.
为达到上述和其它目的,本发明提供在ATM网络中定期进行OAM的方法,该方法包括下列步骤:(a)考虑到ATM网络中所支持的连接线路的数量、OAM信号元类型种类、和参考时钟产生信号元的时间产生各连接线路和各类型OAM信号元的计时区,从而每一秒种通过均匀分配产生相应的OAM信号元,并根据参考时钟计数产生全局计数区;(b)应用参考时钟时使全局计数器的值每次增加1,并采用全局计数器的计数值、连接线路的数量和OAM信号元类型的数量获得控制产生OAM信号元的现行连接线路信息;(c)采用OAM信号元类型的数量和全局计数器的计数值读取包含在现行连接线路信息中的OAM信号元产生计时区的值;(d)读取的产生计时区的值为给产生相应类型的OAM信号元的预定的基准值时,控制产生相应类型的OAM信号元的过程;和(e)读取的产生计时区的值不是为其预定的基准值时,使读取的产生计时区的值增加1,返回到步骤(b),从而进行其后相应的一系列操作。To achieve the above and other objects, the present invention provides a method for regularly carrying out OAM in an ATM network, the method comprising the following steps: (a) considering the number of connected lines supported in the ATM network, the OAM signal element type category, and the reference The timing area of each connection line and each type of OAM signal element is generated by the time of the clock generating signal element, so that the corresponding OAM signal element is generated through uniform distribution every second, and the global counting area is generated according to the reference clock count; (b) the application reference When clocking, the value of the global counter is increased by 1 each time, and the current connection line information of the control generation OAM signal element is obtained by using the count value of the global counter, the quantity of the connection line and the quantity of the OAM signal element type; (c) adopting the OAM signal element The number of types and the count value of the global counter read the value of the OAM signal element generation timing area contained in the current connection line information; When the reference value of the control generates the OAM signal element of the corresponding type; and (e) when the value of the generated timing area read is not its predetermined reference value, the value of the read generated timing area is increased by 1, and returns Go to step (b), so as to carry out a series of corresponding operations thereafter.
结合附图参阅下面的详细说明可以更好更全面地理解本发明及其附带的许多优点。附图中,同样的编号表示同样或类似的元件,其中:A better and more complete understanding of the invention and its many attendant advantages may be obtained by referring to the following detailed description when read in conjunction with the accompanying drawings. In the drawings, like numbers indicate like or similar elements, wherein:
图1是说明用硬件芯片产生OAM信号元的方法中所产生的问题的示意图;Fig. 1 is a schematic diagram illustrating the problems generated in the method for generating OAM signal elements with a hardware chip;
图2是本发明一个实施例产生定期OAM信号元的设备的方框图;Fig. 2 is a block diagram of an embodiment of the present invention generating a device for periodic OAM signal elements;
图3是本发明一个实施例的外部存储器18中所实施的各连接线路控制区段30的示意图;FIG. 3 is a schematic diagram of each connection line control section 30 implemented in the external memory 18 according to an embodiment of the present invention;
图4是表示图3的控制区段30的详图;FIG. 4 is a detailed diagram showing the control section 30 of FIG. 3;
图5A和5B是本发明一个实施例的产生定期OAM信号元的控制流程图;5A and 5B are control flow diagrams for generating periodic OAM signal elements according to an embodiment of the present invention;
图6是例示第K个和第(K+1)个连接线路产生OAM信号元的时间控制示意图;6 is a schematic diagram illustrating time control of OAM signal elements generated by the Kth and (K+1)th connection lines;
图7是例示本发明一个实施例的OAM信号元不集中产生时的示意图。Fig. 7 is a schematic diagram illustrating an embodiment of the present invention when OAM signal elements are not generated collectively.
下面参阅附图具体说明本发明的一个最佳实施例。首先,在所有的附图中,应该指出的是,同样的编号用来表示具有同样功能的类似或等效元件。此外,对那些不必要地使本发明的主题变得模糊的已知功能和结构,这里不予说明。A preferred embodiment of the present invention will be described in detail below with reference to the accompanying drawings. First, throughout the drawings, it should be noted that like reference numbers are used to designate similar or equivalent elements having the same function. Also, descriptions of known functions and constructions that unnecessarily obscure the subject matter of the present invention are omitted here.
参阅图2。本发明定期产生OAM信号元的设备包括信号元接收处理器10、OAM信号元产生控制器12、信号元同步信号发生器14、存储器存取判优器16、外部存储器18、缓存器20和22和输出判优器24。See Figure 2. The device for periodically generating OAM signal elements in the present invention includes a signal element receiving processor 10, an OAM signal element generation controller 12, a signal element synchronization signal generator 14, a memory access arbiter 16, an external memory 18, and buffers 20 and 22 And output arbiter 24.
外部存储器18包括控制区段30供存储计时区信息,以根据连接线路产生OAM信号元,如图3中所示。各控制区段30包括具有预定OAM信号元类型的指令的指令区段32和具有各连接线路的OAM信号元类型的OAM信号元产生计时区区段34。图4是表示图3的控制区段30的详图。The external memory 18 includes a control section 30 for storing timing area information to generate OAM signal elements according to connection lines, as shown in FIG. 3 . Each control section 30 includes an instruction section 32 having an instruction of a predetermined OAM signal element type and an OAM signal element generation timing section 34 having an OAM signal element type of each connection line. FIG. 4 is a detailed diagram showing the control section 30 of FIG. 3 .
参阅图4。指令区段32有三个1位区供记录拟定期产生的OAM信号元的类型。本发明实施例的OAM信号元的类型为AIS(警报指示信号(alarm indication signal))、RDI(远程故障指示(remote defectindication))和CC(接通检验(continuity check))。此外,OAM信号元产生的计时区段34包括三个对应于OAM类型(即n位AIS信号元发生计时区、n位RDI信号元发生计时区和n位CC信号元发生计时区)的计时区。OAM信号元产生计时区34的值由图2的OAM信号元产生控制器12予以控制。OAM信号元产生控制器12在借助参考时钟均匀分配操作OAM信号元产生计时区和用有关OAM指令递减各相应连接线路和相应类型的OAM信号元发生计时区时,控制相应连接线路和相应类型的OAM信号元的产生过程。See Figure 4. The instruction section 32 has three 1-bit fields for recording the types of OAM signal elements to be generated periodically. The types of the OAM signal element in the embodiment of the present invention are AIS (alarm indication signal), RDI (remote defect indication) and CC (continuity check). In addition, the timing section 34 for OAM signal element generation includes three timing areas corresponding to the OAM type (i.e. n-bit AIS signal element generation timing area, n-bit RDI signal element generation timing area and n-bit CC signal element generation timing area) . The value of the OAM signal element generation timing area 34 is controlled by the OAM signal element generation controller 12 in FIG. 2 . The OAM signal element generation controller 12 controls the corresponding connection line and the corresponding type when the OAM signal element generation timing area is uniformly distributed by means of the reference clock and the corresponding connection line and the corresponding type of OAM signal element generation timing area are decremented with the relevant OAM instructions. The generation process of OAM signal elements.
再翻看图2。OAM信号元产生控制器12按图5A和图5B的流程图控制外部存储器18中的OAM信号元产生计时区从而产生OAM信号元。信号元接收处理器10区分收到信号元的类型,并根据区分出的信号元类型工作。此外,信号元接收处理器10输出用户信号元。存储器存取判优器16在预定时间分别让信号元接收处理器10和OAM信号元发生控制器12存取外部存储器18。这样,只有一个控制器(信号元接收处理器10或OAM信号元发生控制器12)在特定时间可存取外部存储器18。信号元同步信号发生器14根据系统时钟SYS_CLK产生信号元同步信号CELL_SYNC。信号元同步信号CELL_XYNC提供给信号元接收处理器10、OAM信号元发生控制器12和存储器存取判优器16,系统时钟SYS_CLK则提供给信号元接收处理器10和OAM信号元发生控制器12以及信号元同步信号发生器14。如图2中所示,缓存器20缓存从OAM信号元产生控制器12来的OAM信号元,缓存器22缓存从信号元接收处理器10来的用户信号元。输出判优器24同时检验缓存器20和22是否处于空置状态,并从缓存器读取非空置状态的信号元(即用户信号元或OAM信号元)。当缓存器20和22处于空置状态时,输出判优器24读取原先未被读取的信号元。由于产生OAM信号元的频度没有产生用户信号元的频度那么高,因而缓存器20比缓存器22更经常处于空置状态。从输出判优器24输出的外出信号元其格式是在各用户信号元之间定期插有OAM信号光。Look at Figure 2 again. The OAM signal element generation controller 12 controls the OAM signal element generation timing area in the external memory 18 according to the flowcharts of FIG. 5A and FIG. 5B to generate the OAM signal element. The signal element receiving processor 10 distinguishes the types of received signal elements, and works according to the distinguished signal element types. In addition, the signal element reception processor 10 outputs user signal elements. The memory access arbiter 16 allows the signal element receiving processor 10 and the OAM signal element generating controller 12 to access the external memory 18 at a predetermined time, respectively. Thus, only one controller (the signal element receiving processor 10 or the OAM signal element generating controller 12) can access the external memory 18 at a specific time. The cell synchronization signal generator 14 generates the cell synchronization signal CELL_SYNC according to the system clock SYS_CLK. The signal element synchronization signal CELL_XYNC is provided to the signal element receiving processor 10, the OAM signal element generating controller 12 and the memory access arbiter 16, and the system clock SYS_CLK is provided to the signal element receiving processor 10 and the OAM signal element generating controller 12 and a signal element synchronization signal generator 14 . As shown in FIG. 2 , the buffer 20 buffers the OAM signal elements from the OAM signal element generating controller 12 , and the buffer 22 buffers the user signal elements from the signal element receiving processor 10 . The output arbiter 24 simultaneously checks whether the buffers 20 and 22 are in the empty state, and reads the non-empty signal elements (ie user signal elements or OAM signal elements) from the buffers. When the buffers 20 and 22 are empty, the output arbiter 24 reads previously unread signal elements. Since OAM signal elements are generated less frequently than user signal elements, buffer 20 is more often than buffer 22 in an empty state. The outgoing signal element output from the output arbiter 24 has a format in which OAM signal light is periodically inserted between each user signal element.
按照本发明的这个实施例,外部存储器18包括独立的OAM信号元产生计时区,即AIS信号元产生计时区、RDI信号元产生计时区和CC信号元产生计时区,这视乎OAM信号元的类型而定。各OAM信号元发生的计时区的值在OAM信号元控制器12的控制下定期更新(即增加+1)。这里,OAM信号元产生控制器12中使用的参考时钟是每1个信号元时间(2.7微秒)一次产生的信号元同步信号CELL_SYNC。虽然信号元同步信号CELL_SYNC用作例如参考时钟,但其它时钟也可用作参考时钟。此外,必要时可以改变外部存储器18中各连接线路的OAM信号元产生计时区的数目。因此,OAM信号元产生计时区的数目可根据用户所要求的OAM信号元类型而予以确定。According to this embodiment of the present invention, the external memory 18 includes independent OAM signal element generation timing areas, namely the AIS signal element generation timing area, the RDI signal element generation timing area and the CC signal element generation timing area, which depends on the OAM signal element Depends on the type. The value of the timing zone where each OAM signal element occurs is regularly updated (ie, incremented by +1) under the control of the OAM signal element controller 12 . Here, the reference clock used in the OAM cell generation controller 12 is the cell synchronization signal CELL_SYNC generated once every cell time (2.7 microseconds). Although the semaphore synchronization signal CELL_SYNC is used as, for example, a reference clock, other clocks may also be used as a reference clock. In addition, the number of OAM signal element generation timing areas for each connection line in the external memory 18 can be changed as necessary. Therefore, the number of timing zones for OAM signal element generation can be determined according to the type of OAM signal element required by the user.
在本发明的一个实施例中,如ITU-U建议I.610所规定的那样,OAM信号元产生控制器12在检测ATM网络故障状态时应确实给各连接线路每秒钟发出警报。此外,OAM信号元不应在某特定时间集中产生。为满足这个要求,每一秒所要产生的OAM信号元应最大限度地分配出去。分配由图2的OAM信号元产生控制器12进行。In one embodiment of the present invention, as specified in ITU-U recommendation I.610, the OAM signal element generation controller 12 should actually send an alarm every second to each connecting line when detecting the ATM network failure state. In addition, OAM signal elements should not be generated in a specific time set. In order to meet this requirement, the OAM signal elements to be generated every second should be allocated to the maximum extent. The allocation is performed by the OAM signal element generation controller 12 of FIG. 2 .
若ATM网络有N个连接线路,各连接线路有M个OAM类型,且采用信号元同步信号(2.7微秒)作为参考时钟,则各OAM信号元产生计时区每2.7*N*M微秒被更新(+1)。因此,当如ITU-T建议I.610所规定的那样,OAM信号元产生时间(1秒)过去时,各OAM信号元产生计时区的值X可用下面的(1)式求出:If the ATM network has N connection lines, each connection line has M OAM types, and the signal element synchronization signal (2.7 microseconds) is used as the reference clock, then each OAM signal element generates the timing area every 2.7 * N * M microseconds by Update (+1). Therefore, when the OAM signal element generation time (1 second) passes as specified in ITU-T Recommendation I.610, the value X of each OAM signal element generation timing area can be obtained by the following formula (1):
X=1秒/(2.7微秒*N*M) (1)X = 1 second / (2.7 microseconds * N * M) (1)
因此,当OAM信号元产生计时区用模数×计时器计出X个数时,1秒钟过去了。就是说,各OAM信号元产生计时区的值变为‘X’(或任一特定值)时,产生OAM信号元的时间变为1秒。这样,根据各连接线路指令的种类产生OAM信号元的时间变为1秒时,OAM信号元产生控制器12确定OAM信号元是否因OAM发生指令而产生。Therefore, when the OAM signal element generation timing area uses the modulus × timer to count X number, 1 second has passed. That is to say, when the value of each OAM signal element generation time zone changes to 'X' (or any specific value), the time to generate an OAM signal element becomes 1 second. In this way, when the time to generate an OAM signal element according to the type of each connected line command becomes 1 second, the OAM signal element generation controller 12 determines whether an OAM signal element is generated due to an OAM generation command.
下面详细说明OAM信号元产生计时区的工作过程。举例说,在ATM网络有N个连接线路(N-4096)和M个OAM类型(M=3)时,特定连接线路的各OAM信号元产生计时区的更新时间变为大约33.177毫秒(=2.7*4096*3微秒)。因此,由于OAM信号元产生计时区的值X=1秒/33.177毫秒=30.141,因而OAM信号元产生计时区应设计在模30计数器中。为此,OAM信号元产生控制器12控制AIS信号元产生计时区、RDI信号元产生计时区和作为模30计数器的CC信号元产生计时区。The working process of generating the timing area of the OAM signal element will be described in detail below. For example, when the ATM network has N connection lines (N-4096) and M OAM types (M=3), each OAM signal element of the specific connection line generates the update time of the timing area and becomes about 33.177 milliseconds (=2.7 * 4096 * 3 microseconds). Therefore, since the value of the OAM signal element generation timing area X=1 second/33.177 milliseconds=30.141, the OAM signal element generation timing area should be designed in the modulo 30 counter. To this end, the OAM signal element generation controller 12 controls the AIS signal element generation timing area, the RDI signal element generation timing area, and the CC signal element generation timing area as a modulo 30 counter.
图5A和图5B是本发明一个实施例产生定期OAM信号元的控制流程图。参阅图5A,在步骤100初始化时,OAM信号元产生控制器12转入步骤102,从而初始化全局计数器GT的计数值和OAM信号元产生计时区OAMT具有AIS信号元产生计时区AIST计时值、RDI信号元产生计时区RDIT的计时值和CC信号元发生计时区CCT的计时值的计时值。全局计数器包含在OAM信号元产生控制器12中,且根据作为参考时钟的信号元同步信号CELL_SYNC进行计数。全局计数器是个模计数器,其计数值GT高于X*N*M(=1秒),其整个计数值为X*N*M的倍数。此外AIS信号元产生计时区、RDI信号元产生计时区和CC信号元产生计时区是包含在外部存储器18的控制区段30的OAM信号元产生计时区区段34中的计时区。FIG. 5A and FIG. 5B are control flow charts for generating periodic OAM signal elements according to an embodiment of the present invention. Referring to Fig. 5A, when
若信号元同步信号发生器14在步骤104产生信号元同步信号CELL_SYNC,OAM信号元产生控制器12就转入步骤106,令全局计数器GT的计数值增加1。接着,在步骤108采用全局计数器GT的计数值、连接线路数N和设定的OAM类型的数目确定产生OAM信号元的现行连接线路CNN_ID。上述现行连接线路CNN_ID可用下面的(2)式求出:If the cell synchronization signal generator 14 generates the cell synchronization signal CELL_SYNC in
的余数 (2)其中[GT/M]为不超过GT/N的最大整数。 The remainder of (2) where [GT/M] is the largest integer not exceeding GT/N.
在确定产生OAM依赖元的现行连接线路CNN_ID之后,OAM信号元产生控制器12转入步骤110,提取第CNN_ID连接线路的控制区段值。接着,在步骤112,OAM信号元产生控制器12利用下面的式(3)选择相应OAM信号元产生计时区区段中的其中一个OAM信号元产生计时区。After determining the current connection line CNN_ID that generates the OAM dependent element, the OAM signal element generation controller 12 proceeds to step 110 to extract the control section value of the CNN_ID-th connection line. Next, in
(计时区选择值)=[GT/M(3)]的余数 (3)(time zone selection value) = remainder of [GT/M(3)] (3)
换句话说,用式(2)选择控制产生OAM信号元过程的第i个连接线路的连接,用式(3)选择控制所选的第i个连接线路的当时OAM信号元产生过程的产生计时区。In other words, use formula (2) to select and control the connection of the i-th connection line that generates the OAM signal element process, and use formula (3) to select and control the generation timing of the then OAM signal element generation process of the selected i-th connection line district.
图5B中,在步骤112得出的计时区选择值为“0”时,OAM信号元产生控制器12转入步骤113,读取AIS信号元产生计时区的计时值AIST。然而,当计时区选择值为“1”时,OAM信号元产生控制器12转入步骤24,读取RDI信号元产生计时区的计时值RDIT。另一方面,当计时区选择值为“2”时,OAM信号元产生控制器12进入步骤136,读取CC信号元产生计时区的计时值CCT。In FIG. 5B , when the timing area selection value obtained in
OAM信号元产生控制器12在步骤113读取AIS信号元产生计时区的计时值AIST,并在步骤114校验计时值AIST是否为“0”。这里,当AIS信号元产生计时区计出X个数时,计时区值AIST变为“0”,这表示是产生AIS信号元的时候了。若计时值AIST=“0”,,OAM信号元产生控制器12就在步骤116读取包含在当时提取的控制区段30的指令区段32中的AIS指令,并在步骤118校验AIS指令是否等于1。AIS指令由用户设定。若AIS指令设定为“1”,OAM信号元产生控制器12就在步骤120产生AIS信号元,并将产生的AIS信号元输出给图2的缓存器20。其后,OAM信号元产生控制器12进入步骤122,令相应连接线路的AIS信号元产生计时区的计时值AIST增加1,然后返回到上述步骤104。The OAM signal element generation controller 12 reads the timing value AIST of the AIS signal element generation timing area at
在步骤124至134,OAM信号元产生控制器12核验是否是产生RDI信号元的时候了,同时根据RDI指令产生RDI信号元,并令RDI信号元产生计时区的值RDI增加1。由于上述的各项操作与上面步骤113至122的操作类似,因而这里不再详细说明。同样,在步骤136至146,OAM信号元产生控制器12校验是否是产生CC信号元的时候了,同时根据CC指令信息产生CC信号元,并令CC信号元产生计时值CCT增加1。上述各项操作与上述步骤124至134的操作类似,因而这里不再详述。In
如参阅图5A和图5B所述的那样,各类型的OAM信号元每秒钟产生一次,从而可以分配产生OAM信号元的过程。As described with reference to FIG. 5A and FIG. 5B , each type of OAM signal element is generated once per second, so that the process of generating the OAM signal element can be allocated.
图6是给第K和第(K+1)个连接线路产生OAM信号元的时间控制。在图5A的步骤108,即通过式(2)获得第K和第(K+1)个连接线路。在图5B的步骤112,即通过式(3)设定相应连接线路的OAM信号元产生时间(AIS信号元发生时间,RDI信号元产生时间和CC信号元产生时间),如图6中所示。只有当各连接线路的各OAM信号元的产生时间中相应的OAM指令(AIS指令,RDI指令和CC指令)设定为“1”时,才产生OAM信号元。FIG. 6 is the time control for generating OAM signal elements for the Kth and (K+1)th connection lines. In
图7是通过本发明一个实施例对定期产生OAM信号元的控制而非集中地产生OAM信号元的示意图。用图6的OAM信号元产生定时产生的OAM信号元集中在图7所示的特定时段,且均匀分配,从而每1秒钟产生一个OAM信号元。由于产生的OAM信号元插在各原用户信号元流之间,因而避免了原用户信号元流的严重CDV。此外,还避免了在下一阶段缓存器溢出。Fig. 7 is a schematic diagram of controlling periodic generation of OAM signal elements instead of centralized generation of OAM signal elements by an embodiment of the present invention. The OAM signal elements generated by the timing of OAM signal element generation in FIG. 6 are concentrated in the specific period shown in FIG. 7 and distributed evenly, so that one OAM signal element is generated every 1 second. Since the generated OAM signal elements are inserted between the original user signal element streams, severe CDV of the original user signal element streams is avoided. Furthermore, buffer overflow in the next stage is avoided.
在本发明的上述实施例中,尽管采用参考时钟作为信号元同步信号CELL-SYNC,但不言而喻,也可以采用其它时钟。其它时钟相当于周期为将系统时钟分频的给定周期的时钟,或相当于芯片的系统时钟。但适用于本发明的参考时钟应能满足下面式(4)的条件。In the above-mentioned embodiments of the present invention, although the reference clock is used as the cell synchronization signal CELL-SYNC, it goes without saying that other clocks may also be used. The other clocks are equivalent to a clock whose period is a given period divided by the frequency of the system clock, or equivalent to the system clock of the chip. However, the reference clock suitable for the present invention should satisfy the condition of the following formula (4).
(参考时钟的周期)≤(1秒/N*M) (4)其中N为ATM网络中所支持的连接线路数,M为OAM信号元的类型数。(Period of the reference clock)≤(1 second/N * M) (4) N is the number of connection lines supported in the ATM network, and M is the number of types of OAM signal elements.
综上所述可知,本发明由于有效地定期产生OAM信号元因而可以避免原用户信号元流的严重CDV,并通过集中产生OAM信号元而避免缓存器溢出。此外,本发明用硬件产生OAM信号元可以减轻CPU的负荷。To sum up, it can be seen that the present invention can avoid severe CDV of the original user signal element flow due to the effective and regular generation of OAM signal elements, and avoid buffer overflow through centralized generation of OAM signal elements. In addition, the present invention uses hardware to generate OAM signal elements to reduce the load on the CPU.
因此,应该理解的是,本发明并不局限于这里设想为实行本发明的最佳模式所公开的本发明的最佳实施例,更确切地说,本发明不局限于本说明书中所述的一些具体实施例,但所附权利要求书中所述的例外。Therefore, it should be understood that this invention is not limited to the best embodiment of the invention disclosed herein contemplated as the best mode for carrying out the invention, rather, the invention is not limited to the described in the specification. Some specific embodiments, except as described in the appended claims.
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