CN108984425A - The method of flash memory device and its elastification control polymorphic type flash memory - Google Patents
The method of flash memory device and its elastification control polymorphic type flash memory Download PDFInfo
- Publication number
- CN108984425A CN108984425A CN201810855398.5A CN201810855398A CN108984425A CN 108984425 A CN108984425 A CN 108984425A CN 201810855398 A CN201810855398 A CN 201810855398A CN 108984425 A CN108984425 A CN 108984425A
- Authority
- CN
- China
- Prior art keywords
- flash memory
- instruction
- memory
- value
- flash
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
Abstract
The invention discloses a kind of flash memory devices, including flash controller, instruction queue and flash memory, further includes: can arbitrarily insert instruction value and any instruction sequence device for arranging pin control;The flash controller, described instruction queue, described instruction serial device and the flash memory are sequentially connected.The invention also discloses the methods of elastification control polymorphic type flash memory in flash memory device.So that the part of hardware can support the flash memory of new spec completely without doing to change, allow flash memory support can more flexible and efficiency, and resource needed for reducing exploitation.
Description
Technical field
The present invention relates to the skills of elastification control polymorphic type flash memory in flash memory technology field more particularly to flash memory device
Art.
Background technique
Flash memory is a kind of memory for allowing repeatedly to be wiped or write in operation, and this science and technology is mainly used for general data storage
It deposits, and exchanges transmission data between computer and other digital products.Flash memory is non-volatile memory, stored data and
Speech is not need consumption electric power, and have fairly good shock resistance, these characteristics are flash memories by the widely used original of storage device
Cause.
It needs to operate flash memory through instruction when flash memory is run, comprising wiping, writing, read corresponding finger
It enables.The instruction that various brands flash memory more has oneself different carrys out respective operations, when new processing procedure flash memory fabrication comes out, more likely
There is new instruction to generate to support new function.
As shown in Fig. 2, flash memory device framework before is which instruction had existed according to existing flash memory specification
It does and designs, comprising flash controller 1 ', instruction queue 2 ' and flash memory 3 ', according to current flash memory specification in flash controller 1 '
Corresponding instruction control mode is devised, gives flash memory 3 ' instruction through instruction queue, flash memory 3 ' is run according to instructing
Corresponding work.Although such mode exploitation is very fast, it will appear deficiency in elasticity: i.e. when new flash memory specification goes out
Existing, hardware just needs and then to modify, and greatly increases development cost..
Summary of the invention
The purpose of the present invention is to provide a kind of flash memory device for capableing of elastification control polymorphic type flash memory, Yi Jiti
For a kind of method of elastification control polymorphic type flash memory in flash memory device.
Realizing the technical solution of above-mentioned purpose is:
A kind of flash memory device, including flash controller, instruction queue and flash memory, further includes: can arbitrarily insert and refer to
Enable value and any instruction sequence device for arranging pin control;
The flash controller, described instruction queue, described instruction serial device and the flash memory are sequentially connected.
Preferably, memory space of the memory as instruction.
Preferably, for the specification of the flash memory, corresponding instruction value is inserted in described instruction serial device, described interior
The value in corresponding position deposited changes the instruction value into.
The method of the elastification control polymorphic type flash memory based on above-mentioned flash memory device of the two of the present invention, the memory
Memory space as instruction;
For the specification of the flash memory, corresponding instruction value is inserted in described instruction serial device, passes through described instruction sequence
Value in the corresponding position of the memory is changed into the instruction value by column device.
The beneficial effects of the present invention are: design of the present invention by increase instruction sequence device, using memory when instruction storage
Space allows the support of flash memory can be more so that the part of hardware can support the flash memory of new spec completely without change is done
Flexible and efficiency, and reduce the required resource of exploitation.
Detailed description of the invention
Fig. 1 is the configuration diagram of flash memory device of the invention;
Fig. 2 is the configuration diagram of flash memory device in the prior art.
Specific embodiment
The present invention will be further described with reference to the accompanying drawings.
Referring to Fig. 1, flash memory device of the invention, including flash controller 1, instruction queue 2, flash memory 3 and instruction
Serial device 4.Flash controller 1, instruction queue 2, instruction sequence device 4 and flash memory 3 are sequentially connected.
Instruction sequence device 4 is a hardware circuit, using memory 3 as the memory space of instruction, can arbitrarily insert and refer to
Enable value and any control for arranging pin.
For the specification of flash memory 3, corresponding instruction value is inserted in instruction sequence device 4, in the corresponding position memory 3
Value changes the instruction value into.Such as: the reading instruction of flash memory, instruction are 00h -30h, if now with a flash memory specification have it is different
The instruction of sample is for example changing into 00h-A0h, the position of memory 3 where can ordering 30h second through instruction sequence device 4
Value in setting changes A0h into, and the part of hardware can support the flash memory of new spec completely without change is done.
The method of elastification control polymorphic type flash memory of the invention, increases instruction sequence device 4, by memory 3 as instruction
Memory space.For the specification of flash memory 3, corresponding instruction value is inserted in instruction sequence device 4, through instruction sequence device 4 in
It deposits the value in 3 corresponding position and changes the instruction value into, enable the support of flash memory more flexible and efficiency, and reduce exploitation
Required resource.
Above embodiments are used for illustrative purposes only, rather than limitation of the present invention, the technology people in relation to technical field
Member, without departing from the spirit and scope of the present invention, can also make various transformation or modification, therefore all equivalent
Technical solution also should belong to scope of the invention, should be limited by each claim.
Claims (4)
1. a kind of flash memory device, including flash controller, instruction queue and flash memory, which is characterized in that further include: Ke Yiren
Meaning filling instruction value and any instruction sequence device for arranging pin control;
The flash controller, described instruction queue, described instruction serial device and the flash memory are sequentially connected.
2. flash memory device according to claim 1, which is characterized in that memory space of the memory as instruction.
3. flash memory device according to claim 2, which is characterized in that for the specification of the flash memory, in the finger
It enables and inserts corresponding instruction value in serial device, the value in the corresponding position of the memory is changed into the instruction value.
4. a kind of method of the elastification control polymorphic type flash memory based on flash memory device described in claim 1, feature exist
In memory space of the memory as instruction;
For the specification of the flash memory, corresponding instruction value is inserted in described instruction serial device, passes through described instruction serial device
Value in the corresponding position of the memory is changed into the instruction value.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810855398.5A CN108984425A (en) | 2018-07-31 | 2018-07-31 | The method of flash memory device and its elastification control polymorphic type flash memory |
PCT/CN2018/105883 WO2020024383A1 (en) | 2018-07-31 | 2018-09-15 | Flash memory storage apparatus and method for elastically controlling multiple types of flash memories |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810855398.5A CN108984425A (en) | 2018-07-31 | 2018-07-31 | The method of flash memory device and its elastification control polymorphic type flash memory |
Publications (1)
Publication Number | Publication Date |
---|---|
CN108984425A true CN108984425A (en) | 2018-12-11 |
Family
ID=64550909
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810855398.5A Withdrawn CN108984425A (en) | 2018-07-31 | 2018-07-31 | The method of flash memory device and its elastification control polymorphic type flash memory |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN108984425A (en) |
WO (1) | WO2020024383A1 (en) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7290081B2 (en) * | 2002-05-14 | 2007-10-30 | Stmicroelectronics, Inc. | Apparatus and method for implementing a ROM patch using a lockable cache |
CN1238791C (en) * | 2003-07-11 | 2006-01-25 | 威盛电子股份有限公司 | Management unit of flash memory device and method thereof |
CN1598965A (en) * | 2004-08-09 | 2005-03-23 | 张华龙 | Method of quick reading and writing flash storage and its special processor |
CN1937083B (en) * | 2005-09-23 | 2010-05-05 | 安国国际科技股份有限公司 | Non-volatile memory set-value loading method and memory device |
CN101477443B (en) * | 2008-01-03 | 2011-05-04 | 上海奇码数字信息有限公司 | NAND control system and control method |
-
2018
- 2018-07-31 CN CN201810855398.5A patent/CN108984425A/en not_active Withdrawn
- 2018-09-15 WO PCT/CN2018/105883 patent/WO2020024383A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2020024383A1 (en) | 2020-02-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103354939B (en) | Staggered Memory Controller and method is accessed for making DRAM and MRAM | |
TWI622981B (en) | Refresh logic to refresh only memory cells having a first value | |
TWI502359B (en) | Command order re-sequencing in non-volatile memory | |
CN108701081A (en) | Device and method for the multiple subregions for accessing nonvolatile memory simultaneously | |
TW200847169A (en) | Memory device architectures and operation | |
CN106850476B (en) | Balanced device method of adjustment, applicable equalizer and memory storage apparatus | |
WO2016105858A1 (en) | Tier mode for access operations to 3d memory | |
US20160179388A1 (en) | Method and apparatus for providing programmable nvm interface using sequencers | |
US10430108B2 (en) | Concurrent copying of first and second subsets of pages from media such as SLC NAND to media such as QLC or MLC NAND for completion of copying of data | |
CN106507698B (en) | Implement the method for efficient entropy decoder by using higher synthesis | |
TW201250695A (en) | Memory erasing method, memory controller and memory storage apparatus | |
CN108701485A (en) | Mitigate the technology of the offset drift of memory device | |
KR102562051B1 (en) | Method and Apparatus for Initiating a Read-Ahead Operation Prior to Completion of a Data Load Operation | |
CN108630282A (en) | Signal calibration on naked core | |
CN106445470B (en) | The initial method and apparatus for initializing of configuration register in chip | |
CN110399181A (en) | Software Development Kit funcall method, system and electronic equipment and medium | |
CN104778974A (en) | Serial memory device alert of an external host to completion of an internally self-timed operation | |
CN103366810A (en) | EEPROM memory array | |
CN106598548A (en) | Solution method and device for read-write conflict of storage unit | |
CN108984425A (en) | The method of flash memory device and its elastification control polymorphic type flash memory | |
CN105741870B (en) | A kind of non-volatile d type flip flop circuit based on memristor | |
CN110827902B (en) | Random encoding method and solid state disk | |
CN105590648B (en) | Memory reading method and digital memory device | |
US20150149699A1 (en) | Adaptive Erase of a Storage Device | |
CN114327660B (en) | Initialization method of external memory based on FPGA |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WW01 | Invention patent application withdrawn after publication |
Application publication date: 20181211 |
|
WW01 | Invention patent application withdrawn after publication |