CN108962759A - A kind of preparation method of zinc oxide thin-film transistor - Google Patents
A kind of preparation method of zinc oxide thin-film transistor Download PDFInfo
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- CN108962759A CN108962759A CN201810775194.0A CN201810775194A CN108962759A CN 108962759 A CN108962759 A CN 108962759A CN 201810775194 A CN201810775194 A CN 201810775194A CN 108962759 A CN108962759 A CN 108962759A
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- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 title claims abstract description 102
- 239000011787 zinc oxide Substances 0.000 title claims abstract description 51
- 239000010409 thin film Substances 0.000 title claims abstract description 33
- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 71
- 229960001296 zinc oxide Drugs 0.000 claims abstract description 50
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 30
- 239000001301 oxygen Substances 0.000 claims abstract description 30
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 30
- 206010021143 Hypoxia Diseases 0.000 claims abstract description 28
- 208000018875 hypoxemia Diseases 0.000 claims abstract description 28
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims abstract description 23
- 239000011701 zinc Substances 0.000 claims abstract description 23
- 229910052725 zinc Inorganic materials 0.000 claims abstract description 23
- 238000005566 electron beam evaporation Methods 0.000 claims abstract description 21
- 238000000151 deposition Methods 0.000 claims abstract description 19
- 230000008021 deposition Effects 0.000 claims abstract description 13
- 238000001755 magnetron sputter deposition Methods 0.000 claims abstract description 12
- 238000004140 cleaning Methods 0.000 claims abstract description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 93
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 52
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 42
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 36
- 238000000206 photolithography Methods 0.000 claims description 31
- 239000000243 solution Substances 0.000 claims description 30
- 238000004528 spin coating Methods 0.000 claims description 30
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 28
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 26
- 239000011248 coating agent Substances 0.000 claims description 26
- 238000000576 coating method Methods 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 24
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 24
- 239000008367 deionised water Substances 0.000 claims description 23
- 229910021641 deionized water Inorganic materials 0.000 claims description 23
- 229910052757 nitrogen Inorganic materials 0.000 claims description 21
- 235000019441 ethanol Nutrition 0.000 claims description 18
- 239000010408 film Substances 0.000 claims description 16
- 239000004411 aluminium Substances 0.000 claims description 15
- 229910052782 aluminium Inorganic materials 0.000 claims description 15
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 15
- 229910052804 chromium Inorganic materials 0.000 claims description 14
- 239000011651 chromium Substances 0.000 claims description 14
- 239000000377 silicon dioxide Substances 0.000 claims description 14
- 238000005286 illumination Methods 0.000 claims description 12
- 238000005516 engineering process Methods 0.000 claims description 11
- 238000004026 adhesive bonding Methods 0.000 claims description 9
- 239000011521 glass Substances 0.000 claims description 9
- 239000003292 glue Substances 0.000 claims description 9
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 9
- 238000002604 ultrasonography Methods 0.000 claims description 9
- 235000012239 silicon dioxide Nutrition 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 7
- 238000000137 annealing Methods 0.000 claims description 6
- 239000007864 aqueous solution Substances 0.000 claims description 3
- 230000000994 depressogenic effect Effects 0.000 claims description 3
- 239000012212 insulator Substances 0.000 claims description 3
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 3
- 229940062054 oxygen 30 % Drugs 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims description 2
- 230000002708 enhancing effect Effects 0.000 claims description 2
- 230000000007 visual effect Effects 0.000 claims description 2
- 239000007788 liquid Substances 0.000 claims 4
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 230000008901 benefit Effects 0.000 abstract description 4
- 230000001681 protective effect Effects 0.000 abstract description 3
- 239000002994 raw material Substances 0.000 abstract description 2
- 238000000825 ultraviolet detection Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 6
- 238000001459 lithography Methods 0.000 description 6
- 230000008859 change Effects 0.000 description 4
- 150000002576 ketones Chemical class 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 229920001621 AMOLED Polymers 0.000 description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010422 painting Methods 0.000 description 2
- 230000004224 protection Effects 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000005984 hydrogenation reaction Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/105—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with vertical doping variation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
Abstract
The present invention relates to a kind of preparation methods of zinc oxide thin-film transistor, belong to a kind of preparation method of thin film transistor (TFT).Including cleaning substrate, gate deposition, insulating layer deposition, oxygen-rich oxide zinc channel layer deposition, hypoxemia zinc-oxide channel layer deposition, source electrode and drain electrode deposition.Advantage is the preparation by double active layer structures, interdigital source-drain electrode, oxygen-enriched, hypoxemia layering is provided and prepares channel layer to improve device stability and on-state current, the source of interdigital shape is prepared on it, drain electrode further greatly improves on-state current, and preparation process is simple, for in the rf magnetron sputtering and electron beam evaporation generally used, no replacement is required in the market production line；Raw material are pure zinc oxide, low in cost, environmentally protective.All there is application prospect in fields such as ultraviolet detection, display drivings.Pure zinc oxide thin film transistor (TFT) is set more to have application potential on the market.
Description
Technical field
The invention belongs to technical field of semiconductor device preparation more particularly to a kind of preparation methods of thin film transistor (TFT).
Background technique
With the arrival of information age, display field enters the FPD epoch, thin film transistor (TFT) as AMLCD and
Core element in AMOLED, has become irreplaceable dominant technology in FPD industry, and thin film transistor (TFT)
Stability and the height of performance indexes will directly limit the imaging capability of display.Particularly with large scale, high score
The display of resolution, high frame per second, such as three dimensional display, the requirement to the stability and driving force of thin film transistor (TFT) are more severe
It carves, the hydrogenation non crystal silicon film transistor generallyd use on current market has been unable to satisfy requirement.Further, since the drive of AMOLED
Flowing mode is electric current driving, needs biggish electric current injection that OLED pixel unit can just be made to shine, it is clear that the hydrogen of low on-state current
Change amorphous silicon film transistor and is also unable to satisfy this requirement.Although the on-state current of polycrystalline SiTFT is higher,
Have the shortcomings that fatal, due to the presence of crystal boundary, fluctuate its electric property can in a certain range, needs through compensation electricity
Road reduces this influence.Therefore the complicated technology of polysilicon and high cost will be such that it washes in a pan in following FPD industry
Eliminate striking out.
It in response to the above problems, is an effective way as the thin film transistor (TFT) of channel layer using zinc oxide.Compared to tradition
Amorphous silicon and polycrystalline SiTFT, zinc oxide thin-film transistor have visible transparent, and uniformity is good, and cost of material is low
Honest and clean, the pure zinc oxide thin film transistor (TFT) of the advantages such as easily prepared, element-free doping also has environmentally protective, degradable advantage,
Meet country innovation, Green Development theory, it can be achieved that low cost Flexible Displays and receive significant attention.But pure zinc oxide
There are still some defects to need to improve for thin film transistor (TFT), such as the problems such as electrical stability is poor, and on-state current is lower, limits pure oxygen
Change the market application of zinc thin film transistor (TFT).
Summary of the invention
The present invention provides a kind of preparation method of zinc oxide thin-film transistor, poor to solve existing electrical stability, opens
The lower problem of state electric current.
The technical solution adopted by the present invention is that, including the following steps:
(1), substrate is cleaned, the substrate uses hard substrates or flexible substrate；
(2) gate deposition, the grid material are metal or oxide conductive film, are prepared with electron beam evaporation method；Tool
Steps are as follows for body:
(1) photoetching-lift-off technology is utilized, first spin coating photoresist one, exposure development go out to prepare single film brilliant on substrate
The grid island region of body tube device, the specific steps are as follows:
1) clean substrate is fixed on spin coating instrument by resist coating one, spin coating photoresist one, revolving speed 250rpm, when
Between 7 seconds, rise to 500rpm, the time 8 seconds, then rise to 3000rpm, the time 30 seconds；
2) front baking coats the substrate of photoresist one front baking 3 minutes at 90 DEG C；
3) it exposes, the substrate photolithography plate one being baked before upper step is covered, is placed under exposure machine and exposes, at this time figure portion
Divide exposure, rest part is not affected by illumination；
4) develop, the substrate after photoresist one is exposed is placed in developer solution, and the corresponding photoresist one of exposed portion is dissolved in
Developer solution is removed, and is exposed substrate, is obtained the region that will deposit grid island, after being rinsed well with deionized water, nitrogen is blown
It is dry；
(2) substrate after development is put into apparatus for electron beam evaporation growth room, one with lithographic glue one faces
Under, deposited by electron beam evaporation method is aluminized；
(3) it removes photoresist, the sample after above-mentioned electron beam evaporation method is aluminized is put into ultrasound 1 minute in acetone soln,
Photoresist one is dissolved in acetone soln, and the photoresist one of substrate surface is removed together with metallic aluminium thereon, and remainder forms grid
Minimum island, then rinsed well with ethyl alcohol, deionized water, with being dried with nitrogen, obtain sample one；
(3), insulating layer deposition, the insulating layer are the oxide-insulator of high dielectric constant, using plasma enhancing
The preparation of chemical vapor deposition PECVD method, the specific steps are as follows:
(1) photoetching-lift-off technology is utilized, the spin coating photoresist two on the sample one that step (2) obtains, exposure development goes out
Prepare the insulating layer island region of single film transistor device, the specific steps are as follows:
1) sample one is fixed on spin coating instrument by gluing, spin coating photoresist two, revolving speed 250rpm, the time 7 seconds, is risen to
500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
2) front baking, sample one after coating photoresist two front baking 3 minutes at 90 DEG C；
3) it exposes, photoresist two will be coated, the preceding photolithography plate two of sample one being baked covers, it is placed under exposure machine and exposes
Light, figure covering part exposes at this time, and rest part is not affected by illumination；
4) develop, the sample one after coating photoresist two, exposing is placed in developer solution, the corresponding photoresist of exposed portion
Two are dissolved in developer solution, are removed, and expose substrate and part of grid pole, obtain the region i.e. by depositing insulating layer, rushed with deionized water
After wash clean, it is dried with nitrogen；
(2) sample one handled well through above-mentioned steps is placed in the life of plasma enhanced chemical vapor deposition PECVD device
On long room pedestal, silicon dioxide insulating layer is deposited；
(3) it removes photoresist, the sample one after deposited silicon dioxide insulating layer is put into ultrasound 1 minute, photoetching in acetone soln
Glue two is dissolved in acetone soln, and the photoresist two on substrate and part of grid pole surface is removed together with silica thereon, remainder
Divide and form insulating layer island, then rinsed well with ethyl alcohol, deionized water, with being dried with nitrogen, obtains sample；
(4), oxygen-rich oxide zinc channel layer deposits, and method uses rf magnetron sputtering；Specific step is as follows:
The sample two that step (3) obtains is placed on the sputtering unit pallet of magnetron sputtering apparatus, pallet is hung, deposition is high
The oxygen-rich oxide zinc channel layer of partial pressure of oxygen, partial pressure of oxygen 30%~50%, 3~10nm of thickness obtain sample three；
(5) hypoxemia zinc-oxide channel layer deposits, and method still uses rf magnetron sputtering, the specific steps are as follows:
(1) it adjusts oxygen and is depressed into 3%~10%, deposit hypoxemia zinc-oxide channel layer, 30~70nm of thickness obtains sample
Four；
(2) sample four is put into annealing furnace, 250 DEG C in air atmosphere~500 DEG C, annealing 3~30 minutes；
(3) photolithography method is used, oxygen-rich oxide zinc channel layer and hypoxemia zinc-oxide channel layer are etched island region, specifically
Steps are as follows:
1) above-mentioned sample four is fixed on spin coating instrument, spin coating photoresist three, revolving speed 250rpm by gluing, the time 7 seconds, is risen
To 500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
2) front baking will coat the sample four of photoresist three front baking 3 minutes at 90 DEG C；
3) it exposes, the photolithography plate three of sample four after photoresist three, front baking will be coated, cover, be placed under exposure machine and expose
Light, figure covering part is not affected by illumination, rest part exposure at this time；
4) develop, the sample four after coating photoresist three, exposing is placed in developer solution, the corresponding photoresist of exposed portion
Three are dissolved in developer solution, are removed, and expose substrate and part of grid pole；
5) post bake, by the sample four after development 90 DEG C post bake 90 seconds；
6) corrode, the sample four after post bake is placed in the HCL aqueous solution of 2.5 ‰ concentration, corrode 3 seconds, be not photo-etched glue
The part of three protections, i.e. oxygen-rich oxide zinc channel layer and hypoxemia zinc-oxide channel layer are corroded, and expose substrate and part of grid pole；
7) it removes photoresist, the sample four corroded by above-mentioned steps is put into acetone soln 10 seconds, photoresist three is dissolved in third
Ketone solution rinses to be stripped, then with alcohol, deionized water, is dried with nitrogen, and forms sample five；
(6) source electrode, drain electrode deposition, the source electrode, drain electrode use metal or conductive oxide, and structure is fork
Refer to electrode, using lift-off technology, deposition method uses electron beam evaporation, the specific steps are as follows:
(1) sample five is fixed on spin coating instrument by gluing, spin coating photoresist four, revolving speed 250rpm, the time 7 seconds, is risen to
500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
(2) front baking will coat the sample five of photoresist four front baking 3 minutes at 90 DEG C；
(3) it exposes, the sample five after coating photoresist four, front baking, is covered with photolithography plate four, after version, aoxidized with hypoxemia
The overlapping of zinc channel layer, is placed under exposure machine and exposes, and figure covering part exposes at this time, and rest part is not affected by illumination；
(4) develop, the sample five after photoresist four is exposed is placed in developer solution, and the corresponding photoresist four of exposed portion is molten
It in developer solution, is removed, exposes hypoxemia zinc-oxide channel layer；
(5) it is rinsed with deionized water, obtains the region that will deposit interdigital source electrode, interdigital drain electrode；
(6) sample five after photoresist four developing is put into electron beam evaporation equipment, deposited metal aluminium；
(7) will be by above-mentioned steps treated sample five is put into acetone soln ultrasound 1 minute, photoresist four is dissolved in third
Ketone solution, photoresist four are removed together with metallic aluminium thereon, expose substrate, part of grid pole and hypoxemia zinc-oxide channel layer, shape
Rinsed well at interdigital source electrode, interdigital drain electrode, then with ethyl alcohol, deionized water, be dried with nitrogen to get.
Substrate uses glass in step (1) of the present invention.
Specific step is as follows for step (1) cleaning substrate of the present invention:
(1) it first places the substrate into acetone soln, is cleaned by ultrasonic 3~5 minutes at room temperature, removal surface molecular type is stained with
It is dirty；
(2) step (1) processed substrate is placed in ethanol solution, is cleaned by ultrasonic 3~5 minutes at room temperature, removal
Surface residual acetone；
(3) the processed substrate deionized water of step (2) is cleaned by ultrasonic 3~5 minutes at room temperature, removes remaining second
Alcohol and ionic stain；
(4) step (3) processed substrate is dried up with high pure nitrogen, is put into 90 DEG C of baking oven and dries 5 minutes.
Grid material uses aluminium in step (2) of the present invention.
The pattern that photolithography plate one has chrome coating and the part without applying chromium to be formed in step (2) of the present invention.
Insulating layer uses silica in step (3) of the present invention.
The pattern that photolithography plate two has chrome coating and the part without applying chromium to be formed in step (3) of the present invention.
The pattern that photolithography plate three has chrome coating to be formed in step (5) of the present invention, rest part do not apply chromium.
Aluminium is respectively adopted in step (6) source electrode of the present invention, drain electrode.
The pattern that photolithography plate four has chrome coating and the part without applying chromium to be formed in step (6) of the present invention, the pattern
Middle part is interdigital pattern.
Channel layer of the present invention uses double-layer structure, using the method for rf magnetron sputtering, deposits under different partial high
The oxygen-rich oxide zinc layers of partial pressure of oxygen and the hypoxemia zinc oxide film of low oxygen partial pressure, wherein the channel layer contacted with gate dielectric layer is in richness
The pure zinc oxide prepared under the conditions of oxygen, thickness are generally 3~10nm, play and improve on-state current, reduce defect state density, improve
Interfacial state, the effect for improving device stability；
Continue to deposit hypoxemia zinc oxide film in oxygen-rich oxide zinc layers, thickness is generally 30~70nm, plays reduction OFF state
Electric current, the effect for adjusting cut-in voltage；
Interdigital electrode is deposited in source electrode, drain electrode on channel layer by the way of electron beam evaporation, can be in retainer
Under the premise of part on-off ratio and other performances are not substantially change, on-state current is further greatly improved, increases device
Driving capability.
It is an advantage of the invention that providing oxygen-enriched, hypoxemia layering system by the preparation of double active layer structures, interdigital source-drain electrode
Standby channel layer improves device stability and on-state current, prepares the source of interdigital shape on it, drain electrode further substantially mentions
High on-state current solves the problems, such as that stability is poor when pure zinc oxide prepares thin film transistor (TFT), on-state current is low；And preparation process
It simply, is in the rf magnetron sputtering and electron beam evaporation generally used, no replacement is required in the market production line；Raw material are pure oxygen
Change zinc, it is low in cost, environmentally protective.All there is application prospect in fields such as ultraviolet detection, display drivings.Make pure zinc oxide film
Transistor more has application potential on the market.
Detailed description of the invention
Fig. 1 is cleaned substrate schematic diagram；
Fig. 2 is to make grid island zone profile figure (sample one) by lithography；
Fig. 3 is to make grid island region top view (sample one) by lithography；
Fig. 4 is to make silicon dioxide insulating layer island zone profile figure (sample two) by lithography；
Fig. 5 is to make silicon dioxide insulating layer island region top view (sample two) by lithography；
Fig. 6 is the sample sectional view (sample three) for having deposited oxygen-rich oxide zinc layers；
Fig. 7 is the sample sectional view (sample four) for having deposited hypoxemia zinc oxide film；
Fig. 8 is the island zone profile figure (sample for channel layer being made by lithography multiple single film transistor devices of production
Five)；
Fig. 9 is the island region top view (sample for channel layer being made by lithography multiple single film transistor devices of production
Five)；
Figure 10 is the zinc oxide thin-film transistor sectional view for preparing completion；
Figure 11 is the zinc oxide thin-film transistor top view for preparing completion；
Figure 12 is the single device profile schematic diagram of zinc oxide thin-film transistor；
Figure 13 is the single device top view of zinc oxide thin-film transistor；
Figure 14 is one schematic diagram of photolithography plate；
Figure 15 is two schematic diagram of photolithography plate；
Figure 16 is three schematic diagram of photolithography plate；
Figure 17 is four schematic diagram of photolithography plate；
Wherein: substrate 1, grid 2, insulating layer 3, oxygen-rich oxide zinc channel layer 4, hypoxemia zinc-oxide channel layer 5, source electrode 6,
Drain electrode 7 does not apply chromium part 8, chrome coating 9, photolithography plate 1, photolithography plate 2 11, photolithography plate 3 12, photolithography plate 4 13.
Specific embodiment
Include the following steps:
(1), substrate 1 is cleaned, the substrate 1 uses hard substrates or flexible substrate, and the present embodiment substrate uses glass；
Specific step is as follows:
(1) first substrate 1 is put into acetone soln, is cleaned by ultrasonic 3~5 minutes at room temperature, removal surface molecular type is stained with
It is dirty；
(2) the processed substrate 1 of step (1) is placed in ethanol solution, is cleaned by ultrasonic 3~5 minutes at room temperature, removal
Surface residual acetone；
(3) the processed substrate 1 of step (2) is cleaned by ultrasonic 3~5 minutes at room temperature with deionized water, removal is remaining
Ethyl alcohol and ionic stain；
(4) the processed substrate 1 of step (3) is dried up with high pure nitrogen, is put into 90 DEG C of baking oven and dries 5 minutes, sees Fig. 1；
(2) grid 2 deposits, and the grid material is metal or oxide conductive film, and the present embodiment grid material uses
Aluminium is prepared with electron beam evaporation method；Specific step is as follows:
(1) photoetching-lift-off technology is utilized, first spin coating photoresist one, exposure development go out to prepare single film brilliant on substrate
The grid island region of body tube device, the specific steps are as follows:
1) clean substrate 1 is fixed on spin coating instrument, spin coating photoresist one, revolving speed 250rpm by resist coating one, when
Between 7 seconds, rise to 500rpm, the time 8 seconds, then rise to 3000rpm, the time 30 seconds；
2) front baking coats the substrate 1 of photoresist one front baking 3 minutes at 90 DEG C；
3) it exposes, the substrate 1 being baked before upper step photolithography plate 1 is covered, which has chrome coating 9 and do not have
The pattern for having the part 8 for applying chromium to be formed is shown in Figure 14, is placed under exposure machine and exposes, visuals exposes at this time, and rest part is not
By illumination；
4) develop, the substrate 1 after photoresist one is exposed is placed in developer solution, and the corresponding photoresist one of exposed portion is dissolved in
Developer solution is removed, and is exposed glass substrate, is obtained the region that will deposit 2 island of grid, after being rinsed well with deionized water,
It is dried with nitrogen；
(2) substrate 1 after development is put into apparatus for electron beam evaporation growth room, one with lithographic glue one faces
Under, deposited by electron beam evaporation method is aluminized；
(3) it removes photoresist, the sample after above-mentioned electron beam evaporation method is aluminized is put into ultrasound 1 minute in acetone soln,
Photoresist one is dissolved in acetone soln, and the photoresist one on 1 surface of glass substrate is removed together with metallic aluminium thereon, remainder shape
It is rinsed well at 2 island of grid, then with ethyl alcohol, deionized water, with being dried with nitrogen, obtains sample one, see Fig. 2,3；
(3), insulating layer 3 deposits, and the insulating layer is the oxide-insulator of high dielectric constant, the present embodiment insulating layer
Using silica, using plasma enhances the preparation of chemical vapor deposition PECVD method, the specific steps are as follows:
(1) photoetching-lift-off technology is utilized, the spin coating photoresist two on the sample one that step (2) obtains, exposure development goes out
Prepare the 3 island region of insulating layer of single film transistor device, the specific steps are as follows:
1) sample one is fixed on spin coating instrument by gluing, spin coating photoresist two, revolving speed 250rpm, the time 7 seconds, is risen to
500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
2) front baking, sample one after coating photoresist two front baking 3 minutes at 90 DEG C；
3) it exposes, photoresist two will be coated, the preceding photolithography plate two of sample one being baked covers, which has chromium painting
The pattern that layer 9 and the part 8 without applying chromium are formed, is shown in Figure 15, is placed under exposure machine and exposes, figure covering part exposes at this time
Light, rest part are not affected by illumination；
4) develop, the sample one after coating photoresist two, exposing is placed in developer solution, the corresponding photoresist of exposed portion
Two are dissolved in developer solution, are removed, and expose glass substrate 1 and part of grid pole 2, obtain the region i.e. by depositing insulating layer 3, spend from
After sub- water is rinsed well, it is dried with nitrogen；
(2) sample one handled well through above-mentioned steps is placed in the life of plasma enhanced chemical vapor deposition PECVD device
On long room pedestal, silicon dioxide insulating layer 3 is deposited；
(3) it removes photoresist, the sample one after deposited silicon dioxide insulating layer 3 is put into ultrasound 1 minute, photoetching in acetone soln
Glue two is dissolved in acetone soln, and the photoresist two on 2 surface of glass substrate 1 and part of grid pole is removed together with silica thereon,
Remainder forms 3 island of insulating layer, then is rinsed well with ethyl alcohol, deionized water, with being dried with nitrogen, obtains sample two, sees figure
4,5；
(4), oxygen-rich oxide zinc channel layer 4 deposits, and method uses rf magnetron sputtering；Specific step is as follows:
The sample two that step (3) obtains is placed on the sputtering unit pallet of magnetron sputtering apparatus, pallet is hung, deposition is high
The oxygen-rich oxide zinc channel layer 4 of partial pressure of oxygen, partial pressure of oxygen 30%~50%, 3~10nm of thickness obtain sample three, see Fig. 6；It reduces
Lacking oxygen defect between 3 interface of oxygen-rich oxide zinc channel layer 4 and insulating layer, improves the stability of thin film transistor (TFT)；
(5) hypoxemia zinc-oxide channel layer 5 deposits, and method still uses rf magnetron sputtering, it is not necessary to which sample is taken out special add
Work saves production cost, reduces process complexity；Specific step is as follows:
(1) it adjusts oxygen and is depressed into 3%~10%, deposit hypoxemia zinc-oxide channel layer 5,30~70nm of thickness obtains sample
Four, see Fig. 7；
(2) sample four is put into annealing furnace, 250 DEG C in air atmosphere~500 DEG C, annealing 3~30 minutes；
(3) photolithography method is used, oxygen-rich oxide zinc channel layer 4 and hypoxemia zinc-oxide channel layer 5 are etched island region, is had
Steps are as follows for body:
1) above-mentioned sample four is fixed on spin coating instrument, spin coating photoresist three, revolving speed 250rpm by gluing, the time 7 seconds, is risen
To 500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
2) front baking will coat the sample four of photoresist three front baking 3 minutes at 90 DEG C；
3) it exposes, the photolithography plate 3 12 of sample four after photoresist three, front baking will be coated, which has chrome coating
9 patterns formed, rest part 8 do not apply chromium, see Figure 16, cover, are placed under exposure machine and expose, at this time figure covering part
It is not affected by illumination, rest part exposure；
4) develop, the sample four after coating photoresist three, exposing is placed in developer solution, the corresponding photoresist of exposed portion
Three are dissolved in developer solution, are removed, and expose substrate 1 and part of grid pole 2；
5) post bake, by the sample four after development 90 DEG C post bake 90 seconds；
6) corrode, the sample four after post bake is placed in the HCL aqueous solution of 2.5 ‰ concentration, corrode 3 seconds, be not photo-etched glue
The part of three protections, i.e. oxygen-rich oxide zinc channel layer 4 and hypoxemia zinc-oxide channel layer 5 are corroded, and expose substrate 1 and part grid
Pole 2；
7) it removes photoresist, the sample four corroded by above-mentioned steps is put into acetone soln 10 seconds, photoresist three is dissolved in third
Ketone solution rinses to be stripped, then with alcohol, deionized water, is dried with nitrogen, and forms sample five, sees Fig. 8,9；
(6) source electrode 6, drain electrode 7 deposit, and the source electrode 6, drain electrode 7 use metal or conductive oxide, this reality
Apply a source electrode 6, aluminium is respectively adopted in drain electrode 7, structure is interdigital electrode, and using lift-off technology, deposition method uses electron beam
Evaporation, the specific steps are as follows:
(1) sample five is fixed on spin coating instrument by gluing, spin coating photoresist four, revolving speed 250rpm, the time 7 seconds, is risen to
500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
(2) front baking will coat the sample five of photoresist four front baking 3 minutes at 90 DEG C；
(3) it exposes, the sample five after coating photoresist four, front baking, is covered with photolithography plate four, which has chromium painting
The pattern that layer 9 and the part 8 without applying chromium are formed, pattern middle part is interdigital pattern, sees Figure 17, after version, is aoxidized with hypoxemia
Zinc channel layer 5 is overlapped, and is placed under exposure machine and is exposed, and figure covering part exposes at this time, and rest part is not affected by illumination；
(4) develop, the sample five after photoresist four is exposed is placed in developer solution, and the corresponding photoresist four of exposed portion is molten
It in developer solution, is removed, exposes hypoxemia zinc-oxide channel layer 5；
(5) it is rinsed with deionized water, obtains the region that will deposit interdigital source electrode 6, interdigital drain electrode 7；
(6) sample five after photoresist four developing is put into electron beam evaporation equipment, deposited metal aluminium；
(7) will be by above-mentioned steps treated sample five is put into acetone soln ultrasound 1 minute, photoresist four is dissolved in third
Ketone solution, photoresist four are removed together with metallic aluminium thereon, expose glass substrate 1, part of grid pole 2 and hypoxemia zinc-oxide channel
Layer 5, forms interdigital source electrode 6, interdigital drain electrode 7, then rinsed well with ethyl alcohol, deionized water, with being dried with nitrogen to get oxidation
Zinc thin film transistor (TFT) is shown in Figure 10,11.
Claims (10)
1. a kind of preparation method of zinc oxide thin-film transistor, characterized in that it comprises the following steps:
(1), substrate is cleaned, the substrate uses hard substrates or flexible substrate；
(2) gate deposition, the grid material are metal or oxide conductive film, are prepared with electron beam evaporation method；Specific step
It is rapid as follows:
(1) photoetching-lift-off technology is utilized, first spin coating photoresist one, exposure development prepare single thin film transistor (TFT) out on substrate
The grid island region of device, the specific steps are as follows:
1) clean substrate is fixed on spin coating instrument by resist coating one, spin coating photoresist one, revolving speed 250rpm, the time 7
Second, rise to 500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
2) front baking coats the substrate of photoresist one front baking 3 minutes at 90 DEG C；
3) it exposes, the substrate photolithography plate one being baked before upper step is covered, is placed under exposure machine and exposes, visuals exposes at this time
Light, rest part are not affected by illumination；
4) develop, the substrate after photoresist one is exposed is placed in developer solution, and the corresponding photoresist one of exposed portion is dissolved in development
Liquid is removed, and is exposed glass substrate, is obtained the region that will deposit grid island, after being rinsed well with deionized water, nitrogen is blown
It is dry；
(2) substrate after development is put into apparatus for electron beam evaporation growth room, one with lithographic glue one down, uses
Electron beam evaporation method is aluminized；
(3) it removes photoresist, the sample after above-mentioned electron beam evaporation method is aluminized is put into ultrasound 1 minute, photoetching in acetone soln
Glue one is dissolved in acetone soln, and the photoresist one of substrate surface is removed together with metallic aluminium thereon, and it is small that remainder forms grid
Island, then rinsed well with ethyl alcohol, deionized water, with being dried with nitrogen, obtain sample one；
(3), insulating layer deposition, the insulating layer are the oxide-insulator of high dielectric constant, using plasma enhancing chemistry
The PECVD method that is vapor-deposited preparation, the specific steps are as follows:
(1) photoetching-lift-off technology, the spin coating photoresist two on the sample one that step (2) obtains are utilized, exposure development goes out to prepare
The insulating layer island region of single film transistor device, the specific steps are as follows:
1) sample one is fixed on spin coating instrument by gluing, spin coating photoresist two, revolving speed 250rpm, the time 7 seconds, rises to 500rpm,
Time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
2) front baking, sample one after coating photoresist two front baking 3 minutes at 90 DEG C；
3) it exposes, photoresist two will be coated, the preceding photolithography plate two of sample one being baked covers, be placed under exposure machine and expose, this
When figure covering part expose, rest part is not affected by illumination；
4) develop, the sample one after coating photoresist two, exposing is placed in developer solution, the corresponding photoresist two of exposed portion is molten
It in developer solution, is removed, exposes substrate and part of grid pole, obtain the region i.e. by depositing insulating layer, rinsed with deionized water dry
After net, it is dried with nitrogen；
(2) sample one handled well through above-mentioned steps is placed in plasma enhanced chemical vapor deposition PECVD device growth room
On pedestal, silicon dioxide insulating layer is deposited；
(3) it removes photoresist, the sample one after deposited silicon dioxide insulating layer is put into ultrasound 1 minute, photoresist two in acetone soln
It is dissolved in acetone soln, the photoresist two on substrate and part of grid pole surface is removed together with silica thereon, remainder shape
It is rinsed well at insulating layer island, then with ethyl alcohol, deionized water, with being dried with nitrogen, obtains sample two；
(4), oxygen-rich oxide zinc channel layer deposits, and method uses rf magnetron sputtering；Specific step is as follows:
The sample two that step (3) obtains is placed on the sputtering unit pallet of magnetron sputtering apparatus, pallet is hung, deposits high oxygen
The oxygen-rich oxide zinc channel layer of pressure, partial pressure of oxygen 30%~50%, 3~10nm of thickness obtain sample three；
(5) hypoxemia zinc-oxide channel layer deposits, and method still uses rf magnetron sputtering, the specific steps are as follows:
(1) it adjusts oxygen and is depressed into 3%~10%, deposit hypoxemia zinc-oxide channel layer, 30~70nm of thickness obtains sample four；
(2) sample four is put into annealing furnace, 250 DEG C in air atmosphere~500 DEG C, annealing 3~30 minutes；
(3) photolithography method is used, oxygen-rich oxide zinc channel layer and hypoxemia zinc-oxide channel layer are etched island region, specific steps
It is as follows:
1) above-mentioned sample four is fixed on spin coating instrument, spin coating photoresist three, revolving speed 250rpm by gluing, the time 7 seconds, is risen to
500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
2) front baking will coat the sample four of photoresist three front baking 3 minutes at 90 DEG C；
3) it exposes, the photolithography plate three of sample four after photoresist three, front baking will be coated, cover, be placed under exposure machine and expose, this
When figure covering part be not affected by illumination, rest part exposure；
4) develop, the sample four after coating photoresist three, exposing is placed in developer solution, the corresponding photoresist three of exposed portion is molten
It in developer solution, is removed, exposes substrate and part of grid pole；
5) post bake, by the sample four after development 90 DEG C post bake 90 seconds；
6) corrode, the sample four after post bake is placed in the HCL aqueous solution of 2.5 ‰ concentration, corrode 3 seconds, be not photo-etched the guarantor of glue three
The part of shield, i.e. oxygen-rich oxide zinc channel layer and hypoxemia zinc-oxide channel layer are corroded, and expose substrate and part of grid pole；
7) it removes photoresist, the sample four corroded by above-mentioned steps is put into acetone soln 10 seconds, it is molten that photoresist three is dissolved in acetone
Liquid rinses to be stripped, then with alcohol, deionized water, is dried with nitrogen, and forms sample five；
(6) source electrode, drain electrode deposition, the source electrode, drain electrode use metal or conductive oxide, and structure is interdigital electricity
Pole, using lift-off technology, deposition method uses electron beam evaporation, the specific steps are as follows:
(1) sample five is fixed on spin coating instrument by gluing, spin coating photoresist four, revolving speed 250rpm, the time 7 seconds, is risen to
500rpm, the time 8 seconds, then 3000rpm is risen to, the time 30 seconds；
(2) front baking will coat the sample five of photoresist four front baking 3 minutes at 90 DEG C；
(3) it exposes, the sample five after coating photoresist four, front baking, is covered with photolithography plate four, after version, with hypoxemia zinc oxide ditch
Channel layer overlapping, is placed under exposure machine and exposes, and figure covering part exposes at this time, and rest part is not affected by illumination；
(4) develop, the sample five after photoresist four is exposed is placed in developer solution, and the corresponding photoresist four of exposed portion is dissolved in aobvious
Shadow liquid, is removed, and exposes hypoxemia zinc-oxide channel layer；
(5) it is rinsed with deionized water, obtains the region that will deposit interdigital source electrode, interdigital drain electrode；
(6) sample five after photoresist four developing is put into electron beam evaporation equipment, deposited metal aluminium；
(7) will be by above-mentioned steps treated sample five is put into acetone soln ultrasound 1 minute, it is molten that photoresist four is dissolved in acetone
Liquid, photoresist four are removed together with metallic aluminium thereon, expose substrate, part of grid pole and hypoxemia zinc-oxide channel layer, form fork
Refer to source electrode, interdigital drain electrode, then rinsed well with ethyl alcohol, deionized water, be dried with nitrogen to get.
2. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(1) substrate uses glass in.
3. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(1) specific step is as follows for cleaning substrate:
(1) it first places the substrate into acetone soln, is cleaned by ultrasonic 3~5 minutes at room temperature, removal surface molecular type stains；
(2) step (1) processed substrate is placed in ethanol solution, is cleaned by ultrasonic 3~5 minutes at room temperature, remove surface
Residual acetone；
(3) the processed substrate deionized water of step (2) is cleaned by ultrasonic 3~5 minutes at room temperature, remove residual ethanol and
Ionic stains；
(4) step (3) processed substrate is dried up with high pure nitrogen, is put into 90 DEG C of baking oven and dries 5 minutes.
4. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(2) grid material uses aluminium in.
5. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(2) pattern that photolithography plate one has chrome coating and the part without applying chromium to be formed in.
6. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(3) insulating layer uses silica in.
7. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(3) pattern that photolithography plate two has chrome coating and the part without applying chromium to be formed in.
8. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(5) pattern that photolithography plate three has chrome coating to be formed in, rest part do not apply chromium.
9. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(6) aluminium is respectively adopted in source electrode, drain electrode.
10. a kind of preparation method of zinc oxide thin-film transistor according to claim 1, it is characterised in that: the step
(6) pattern that photolithography plate four has chrome coating and the part without applying chromium to be formed in, pattern middle part are interdigital pattern.
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