CN108932200B - Test circuit and software debugging method - Google Patents
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- CN108932200B CN108932200B CN201810769166.8A CN201810769166A CN108932200B CN 108932200 B CN108932200 B CN 108932200B CN 201810769166 A CN201810769166 A CN 201810769166A CN 108932200 B CN108932200 B CN 108932200B
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- G06F11/36—Preventing errors by testing or debugging software
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- G06F11/3656—Software debugging using additional hardware using a specific debug interface
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Abstract
The invention provides a test circuit of software and a software debugging method, and belongs to the technical field of software test. The test circuit includes: the USB-to-serial port connection board comprises a USB interface, a TX interface and an RX interface, wherein the TX interface is communicated with the RX interface, and the RX interface is communicated with the slave bottom plate; the PC host communicates with the USB interface. Communicating with an RX interface via a TX interface, the RX interface communicating with a slave backplane; the PC host is communicated with the USB interface, so that IO is saved, and the chip packaged by less pins can be conveniently debugged; and the opening pin existing on the shell of the finished product is used, and the finished product can be debugged without disassembling the machine; one IO can automatically and flexibly switch between the debugging mode and the upgrading mode intelligently. And further effectively reduces the complexity of software debugging.
Description
Technical Field
The invention relates to the field of software testing, in particular to a software testing circuit and a software debugging method.
Background
The development board now has two sets of IO provided on-chip. The plurality of the external tools are used for connecting the external tools with a computer and downloading programs; the other group is generally a serial port for debugging and printing programs. In the prior art, a PC software is used, and a download program is downloaded to a motherboard chip through a group of IO (the number of IO is greater than 2) by a dedicated burning software. After the downloading is finished, when the bottom board chip works normally, the debugging data is output to another debugging software interface of the PC through another special debugging serial port. However, the occupied IO is large, and usually more than 3-4 IOs are occupied. The downloading program is inconvenient to use and can be downloaded by a matched special downloading tool. The debugging of the finished product machine is difficult, and the debugging can be carried out only after the flying line is disassembled by a method. The debugging process needs to be switched back and forth between a downloading tool and a debugging tool, so that the debugging is very troublesome.
Disclosure of Invention
The software testing circuit and the software debugging method provided by the embodiment of the invention can solve the technical problem that the complexity of software debugging cannot be reduced in the prior art.
In order to achieve the above purpose, the embodiment of the present invention adopts the following technical solutions:
in a first aspect, an embodiment of the present invention provides a test circuit, including: the test circuit comprises a PC host, a USB-to-serial connection board and a slave bottom board, wherein the USB-to-serial connection board comprises a USB interface, a TX interface and an RX interface, the TX interface is communicated with the RX interface, and the RX interface is communicated with the slave bottom board; the PC host is communicated with the USB interface; the PC host is used for sending an upgrading sequence to the connecting line board of the USB-to-serial port; the connecting line board of the USB-to-serial port is used for receiving the upgrading sequence sent by the PC host through a USB interface, sending the upgrading sequence to the RX interface through the TX interface and sending the upgrading sequence to the slave bottom board through the RX interface; the slave bottom plate is used for entering an upgrading mode according to the upgrading sequence after receiving the upgrading sequence; after entering the upgrading mode, the slave bottom plate is also used for returning first response information to the connecting line plate of the USB-to-serial port through the RX interface; the connecting board of the USB-to-serial port is also used for returning the first response information to the PC host through the USB interface; the PC host is also used for stopping sending the upgrading sequence and entering the upgrading mode after receiving the first response information; the slave computer is also used for sending an upgrading protocol corresponding to the upgrading mode to the slave computer bottom plate according to the packet format; the slave bottom plate is used for returning second response information to the PC host according to the upgrading protocol and also used for finishing upgrading according to the upgrading protocol; after the upgrading is finished, the PC host is also used for sending a reset command to the slave computer bottom plate and switching to a debugging mode; and the slave bottom plate is used for realizing reset operation according to the reset command and outputting debugging information to the PC host.
With reference to the first aspect, an embodiment of the present invention provides a first possible implementation manner of the first aspect, where the TX interface and the RX interface share a serial port.
With reference to the first possible implementation manner of the first aspect, an embodiment of the present invention provides a second possible implementation manner of the first aspect, where the connection board for USB to serial port further includes a first resistor, one end of the first resistor is connected to the TX interface, and the other end of the first resistor is connected to the RX interface.
With reference to the first aspect, an embodiment of the present invention provides a third possible implementation manner of the first aspect, where the connection board for USB to serial port includes a serial port chip.
In a second aspect, a software debugging method provided in an embodiment of the present invention includes: the PC host sends an upgrading sequence to a connection board of a USB-to-serial port; the connecting line board of the USB-to-serial port receives the upgrading sequence sent by the PC host through a USB interface, sends the upgrading sequence to an RX interface through a TX interface, and sends the upgrading sequence to a slave bottom board through the RX interface; after receiving the upgrading sequence, the slave bottom plate enters an upgrading mode according to the upgrading sequence; after entering an upgrading mode, the slave bottom plate returns first response information to the connecting line plate of the USB-to-serial port through the RX interface; the connection circuit board of the USB-to-serial port returns the first response information to the PC host through the USB interface; after receiving the first response message, the PC host stops sending the upgrading sequence and enters the upgrading mode; after entering the upgrading mode, sending an upgrading protocol corresponding to the upgrading mode to the slave bottom plate according to the packet format; the slave bottom plate returns second response information to the PC host according to the upgrading protocol and finishes upgrading according to the upgrading protocol; after upgrading is completed, the PC host sends a reset command to the slave computer bottom plate and switches to a debugging mode; and the slave bottom plate realizes reset operation according to the reset command and outputs debugging information to the PC host.
With reference to the second aspect, an embodiment of the present invention provides a first possible implementation manner of the second aspect, where after the slave backplane receives the upgrade sequence, before entering an upgrade mode according to the upgrade sequence, the method includes: and judging whether the upgrading sequence is received.
With reference to the first possible implementation manner of the second aspect, an embodiment of the present invention provides a second possible implementation manner of the first aspect, where after the determining whether the upgrade sequence is received, the method includes: if the upgrading sequence is not received, judging whether the time is overtime; and if the time is out, entering a normal mode.
With reference to the second possible implementation manner of the second aspect, an embodiment of the present invention provides a third possible implementation manner of the first aspect, where before outputting the debug information to the PC host, the method further includes: judging whether debugging information needs to be output or not; if yes, the IO is set to be in an output state, and debugging information is output to the PC host.
Compared with the prior art, the embodiment of the invention has the following beneficial effects:
the software testing circuit and the software debugging method provided by the embodiment of the invention communicate with the RX interface through the TX interface, and the RX interface communicates with the slave bottom plate; the PC host is communicated with the USB interface, so that IO is saved, and the chip packaged by less pins can be conveniently debugged; and the opening pin existing on the shell of the finished product is used, and the finished product can be debugged without disassembling the machine; the PC software has the downloading and debugging functions at the same time, and the trouble of switching is saved. One IO can automatically and flexibly switch between the debugging mode and the upgrading mode intelligently. And further effectively reduces the complexity of software debugging.
Additional features and advantages of the disclosure will be set forth in the description which follows, or in part may be learned by the practice of the above-described techniques of the disclosure, or may be learned by practice of the disclosure.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is a schematic diagram of a test circuit according to a first embodiment of the present invention;
FIG. 2 is a flowchart of a software debugging method according to a second embodiment of the present invention;
FIG. 3 is a flowchart illustrating an implementation of the software debugging method shown in FIG. 2 when the PC host is in an upgrade mode;
FIG. 4 is a flowchart of an implementation of the software debugging method shown in FIG. 2 when the slave backplane is in an upgrade mode;
FIG. 5 is a flowchart illustrating an implementation of the software debugging method shown in FIG. 2 when the PC host is in a debugging mode;
fig. 6 is a flowchart of an implementation of the slave backplane in the software debugging method shown in fig. 2 when the slave backplane is in the debugging mode.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Some embodiments of the invention are described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
First embodiment
Referring to fig. 1, a test circuit 100 according to an embodiment of the present invention includes a PC host 110, a USB-to-serial connection board 120, and a slave backplane 130.
In this embodiment, the PC (personal computer) 110 has test software installed therein, and the test software includes two modes, one of which is a download mode (also referred to as an upgrade mode), and in this state, the PC host 110 continuously sends some special sequences. The other mode is a debug mode, in which the PC host 110 is in a state of receiving information, and the contents output from the slave backplane 130 are displayed on the software interface of the PC host 110 in real time. In the debug mode, the PC host 110 may also cause the slave backplane 130 to enter the download mode directly by sending a special sequence to the slave backplane 130 for reset.
In the present embodiment, the PC host 110 is connected to the USB-to-serial connection board 120 for transmitting and receiving data through the USB-to-serial connection board 120. For example, the PC host 110 sets the state of its IO port to a transmission state, and transmits the upgrade sequence through the IO port. And sets the IO port to a receiving state when receiving data, thereby receiving data transmitted from the slave backplane 130.
In this embodiment, the PC host 110 is configured to send the upgrade sequence to the connection board 120 of the USB to serial port, and then send the upgrade sequence to the slave backplane 130 through the connection board 120 of the USB to serial port; the slave baseboard 130 is configured to enter an upgrade mode according to the upgrade sequence after receiving the upgrade sequence; after entering the upgrade mode, the slave backplane 130 is further configured to return first response information to the USB to serial connection board 120; the USB to serial port connection circuit board 120 is further configured to return the first response information to the PC host 110; the PC host 110 is further configured to stop sending the upgrade sequence and enter the upgrade mode after receiving the first response message; and is further configured to send an upgrade protocol corresponding to the upgrade mode to the slave backplane 130 in a packet format; the slave backplane 130 is configured to return a second response message to the PC host 110 according to the upgrade protocol, and is further configured to complete upgrading according to the upgrade protocol; after the upgrade is completed, the PC host 110 is further configured to send a reset command to the slave backplane and switch to a debug mode; the slave backplane 130 is configured to implement a reset operation according to the reset command and output debug information to the PC host 110.
In this embodiment, the USB to serial port connection circuit board 120 includes a USB interface U1, a TX interface T1, and an RX interface R, where the TX interface T1 communicates with the RX interface R, and the RX interface R communicates with the slave backplane 130; the USB interface U1 is connected to the PC host 110 for data input and output.
The connecting line board 120 of the USB to serial port is configured to be connected to the PC host 110 through the USB interface U1, so as to receive an upgrade sequence sent by the PC host 110, send the upgrade sequence to the RX interface R through the TX interface T1, and send the upgrade sequence to the slave backplane 130 through the RX interface R. And returning the first response information to the connection circuit board 120 of the USB serial port through the RX interface R; and then the first response message is returned to the PC host 110 through the USB interface U1.
In summary, those skilled in the art can transfer any data between the PC host 110 and the slave backplane 130 according to the above data transmission rule through the USB to serial connection board 120. For example, after the upgrade is completed, the PC host 110 is further configured to send a reset command to the slave backplane 130, where the sending of the reset command is also transmitted according to the above transmission rule.
In one embodiment, the TX interface T1 and the RX interface R share a serial port. Therefore, occupation of the IO port is effectively reduced, the use of the downloading program is more convenient, and the downloading can be carried out without a matched special downloading tool. The debugging of the slave computer bottom plate 130 is further simpler, the debugging can be carried out without disassembling the flying line, the debugging process is not required to be switched back and forth between a downloading tool and a debugging tool, the operation complexity is further reduced, and the debugging is simpler.
Optionally, the connection circuit board 120 of the USB serial port further includes a first resistor R1, one end of the first resistor R1 is connected to the TX interface T1, and the other end of the first resistor R1 is connected to the RX interface R, so that the TX interface T1 and the RX interface R share a serial port.
In this embodiment, the USB-to-serial connection board 120 includes a serial chip, for example, a signal of the serial chip may be CP 2102. For example, in practical use, a resistor (assumed to be 200 ohms) may be used to connect the TX pin and the RX pin of the serial chip in series, and the combined pin of the TX pin and the RX pin is connected to one IO port of the serial chip. In order to facilitate the non-disassembly of the finished product, the IO port of the serial port chip may select pins with openings on the finished product shell, such as USB, SD, and the like.
In this embodiment, the slave backplane 130 is a chip to be debugged.
In this embodiment, after the downloading function of the software installed in the PC host 110 is started, the PC host 110 starts to continuously send a special command sequence (e.g., an upgrade sequence) to the slave backplane 130, the slave backplane 130 enters an upgrade mode after receiving the sequence, and performs a special response (e.g., a returned response message), and after receiving the response, the PC host 110 stops sending the special sequence, and then enters an upgrade process. In the upgrade process, the PC host 110 starts to send a corresponding upgrade protocol to the slave backplane 130 in a packet format. The information of each packet includes a packet header, a packet number (the packet number is a sequence number or a parity number), protocol data, a check value, and the like. After receiving the corresponding packet data, the slave backplane 130 replies to the corresponding packet number (e.g., returns the second reply information). If the PC host 110 does not receive the acknowledgement from the slave backplane 130, the protocol packet retransmission will be performed on the slave backplane 130. After the upgrade is completed, the PC host 110 side software sends a reset command to reset the slave backplane 130, and at the same time, the PC host 110 switches to the debug mode to start receiving the debug information of the slave backplane 130. The slave backplane 130 uses the IO port to perform normal debug output in the debug mode, and still maintains the state of receiving the command in the gap of the debug information output. At this time, the PC host 110 may directly reset the slave backplane 130 by sending a special sequence, so that it enters the download upgrade process again.
According to the test circuit provided by the embodiment of the invention, IO is saved, so that a chip packaged by less pins can be conveniently debugged; and the opening pin existing on the shell of the finished product is used, and the finished product can be debugged without disassembling the machine; the PC software has the downloading and debugging functions at the same time, and the trouble of switching is saved. One IO can automatically and flexibly switch between the debugging mode and the upgrading mode intelligently. And further effectively reduces the complexity of software debugging.
Please refer to fig. 2, which is a flowchart illustrating a software debugging method according to an embodiment of the present invention. The software debugging method is applied to the test circuit as in the first embodiment, and the specific flow shown in fig. 2 will be described in detail below.
And step S101, the PC host sends an upgrading sequence to a connecting wiring board of the USB-to-serial port.
And S102, the connecting line board of the USB-to-serial port receives the upgrading sequence sent by the PC host through a USB interface, sends the upgrading sequence to an RX interface through a TX interface, and sends the upgrading sequence to a slave bottom board through the RX interface.
And step S103, after receiving the upgrading sequence, the slave bottom plate enters an upgrading mode according to the upgrading sequence.
Optionally, step S103 further includes, before: and judging whether the upgrading sequence is received. If the upgrade sequence is received, step S103 is executed.
Optionally, after the determining whether the upgrade sequence is received, the method includes: if the upgrading sequence is not received, judging whether the time is overtime; and if the time is out, entering a normal mode.
The normal mode is a mode excluding the upgrade mode and the debug mode, and may be, for example, a run mode.
And step S104, after entering the upgrading mode, the slave bottom plate returns first response information to the connecting wiring board of the USB switching port through the RX interface.
And step S105, the connection circuit board of the USB-to-serial port returns the first response information to the PC host through the USB interface.
Step S106, after receiving the first response message, the PC host stops sending the upgrading sequence and enters the upgrading mode.
And step S107, after entering the upgrading mode, sending an upgrading protocol corresponding to the upgrading mode to the slave bottom plate according to the packet format.
And step S108, the slave baseboard returns second response information to the PC host according to the upgrading protocol, and upgrading is completed according to the upgrading protocol.
Step S109, after the upgrade is completed, the PC host sends a reset command to the slave base plate and switches to a debugging mode.
And step S110, the slave baseboard realizes reset operation according to the reset command and outputs debugging information to the PC host.
Optionally, before step S110, determining whether debugging information needs to be output; if yes, set IO to output state, and execute step S110.
The specific implementation process of steps S101 to S110 may refer to the first embodiment, and is not described herein again.
In order to facilitate a more clear understanding of the software debugging method in the embodiment of the present invention, an implementation process of the software debugging method will be described below by way of example, as shown in fig. 3, for a PC host in the software debugging method provided in this embodiment, an IO may be set to a sending state through step S201, and then step S202 is executed to send a special sequence (e.g., an upgrade sequence); step S203 is executed again to set IO to a receiving state to receive response information returned from the slave backplane, step S204 is executed again to determine whether a response from the slave backplane is received, and if data returned from the slave backplane is received, it is determined that a response from the slave backplane is received. If the slave backplane 'S response is not received, step S201 is repeatedly executed until the slave backplane' S response is received, and then the upgrade mode (or download mode) is entered.
As shown in fig. 4, after the PC host executes step S202, for the slave backplane in the software debugging method provided in this embodiment, first, power-on or reset is performed in step S301, then step S302 is performed to set the IO to a receiving state to receive the special sequence (such as an upgrade sequence) sent in step S202, then step S303 is performed to determine whether the special sequence sent by the PC host is received, if not, step S304 is performed to determine whether the special sequence is not received due to occurrence of timeout, if so, the slave backplane enters a normal mode, and if not, step S303 is performed. If the special sequence is received, step S305 is executed to set the IO to a sending state for sending a response message to the PC host through the IO, that is, step S306 is executed, and then a corresponding mode, such as an upgrade mode, is entered according to the received special sequence.
After upgrading is completed, the PC host sends a reset command to reset the slave bottom plate, and simultaneously, the PC host is switched to a debugging mode to start receiving debugging information of the slave bottom plate. At this time, the slave backplane executes, as shown in the flowchart of fig. 6, specifically, step S501 is executed first, IO is set to an input state, step S502 is executed to run a normal program, step S503 is executed again to determine whether debug information needs to be output, if debug information needs to be output, step S504 is executed to set an IO port to an output state, step S505 is executed to output debug information to the PC host, if debug information does not need to be output, step S506 is executed to determine whether a sequence is received, and if so, the slave backplane resets to enter the upgrade mode and responds to the special sequence. After the slave backplane outputs the debug information, the PC host sets the IO in an input state in step S401, then executes step S402 to determine whether the debug information is received, if the debug information is displayed in step S403, then executes step S404 to determine whether the upgrade mode is required, if the debug information is displayed in step S405, sets the IO in an output state, and enters the upgrade mode to send the special sequence again.
In summary, in the test circuit and the software debugging method provided in the embodiments of the present invention, the RX interface communicates with the TX interface, and the RX interface communicates with the slave backplane; the PC host is communicated with the USB interface, so that IO is saved, and the chip packaged by less pins can be conveniently debugged; and the opening pin existing on the shell of the finished product is used, and the finished product can be debugged without disassembling the machine; the PC software has the downloading and debugging functions at the same time, and the trouble of switching is saved. One IO can automatically and flexibly switch between the debugging mode and the upgrading mode intelligently. And further effectively reduces the complexity of software debugging.
Further, an embodiment of the present invention further provides a storage medium, where instructions are stored in the storage medium, and when the instructions are run on a computer, when the computer program is executed by a processor, the software debugging method in the second embodiment is implemented, and details are not described here to avoid repetition.
From the above description of the embodiments, it is clear to those skilled in the art that the present invention can be implemented by hardware, or by software plus a necessary general hardware platform, and based on such understanding, the technical solution of the present invention can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a usb disk, a removable hard disk, etc.), and includes several instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the method of the various implementation scenarios of the present invention.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
Claims (6)
1. A test circuit, wherein the test circuit comprises: the USB-to-serial port connection board comprises a USB interface, a TX interface and an RX interface, wherein the TX interface is communicated with the RX interface, the TX interface and the RX interface share one serial port, and the RX interface is communicated with the slave bottom plate; the PC host is communicated with the USB interface;
the PC host is used for sending an upgrading sequence to the connecting line board of the USB-to-serial port;
the connecting line board of the USB transfer serial port is used for receiving the upgrading sequence sent by the PC host through a USB interface, sending the upgrading sequence to the RX interface through the TX interface and sending the upgrading sequence to the slave bottom board through the RX interface, and further comprises a first resistor, one end of the first resistor is connected with the TX interface, and the other end of the first resistor is connected with the RX interface;
the slave bottom plate is used for entering an upgrading mode according to the upgrading sequence after receiving the upgrading sequence;
after entering the upgrading mode, the slave bottom plate is also used for returning first response information to the connecting line plate of the USB-to-serial port through the RX interface;
the connecting board of the USB-to-serial port is also used for returning the first response information to the PC host through the USB interface;
the PC host is also used for stopping sending the upgrading sequence and entering the upgrading mode after receiving the first response information;
the slave computer is also used for sending an upgrading protocol corresponding to the upgrading mode to the slave computer bottom plate according to the packet format;
the slave bottom plate is used for returning second response information to the PC host according to the upgrading protocol and also used for finishing upgrading according to the upgrading protocol;
after the upgrading is finished, the PC host is also used for sending a reset command to the slave computer bottom plate and switching to a debugging mode;
and the slave bottom plate is used for realizing reset operation according to the reset command and outputting debugging information to the PC host.
2. The test circuit of claim 1, wherein the USB to serial port connection pads comprise serial chips.
3. A method for debugging software, comprising:
the PC host sends an upgrading sequence to a connection board of a USB-to-serial port;
the connecting line board of the USB transfer serial port receives the upgrading sequence sent by the PC host through a USB interface, sends the upgrading sequence to an RX interface through a TX interface, and sends the upgrading sequence to a slave bottom board through the RX interface, and further comprises a first resistor, one end of the first resistor is connected with the TX interface, and the other end of the first resistor is connected with the RX interface;
the TX interface and the RX interface share one serial port;
after receiving the upgrading sequence, the slave bottom plate enters an upgrading mode according to the upgrading sequence;
after entering an upgrading mode, the slave bottom plate returns first response information to the connecting line plate of the USB-to-serial port through the RX interface;
the connection circuit board of the USB-to-serial port returns the first response information to the PC host through the USB interface;
after receiving the first response message, the PC host stops sending the upgrading sequence and enters the upgrading mode;
after entering the upgrading mode, sending an upgrading protocol corresponding to the upgrading mode to the slave bottom plate according to the packet format;
the slave bottom plate returns second response information to the PC host according to the upgrading protocol and finishes upgrading according to the upgrading protocol;
after upgrading is completed, the PC host sends a reset command to the slave computer bottom plate and switches to a debugging mode;
and the slave bottom plate realizes reset operation according to the reset command and outputs debugging information to the PC host.
4. The method of claim 3, wherein after said slave backplane receives said upgrade sequence, and before entering an upgrade mode according to said upgrade sequence, comprising: and judging whether the upgrading sequence is received.
5. The method of claim 4, wherein after said determining whether the upgrade sequence is received, comprising: if the upgrading sequence is not received, judging whether the time is overtime;
and if the time is out, entering a normal mode.
6. The method of claim 3, further comprising, before outputting the debug information to the PC host: judging whether debugging information needs to be output or not;
if yes, the IO is set to be in an output state, and debugging information is output to the PC host.
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| CN207182271U (en) * | 2017-09-08 | 2018-04-03 | 北京奥博泰科技有限公司 | A kind of multi-functional embedded system development tools of USB interface |
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