CN108923824A - A kind of bus arrival intelligent display system - Google Patents
A kind of bus arrival intelligent display system Download PDFInfo
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- CN108923824A CN108923824A CN201810821646.4A CN201810821646A CN108923824A CN 108923824 A CN108923824 A CN 108923824A CN 201810821646 A CN201810821646 A CN 201810821646A CN 108923824 A CN108923824 A CN 108923824A
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- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C17/00—Arrangements for transmitting signals characterised by the use of a wireless electrical link
- G08C17/02—Arrangements for transmitting signals characterised by the use of a wireless electrical link using a radio link
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- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C19/00—Electric signal transmission systems
- G08C19/16—Electric signal transmission systems in which transmission is by pulses
- G08C19/22—Electric signal transmission systems in which transmission is by pulses by varying the duration of individual pulses
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- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C19/00—Electric signal transmission systems
- G08C19/16—Electric signal transmission systems in which transmission is by pulses
- G08C19/24—Electric signal transmission systems in which transmission is by pulses using time shift of pulses
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- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G1/00—Traffic control systems for road vehicles
- G08G1/123—Traffic control systems for road vehicles indicating the position of vehicles, e.g. scheduled vehicles; Managing passenger vehicles circulating according to a fixed timetable, e.g. buses, trains, trams
- G08G1/133—Traffic control systems for road vehicles indicating the position of vehicles, e.g. scheduled vehicles; Managing passenger vehicles circulating according to a fixed timetable, e.g. buses, trains, trams within the vehicle ; Indicators inside the vehicles or at stops
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/54—Systems for transmission via power distribution lines
- H04B3/542—Systems for transmission via power distribution lines the information being in digital form
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2203/00—Indexing scheme relating to line transmission systems
- H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
- H04B2203/5429—Applications for powerline communications
- H04B2203/5441—Wireless systems or telephone
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- Computer Networks & Wireless Communication (AREA)
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- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
The present invention relates to a kind of bus arrival intelligent display systems, one intelligent display station board is installed in bus station and shows arrival situation in front of each road bus, infrared communication is used between bus and bus station, one Centralized Controller is set in a power transformer platform area, Centralized Controller and intelligent display station board use power line communication, and Centralized Controller accesses mobile radio communication network by 4G wireless router.No matter passenger in where cell phone application, computer and handheld mobile device can be used to check each road bus arrival situation.
Description
(1) technical field:
It include Centralized Controller and each intelligent display station board the present invention relates to a kind of bus arrival intelligent display system,
Using power line communication method, 0 area's specified point is crossed to grid cyclic wave voltage and sends wide pulse signal generation mutation current, as letter
Number position value, Centralized Controller receives the data of each intelligent display station board acquisition, and accesses 4G by wireless router and move
Cordless communication network, from regardless of all mobile phone, computer and handheld mobile device can be used to realize Wireless Networking in where.
(2) background technique:
Current power line communication refers mainly to power line carrier communication and bi-directional Glenn shunt.Power line carrier communication PLC benefit
Signal is transmitted by carrier system with existing power line.But distribution transformer has barrier action to power carrier signal, simultaneously
Transmission has the very big loss of signal again between three-phase power line, so power carrier signal can only be in a distribution transformer platform area
Transmission, and can only be transmitted in single-phase electricity line.In practical application, when power line zero load, point-to-point carrier signal can be transferred to
Several kilometers, but when load is very heavy on power line, tens meters can only be transmitted, therefore power line carrier communication is only applied remote at present
In journey meter reading, also need to cooperate other means of communication.
Bi-directional Glenn shunt TWACS, which is utilized, is added modulated signal in power-frequency voltage fundamental wave zero passage area, with the electricity in this region
The distorted signal of pressure or current waveform carries information.TWACS system equipment exists only in substation and user terminal.Wherein by power transformation
Standing to the channel of user terminal transmission is output channel, carries information using the modulation of voltage waveform, is passed from user terminal to substation
Defeated channel is input channel, transmits information using the variation of current waveform.Its receiving and transmitting signal passes through coupling transformer and electricity
The crosslinking of power net.
The detection of TW A CS signal is mainly based upon time-domain difference technology, these methods mostly data processing complex, in real time
Property it is poor, equipment cost is high, needs to acquire a large amount of signal of multiple cycles relatively and carries out A/D conversion respectively, then carries out complicated meter
It calculates, just can determine that the signal position is " 1 " or " 0 ", due to the preciseness of calculating, interference signal can seriously affect detected signal
Judgement as a result, therefore original method be difficult China apply.
Clock timer and synchrotimer is arranged in the present invention, and the true and false judgement of synchrotimer and cycle signal is screened
With reference to my 2016 yearly correlation patents.
(3) summary of the invention:
Power line bi-directional Glenn shunt be when silicon-controlled 30 ° of triggering and conductings before zero crossing of modulation circuit, by every
Modulated signal is generated from transformer, makes grid cyclic wave that short circuit distortion occur, exports the frequency of modulated signal in 200~600Hz
Range, receiving end demodulate useful letter by acquisition, A/D conversion and the series of computation to multiple groups cycle distorted signal
Breath.But China's power network uses isolated neutral or small current neutral grounding system, electricity consumption situation is complicated, the two-way power frequency of power line
Communication can hardly find practical applications in China.
The present invention relates to a kind of bus arrival intelligent display system, passenger waits vehicles to need to know each road public transport in bus station
When vehicle arrives at a station, each road bus arrival situation opened in front of bus station's one intelligent display station board of installation is shown, public
It hands over and uses infrared communication between vehicle and bus station, infrared launcher and microcontroller are housed in the Vehicle Controller of bus,
Bus vehicle roof install infrared launcher, bus station bus corresponding height, it is perpendicular to the ground to pacify side by side
Several infrared receiving devices are filled, infrared emission is constituted, infrared receipts fill lens adjusting infrared communication range with emitter and are
Within one bus length, the bus infrared signal arrived at a station simultaneously is avoided to interfere.Bus reaches infrared hair when bus station
Emitter issues the encoded signal of arriving at a station comprising public bus network information, reads the signal that arrives at a station for infrared receiving circuit decoding.
The AC power source of intelligent display station board is taken along the street lamp special electric power network source on road, in a power transformer platform
One Centralized Controller is set in area, and Centralized Controller and intelligent display station board use power line communication, using power line communication
Reduce wiring installation.Microcontroller in Centralized Controller is communicated by serial ports with 4G wireless router, and by 4G without route
Mobile radio communication network is accessed by device.Using 4G fast wireless network as data carrying network, it can be achieved that the service of master station
No matter the wireless connection of safety high speed between device and the intelligent display station board of each website, passenger can be used in where from total
Cell phone application, computer and the handheld mobile device downloaded of standing check each road bus arrival situation.
The power line communication of use is the signal sending point and signal receiving point by the setting to grid cyclic wave voltage
It is accurately positioned, sends a rectangle broad pulse of communication positive or negative pole in the signal sending point of setting to generate mutation electricity
Stream, which causes a voltage drop to be superimposed on grid voltage waveform on the short-circuit impedance of distribution transformer, to complete
Signal modulation process, signal receiving point demodulated signal of the receiving end in the setting of grid cyclic wave voltage;One anode
Broad pulse refers to that the high level part of pulse returns 0 from 0 to height.Because only sending single rectangular wave broad pulse to power grid shadow
Very little is rung, and structure simple signal recall rate is high.The microcontroller STC15F2K60S of system, using external crystal-controlled oscillation, frequency
35MHz, signal procedure are write with assembler language, to reduce communication instruction holding time.Or use other model high speed microcontrollers
Device.
The setting of signal transmitting and receiving position:It is crossed at 0 in the voltage of grid cyclic wave positive half cycle and 0 voltage comparator was set, in electricity
A setting cycle voltage location setting signal voltage comparator between voltage 21V -40V of net week wave positive half cycle.In this way,
The output of signal voltage comparator realizes overturning in two positions of all wave voltages of setting of a cycle positive half cycle.Cycle just
The position of the setting week wave voltage of half cycle ascent stage is as the first signal location, all wave voltages of setting signal transmitting-receiving point
Position is known as the first signal set point, cycle positive half cycle descending branch the setting week wave voltage position as second signal
The cycle voltage location of position, setting signal transmitting-receiving point is known as second signal set point.Microcontroller STC15F2K60S can be with
It is that rising edge triggers or failing edge triggers that external interrupt, which is arranged, has served as 0 voltage comparator and signal voltage comparator in power grid week
The ascent stage of wave positive half cycle or descending branch, which generate after overturning triggering is interrupted, changes down trigger mode, or and by different interruptions
Source generates interruption.
The condition that signal transmitting and receiving has:0 voltage comparator of mistake and signal voltage comparator are all made of ns grades of height
Fast voltage comparator.The time mistake that overturning and triggering are interrupted can reduce using High Speed Microcontroller and high speed voltage comparator
Difference, and have the resolution ratio of sufficiently high detection overturning triggering break period, cooperate the position of signal to wipe the skill with synchrotimer
Art means improve the recall rate that grid cyclic wave carries information.It needs to transmit by ns grades of high-speed power control switch basis signal
Distance it is tests determined by transmitted positive 35V to a setting rectangular wave broad pulse voltage-drop loading between 60V in power grid
Signal sending point on cycle, the rectangular wave broad pulse voltage are higher than the voltage for the grid cyclic wave position being loaded.Basis signal
The width of the tests determined rectangular wave broad pulse voltage of the distance that need to be transmitted is 0.3ms~0.5ms, can provide signal code 1A-
20A.It is displaced all wave voltages in the time of the signal location, so that the high speed voltage comparator of receiving end be made to connect in signal
Sink is not overturn, is taken " 1 " to send as the position (BIT) in signal, is otherwise taken " 0 " to send for the position (BIT) in signal.Therefore only
When the position value in signal overturn signal voltage comparator should in signal receiving point, due to interference be not flipped just have by
Interference effect.
Signal receiving end setting:Signal receiving end is by twin voltage comparator, High-speed Control switch and signal voltage comparator
It constitutes, grid cyclic wave connects after electric resistance partial pressure with twin voltage comparator input terminal, and the setting of twin voltage comparator is rationed the power supply by wealthy family
The low-voltage window region that the threshold range of pressure and low threshold voltage is constituted.Under microcontroller control, when all wave voltages of input
When falling in the low-voltage window region of twin voltage comparator setting, make High-speed Control switch in an ON state, signal voltage compares
Device directly receives position in the signal of all wave voltages and receives signal and measurement cycle time parameter, whether determines received signal
In the signal receiving point error range of setting, make High-speed Control switch in an off state other than low-voltage window region.Cause
This, grid cyclic wave voltage is only directly conditioned in two low-voltage window regions of cycle positive half cycle through High-speed Control switch control
Filtering is followed by signal voltage comparator input terminal, is filtered out High-frequency Interference and is passed through fundamental frequency signal re-demodulation signal of communication, every
From grid cyclic wave high voltage, the error as caused by bleeder circuit is reduced.Low-voltage window region is arranged in twin voltage comparator
When, it need to guarantee that the first signal location and second signal position are fallen in always in the low-voltage window region.
The erasing and repeating transmission of position value in signal:During transmitting terminal sends signal, when high-speed power control switch is opened
Afterwards, signal transmitted by transmitting terminal simultaneously receiving end signal voltage comparator receive, if received position value information with
The position value information of transmission is different, then then sends the erasing signal of this.Each data bit is erasable in each frame signal
It retransmits, erasing signal, if erasing is unsuccessful, that is, the erasing signal value information sent and received not phase is received and dispatched using control bit
Together, continue to send this erasing signal until sending successfully, then retransmit the position signal being wiped free of, other position signals that do not wipe are still
So effectively, to improve signal recall rate.Only when be wiped free of position quantity be more than setting value when, just wipe and retransmission of information
Frame.
Information frame generates:System is the communication of two machines or principal and subordinate's multi-computer communication, is allocated in advance when for principal and subordinate's multi-computer communication
Synchronization time is used in the communication of each machine, and setting section synchronization time can communicate one or many, communicates multiple information frames every time, synchronization
Period timing terminates, and synchrotimer resets and restarts timing.
Institute's rheme is binary digit.Each information frame is made of start bit, data bit, stop bits.Start bit and end
The every bit occupancy a cycle in position, data bit totally 8, two periods of every bit occupancy.Position value is with signal voltage comparator in signal
Receiving point does not overturn to send position signal " 1 ", overturns to send position signal " 0 ".Microcontroller records effectively during transmitting-receiving
Data bits and the occupied digit of erase process show that data bit passes when wherein valid data digit reaches 8 digit of setting
Send end.When first signal set point of each data bit sends position signal " 1 " or " 0 ", position signal " 1 " that second round sends or
" 0 " is with the period 1 on the contrary, its two kinds are combined " 1 ", " 0 " and " 0 ", " 1 " as position signal two different values.Second round
Second signal set point is confirmation or the data that the first signal set point of erasing is sent, and sending " 0 " is confirmation, and sending " 1 " is to wipe
It removes.It is to start to send that signal voltage comparator, which sends " 1 " in the first signal set point, in start bit, and stop bits is set in the first signal
Fixed point is terminated with sending " 0 ", and the second signal set point of start bit and stop bits does not have to.
The compensation of signal transmitting and receiving location error:China's sinusoidal ac mains frequency be 50Hz, voltage effective value 220V,
Its instantaneous voltage u is calculated by following formula:
U=Umsin100πt;………………………………….1
In formula:UmFor China's network voltage peak value
As shown in Figure 1, system is crossed at 0 using the voltage of cycle positive half cycle ascent stage as start time to the first signal set point
Time interval be nominal value Tm1;The voltage of cycle positive half cycle ascent stage is crossed at 0 as start time to second signal set point
Time interval is nominal value Tm2.The Tm1And Tm2It is calculated by 1 formula, u is to set all wave voltages in formula.
Simultaneously measured 0 voltage comparator the cycle positive half cycle ascent stage mistake 0 overturn when time arrived for start time
The real-time measurement values T of time interval of the signal voltage comparator when the first signal location is overturnc1;This spent for 0 flip-flop transition when being
Between starting point to signal voltage comparator second signal position overturn when time interval real-time measurement values Tc2;Signal voltage ratio
It was arrived when second signal position is overturn between time of 0 voltage comparator when the mistake 0 of cycle positive half cycle descending branch is overturn compared with device
Every real-time measurement values Tc3;Cross 0 voltage comparator the cycle positive half cycle ascent stage of two adjacent cycles mistake 0 overturn when
Between between be divided into cycle period real-time measurement values Tzu.
Since power grid crosses the left and right shake that 0 error showed as at 0 point, but sending and receiving end synchronized 0 and to cross 0 overturning as base
Locating tab assembly cycle time parameter, crossing 0 shake influences very little to measurement cycle time parameter, therefore ignores 0 voltage comparator and cross 0
Overturning and timing error.When the cycle and its two adjacent cycles that detect are cycle period reality that is true, being detected simultaneously by
When measured value Tzu in 20ms and its error range, measure the cycle to cross 0 voltage comparator in the cycle positive half cycle ascent stage
The a reference value T of time interval when crossing 0 overturning for start time to signal voltage comparator when the first signal location is overturnc01
The a reference value that 0 overturning is time interval of the start time to signal voltage comparator when second signal position is overturn is crossed with this
Tc02, save the continuous T of a setting number in 30 to 50c01And Tc02And calculate saved Tc01Average value Tp1With protected
The T depositedc02Average value Tp2, by Tp1And Tp2It is stored in corresponding storage unit.
The then error compensation value T of signal voltage comparator flip-flop transitionbIt is determined by following formula:
Tb={ (Tm2-Tm1)-(Tp2-Tp1)}÷2;………………2
By TbIt saves.TbIllustrate that the position of actual signal transmitting-receiving point is higher for timing.
Measurement described above, wherein Tc1Or Tc01It is to cross 0 voltage comparator and signal voltage comparator in cycle just half
Week crossed on the basis of the flip-flop transition of 0 position and signal location, but actual measurement is after overturning triggering interruption with voltage comparator
On the basis of the timing time of timer, in this way, having served as triggering after mistake 0 of 0 voltage comparator in the cycle positive half cycle ascent stage is overturn
The process for interrupting and starting timer, there are time for each instructions, it need to be added in the timing time of the measurement;Meanwhile institute
The timing time for stating measurement, which need to subtract the triggering after the overturning of the first signal location, to interrupt and reads the instruction of process of timer and hold
The row time.The execution time for also needing an instruction being carrying out comprising microcontroller after overturning is interrupted in triggering after wherein overturning,
It can postpone interruption, and microcontroller STC15F2K60S is the single-chip microcontroller of 1T, this is easy to obtain the instruction time.Second
Signal location measures Tc2Or Tc02Similarly, T is measuredc3When be also similar to above.
The judgement of the cycle true and false:By Tc1With Tp1;Tc2With Tp2;Tzu makes comparisons respectively with 20ms, if fair at it respectively
Perhaps in cycle error range, then the cycle signal detected is very, otherwise to there is more overproof, the cycle detected
Signal is false.Not in communication period and in the T of communication periodc1With Tp1;Tc2With Tp2Difference is respectively set when making comparisons respectively
Cycle error range, since the first signal location of communication period and second signal position are shifted, and biggish cycle is taken to miss
Poor range.
Clock timer and synchrotimer is arranged in system, and wherein synchrotimer saves each cycle period and counted with 20ms
The cycle period aggregate-value of calculation is as synchronization time.When above-mentioned judgement cycle signal is true, saves Tzu and take 20ms and synchronometer
When device timing time be added, the value that will add up restores in synchrotimer, if the cycle signal detected be it is false, will be all
Wave signal is timing time during the vacation compared with 20ms is multiplied by the product for cycle during the vacation, if in error range,
20ms is taken to be added multiplied by the product for cycle during the vacation with synchrotimer timing time, when detecting that cycle signal is again
The time synchronisation time is accurately corrected when true, and otherwise using cycle signal is timing time and synchrotimer timing during the vacation
Time is added.It is ± 0.1Hz when generally running, when the relative error since power system frequency deviation allowable value is 0.2Hz
When more than 6ms, illustrate that power grid has occurred compared with major break down.
The synchronization of signal transmitting and receiving:Communication is realized under control synchronization time.Communication transmits multiple information frames each time, often
At the beginning of secondary communication use synchronization time, be it is preset or by Centralized Controller instruct arrange, according to power grid quality and letter
Number structure needs the data bit occupancy in each frame information 1 to multiple setting byte numbers, and power grid quality takes well biggish set
Determine byte number.The clock timer time there are two cycle period is stayed after each frame traffic, for updating Tc1、Tc2And Tc3。
The communication of next frame since next cycle retransmits the information frame if detecting that cycle signal is vacation in a frame traffic.
Realize that the cycle in communication sequentially synchronizes by the start bit of each frame information, stop bits in the sending and receiving end of the communication information
It connects.Centralized Controller or intelligent display station board measure respectively and store T in the call duration time gap of described two framesc1、Tc2
And Tc3, and calculate separately two real-time measurement values Tc1Average value Tk1、Tc2Average value Tk2And Tc3Average value Tk3, and respectively
It is stored in two groups of storage units, i.e. Tc1、Tc2And Tc3Storage unit and Tk1、Tk2And Tk3Storage unit is taken out when from storage unit
Tk1、Tk2And Tk3After reset two groups of storage units.The storage unit can store 16 real-time measurement values Tc1、Tc2And Tc3.Do not exist
Communication period measures continuous 16 real-time measurement values T respectivelyc1、Tc2And Tc3If it is false for screening to cycle signal, reset
The Tc1、Tc2And Tc3Respective storage unit, continue measurement and storage when screening to cycle signal is true, often deposited when being filled with
Enter a Tc1、Tc2And Tc3, first remove a T being stored at firstc1、Tc2And Tc3, while being taken out by a setting in 2 to 15
Number takes out the T of last one group of depositc1、Tc2And Tc3, when power grid quality difference, number is taken out in the smaller setting of choosing, and calculating is taken out every
One group of Tc1Average value Tk1、Tc2Average value Tk2And Tc3Average value Tk3And replace the T originally savedk1、Tk2And Tk3, adopt
With average value Tk1、Tk2And Tk3Reduce the influence of network voltage and frequency fluctuation.
Send the determination of signal time:Communication is implemented in the single-phase phase line in a transformer platform area of power grid,
And it makes an appointment by the synchrotimer time and starts call duration time.Holding with address information is first broadcasted by Centralized Controller when communication
Hand signal, when Centralized Controller requires some intelligent display station board to Centralized Controller feedback information, the intelligent display station board
Just information is sent to Centralized Controller.Centralized Controller or intelligent display station board are in the communication synchronization time transmitting-receiving letter made an appointment
Before breath, it is necessary to screen out continuous no less than 16 grid cyclic waves, i.e., have no less than 16 in real-time measurement storage unit
A Tc1、Tc2And Tc3If continuous 16 T are not detectedc1、Tc2And Tc3It is then sequentially delayed until detecting that 16 are
Only.Transmitting terminal takes out T from storage unitk1、Tk2And Tk3Value add T respectivelyb, it is real to obtain the first signal with error compensation
Border transmitting-receiving point Td1With the practical sending point T of second signald2:
Td1=Tk1-Tb;……………………………………………3
Td2=Tk2+Tb;……………………………………………4
The practical receiving point T of second signal with error compensationd3:
Td3=Tk3-Tb;………………………………………………5
Save Td1、Td2And Td3In respective storage unit.Send T after each frame informationk1、Tk2And Tk3All it is updated.
When sending signal, microcontroller uses T respectivelyd1And Td2As switching signal timer timing midpoint and according to
Used rectangular wave broad pulse voltage levels take certain offset, then using the spaced time of rectangular wave broad pulse as switch
The timing length of signal timing device is easy to calculate high-speed power control switch turn-on time point, that is, is used for Td1Point sends rectangle
The setting sending time T of wave broad pulsef1And Td2The setting sending time T of the rectangular wave broad pulse of pointf2:
Tf1=Td1-(Tm/2)-Tan;……………………………6
Tf2=Td2-(Tm/2)-Tan;……………………………7
T in formulamFor signal rectangular wave broad pulse width, TanFor the offset.
In the cycle positive half cycle ascent stage, since rectangular wave broad pulse loads on the initial stage of cycle positive half cycle, the wide arteries and veins of rectangular wave
Rush that the voltage more therefore transmitted rectangular wave broad pulses high relative to all wave voltages are more powerful, the signal of generation receives
Point displacement is more, sets turnover voltage in the other time segment signal voltage comparator of loading procedure, has been moved off signal reception
The voltage location of point;Cycle positive half cycle descending branch is then the signal generated in the latter stage for loading on cycle process in rectangular wave broad pulse
Receiving point displacement is more, in this way, the switching signal according to the tests determined transmitting terminal of rectangular wave broad pulse voltage actually used
The midpoint of timer time and Td1Or Td2Between offset Tan, receive signal more reliable.
Signal transmission process:Transmitting terminal is crossed the overturning of 0 voltage comparator in cycle positive half cycle ascent stage cycle and was generated in 0
It is disconnected, through the T that is delayedi1Or Ti2Afterwards, firing switch signal timing device and high-speed power control switch is connected, single rectangular wave is wide
Pulse voltage is superimposed on grid cyclic wave, makes fundamental frequency in Td1Or Td2Voltage generate small displacement on a timeline, and
Certain harmonic wave can be injected to system.
If crossing interrupt handling routine after 0 interruption, starting measurement Tc1Timer with connect switching signal timer instruction
The execution time is Tin
When to Td1When sending signal:
Ti=Tf1-Tin;………………………………………8
When to Td2When sending signal:
Ti2=Tf2-Tin.………………………………………9
TiAnd Ti2Signaling point displacement of the value also according to receiving end how many adjust in real time.
Closing high-speed power control switch in the interrupt service program when interrupting is overflowed in switching signal timer timing, thus
Complete a signal modulation process.
In view of the decaying of signals transmission, and demodulation is using cycle voltage over zero as time reference, in this way
In Long Distant Transmit, the cycle voltage phase difference of sending and receiving end will cause setting and receives signal time position and actual signal signal
Occur deviation between time location and shadow communication performance, therefore when not taking the method for eliminating deviation, communication distance is limited
System is in same transformer platform area.
The demodulation of signal:Signal voltage comparator of the receiving end when receiving signal is in the first signal location real-time measurement
Tc1Subtract TbRear value and the T being finally stored in is taken out from memoryc1Previous Tc1Subtract TbValue afterwards make comparisons whether
Within the scope of the signal errors of permission, determine that the first signal location receives position value in signal;Signal voltage comparator is second
The T of signal location real-time measurementc3Subtract TbRear value and the T being finally stored in is taken out from memoryc3Previous Tc3Subtract Tb
Whether value afterwards makes comparisons within the scope of the signal errors of permission, determines that second signal position receives position value in signal.
The control of signal transmitting power:When transmitting terminal switching signal timer fires and connect high-speed power control switch
Afterwards, the external interrupt mouth of microcontroller opening signal receiving end immediately detects signal voltage comparator in cycle positive half cycle first
The flip-flop transition of signal location and second signal position, with Td1And Td3It compares and whether shifts and its shift amount, if signal is electric
Press comparator flip-flop transition closer to Td1, illustrate to send rectangular wave broad pulse energy is relatively smaller or electric network impedance relatively
It is low.If signal voltage comparator flip-flop transition is closer to Td1, then increase TiTime, if rectangular wave broad pulse voltage comparator
Flip-flop transition is closer to Td2Then reduce Ti2Time.
(4) Detailed description of the invention:
Fig. 1 is grid cyclic wave receiving and transmitting signal position data relation schematic diagram;
Fig. 2 is a kind of circuit structure block diagram of bus arrival intelligent display system.
(5) specific embodiment:
A kind of circuit structure block diagram of bus arrival intelligent display system is as shown in Figure 2.By Centralized Controller and more
A intelligent display station board is constituted.Centralized Controller is by signal sending end A, signal receiving end B, 4G wireless router 2, keyboard & display
Module 10 and micro controller module 1 are constituted.Intelligent display station board is by signal sending end A, signal receiving end B and micro controller module
1 is constituted.Intelligent display station board and Vehicle Controller 11 are through infrared communication.Centralized Controller and intelligent display station board use the electricity
Line of force communication.Master station is the computer management system positioned at top layer by 4G wireless router, micro controller module and computer structure
At.
Signal sending end A, the signal receiving end B of power line communication described in Centralized Controller and intelligent display station board and micro-
Controller module 1 is identical with the hardware configuration of power module 4.
The signal sending end A of the power line communication is made of high-speed power control switch 5, switching signal timer 3, electricity
Net voltage is connected to high-speed power control switch output end.
The signal receiving end B of the power line communication is compared by twin voltage comparator 7, High-speed Control switch 6,0 voltage excessively
Device 8 and signal voltage comparator 9 are constituted.Grid cyclic wave connects after electric resistance partial pressure with 7 input terminal of twin voltage comparator, crosses 0 electricity
Pressure comparator 8 and signal voltage comparator 9 are all made of ns grades of high speed voltage comparator MAX319.
Micro controller module 1 uses High Speed Microcontroller STC15F2K60S, this is a kind of single clock/machine cycle (1T)
Single-chip microcontroller, speed ratio STC12 also fast 20% is high speed/low-power consumption/superpower jamproof 8051 single-chip microcontroller of new generation, no AD
Conversion.
The single-phase firewire and zero curve of power grid connect the output port of signal sending end and the input port of receiving end, wherein power grid
Zero line grounding end.The window region network voltage control is in 55V voltage range, machine shell protective grounding, and has high electricity
The security warning of pressure area, it is 1 that trouble hunting, which should install no-load voltage ratio additional,:1 isolating transformer is avoided because of failure accidental shock.
2 model F3836 of 4G wireless router, can also select other model routers.F3836 is industrial built in one kind
Grade 32 bit processors and technical grade wireless module provide 1 RS232 (or RS485/ using embedded real-time operating system
RS422) 4 ethernet lans, 1 Ethernet WAN and 1 WIFI interface, can connect WIFI equipment, ethernet device simultaneously
Data transparent transmission and routing function are realized with serial equipment.
Claims (10)
1. a kind of implementation method of bus arrival intelligent display system, intelligent display station board acquisition data pass through power line communication
It is uploaded to Centralized Controller, Centralized Controller accesses mobile radio communication network by wireless router, realize Wireless Networking,
It is characterized in that:
The power line communication of use is by the accurate of the signal sending point of the setting to grid cyclic wave voltage and signal receiving point
Positioning sends a rectangle broad pulse of communication positive or negative pole in the signal sending point of setting to generating mutation current,
The electric current causes a voltage drop to be superimposed on grid voltage waveform on the short-circuit impedance of distribution transformer, to complete primary
Signal modulation process, signal receiving point demodulated signal of the receiving end in the setting of grid cyclic wave voltage;One wide arteries and veins of anode
Punching refers to that the high level part of pulse returns 0 from 0 to height.
2. the method according to claim 1, wherein the signal sending point of the setting in grid cyclic wave voltage
Modulating and demodulating signal step with the signal receiving point of setting includes:
It sends:The overturning of 0 voltage comparator is crossed when the cycle that the cycle positive half cycle ascent stage is arranged in and generated 0 interruption, after being delayed
Its sending time falls in the signal sending point of the setting of all wave voltages, and firing switch signal timing device simultaneously connects high-speed power control
Switch, by single positive pulse voltage Signal averaging on grid cyclic wave;
It receives:The low-voltage window being made of the threshold range of high threshold voltage and low threshold voltage being arranged by twin voltage comparator
Mouth region, when all wave voltages of input fall in the low-voltage window region of twin voltage comparator setting, makes under microcontroller control
High-speed Control switch in an ON state, signal voltage comparator directly all wave voltages signal receive position receive signal and
Cycle time parameter is measured, received signal is determined whether in the signal receiving point error range of setting, in low-voltage window
Make High-speed Control switch in an off state other than mouth region.
3. according to the method described in claim 2, it is characterized in that, the signal sending point and signal receiving point of setting are in power grid
The voltage of cycle positive half cycle, which is crossed at 0, was arranged 0 voltage comparator, in a setting cycle voltage location of grid cyclic wave positive half cycle
Setting signal voltage comparator, the output of signal voltage comparator is in two positions for setting all wave voltages of a cycle positive half cycle
Set realization overturning;The cycle positive half cycle ascent stage the setting week wave voltage position as the first signal location, setting
The cycle voltage location of signal transmitting and receiving point is known as the first signal set point, in the setting cycle electricity of cycle positive half cycle descending branch
The position of pressure is known as second signal set point as second signal position, the cycle voltage location of setting signal transmitting-receiving point;
The signal voltage comparator is a setting cycle being arranged between voltage 21V -40V of grid cyclic wave positive half cycle
Voltage location.
4. the method according to claim 1, wherein the distance that basis signal need to transmit when sending signal is through testing
It determines:
Rectangular wave broad pulse voltage-drop loading is set in the positive 35V of the signal sending point on grid cyclic wave to the voltage value between 60V;
The rectangular wave broad pulse voltage is higher by value than the voltage for the grid cyclic wave position being loaded;The width value of rectangular wave broad pulse voltage
For 0.3ms~0.5ms;Signal code value 1A -20A can be provided.
5. the method according to claim 1, wherein the signal receiving point demodulated signal in setting, includes
The signal that confirmation or erasing are sent from the signal sending point of setting, during transmitting terminal sends signal, letter transmitted by transmitting terminal
Number simultaneously receiving end receive, if received position value information is different from the position value information of transmission, then send the position
Erasing signal, each data bit is erasable in each frame information and retransmits.
6. according to the method described in claim 5, it is characterized in that, position value with signal voltage comparator signal receiving point not
Overturning overturns to send position signal " 1 " to send position signal " 0 ", the first signal set point of each data bit sends position signal " 1 "
Or when " 0 ", second round send position signal " 1 " or " 0 " with the period 1 on the contrary, its two kinds are combined " 1 ", " 0 " and " 0 ", " 1 "
As position signal two different values, the second signal set point of second round is to confirm or wipe the first signal set point to send
Data, sending " 0 " is confirmation, and sending " 1 " is erasing, and signal voltage comparator is sent in the first signal set point in start bit
" 1 " is to start to send, and stop bits is terminated in the first signal set point with sending " 0 ", and the second signal of start bit and stop bits is set
Fixed point does not have to.
7. the method according to claim 1, wherein the signal sending point of setting and the accurate of signal receiving point are determined
Position includes the error compensation of set signal sending point and signal receiving point, while crossing 0 voltage comparator and signal voltage ratio
Ns grades of high speed voltage comparators and High Speed Microcontroller are all made of compared with device.
8. according to claim 1 and method of claim 7, which is characterized in that signal sending point and signal receiving point
It is accurately positioned and its compensation method of error, to be first computing system crossed at 0 using the voltage of cycle positive half cycle ascent stage as the time
O'clock to the first signal set point time interval be nominal value Tm1;The voltage of cycle positive half cycle ascent stage is crossed at 0 as start time
Time interval to second signal set point is nominal value Tm2;
And time of 0 voltage comparator when the mistake 0 of cycle positive half cycle ascent stage overturns was measured as start time to signal electricity
Press the real-time measurement values T of time interval of the comparator when the first signal location is overturnc1;This spent for 0 flip-flop transition as start time
To the real-time measurement values T of time interval of the signal voltage comparator when second signal position is overturnc2;Signal voltage comparator exists
The reality of time interval of 0 voltage comparator when the mistake 0 of cycle positive half cycle descending branch is overturn was arrived in second signal position when overturning
When measured value Tc3;Cross time interval of 0 voltage comparator when the mistake 0 of the cycle positive half cycle ascent stage of two adjacent cycles is overturn
For cycle period real-time measurement values Tzu;
When the cycle and its two adjacent cycles that detect are true, the cycle period real-time measurement values Tzu being detected simultaneously by
In 20ms and its error range, the cycle is measured to cross 0 voltage comparator when the mistake 0 of cycle positive half cycle ascent stage is overturn and be
The a reference value T of time interval of the start time to signal voltage comparator when the first signal location is overturnc010 overturning is crossed with this
For a reference value T of time interval of the start time to signal voltage comparator when second signal position is overturnc02, save 30 to
The continuous T of a setting number in 50c01And Tc02And calculate saved Tc01Average value Tp1With the T savedc02It is flat
Mean value Tp2, by Tp1And Tp2It is stored in corresponding storage unit;
The then error compensation value T of signal voltage comparator flip-flop transitionbIt is determined by following formula:
Tb={ (Tm2-Tm1)-(Tp2-Tp1)}÷2;
By TbIt saves, TbIllustrate that the position of actual signal transmitting-receiving point is higher for timing;
The extremely multiple setting byte number of the data bit occupancy in each frame information 1 is needed according to power grid quality and signal structure,
The clock timer time there are two cycle period is stayed after each frame traffic, for updating Tc1、Tc2And Tc3, from next week
Wave starts the communication of next frame, if detecting that cycle signal is vacation in a frame traffic, retransmits the information frame;
It realizes that the cycle in communication sequentially synchronizes by the start bit of each frame information, stop bits and connects in the sending and receiving end of the communication information
Continuous, Centralized Controller or intelligent display station board measure respectively and store T in the call duration time gap of described two framesc1、Tc2With
Tc3, and calculate separately two real-time measurement values Tc1Average value Tk1、Tc2Average value Tk2And Tc3Average value Tk3, and deposit respectively
Enter two groups of storage units, i.e. Tc1、Tc2And Tc3Storage unit and Tk1、Tk2And Tk3Storage unit, when from storage unit take out Tk1、
Tk2And Tk3After reset two groups of storage units, the storage unit can store 16 real-time measurement values Tc1、Tc2And Tc3, do not communicating
Period measures continuous 16 real-time measurement values T respectivelyc1、Tc2And Tc3If screen to cycle signal be it is false, described in clearing
Tc1、Tc2And Tc3Respective storage unit, continue to measure when screening to cycle signal is true and store, it is every when being filled with to be stored in one
A Tc1、Tc2And Tc3, first remove a T being stored at firstc1、Tc2And Tc3, while number is taken out by a setting in 2 to 15,
Take out the T of last one group of depositc1、Tc2And Tc3, when power grid quality difference, number is taken out in the smaller setting of choosing, and calculating is taken out each
The T of groupc1Average value Tk1、Tc2Average value Tk2And Tc3Average value Tk3And replace the T originally savedk1、Tk2And Tk3;
Send the determination of signal time:Continuous no less than 16 grid cyclic waves must be screened out before receiving and sending messages, i.e., in fact
When measurement storage unit in have no less than 16 Tc1、Tc2And Tc3If continuous 16 T are not detectedc1、Tc2And Tc3
It is then sequentially delayed until detecting 16, transmitting terminal takes out T from storage unitk1、Tk2And Tk3Value add T respectivelyb,
Obtain the practical transmitting-receiving point T of the first signal with error compensationd1With the practical sending point T of second signald2:
Td1=Tk1-Tb;
Td2=Tk2+Tb;
The practical receiving point T of second signal with error compensationd3:
Td3=Tk3-Tb;
Save Td1、Td2And Td3In respective storage unit, T after each frame information is sentk1、Tk2And Tk3All it is updated;
When sending signal, microcontroller uses T respectivelyd1And Td2As switching signal timer timing midpoint and according to being used
Rectangular wave broad pulse voltage levels take certain offset, then using the spaced time of rectangular wave broad pulse as switching signal determine
When device timing length, be easy to calculate high-speed power control switch turn-on time point, that is, be used for Td1Point sends the wide arteries and veins of rectangular wave
The setting sending time T of punchingf1And Td2The setting sending time T of the rectangular wave broad pulse of pointf2:
Tf1=Td1-(Tm/2)-Tan;
Tf2=Td2-(Tm/2)-Tan;
T in formulamFor signal rectangular wave broad pulse width, TanFor the offset;
Rectangular wave broad pulse loads on the initial stage of cycle positive half cycle, and rectangular wave broad pulse voltage is high more relative to all wave voltages
More, the signal receiving point displacement of generation is more, and cycle positive half cycle descending branch is then to load on cycle process in rectangular wave broad pulse
The signal receiving point displacement that generates of latter stage it is more, the midpoint of the switching signal timer time of tests determined transmitting terminal
With Td1Or Td2Between offset Tan;
Signal transmission process:Grid cyclic wave voltage is connected to high-speed power control switch output port, when the cycle positive half cycle ascent stage
Cycle cross 0 voltage comparator overturning generated 0 interruption, through be delayed Ti1Or Ti2Afterwards, firing switch signal timing device and height is connected
Fast power control switch makes fundamental frequency in T by single positive pulse voltage Signal averaging on grid cyclic waved1Or Td2Electricity
Pressure generates small displacement on a timeline;
If crossing interrupt handling routine after 0 interruption, starting measurement Tc1Timer with connect switching signal timer instruction execution
Time is Tin
When to Td1When sending signal:
Ti=Tf1-Tin;
When to Td2When sending signal:
Ti2=Tf2-Tin;
TiAnd Ti2Signaling point displacement of the value also according to receiving end how many adjust in real time;
Closing high-speed power control switch in the interrupt service program when interrupting is overflowed in switching signal timer timing, to complete
Signal modulation process;
Above-mentioned Ti2Value also according to receiving end signaling point displacement it is how many adjust in real time, methods are:If signal voltage compares
Device flip-flop transition is closer to Td1, then microcontroller control high-speed power control switch increases rectangular wave broad pulse voltage, if letter
Number voltage comparator flip-flop transition is closer to Td2Then reduce Ti2Time.
9. a kind of device of bus arrival intelligent display system, it is characterised in that including,
Signal sending end, signal receiving end and the microcontroller of power line communication described in Centralized Controller and intelligent display station board
The hardware configuration of module is identical;
The signal sending end of the power line communication is made of high-speed power control switch, switching signal timer;
The signal receiving end of the power line communication is switched by twin voltage comparator, High-speed Control, crosses 0 voltage comparator and signal
Voltage comparator is constituted.
10. device according to claim 9, it is characterised in that the signal receiving end of the power line communication is by power grid
All wave voltages through High-speed Control switch control, cycle positive half cycle two low-voltage window regions directly after conditioning filtering be followed by
Signal voltage comparator input terminal, High-speed Control switch only open by the low-voltage window region around signal transmitting and receiving point, isolation
Grid cyclic wave high voltage, signal voltage comparator is directly when the signal of all wave voltages receives position and receives signal and measurement cycle
Between parameter;
The signal sending end of the power line communication, network voltage are connected to high-speed power control switch output end, in cycle just half
All ascent stage cycles cross the overturning of 0 voltage comparator and generated 0 interruption, through the T that is delayedi1Or Ti2Afterwards, firing switch signal timing device is simultaneously
High-speed power control switch is connected, by single rectangular wave broad pulse voltage superposition on grid cyclic wave.
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