CN108923784A - A kind of the amplitude-frequency response estimation error and bearing calibration of TIADC acquisition system - Google Patents
A kind of the amplitude-frequency response estimation error and bearing calibration of TIADC acquisition system Download PDFInfo
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- CN108923784A CN108923784A CN201810600353.3A CN201810600353A CN108923784A CN 108923784 A CN108923784 A CN 108923784A CN 201810600353 A CN201810600353 A CN 201810600353A CN 108923784 A CN108923784 A CN 108923784A
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Abstract
The invention discloses a kind of amplitude-frequency response estimation error of TIADC acquisition system and bearing calibrations, the full bandwidth of TIADC acquisition system is divided into multiple subbands, and take subband endpoint as sampling frequency point, it is the standard sine signal of signal frequency to TIADC acquisition system by inputting each sampling frequency point, obtain the amplitude-frequency response error correction value at each frequency point, then amplitude-frequency response error correction is carried out to new input signal s (t) according to amplitude-frequency response error correction value, in this way while improving the signal acquisition effect in whole bandwidth, also improve the precision of correction.
Description
Technical field
The invention belongs to waving map technical fields, and more specifically, the amplitude-frequency for being related to a kind of TIADC acquisition system is rung
Answer estimation error and bearing calibration.
Background technique
In waving map field, digital storage oscilloscope becomes modern testing equipment as a kind of real-time sampling instrument
Main trend.With the promotion of ADC, FPGA and processor performance, the digital storage oscilloscope of high sampling rate, high bandwidth is developed
It is possibly realized.Important composition module of the acquisition system as influence sample rate and bandwidth in digital storage oscilloscope, performance
Quality directly determines oscillograph overall performance index.In order to break through the sampling performance limitation of monolithic ADC, while it is defeated to increase system
Enter the maximum allowable bandwidth of signal, time-interleaved parallel acquisition TIADC technology is as the real-time acquisition for being applicable to arbitrary signal
Technology is widely studied and applied.
TIADC structure is the common parallel acquisition technique for being suitable for arbitrary signal.M sample rate is fsADC not
The same signal x (t) is sampled under the driving of sampling clock.Wherein the i-th road ADCiSampling clock be SCLKi, i=
0,1,2..., M-1, phase relation have：
The sequence split that each road sampled data is pressed to the sampling time, being equivalent to total sampling period becomes single ADC sampling period
1/M.Therefore, sample rate of the sample rate of system than monolithic ADC improves M times, i.e. total sampling rate fsall=Mfs。
Although TIADC structure increases the sample rate of system, but in practical applications can be due to different passage devices, layout
It waits the inconsistent of channel parameters and generates three kinds of biasing, gain and time channel mismatching errors.Wherein gain and time error meeting
With frequency input signal f0Change and change, the amplitude-frequency response error and phase in channel are shown as in the whole bandwidth of acquisition system
Frequency response error；At the same time, biased error does not change with the change of frequency input signal.The presence of channel mismatching error makes
The performance degradation of TIADC system, especially when frequency input signal is higher, the inconsistency of each channel amplitude-frequency response drops significantly
Low TIADC system performance is greatly limited the application of broadband TIADC acquisition system.In order to obtain system performance
It is promoted, it is necessary to which each channel amplitude-frequency response error is corrected or is compensated.
However have very in the TIADC acquisition system of broadband to the estimation and bearing calibration of each channel amplitude-frequency response error at present
Big defect.Firstly, the narrower bandwidth of previous TIADC acquisition system, therefore it is generally acknowledged that the amplitude-frequency response error in each channel is
Only gain error correction parameter is arranged according to a fixed sinusoidal test signal in definite value, and this thinking, which acquires broadband, is
System cannot be effectively applicable in.Secondly, original gain error estimation method (fitting of such as three parametric sinusoidals) needs signal frequency low
In single pass Nyquist domain, and in the acquisition system of broadband when input high-frequency signal, TIADC single channel is lack sampling, at this time
Original error estimation will be unable to be applicable in.Finally, original gain error correction multi-pass crosses simulation means, it is such as logical in difference
Operation independent amplifier is used on road, or adjusts the mode correcting gain error of ADC internal gain control register, for high frequency
Gain error when input beyond adjustable range is then helpless.Therefore, in order to promoting the property of broadband TIADC acquisition system
Can, new thinking and algorithm are proposed to reduce the problem of amplitude-frequency response error therein becomes urgent need to resolve in application.
Summary of the invention
It is an object of the invention to overcome the deficiencies of the prior art and provide a kind of amplitude-frequency response of TIADC acquisition system mistakes
Difference estimation and bearing calibration, are estimated based on the mode of frequency sampling and correct amplitude-frequency response error, to increase TIADC system
Performance.
For achieving the above object, a kind of amplitude-frequency response estimation error of TIADC acquisition system of the present invention and correction side
Method, which is characterized in that include the following steps：
(1), ADC number of TIADC system is set as M；
(2), sequentially inputting frequency is fiStandard sine signal, i=1,2 ..., N, N be sampling frequency points；It obtains each
Amplitude-frequency response error correction value at sampling frequency point；
(2.1), input frequency is set as fiStandard sine signal be x (t), x (t) is input to TIADC system, and to x
(t) it is sampled, obtains the sampled data y of each ADCk[n], k=0,1 ..., M-1；
(2.2), each ADC sampled data y is soughtkThe mean value a of [n]k, then from each ADC sampled data ykMean value a is subtracted in [n]k,
To remove removing DC bias, obtainI.e.
(2.3), rightFFT transform is done, the maximum value of its amplitude spectrum is obtained | Yk(j2πfi)|max, recycle formula (1)
Calculate frequency point fiThe amplitude-frequency response error estimate g at placek(2πfi)；
Wherein, | Y0(j2πfi)|maxIndicate the amplitude spectrum maximum value of the 0th ADC；
(2.4), frequency point f is obtained using formula (2)iThe amplitude-frequency response error correction value g at placekcali(2πfi)；
(3), in TIADC system, amplitude-frequency response error correction is carried out to new input signal s (t)
(3.1), new input signal s (t) is input to TIADC system, after TIADC systematic sampling, obtains adopting for each ADC
Sample data sk[n]；
(3.2), to each ADC sampled data sk[n] samples rule according to TIADC and carries out data split, obtains TIADC system
Sampled data s [n]；
(3.3), FFT transform is carried out to sampled data s [n], obtains the basic frequency F of new input signal0；
(3.4), by basic frequency F0With sampling frequency point fiCompare, selects the sampling frequency point f closest to F0i, and select in step
(2.4) the sampling frequency point f obtained iniThe amplitude-frequency response error correction value g at placekcali(2πfi)
(3.5), each ADC sampled data s is soughtkThe mean value b of [n]k, then from each ADC sampled data skMean value s is subtracted in [n]k
[n] is obtained to remove removing DC biasI.e.
(3.6), the g obtained using step (3.4)kcali(2πfi) each ADC is corrected, wherein k-th ADC's
Correcting result is
(3.7), the correction result of each ADC is added into mean value bk, to restore original sample value
(3.8), by skcali[n] is recombinated according to the sampling order of TIADC system, obtains original sampling data s [n]
Correct result scali[n]。
What goal of the invention of the invention was realized in：
The present invention a kind of the amplitude-frequency response estimation error and bearing calibration of TIADC acquisition system, by TIADC acquisition system
Full bandwidth is divided into multiple subbands, and takes subband endpoint as sampling frequency point, is signal frequency by inputting each sampling frequency point
Standard sine signal obtains the amplitude-frequency response error correction value at each frequency point, is then rung according to amplitude-frequency to TIADC acquisition system
It answers error correction value to carry out amplitude-frequency response error correction to new input signal s (t), is improving the signal in whole bandwidth in this way
While collection effect, the precision of correction is also improved.
Meanwhile a kind of TIADC acquisition system of the present invention amplitude-frequency response estimation error and bearing calibration also have and following have
Beneficial effect：
(1), it is divided by the full bandwidth to TIADC acquisition system, and selects different corrected values, breach traditional amplitude-frequency
Only using the defect for being merely able to correct local bandwidth caused by one group of corrected value in response error correction, whole bandwidth is improved
Interior signal acquisition effect.
(2), signal frequency is obtained by being FFT to input signal, more compared to traditional analog measurement method its precision
It is high；On the other hand it since it does not need simulation frequency measurement circuit, is more convenient for realizing function transplanting between different acquisition system.
Detailed description of the invention
Fig. 1 is the present invention a kind of the amplitude-frequency response estimation error and bearing calibration schematic diagram of TIADC acquisition system；
Fig. 2 is that the frequency band of TIADC system divides schematic diagram figure；
Fig. 3 is sampling frequency point and the selection schematic diagram for correcting frequency point.
Specific embodiment
A specific embodiment of the invention is described with reference to the accompanying drawing, preferably so as to those skilled in the art
Understand the present invention.Requiring particular attention is that in the following description, when known function and the detailed description of design perhaps
When can desalinate main contents of the invention, these descriptions will be ignored herein.
Embodiment
Fig. 1 is the present invention a kind of the amplitude-frequency response estimation error and bearing calibration schematic diagram of TIADC acquisition system.
In the present embodiment, as shown in Figure 1, analog signal is input to 4 tunnel Parallel ADCs by signal condition and driving circuit
The sampling of time-interleaved mode is carried out, every ADC sample rate is 5G, and the frequency range of input signal is direct current to 4GHz.Four tunnels
Sampled data gives FPGA and carries out split, and the data after split are sent to industrial personal computer and is analyzed and is shown.To gain error
Correction carries out in FPGA, and specific implementation is by using multiplier compensating gain error to each road sampled data.
We combine Fig. 1 to the present invention a kind of the amplitude-frequency response estimation error and bearing calibration of TIADC acquisition system below
It is described in detail, specifically includes following steps：
S1, as shown in Fig. 2, setting ADC number of TIADC system as M, the sample rate of single channel ADC is fs, by TIADC system
Input bandwidth B1~B2 of system is divided into N parts, and remove other outer N number of sampling frequency points of starting frequency point is fi, i=1 from small to large,
2,…,N。
In the present embodiment, frequency band is divided into 40 parts, takes sampling a frequency point, i.e. f every 100MHz since 100MHzi
=100i (MHz), i=1,2...40.
S2, frequency is sequentially input as fiStandard sine signal, obtain it is each sampling frequency point at amplitude-frequency response error correction
Value；
S2.1, input frequency is set as fiStandard sine signal be x (t), x (t) is input to TIADC system, and to x
(t) it is sampled, the sampled data y of each ADC is obtained inside FPGAk[n], k=0,1,2,3；
Each ADC sampled data y is sought in S2.2, FPGAkThe mean value a of [n]k, then from each ADC sampled data ykIt is subtracted in [n]
Value ak, to remove removing DC bias, obtainI.e.
It is S2.3, right in FPGAFFT transform is done, the maximum value of its amplitude spectrum is obtained | Yk(j2πfi)|max, recycle
Formula (1) calculates frequency point fiThe amplitude-frequency response error estimate g at placek(2πfi)；
Wherein, | Y0(j2πfi)|maxIndicate the amplitude spectrum maximum value of the 0th ADC；
S2.4, frequency point f is obtained using formula (2)iThe amplitude-frequency response error correction value g at placekcali(2πfi)；
And this corrected value is sent to industrial personal computer and is stored.
S3, in TIADC system, to new input signal s (t) carry out amplitude-frequency response error correction
S3.1, new input signal s (t) are input to TIADC system, after TIADC systematic sampling, obtain inside FPGA
The sampled data s of each ADCk[n]；
S3.2, to each ADC sampled data sk[n] samples rule according to TIADC and carries out data split, obtains TIADC system
Sampled data s [n]；
S3.3, FFT transform is carried out to sampled data s [n], obtains the basic frequency F of new input signal0；
S3.4, by basic frequency F0With sampling frequency point fiCompare, as shown in figure 3, FPGA is selected closest to F0Sampling frequency point
fi, and request frequency point f is issued to industrial personal computeriLocate the order of corrected value, industrial personal computer reads out the amplitude-frequency response obtained in step S2.4
Error correction value gkcali(2πfi) it is sent to FPGA；
Each ADC sampled data s is calculated in S3.5, FPGAkThe mean value b of [n]k, then from each ADC sampled data skIt is subtracted in [n]
Mean value sk[n] is obtained to remove removing DC biasI.e.
S3.6, the g obtained using step S3.4kcali(2πfi) each ADC is corrected, wherein the school of k-th of ADC
Positive result is
S3.7, the correction result of each ADC is added into mean value bk, to restore original sample value
S3.8, by skcali[n] is recombinated according to the sampling order of TIADC system, obtains original sampling data s [n]
Correct result scali[n], so far correction is completed, and FPGA is by scali[n] is sent to industrial personal computer and carries out data analysis and display.
Different gain error correction values is selected by the input signal to different frequency, is reached to entire input tape wide cut
The correction of frequency response error.
Although the illustrative specific embodiment of the present invention is described above, in order to the technology of the art
Personnel understand the present invention, it should be apparent that the present invention is not limited to the range of specific embodiment, to the common skill of the art
For art personnel, if various change the attached claims limit and determine the spirit and scope of the present invention in, these
Variation is it will be apparent that all utilize the innovation and creation of present inventive concept in the column of protection.
Claims (1)
1. the amplitude-frequency response estimation error and bearing calibration of a kind of TIADC acquisition system, which is characterized in that include the following steps：
(1), ADC number of TIADC system is set as M；
(2), sequentially inputting frequency is fiStandard sine signal, i=1,2 ..., N, N be sampling frequency points；Obtain each sampling
Amplitude-frequency response error correction value at frequency point；
(2.1), input frequency is set as fiStandard sine signal be x (t), x (t) is input to TIADC system, and to x (t) into
Row sampling, obtains the sampled data y of each ADCk[n], k=0,1 ..., M-1；
(2.2), each ADC sampled data y is soughtkThe mean value a of [n]k, then from each ADC sampled data ykMean value a is subtracted in [n]k, thus
Removing DC bias is removed, is obtainedI.e.
(2.3), rightFFT transform is done, the maximum value of its amplitude spectrum is obtained | Yk(j2πfi)|max, formula (1) is recycled to calculate
Frequency point fiThe amplitude-frequency response error estimate g at placek(2πfi)；
Wherein, | Y0(j2πfi)|maxIndicate the amplitude spectrum maximum value of the 0th ADC；
(2.4), frequency point f is obtained using formula (2)iThe amplitude-frequency response error corrected value g at placekcali(2πfi)；
(3), in TIADC system, amplitude-frequency response error correction is carried out to new input signal s (t)
(3.1), new input signal s (t) is input to TIADC system, after TIADC systematic sampling, obtains the hits of each ADC
According to sk[n]；
(3.2), to each ADC sampled data sk[n] samples rule according to TIADC and carries out data split, obtains adopting for TIADC system
Sample data s [n]；
(3.3), FFT transform is carried out to sampled data s [n], obtains the basic frequency F of new input signal0；
(3.4), by basic frequency F0With sampling frequency point fiCompare, selects closest to F0Sampling frequency point fi, and select in step (2.4)
The sampling frequency point f of middle acquisitioniThe amplitude-frequency response error correction value g at placekcali(2πfi)
(3.5), each ADC sampled data s is soughtkThe mean value b of [n]k, then from each ADC sampled data skMean value s is subtracted in [n]k[n], from
And removing DC bias is removed, it obtainsI.e.
(3.6), the g obtained using step (3.4)kcali(2πfi) each ADC is corrected, wherein the correction of k-th of ADC
As a result it is
(3.7), the correction result of each ADC is added into mean value bk, to restore original sample value
(3.8), by skcali[n] is recombinated according to the sampling order of TIADC system, obtains the correction of original sampling data s [n]
As a result scali[n]。
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Cited By (8)
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| CN109756227A (en) * | 2019-01-11 | 2019-05-14 | 北京工业大学 | A kind of half blind correction method of the TIADC time error based on test signal |
| CN110557122A (en) * | 2019-09-25 | 2019-12-10 | 电子科技大学 | method for correcting frequency response non-uniformity error of TIADC system |
| CN112769410A (en) * | 2020-12-25 | 2021-05-07 | 西安讯飞超脑信息科技有限公司 | Filter construction method, audio processing method, electronic equipment and storage device |
| CN113114241A (en) * | 2021-03-10 | 2021-07-13 | 电子科技大学 | Correction method for frequency response mismatch error in time-interleaved architecture acquisition system |
| CN113434318A (en) * | 2021-06-23 | 2021-09-24 | 山东浪潮科学研究院有限公司 | FPGA-based sampling data correction method and system |
| CN115840182A (en) * | 2023-02-21 | 2023-03-24 | 成都青翎科技有限公司 | Frequency response curve correction method and device |
| CN118011300A (en) * | 2024-04-08 | 2024-05-10 | 成都玖锦科技有限公司 | Full-pass amplitude frequency rapid calibration method based on overlapping band amplitude frequency data substitution |
| CN118011300B (en) * | 2024-04-08 | 2024-06-28 | 成都玖锦科技有限公司 | Full-pass amplitude frequency rapid calibration method based on overlapping band amplitude frequency data substitution |
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| CN109756227A (en) * | 2019-01-11 | 2019-05-14 | 北京工业大学 | A kind of half blind correction method of the TIADC time error based on test signal |
| CN109756227B (en) * | 2019-01-11 | 2022-12-16 | 北京工业大学 | Test signal-based semi-blind correction method for TIADC time error |
| CN110557122A (en) * | 2019-09-25 | 2019-12-10 | 电子科技大学 | method for correcting frequency response non-uniformity error of TIADC system |
| CN110557122B (en) * | 2019-09-25 | 2022-04-19 | 电子科技大学 | Method for correcting frequency response non-uniformity error of TIADC system |
| CN112769410A (en) * | 2020-12-25 | 2021-05-07 | 西安讯飞超脑信息科技有限公司 | Filter construction method, audio processing method, electronic equipment and storage device |
| CN112769410B (en) * | 2020-12-25 | 2024-06-11 | 西安讯飞超脑信息科技有限公司 | Filter construction method, audio processing method, electronic equipment and storage device |
| CN113114241A (en) * | 2021-03-10 | 2021-07-13 | 电子科技大学 | Correction method for frequency response mismatch error in time-interleaved architecture acquisition system |
| CN113114241B (en) * | 2021-03-10 | 2022-04-19 | 电子科技大学 | Correction method for frequency response mismatch error in time-interleaved architecture acquisition system |
| CN113434318A (en) * | 2021-06-23 | 2021-09-24 | 山东浪潮科学研究院有限公司 | FPGA-based sampling data correction method and system |
| CN115840182A (en) * | 2023-02-21 | 2023-03-24 | 成都青翎科技有限公司 | Frequency response curve correction method and device |
| CN118011300A (en) * | 2024-04-08 | 2024-05-10 | 成都玖锦科技有限公司 | Full-pass amplitude frequency rapid calibration method based on overlapping band amplitude frequency data substitution |
| CN118011300B (en) * | 2024-04-08 | 2024-06-28 | 成都玖锦科技有限公司 | Full-pass amplitude frequency rapid calibration method based on overlapping band amplitude frequency data substitution |
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Inventor after: Yang Kuojun Inventor after: Gu Borui Inventor after: Ye Pi Inventor after: Pan Zhixiang Inventor after: Qiu Duyu Inventor before: Gu Borui Inventor before: Yang Kuojun Inventor before: Ye Pi Inventor before: Pan Zhixiang Inventor before: Qiu Duyu |
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Application publication date: 20181130 |