CN108919881B - Infinite state machine ordered cloud signal generator - Google Patents
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Abstract
The invention discloses an infinite state machine ordered cloud signal generator, which comprises a multi-channel iterative integrator, an output module (4) and a combined multiplier (5), wherein the multi-channel iterative integrator forms a nonlinear closed-loop self-excitation circuit; the multi-channel iterative integrator integrates each input signal respectively and outputs unrepeated dynamic ordered signals which are self-iteration quantity signals; the multi-channel iterative integrator comprises a plurality of iterative integrators; the output module (4) is used for respectively outputting self-iteration quantity signals generated by the integration of each iteration integrator to the combined multiplier (5) and feeding back the self-iteration quantity signals to the input end of the iteration integrator; and the combination multiplier (5) multiplies all the received self-iteration quantity signals by two to form a mutual iteration quantity signal, and then feeds the mutual iteration quantity signal back to the input end of the appointed iteration integrator. The invention has the advantages of never repeated signal, high secrecy degree and non-periodicity.
Description
Technical Field
The invention belongs to the technical field of information and communication engineering, and particularly relates to an infinite state machine ordered cloud signal generator.
Background
In the field of information and communication engineering, a signal form frequently used is a repeatable deterministic signal, and includes a periodic pulse signal, a periodic continuous wave signal, a pulse modulated continuous wave signal, a frequency modulated continuous wave signal, a pseudo random signal, and the like. The advantage of these signal forms is that the mathematical expressions are strict, facilitating signal processing. However, there are also drawbacks, in particular:
1. bandwidth is limited, time ambiguity exists, and time resolution is affected.
2. The autocorrelation function of the signal has side lobes which can introduce clutter interference to generate false signals.
3. The cross-correlation function of the signals is multiple or continuous along with the time relation, coherence clutter interference is easily introduced, and the interference and the signals cannot be separated.
4. The periodicity of the signal easily causes a twist in phase detection, i.e., it is impossible to distinguish whether the phase is 2 pi or 2n pi (n is an integer).
5. The confidentiality degree is reduced due to the repeatability of the signals, the signals are easy to crack, and the hidden information safety hazards exist.
The above drawbacks result in limited system functions and performance in the field of information and communication engineering, and therefore, it is necessary to generate new signal forms to improve the above drawbacks, so as to better improve the system capacity.
Disclosure of Invention
The present invention is directed to overcoming the above-mentioned drawbacks of the infinite state signal, and in order to achieve the above-mentioned objects, the present invention provides an infinite state machine ordered cloud signal generator,
the signal generator comprises a multi-channel iterative integrator forming a nonlinear closed-loop self-excitation circuit, an output module 4 and a combined multiplier 5;
the multi-channel iteration integrator is used for respectively integrating each input signal and then outputting a non-repetitive dynamic ordered signal, wherein the dynamic ordered signal is a self-iteration signal; the multi-channel iterative integrator comprises a plurality of iterative integrators;
the output module 4 is configured to output the self-iteration quantity signals generated by integrating each iteration integrator to the combination multiplier 5 respectively; the self-iteration quantity signal of each iteration integrator is fed back to the input end of the iteration integrator;
and the combination multiplier 5 is used for multiplying all the received self-iteration quantity signals pairwise to form a mutual iteration quantity signal, and then feeding the mutual iteration quantity signal back to the input end of the appointed iteration integrator.
As an improvement of the above apparatus, each of the iterative integrators includes a positive feedback circuit for realizing self-oscillation.
As a modification of the above apparatus, the multi-channel iterative integrator includes a first iterative integrator 1, a second iterative integrator 2, and a third iterative integrator 3;
the first iteration integrator 1 comprises a first adder circuit and a first integrator circuit;
the first adder circuit comprises a first path of first-stage operational amplifier 11, a first resistor, a second resistor and a third resistor;
the first integrator circuit comprises a first path of second-stage operational amplifier 12, a fourth resistor and a first capacitor CXT(ii) a The first iteration integrator 1 outputs a first path of self-iteration quantity signal X;
the second iterative integrator 2 comprises a second adder circuit and a second integrator circuit;
the second adder circuit comprises a second first-stage operational amplifier 21, a fifth resistor, a sixth resistor and a seventh resistor; the first integrator circuit comprises a second operational amplifier 22, an eighth resistor and a second capacitor; the second iteration integrator 2 outputs a second path of self-iteration quantity signal Y;
said third iterative integrator 3 comprises a third adder circuit and a third integrator circuit; the third adder circuit comprises a third first-stage operational amplifier 31, a ninth resistor, a tenth resistor and an eleventh resistor;
the third integrator circuit comprises a third second-stage operational amplifier 32, a twelfth resistor and a third capacitor; the third iterative integrator 3 outputs a third self-iteration signal Z.
As an improvement of the above apparatus, the output module 4 includes a first output feedback unit, a second output feedback unit, and a third output feedback unit, where the first output feedback unit feeds back a first self-iteration quantity signal X to a first resistor of the first iteration integrating circuit 1; the second output feedback unit feeds back the second self-iteration quantity signal Y to a fifth resistor of the second iteration integrator 2; the third path output feedback unit feeds back the third path self-iteration quantity signal Z to the ninth resistor of the third iteration integrator 3.
As a modification of the above apparatus, the combining multiplier 5 includes a first multiplier 51, a second multiplier 52, and a third multiplier 53;
the first multiplier 51 is configured to multiply the first self-iteration quantity signal X and the third self-iteration quantity signal Z to obtain a first mutual-iteration quantity signal XZ, and feed back the first mutual-iteration quantity signal XZ to a sixth resistor of the second iteration integrator 2;
the second multiplier 52 is configured to multiply the first self-iteration quantity signal X and the second self-iteration quantity signal Y to obtain a second mutual-iteration quantity signal XY, and feed back the second mutual-iteration quantity signal XY to the tenth resistor of the third iteration integrator 3;
the third multiplier 53 is configured to multiply the second self-iteration quantity signal Y and the third self-iteration quantity signal Z and feed back the result to obtain a third mutual-iteration quantity signal YZ, and feed back the third mutual-iteration quantity signal YZ to the second resistor of the first iteration integrator 1.
As an improvement of the above apparatus, a feedback coefficient a1 of the first path iteration quantity signal X in the first iteration integrator 1 is:
A1＝RX/R1X(1)
wherein R isXIs the resistance value of the third resistor, R1XIs the resistance value of the first resistor;
the feedback coefficient B1 of the third mutual iteration YZ is:
B1＝RX/R2(2)
wherein R is2XIs the resistance value of the second resistor;
the integration time constant C1 is:
C1＝RXT×CXT(3)
wherein R isXTIs a fourth resistorTResistance value of CXTIs the capacitance value of the first capacitor.
As an improvement of the above device, in the second iterative integrator 2, the feedback coefficient a2 of the second self-iteration quantity signal Y is:
A2＝RY/R1Y(4)
wherein R isYIs the resistance value of the seventh resistor, R1YIs the resistance value of the fifth resistor;
the feedback coefficient B2 of the second mutual iteration amount XY is:
B2＝RY/R2Y(5)
wherein R is2YIs the resistance value of the sixth resistor;
the integration time constant C2 is:
C2＝RYT×CYT(6)
wherein R isYTIs the resistance value of the eighth resistor, CYTIs the capacitance value of the second capacitor.
As an improvement of the above apparatus, in the third iterative integrator 3, the feedback coefficient a3 of the third self-iteration quantity signal Z is:
A3＝RZ/R1Z(7)
wherein R isZIs the resistance value of the eleventh resistor, R1ZIs the resistance of the ninth resistor;
the feedback coefficient B3 of the first mutual iteration amount XY is:
B3＝RZ/R2Z(8)
wherein R is2ZIs the resistance value of the tenth resistor;
the integration time constant C3 is:
C3＝RZT×CZT(9)
wherein R isZTIs the resistance value of the twelfth resistor, CZTIs the capacitance value of the third capacitor.
The invention has the advantages that:
1. the signal bandwidth of the invention is not limited, time fuzziness does not exist, and the time resolution is extremely high;
2. the autocorrelation function of the signal is an impulse function without side lobes;
3. the cross-correlation function of the signal of the invention is zero;
4. the signal of the invention has non-periodicity, and no phase winding exists during phase detection;
5. the invention has the advantages of never repeated signals, high confidentiality, theoretically no cracking and no information safety hidden trouble.
Drawings
FIG. 1 is a schematic block diagram of an infinite state machine ordered cloud signal generator of the present invention;
fig. 2 is an infinite state machine ordered cloud signal generator of the present invention.
Reference symbols of the drawings
1. A first iteration integrator 2, a second iteration integrator 3, and a third iteration integrator
4. Output module 5, combined multiplier
11. A first path of first-stage operational amplifier 12 and a first path of second-stage operational amplifier
21. The second path of first stage operational amplifier 22 and the second path of second stage operational amplifier
31. A third first-stage operational amplifier 32 and a third second-stage operational amplifier
R1XResistance value R of the first resistor2XA resistance value of the second resistor
RXA resistance value R of the third resistorXTA resistance value of the fourth resistor
R1YResistance value R of the fifth resistor2YAnd the resistance value of the sixth resistor
RYResistance value R of the seventh resistorYTAnd resistance value of the eighth resistor
R1ZAnd resistance R of the ninth resistor2ZResistance value of the tenth resistor
RZResistance R of the eleventh resistorZTResistance value of the twelfth resistor
CXTCapacitance value C of the first capacitorYTThe capacitance value of the second capacitor
CZTA capacitance 51 of the third capacitor, a first multiplier
52. Second multiplier 53, third multiplier
Detailed Description
The invention is described in detail below with reference to the figures and specific embodiments.
The invention discloses an infinite state machine ordered cloud signal generator which is used for generating a non-repeating infinite state machine ordered cloud signal without a final state and with a certain time constant.
The Ordered Cloud Signal (Ordered Cloud Signal of Infinitive StateMesophine) of the infinite state machine is called Ordered Cloud Signal (OCISM) for short, is a novel Signal form, and is a known Signal which is generated by the infinite state machine, has an internal rule and is similar to white noise.
An infinite state machine is distinguished from a finite state machine. The finite state machine is composed of a state register and a combinational logic circuit, can perform state transition according to a preset state according to a control signal, and is a control center for coordinating related signal actions and completing specific operations. The State machine is abbreviated as FSM (Finite State machine). The finite state machine is a directed graph, which is composed of a set of nodes and a set of corresponding transfer functions. The state machine "runs" by responding to a series of events. Each event is within the control range of a transfer function belonging to a "current" node, where the range of the function is a subset of the nodes. The function returns to the "next" (and perhaps the same) node. At least one of these nodes must be in the final state. When the final state is reached, the state machine stops. The infinite state machine replaces the state register with an integrator, the memory storage of the state does not store a fixed value like the state register, but the infinite state machine has the dynamic state with a certain time constant, and the infinite state machine is a non-repetitive signal without a final state generated by the automatic operation of a closed system.
The ordered cloud is used to define the signals generated by the infinite state machine. Since the infinite state machine is a non-repetitive signal without a final state generated by the automatic operation of a closed system, its change with time resembles white noise. But in order to be controllable it cannot be a random signal, but a signal generated by a deterministic non-linear system, known and inherently regular, and is therefore called the "integral of ordered values", and the "current" automatically participates in the integration without responding to external events. The infinite state machine does not limit nodes and has no final state, so the operation of the infinite state machine is never stopped and never repeated. "cloud" is a metaphor, and is not exhaustive, to describe the vast variety of signals as "cloud".
As shown in fig. 1, the principle of the finite-state machine ordered cloud signal generator according to the present invention is a nonlinear closed-loop self-excited circuit formed by a multi-channel iterative integrator and a combined multiplier. The block diagram shows a three-channel schematic.
Each iteration integrator has a feedback quantity from self output to input, and a positive feedback circuit is formed to realize self-oscillation; meanwhile, the first feedback quantity comes from the combined multiplier to form disturbance to self-oscillation.
The combined multiplier module realizes pairwise multiplication of all output quantities to form mutual iteration quantities, namely X and Y are multiplied to obtain XY, X and Z are multiplied to obtain XZ, and Y and Z are multiplied to obtain YZ.
For the iterative integrator X, the feedback quantities are X and YZ;
for the iterative integrator Y, the feedback quantities are Y and XZ;
for the iterative integrator Z, the feedback quantities are Z and XY.
It can be seen that the output of each channel is the integral of the sum of the self-iteration quantity and the mutual iteration quantity, and each quantity is the integral function of itself and the other two quantities, so that an integral nesting is formed, which is called iteration.
The self-iteration quantity and the mutual-iteration quantity are entangled to form an integral nesting, so that the iterative integrator is in a nonrepetitive dynamic state forever, an infinite state machine is formed, the certainty of a circuit enables a generated signal to have internal regularity and certainty, and therefore X, Y, Z third-path outputs are all infinite state machine ordered cloud signals which are different from each other.
PREFERRED EMBODIMENTS
As shown in fig. 2, the present invention discloses a preferred embodiment, the infinite state machine ordered cloud signal generator is composed of a first iterative integrator 1, a second iterative integrator 2, a third iterative integrator 3, an output module 4 and a combination multiplier 5.
The first iteration integrator 1 comprises a first adder circuit and a first integrator circuit; the circuit consists of two stages of operational amplifier circuits: the first path of first-stage operational amplifier 11, the first resistor, the second resistor and the third resistor form the first path of adder circuit; the first path of second-stage operational amplifier 12, the fourth resistor and the first capacitor form the first path of integrator circuit; the first iteration integrator 1 outputs a first self-iteration quantity signal X;
the second iterative integrator 2 comprises a second adder circuit and a second integrator circuit; the circuit consists of two stages of operational amplifier circuits: the second path of first-stage operational amplifier 21, the fifth resistor, the sixth resistor and the seventh resistor form the second path of adder circuit, and the second path of second-stage operational amplifier 22, the eighth resistor and the second capacitor form the second path of integrator circuit; the second iteration integrator 2 outputs a second self-iteration signal Y;
the third iterative integrator 3 includes a third adder circuit and a third integrator circuit, and is composed of two stages of operational amplifier circuits: the third first-stage operational amplifier 31, the ninth resistor, the tenth resistor and the eleventh resistor form the third adder circuit, and the third second-stage operational amplifier 32, the twelfth resistor and the third capacitor form the third integrator circuit; the third iterative integrator 3 outputs a third self-iteration signal Z;
the output module 4 simultaneously and respectively transmits the output quantities to the combined multiplier 5 and feeds back the output quantities to the iterative integrator, and the output module 4 comprises a first output feedback unit, a second output feedback unit and a third output feedback unit;
the first output feedback unit feeds back the first self-iteration quantity signal X to a first resistor of the first iteration integrator 1;
the second output feedback unit feeds back the second self-iteration quantity signal Y to a fifth resistor of the second iteration integrator 2;
the third path output feedback unit feeds back the third path self-iteration quantity signal Z to the ninth resistor of the third iteration integrator 3.
The combination multiplier 5 includes a first multiplier 51, a second multiplier 52 and a third multiplier 53;
the first multiplier 51 is configured to multiply the first self-iteration quantity signal X and the third self-iteration quantity signal Z to obtain a first mutual-iteration quantity signal XZ, and feed back the first mutual-iteration quantity signal XZ to a sixth resistor of the second iteration integrator 2;
the second multiplier 52 is configured to multiply the first self-iteration quantity signal X and the second self-iteration quantity signal Y to obtain a second mutual-iteration quantity signal XY, and feed back the second mutual-iteration quantity signal XY to the tenth resistor of the third iteration integrator 3;
the third multiplier 53 is configured to multiply the second self-iteration quantity signal Y and the third self-iteration quantity signal Z and feed back the result to obtain a third mutual-iteration quantity signal YZ, and feed back the third mutual-iteration quantity signal YZ to the second resistor of the first iteration integrator 1.
In the first iterative integrator 1, the ratio R of the resistance values of the third resistor and the first resistor is usedX/R1XDetermining a feedback coefficient A1 of the first path from the iteration quantity X and a ratio R of the resistance values of the third resistor and the second resistorX/R2XDetermining a feedback coefficient B1 of a third mutual iteration quantity YZ; the resistance of the fourth resistor and the first capacitor CXTR is the product of the capacitance values ofXT×CXTDetermining an integration time constant C1 for the first iterative integrator 1; namely:
the feedback coefficient a1 of the first path self-iteration quantity signal X in the first iteration integrator 1 is:
A1＝RX/R1X(1)
wherein R isXIs the resistance value of the third resistor, R1XIs the resistance value of the first resistor;
the feedback coefficient B1 of the third mutual iteration YZ is:
B1＝RX/R2x(2)
wherein R is2XIs the resistance value of the second resistor;
the integration time constant C1 is:
C1＝RXT×CXT(3)
wherein R isXTIs the resistance value of the fourth resistor, CXTIs the capacitance value of the first capacitor.
In the second iterative integrator 2, the resistance value of the seventh resistor and the resistance value of the fifth resistor are compared with each other by the ratio RY/R1YThe ratio of the first path of self-iteration quantity Y to the second path of self-iteration quantity Y determines a feedback coefficient A2 of the second path of self-iteration quantity Y and a ratio R of resistance values of a seventh resistor and a sixth resistorY/R2YDetermining a feedback coefficient B2 of the first mutual iteration quantity XZ; product R of resistance value of eighth resistor and capacitance value of second capacitorYT×CYTDetermining an integration time constant C2 of the second iterative integrator 2; namely:
in the second iterative integrator 2, the feedback coefficient a2 of the second path of self-iteration quantity signal Y is:
A2＝RY/R1Y(4)
wherein R isYIs the resistance value of the seventh resistor, R1YIs the resistance value of the fifth resistor;
the feedback coefficient B2 of the second mutual iteration amount XY is:
B2＝RY/R2Y(5)
wherein R is2YIs the resistance value of the sixth resistor;
the integration time constant C2 is:
C2＝RYT×CYT(6)
wherein R isYTIs the resistance value of the eighth resistor, CYTIs the capacitance value of the second capacitor;
in the third iterative integrator 3, the ratio R of the resistance values of the eleventh resistor and the ninth resistor is usedZ/R1ZDetermining a feedback coefficient A3 of the third self-iteration signal Z; ratio R of resistance values of the eleventh resistor and the tenth resistorZ/R2ZDetermining a feedback coefficient B3 of a third mutual iteration quantity XY; product R of resistance of twelfth resistor and capacitance of third capacitorZT×CZTDetermines the integration time constant C3 of the third iterative integrator 3; namely:
in the third iterative integrator 3, the feedback coefficient a3 of the third self-iteration quantity signal Z is:
A3＝RZ/R1Z(7)
wherein R isZIs the resistance value of the eleventh resistor, R1ZIs the resistance of the ninth resistor;
the feedback coefficient B3 of the first mutual iteration amount XY is:
B3＝RZ/R2Z(8)
wherein R is2ZIs the resistance value of the tenth resistor;
the integration time constant C3 is:
C3＝RZT×CZT(9)
wherein R isZTIs the resistance value of the twelfth resistor, CZTIs the capacitance value of the third capacitor.
The circuit can be used for generating an infinite state machine ordered cloud signal.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and are not limited. Although the present invention has been described in detail with reference to the embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (7)
1. An infinite state machine ordered cloud signal generator, characterized in that the signal generator comprises a multi-channel iterative integrator constituting a non-linear closed loop self-excited circuit, an output module (4) and a combinatorial multiplier (5);
the multi-channel iteration integrator is used for respectively integrating each input signal and then outputting a non-repetitive dynamic ordered signal, wherein the dynamic ordered signal is a self-iteration signal; the multi-channel iterative integrator comprises a plurality of iterative integrators;
the output module (4) is used for respectively outputting self-iteration quantity signals generated by integrating each iteration integrator to the combination multiplier (5); the self-iteration quantity signal of each iteration integrator is fed back to the input end of the iteration integrator;
the combined multiplier (5) is used for multiplying all the received self-iteration quantity signals pairwise to form a mutual iteration quantity signal, and then feeding the mutual iteration quantity signal back to the input end of the appointed iteration integrator;
the multi-channel iterative integrator comprises a first iterative integrator (1), a second iterative integrator (2) and a third iterative integrator (3);
the first iterative integrator (1) comprises a first adder circuit and a first integrator circuit;
the first adder circuit comprises a first path of first-stage operational amplifier (11), a first resistor, a second resistor and a third resistor;
the first path of integrator circuit comprises a first path of second-stage operational amplifier (12), a fourth resistor and a first capacitor; the first iteration integrator (1) outputs a first path of self-iteration quantity signal (X);
the second iterative integrator (2) comprises a second adder circuit and a second integrator circuit;
the second adder circuit comprises a second first-stage operational amplifier (21), a fifth resistor, a sixth resistor and a seventh resistor; the first path of integrator circuit comprises a second path of second-stage operational amplifier (22), an eighth resistor and a second capacitor; the second iteration integrator (2) outputs a second path of self-iteration quantity signal (Y);
the third iterative integrator (3) comprises a third adder circuit and a third integrator circuit; the third adder circuit comprises a third first-stage operational amplifier (31), a ninth resistor, a tenth resistor and an eleventh resistor;
the third integrator circuit comprises a third second-stage operational amplifier (32), a twelfth resistor and a third capacitor; the third iterative integrator (3) outputs a third self-iteration quantity signal (Z).
2. The infinite state machine ordered cloud signal generator of claim 1, wherein each of the iterative integrators includes a positive feedback circuit for enabling self-oscillation.
3. The infinite state machine ordered cloud signal generator according to claim 1, wherein the output module (4) includes a first output feedback unit, a second output feedback unit, and a third output feedback unit, and the first output feedback unit feeds back a first self-iteration signal (X) to a first resistor of the first iteration integrating circuit (1); the second output feedback unit feeds back the second self-iteration quantity signal (Y) to a fifth resistor of the second iteration integrator (2); and the third path output feedback unit feeds back the third path self-iteration quantity signal (Z) to a ninth resistor of the third iteration integrator (3).
4. The infinite state machine ordered cloud signal generator of claim 3, wherein the combining multiplier (5) comprises a first multiplier (51), a second multiplier (52), and a third multiplier (53);
the first multiplier (51) is used for multiplying the first path of self-iteration quantity signal (X) and the third path of self-iteration quantity signal (Z) to obtain a first mutual iteration quantity signal (XZ) and feeding back the first mutual iteration quantity signal (XZ) to a sixth resistor of the second iteration integrator (2);
the second multiplier (52) is used for multiplying the first path of self-iteration quantity signal (X) and the second path of self-iteration quantity signal (Y) to obtain a second mutual iteration quantity signal (XY) and feeding back the second mutual iteration quantity signal (XY) to a tenth resistor of the third iteration integrator (3);
and the third multiplier (53) is used for multiplying the second path of self-iteration quantity signal (Y) and the third path of self-iteration quantity signal (Z) and feeding back to obtain a third mutual iteration quantity signal (YZ) and feeding back to a second resistor of the first iteration integrator (1).
5. The infinite state machine ordered cloud signal generator according to claim 4, wherein the feedback coefficient A1 of the first self-iteration quantity signal (X) in the first iteration integrator (1) is:
A1＝RX/R1X(1)
wherein R isXIs the resistance value of the third resistor, R1XIs the resistance value of the first resistor;
the feedback coefficient B1 of the third mutual iteration amount (YZ) is:
B1＝RX/R2(2)
wherein R is2XIs the resistance value of the second resistor;
the integration time constant C1 is:
C1＝RXT×CXT(3)
wherein R isXTIs the resistance value of the fourth resistor, CXTIs the capacitance value of the first capacitor.
6. The infinite state machine ordered cloud signal generator according to claim 5, wherein in the second iterative integrator (2), the feedback coefficient A2 of the second self-iteration quantity signal (Y) is:
A2＝RY/R1Y(4)
wherein R isYIs the resistance value of the seventh resistor, R1YIs the resistance value of the fifth resistor;
the feedback coefficient B2 of the second mutual iteration quantity (XY) is:
B2＝RY/R2Y(5)
wherein R is2YIs the resistance value of the sixth resistor;
the integration time constant C2 is:
C2＝RYT×CYT(6)
wherein R isYTIs the resistance value of the eighth resistor, CYTIs the capacitance value of the second capacitor.
7. The infinite state machine ordered cloud signal generator of claim 6, wherein in the third iterative integrator (3), the feedback coefficient A3 of the third self-iteration quantity signal (Z) is:
A3＝RZ/R1Z(7)
wherein R isZIs the resistance value of the eleventh resistor, R1ZIs the resistance of the ninth resistor;
the feedback coefficient B3 of the first mutual iteration quantity (XY) is:
B3＝RZ/R2Z(8)
wherein R is2ZIs the resistance value of the tenth resistor;
the integration time constant C3 is:
C3＝RZT×CZT(9)
wherein R isZTIs the resistance value of the twelfth resistor, CZTIs the capacitance value of the third capacitor.
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| CN107819566A (en) * | 2017-11-15 | 2018-03-20 | 杭州电子科技大学 | A kind of implementation method of new chaotic oscillating circuit |
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