CN108899330A - Display panel and preparation method thereof, display device - Google Patents
Display panel and preparation method thereof, display device Download PDFInfo
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- CN108899330A CN108899330A CN201810737833.4A CN201810737833A CN108899330A CN 108899330 A CN108899330 A CN 108899330A CN 201810737833 A CN201810737833 A CN 201810737833A CN 108899330 A CN108899330 A CN 108899330A
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- 238000002360 preparation method Methods 0.000 title abstract description 4
- 239000000758 substrate Substances 0.000 claims abstract description 89
- 239000010410 layer Substances 0.000 claims description 66
- 239000010408 film Substances 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 16
- 239000011229 interlayer Substances 0.000 claims description 15
- 239000010409 thin film Substances 0.000 claims description 11
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 239000004744 fabric Substances 0.000 claims description 3
- 238000002844 melting Methods 0.000 abstract description 8
- 230000008018 melting Effects 0.000 abstract description 8
- 238000005516 engineering process Methods 0.000 abstract description 7
- 230000002159 abnormal effect Effects 0.000 abstract description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 4
- 239000001301 oxygen Substances 0.000 description 4
- 229910052760 oxygen Inorganic materials 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000009545 invasion Effects 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
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- 238000007789 sealing Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The present disclosure proposes a kind of display panel and preparation method thereof and a kind of display devices.Display panel includes：Substrate；Insulating layer, setting on the substrate, the insulating layer far from a side surface of the substrate have multiple grooves；And a plurality of wiring, it is separately positioned in the multiple groove, wherein a plurality of wiring is located in the non-display area of the display panel.Even if being routed melting in high-temperature processing technology, the wiring after also can be avoided melting is in contact with each other, and causes display abnormal so as to avoid due to generating short circuit.
Description
Technical field
This disclosure relates to field of display technology, in particular to a kind of display panel and preparation method thereof, and one kind
Display device.
Background technique
With the miniaturization of display device, the development trend of narrow frame, the spacing between wiring in display panel also becomes
In reduction.After forming wiring pattern, display panel may also need to be subjected to the high-temperature processing technology such as encapsulating frit,
In these treatment processes, adjacent wiring may be caused to be in contact with each other due to wiring melting, to generate short circuit and cause to show
Show exception.
It should be noted that information is only used for reinforcing the reason to the background of the disclosure disclosed in above-mentioned background technology part
Solution, therefore may include the information not constituted to the prior art known to persons of ordinary skill in the art.
Summary of the invention
According to the one side of the disclosure, a kind of display panel is provided, including：Substrate；Insulating layer is arranged in the substrate
On, the insulating layer far from a side surface of the substrate have multiple grooves；And a plurality of wiring, it is separately positioned on described
In multiple grooves, wherein a plurality of wiring is located in the non-display area of the display panel.
In in one aspect of the present disclosure, the base is routed in described in the orthographic projection covering of the groove on the substrate
Orthographic projection on plate.
In in one aspect of the present disclosure, depth of the groove on the direction perpendicular to the substrate is equal to or more than
The height being routed on the direction perpendicular to the substrate.
In in one aspect of the present disclosure, depth of the groove on the direction perpendicular to the substrate is equal to or less than
Height of the insulating layer on the direction perpendicular to the substrate.
In in one aspect of the present disclosure, the display panel further includes：Encapsulating material, setting in the insulating layer and
It is described to be routed on the surface far from the substrate side.
In in one aspect of the present disclosure, the encapsulating material includes frit.
In in one aspect of the present disclosure, gap is formed between the groove and the wiring, the encapsulating material is filled out
It is charged in the gap.
In in one aspect of the present disclosure, the wiring includes source and drain line.
In in one aspect of the present disclosure, the substrate includes：Underlay substrate；Thin film transistor (TFT) is arranged in the substrate
On substrate and it is located in the viewing area of the display panel；And interlayer insulating film, the interlayer insulating film are arranged described thin
Film transistor is far from the underlay substrate side, wherein the interlayer insulating film and the insulating layer same layer make.
According to another aspect of the present disclosure, a kind of display device is provided, including according to the aobvious of the above-mentioned aspect of the disclosure
Show panel.
According to the another aspect of the disclosure, a kind of method for preparing display panel is provided, including：Form substrate；Institute
It states and forms insulating layer on substrate, and form multiple grooves on a side surface of the insulating layer far from the substrate；And
A plurality of wiring is respectively formed in the groove, wherein a plurality of wiring is located in the non-display area of the display panel.
In in one aspect of the present disclosure, orthographic projection on the substrate is covering the wiring on the substrate just
Projection.
In in one aspect of the present disclosure, depth of the groove on the direction perpendicular to the substrate is formed
In or greater than the height being routed on the direction perpendicular to the substrate.
In in one aspect of the present disclosure, depth of the groove on the direction perpendicular to the substrate is equal to or less than
Height of the insulating layer on the direction perpendicular to the substrate.
In in one aspect of the present disclosure, the method also includes：It is formed above the insulating layer and the wiring
Encapsulating material.
In in one aspect of the present disclosure, gap, the encapsulating material quilt are formed between the groove and the wiring
Be formed as filling into the gap.
In in one aspect of the present disclosure, the formation substrate includes：Form underlay substrate；The shape on the underlay substrate
At thin film transistor (TFT), so that the thin film transistor (TFT) is located in the viewing area of the display panel；And in the film crystal
It manages far from interlayer insulating film is formed on the underlay substrate side, wherein the interlayer insulating film and the insulating layer same layer system
Make.
According to all aspects of this disclosure, display panel includes：Substrate；Insulating layer, setting on the substrate, and have more
A groove；And a plurality of wiring, it is arranged in the multiple groove.Therefore, even if being routed melting in high-temperature processing technology,
Wiring after can be avoided melting is in contact with each other, and causes display abnormal so as to avoid due to generating short circuit.
It should be understood that above general description and following detailed description be only it is exemplary and explanatory, not
The disclosure can be limited.
Detailed description of the invention
Attached drawing is and to constitute part of specification for providing further understanding of the disclosure, with following tool
Body embodiment is used to explain the disclosure together, but does not constitute the limitation to the disclosure.In the accompanying drawings：
Figure 1A is the schematic diagram according to the display device of an embodiment of the present disclosure；
Figure 1B is the partial sectional view according to the display panel of an embodiment of the present disclosure；
Fig. 2 is the enlarged structure schematic diagram in the portion A in Figure 1B；
Fig. 3 A- Fig. 3 E is the flow chart according to the method for preparing display panel of an embodiment of the present disclosure.
Specific embodiment
It is with reference to the accompanying drawing and specific real in order to be more clearly understood that the above objects, features, and advantages of the disclosure
Mode is applied the disclosure is further described in detail.It should be noted that in the absence of conflict, the implementation of the application
Feature in example and embodiment can be combined with each other.
Many details are explained in the following description in order to fully understand the disclosure, still, the disclosure may be used also
To be implemented using other than the one described here other modes, therefore, the protection scope of the disclosure is not by described below
Specific embodiment limitation.
As shown in Figure 1A to Fig. 2, embodiment of the disclosure provides a kind of display device, and display device may include display
Panel 100.
In one embodiment of the present disclosure, as shown in Figure 1A, display panel 100 includes display area PA and perimeter region
Domain 100a can form encapsulating material 150 (such as frit) in outer region 100a, for sealing display panel 100.
It should be noted also that as shown in the picture, in the present embodiment, outer region 100a is located in display panel under glass cover-plate
Side, therefore be shown in broken lines.It will be understood by those skilled in the art that the arrangement of outer region 100a is not limited to attached drawing
Shown in mode.
Display device includes display panel, and display panel includes：Substrate 110；Insulating layer 120 is arranged in the substrate 110
On, and there are multiple grooves 130；And a plurality of wiring 140, it is arranged in the multiple groove 130, wherein a plurality of cloth
Line is located in the non-display area (such as peripheral region 100a) of the display panel.
According to one aspect of the disclosure, substrate 110 is for carrying and supporting wire structures.For example, aobvious in organic light emission
In showing device, it is used as the cloth of signal wire (for example, source and drain line, the driving circuit being configured as into viewing area provides electric signal)
Cable architecture can be formed between thin film transistor (TFT) (TFT) and Organic Light Emitting Diode (OLED) and extend to non-display area
In, therefore in this case, for carry and support the substrate 110 of wire structures of signal wire can be formed with it is thin
The array substrate of film transistor (TFT).For example, substrate 110 may include underlay substrate 110a and be formed on underlay substrate
TFT layer 110b, insulating layer 120 can be set on TFT layer 110b.In one embodiment, TFT layer 110b is corresponding to
Could be formed with TFT in the part of display area, correspond to non-display area part in can not be formed TFT (for example,
TFT layer 110b can be gate insulation layer in the case of this, be made of the same procedure of gate insulation layer in TFT structure), insulating layer
120 can be formed on TFT and extend in non-display area.The array substrate for being formed with thin film transistor (TFT) is this field
Technical staff's common structure in organic light emitting diode display (OLED display), therefore will not be repeated again herein
The specific structure of array substrate is described.It will be apparent to a skilled person that the present disclosure is not limited to aforementioned array substrate, needle
To different wire structures, substrate 110 can be other supporting substrates for carrying and supporting the wire structures.
Insulating layer 120 is arranged on substrate 110, so that between substrate 110 and the other structures being disposed there above each other
Electrical isolation.Still by taking organic light-emitting display device as an example, insulating layer 120 can be interlayer insulating film, and in the PA of display area
Interlayer insulating film by with along with technique be made.In the disclosure, with along in technique made of two layers can be referred to as
Two layers of " same layer production ".In general, between array substrate and Organic Light Emitting Diode be arranged interlayer insulating film (or be layer
Between dielectric layer ILD), so as to be electrically insulated between the TFT structure formed in array substrate and OLED, and by interlayer insulating film it
Between form via hole to make the drain electrode for driving transistor be connected to the anode of OLED.It will be apparent to a skilled person that this
Open to be not limited to aforementioned interlayer insulating film, for different wire structures, insulating layer 120 be can be for making substrate 110 and setting
Set the other insulation layer structures being electrically insulated from each other between other structures above it.In some embodiments, insulating layer 120
It can be integrally formed with substrate 110, to be formed a part of substrate 110.Insulating layer 120 can be single-layer or multi-layer
Structure, embodiment of the disclosure are not particularly limited this.
Groove 130 is formed in insulating layer 120.Groove 130 can be formed in 110 side of separate substrate of insulating layer 120
Surface on.Groove 130 can be formed in insulating layer 120 by a part of etching isolation layer 120.More specifically, can
To be etched by forming mask on the surface of insulating layer 120, and using the mask to remove the one of insulating layer 120
Point, to form groove 130 on the surface thereof.In one embodiment, the step of forming mask may include that coating is photic anti-
Agent, exposure, development are lost, herein will be no longer specifically described.In addition, it will be apparent to a skilled person that originally
It is open to be not limited to foregoing manner, for example, it is also possible to come to form groove 130, such as laser in insulating layer 120 by other means
Engraving, ion beam bombardment etc., will not be described in great detail herein.
Wiring 140 is arranged in groove 130.As shown in Figure 1B and Fig. 2, the middle part of groove 130 is arranged in wiring 140
Point, and the width W1 being routed is less than the width W2 of groove 130.In one embodiment of the present disclosure, the width W2 ratio of groove 130
The width W1 of wiring is larger about 1.6-3 μm, that is, the distance between the inner surface of the side surface being routed and groove 130 can be about
Between 0.8-1.5 μm.For example, orthographic projection covering wiring orthographic projection on the substrate of the groove 130 on substrate.Groove
130 depth D can be equal to or more than the height H of wiring 140, and wiring 140 is accommodated fully in groove 130.
For example, depth of the groove 130 on the direction perpendicular to the substrate is routed 140 perpendicular to the base equal to or more than described
Height on the direction of plate.For example, the depth H of groove can be between about 0.7-1 μm according to the height of wiring 140.At this
In embodiment, it should be appreciated that the depth D of groove 130 can be equal to or less than the thickness of insulating layer 120.That is, the groove
It is equal to or less than the insulating layer on the direction perpendicular to the substrate in the depth on the direction perpendicular to the substrate
Highly.More specifically, although it will be appreciated by those skilled in the art that the depth that groove is shown in the attached drawings is equally likely to absolutely
The thickness (such as through insulating layer 120) of edge layer 120, but this field is not limited to this, in practical applications, the depth of groove
It can be less than the thickness of insulating layer 120, that is, in a part for extending only to insulating layer 120.It can be protected according to the setting of the disclosure
Even if card wiring 140 in high-temperature processing technology melts, the wiring 140 after also can be avoided melting is in contact with each other, thus
It avoids due to generating short circuit and causes display abnormal.
In the example that aforementioned display panel is organic light emitting display panel, wiring 140, which can be, is used to form signal wire
The wire structures of (such as source and drain line).However the present disclosure is not limited thereto, in the other embodiments of the disclosure, wiring 140 can be with
Be it is other may be by the wire structures that high temperature is influenced.
According to one embodiment of the disclosure, as shown in Figure 1B and Fig. 2, display panel can also include encapsulating material 150,
It is arranged on 140 surfaces far from the substrate side of insulating layer 120 and wiring.
Encapsulating material 150 can be formed by frit (frit), to be used to for display panel being isolated with external environment, thus
It avoids the exterior materials such as oxygen, moisture from entering display panel and causes the deterioration of display panel.Encapsulating material 150 can be filled out
It is charged in the gap between groove 130 and wiring 140, to coat the wire structures and prevent wiring 140 by external oxygen
The influence of gas etc..Further, since encapsulating material 150 is filled into the gap between groove 130 and wiring 140, therefore form
Multi-level packaging material from outside to inside extends the path of water oxygen invasion, so that outside moisture or oxygen preferably be prevented to enter
To the inside of display panel.
In accordance with an embodiment of the present disclosure, display panel includes：Substrate；Insulating layer, setting on the substrate, and have more
A groove；And a plurality of wiring, it is arranged in the multiple groove.Therefore, even if being routed melting in high-temperature processing technology,
Wiring after can be avoided melting is in contact with each other, and causes display abnormal so as to avoid due to generating short circuit.
Fig. 3 A to Fig. 3 E shows the method for the manufacture display panel according to the embodiment of the present disclosure.Referring to Fig. 3 A, this method
Including：Form substrate 110, and the upper formation insulating layer 120 in substrate 110.Referring to Fig. 3 B, formed in insulating layer 120 more
A groove 130, wherein a plurality of wiring is located in the non-display area of the display panel.
Referring to Fig. 3 C and Fig. 3 D, a plurality of wiring 140 is formed in groove 130.The step of wherein forming wiring 140 can wrap
It includes：Then the deposited metal layer 140a in the structure of Fig. 3 B patterns metal layer 140a to form a plurality of wiring 140.Pattern
Any patterning techniques well known in the art can be used in the step of changing metal layer 140a, will not be described in great detail herein.
Referring to Fig. 3 E, this method can also be included in insulating layer 120 and 140 top of wiring forms encapsulating material 150.Its
In, encapsulating material 150 can be formed to fill into the gap between groove 130 and wiring 140.
It closes in the detail embodiment that A to Fig. 2 has been described referring to Fig.1 in front of each step in this present embodiment
It is illustrated, therefore will not be described in great detail herein.
In the disclosure, term " first ", " second " are only used for the purpose described, are not understood to indicate or imply phase
To importance；Term " multiple " indicates two or more.It for the ordinary skill in the art, can be according to tool
Body situation understands the concrete meaning of above-mentioned term in the disclosure.
The foregoing is merely preferred embodiment of the present disclosure, are not limited to the disclosure, for the skill of this field
For art personnel, the disclosure can have various modifications and variations.It is all within the spirit and principle of the disclosure, it is made any to repair
Change, equivalent replacement, improvement etc., should be included within the protection scope of the disclosure.
Claims (15)
1. a kind of display panel, including：
Substrate；
Insulating layer, setting on the substrate, the insulating layer far from a side surface of the substrate have multiple grooves；With
And
A plurality of wiring is separately positioned in the multiple groove,
Wherein, a plurality of wiring is located in the non-display area of the display panel.
2. display panel according to claim 1, wherein the orthographic projection of the groove on the substrate covers the cloth
The orthographic projection of line on the substrate.
3. display panel according to claim 1, wherein depth of the groove on the direction perpendicular to the substrate
Equal to or more than the height being routed on the direction perpendicular to the substrate.
4. display panel according to claim 1, wherein depth of the groove on the direction perpendicular to the substrate
Equal to or less than thickness of the insulating layer on the direction perpendicular to the substrate.
5. display panel according to claim 1, further includes：
Encapsulating material is arranged on the insulating layer and the surface for being routed the separate substrate side.
6. display panel according to claim 5, wherein the encapsulating material includes frit.
7. display panel according to claim 5, wherein gap is formed between the groove and the wiring, it is described
Encapsulating material is filled into the gap.
8. display panel according to claim 1, wherein the wiring includes source and drain line.
9. display panel according to claim 1, wherein the substrate includes：
Underlay substrate；
Thin film transistor (TFT) is arranged on the underlay substrate and is located in the viewing area of the display panel；And
Interlayer insulating film, interlayer insulating film setting in the thin film transistor (TFT) far from the underlay substrate side,
Wherein the interlayer insulating film and the insulating layer same layer make.
10. a kind of display device, including -9 described in any item display panels according to claim 1.
11. a kind of method for preparing display panel, including：
Form substrate；
Insulating layer is formed on the substrate, and is formed on a side surface of the insulating layer far from the substrate multiple recessed
Slot；And
A plurality of wiring is respectively formed in the groove,
Wherein, a plurality of wiring is located in the non-display area of the display panel.
12. according to the method for claim 11, wherein be routed in the base described in orthographic projection covering on the substrate
Orthographic projection on plate.
13. according to the method for claim 11, wherein depth quilt of the groove on the direction perpendicular to the substrate
Be formed as being equal to or more than the height being routed on the direction perpendicular to the substrate.
14. according to the method for claim 11, wherein depth etc. of the groove on the direction perpendicular to the substrate
In or less than thickness of the insulating layer on the direction perpendicular to the substrate.
15. according to the method for claim 11, wherein the formation substrate includes：
Form underlay substrate；
Thin film transistor (TFT) is formed on the underlay substrate, so that the thin film transistor (TFT) is located at the viewing area of the display panel
In；And
In the thin film transistor (TFT) far from forming interlayer insulating film on the underlay substrate side,
Wherein the interlayer insulating film and the insulating layer same layer make.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810737833.4A CN108899330A (en) | 2018-07-06 | 2018-07-06 | Display panel and preparation method thereof, display device |
| PCT/CN2019/082482 WO2020007091A1 (en) | 2018-07-06 | 2019-04-12 | Display panel, manufacturing method therefor, and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810737833.4A CN108899330A (en) | 2018-07-06 | 2018-07-06 | Display panel and preparation method thereof, display device |
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| Publication Number | Publication Date |
|---|---|
| CN108899330A true CN108899330A (en) | 2018-11-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810737833.4A Pending CN108899330A (en) | 2018-07-06 | 2018-07-06 | Display panel and preparation method thereof, display device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN108899330A (en) |
| WO (1) | WO2020007091A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020007091A1 (en) * | 2018-07-06 | 2020-01-09 | 京东方科技集团股份有限公司 | Display panel, manufacturing method therefor, and display device |
| CN112018259A (en) * | 2019-05-28 | 2020-12-01 | 三星显示有限公司 | Display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016071246A (en) * | 2014-09-30 | 2016-05-09 | 富士フイルム株式会社 | Manufacturing method of display panel substrate, display panel substrate, and touch panel display device |
| KR102412468B1 (en) * | 2015-08-11 | 2022-06-23 | 삼성디스플레이 주식회사 | Display apparatus |
| CN107994058B (en) * | 2017-11-27 | 2019-08-27 | 京东方科技集团股份有限公司 | Display base plate and its manufacturing method, display panel and its packaging method |
| CN207441753U (en) * | 2017-11-27 | 2018-06-01 | 京东方科技集团股份有限公司 | Display base plate, display panel and display device |
| CN108899330A (en) * | 2018-07-06 | 2018-11-27 | 京东方科技集团股份有限公司 | Display panel and preparation method thereof, display device |
| CN208336230U (en) * | 2018-07-06 | 2019-01-04 | 京东方科技集团股份有限公司 | Display panel and display device |
-
2018
- 2018-07-06 CN CN201810737833.4A patent/CN108899330A/en active Pending
-
2019
- 2019-04-12 WO PCT/CN2019/082482 patent/WO2020007091A1/en active Application Filing
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020007091A1 (en) * | 2018-07-06 | 2020-01-09 | 京东方科技集团股份有限公司 | Display panel, manufacturing method therefor, and display device |
| CN112018259A (en) * | 2019-05-28 | 2020-12-01 | 三星显示有限公司 | Display device |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020007091A1 (en) | 2020-01-09 |
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