CN108879328A - A kind of VCSEL chip of improving laser gain and preparation method thereof - Google Patents
A kind of VCSEL chip of improving laser gain and preparation method thereof Download PDFInfo
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- CN108879328A CN108879328A CN201811085148.4A CN201811085148A CN108879328A CN 108879328 A CN108879328 A CN 108879328A CN 201811085148 A CN201811085148 A CN 201811085148A CN 108879328 A CN108879328 A CN 108879328A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18361—Structure of the reflectors, e.g. hybrid mirrors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18308—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
Abstract
This application discloses VCSEL chips of a kind of improving laser gain and preparation method thereof, wherein, in the epitaxial structure of the VCSEL chip of the improving laser gain, first type clad, the first limiting layer, quantum well layer, the second limiting layer and second type clad constitute cavity resonator structure, the chamber for increasing the cavity resonator structure of VCSEL chip is long, to increase the gain for the light that cavity resonator structure generates quantum well layer, the purpose for improving the power of emergent ray of VCSEL chip is realized.And due to the presence of the first limiting layer and the second limiting layer, so that the electric current that electrode structure is transmitted to quantum well layer still can be converged by the first limiting layer and the second limiting layer, it is injected to realize to the concentration of the high current of quantum well layer, ensure that the basic function of VCSEL chip.
Description
Technical field
This application involves technical field of semiconductors, a kind of VCSEL chip more specifically to improving laser gain and
Preparation method.
Background technique
Vertical cavity surface emitting laser (Vertical Cavity Surface Emitting Laser) chip, also known as
VCSEL chip, be by the Laser emission chip based on gallium arsenide semiconductor material, have small in size, round output facula,
Single longitudinal mode output, threshold current it is small, cheap, easy of integration be large area array the advantages that, be widely applied it is mutual with optic communication, light
The fields such as company, optical storage.
The cross-section structure of VCSEL chip in the prior art refers to Fig. 1, mainly including gallium arsenide substrate 10 and positioned at arsenic
N-type DBR20 (Distributed Bragg Reflection, the Distributed Bragg Reflection stacked gradually on gallium substrate 10
Mirror), quantum well layer 30, limiting layer 40, p-type DBR50, gaas contact layer 60 and electrode structure 70, wherein limiting layer 40 includes
Conductive structure 41 and oxidation structure 42 positioned at 41 two sides of conductive structure, to play convergence electric current, to form Bulk current injection
The purpose of excitation laser in quantum well layer 30；Electrode structure 70 includes first electrode 71 and second electrode 72,71 He of first electrode
Second electrode 72 is located at the both ends of gaas contact layer 60, and the region between first electrode 71 and second electrode 72 is
The output optical zone domain of VCSEL chip.
In this VCSEL chip, since the long gain of the chamber of resonant cavity is low, so that the function of the light of VCSEL chip outgoing
Rate is lower.
Summary of the invention
In order to solve the above technical problems, this application provides a kind of VCSEL chip of improving laser gain and its preparation sides
Method, to realize the purpose of the power for the emergent ray for improving VCSEL chip.
To realize the above-mentioned technical purpose, the embodiment of the present application provides following technical solution：
A kind of VCSEL chip of improving laser gain, including：
Substrate；
Epitaxial structure on the substrate, the epitaxial structure include being located at the substrate surface to be cascading
The first type clad, the first limiting layer, quantum well layer, the second limiting layer, second type clad and contact electrode layer；Described
One limiting layer includes the first conductive structure and the first oxidation structure positioned at first conductive structure two sides；Second limitation
Layer includes the second conductive structure and the second oxidation structure positioned at second conductive structure two sides；
Deviate from the electrode structure of the one side of substrate positioned at the contact electrode layer；
The first type clad, the first limiting layer, quantum well layer, the second limiting layer and second type clad constitute resonance
Cavity configuration.
Optionally, the light wave that the VCSEL chip with a thickness of the improving laser gain of the cavity resonator structure is emitted
Long N times, N≤2.
Optionally, the first type clad is identical with the thickness of second type clad.
Optionally, the epitaxial structure further includes：
The first type reflecting layer between the substrate and the first type clad；
Second type reflecting layer between the second type clad and the contact electrode layer.
Optionally, first type reflecting layer is N-type distributed bragg reflector mirror DBR layer；
The second type reflecting layer is p-type DBR layer.
Optionally, the first type clad is N-type algaas layer；
The second type clad is p-type algaas layer；
The contact electrode layer is gallium phosphide layer；
The substrate is gallium arsenide substrate.
A kind of preparation method of the VCSEL chip of improving laser gain, including：
Substrate is provided；
Sequentially form over the substrate the first type clad, the first conductive structure, quantum well layer, the second conductive structure,
Second type clad and contact electrode layer；First conductive structure covers the first type clad, the described second conductive knot
Structure covers the quantum well layer；
Oxidation processes are carried out to first conductive structure and the second conductive structure, by the both ends oxygen of the first conductive structure
Change and form the first oxidation structure, the both ends of the second conductive structure are aoxidized to form the second oxidation structure；First oxidation structure
The first limiting layer is constituted with remaining first conductive structure, and second oxidation structure and remaining second conductive structure constitute the
Two limiting layers；
Electrode structure is formed away from the one side of substrate in the contact electrode layer.
Optionally, include to first conductive structure and the second conductive structure progress oxidation processes for described pair：
Wet oxidation process is carried out to first conductive structure and the second conductive structure.
It can be seen from the above technical proposal that the embodiment of the present application provides a kind of VCSEL chip of improving laser gain
And preparation method thereof, wherein in the epitaxial structure of the VCSEL chip of the improving laser gain, the first type clad, the first limit
Preparative layer, quantum well layer, the second limiting layer and second type clad constitute cavity resonator structure, increase the resonance of VCSEL chip
The chamber of cavity configuration is long, to increase the gain for the light that cavity resonator structure generates quantum well layer, realizes and improves VCSEL
The purpose of the power of the emergent ray of chip.
And due to the presence of the first limiting layer and the second limiting layer, so that the electric current that electrode structure is transmitted to quantum well layer
Still it can be converged by the first limiting layer and the second limiting layer, be injected to realize to the concentration of the high current of quantum well layer, be protected
The basic function of VCSEL chip is demonstrate,proved.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of application for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is the schematic diagram of the section structure of VCSEL chip in the prior art；
Fig. 2 is that a kind of cross-section structure of the VCSEL chip for improving laser gain that one embodiment of the application provides shows
It is intended to；
Fig. 3 is the current path schematic diagram of the VCSEL chip of improving laser gain shown in Fig. 2；
Fig. 4 is a kind of preparation method of the VCSEL chip for improving laser gain that one embodiment of the application provides
Flow diagram；
Fig. 5-Fig. 7 is a kind of preparation stream of the VCSEL chip for improving laser gain that one embodiment of the application provides
Journey schematic diagram；
Fig. 8 is a kind of preparation method of the VCSEL chip for improving laser gain that another embodiment of the application provides
Flow diagram.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of embodiments of the present application, instead of all the embodiments.It is based on
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall in the protection scope of this application.
The embodiment of the present application provides a kind of VCSEL chip of improving laser gain, as shown in Fig. 2, including：
Substrate 100；
Epitaxial structure on the substrate 100, the epitaxial structure include being located at 100 surface of substrate successively layer
The first type clad 310, the first limiting layer 410, quantum well layer 500, the second limiting layer 420, second type clad of folded setting
320 and contact electrode layer 600；First limiting layer 410 is including the first conductive structure 411 and is located at first conductive structure
First oxidation structure 412 of 411 two sides；Second limiting layer 420 includes the second conductive structure 421 and leads positioned at described second
Second oxidation structure 422 of electric 421 two sides of structure；
Deviate from the electrode structure 700 of 100 side of substrate positioned at the contact electrode layer 600；
The first type clad 310, the first limiting layer 410, quantum well layer 500, the second limiting layer 420 and second type packet
Coating 320 constitutes cavity resonator structure.
In Fig. 2, the electrode structure 700 includes first electrode 710 and second electrode 720.
With reference to Fig. 3, Fig. 3 is the current path schematic diagram of VCSEL chip interior shown in Fig. 2, and the arrow in Fig. 3 indicates electricity
Stream flow direction, in VCSEL chip provided by the embodiments of the present application, the first limiting layer 410 and the second limiting layer 420 are to by electrode knot
The path that structure 700 is injected into the electric current of quantum well layer 500 is limited, due to the first oxidation structure 412 and the second oxidation knot
The insulation characterisitic of structure 422, so that it is conductive to be limited in the first conductive structure 411 and second from the electric current that electrode structure 700 injects
Between structure 421, the purpose of the injection of the high current to quantum well layer 500 is realized, guarantees that quantum well layer 500 can be excited
Generate the light for being used to form laser.
And due to the first type clad 310, the first limiting layer 410, quantum well layer 500,420 and of the second limiting layer
Second type clad 320 together constitutes the cavity resonator structure of VCSEL chip, increases the cavity resonator structure of VCSEL chip
Film layer is constituted, thus the increase that the chamber for realizing cavity resonator structure is long, and then cavity resonator structure is improved for quantum well layer 500
The gain of the light of generation realizes the purpose for improving the power of emergent ray of VCSEL chip.
It should be noted that the first type clad 310 and second type clad 320 are in addition to for constituting the resonance
Except cavity configuration, carrier is also provided for.
Referring still to Fig. 3, in order to further enhance the light extraction efficiency of chip, the epitaxial structure further includes：
The first type reflecting layer 210 between the substrate 100 and the first type clad 310；
Second type reflecting layer 220 between the second type clad 320 and the contact electrode layer 600.
First type reflecting layer 210 is N-type distributed bragg reflector mirror DBR layer；
The second type reflecting layer 220 is p-type DBR layer.
First type clad 310 is N-type aluminum gallium arsenide (AlGaAs) layer；
The second type clad 320 is p-type algaas layer；
The contact electrode layer 600 is gallium phosphide layer；
The substrate 100 is gallium arsenide substrate.
The contact electrode layer 600 includes using the reason of gallium phosphide：1, gallium phosphide can in second type clad 320 or
Second type is grown on reflecting layer, and quality of forming film is good；2, gallium phosphide has optical transparent properties, can make quantum well layer 500
The light that excitation generates passes through, and reduces absorption of the contact electrode layer 600 to light, promotes the light utilization efficiency of VCSEL chip.
In the specific embodiment of the application, N-type DBR layer includes the reflector element of 32 stacked arrangements, p-type DBR
Layer includes the reflector element of 20 stacked arrangements, and the reflector element includes one layer of aluminium arsenide layer and one layer of arsenide layers, often
The relationship of the wavelength for the light that the thickness of a reflector element is emitted with VCSEL chip is：The thickness of reflector element=VCSEL chip
The a quarter of the wavelength of the light of outgoing.The quantum well layer 500 includes the Quantum Well unit of three stackings, to keep high collection
In electric current injection.The value range of gallium phosphide layer ability thickness is 10nm-20nm, to realize gallium phosphide layer and electrode structure 700
Between good Ohmic contact.
On the basis of the above embodiments, in the alternative embodiment of the application, the thickness of the cavity resonator structure
It is N times of the wavelength of light that the VCSEL chip of the improving laser gain is emitted, wherein N≤2.
By the ceiling restriction of the thickness of the cavity resonator structure is the outgoing of VCSEL chip 2 times of wavelength of light the reason of
It is：When the thickness of cavity resonator structure is greater than twice of wavelength of light of VCSEL chip outgoing, will lead to VCSEL chip at
This is excessively high, not directly proportional to for the income of bring light power enhancing.
Keep quantum well layer 500 include three stackings Quantum Well units it is constant in the case where, can be by adjusting the
One type clad 310, the first limiting layer 410, the second limiting layer 420 and second type clad 320 thicknesses of layers realize
The adjusting of the integral thickness of cavity resonator structure.
In addition, adjusting the first type clad 310, the first limiting layer 410, the second limiting layer 420 and second type clad
During 320 film layer, need to guarantee that the first type clad 310 is identical with the thickness of second type clad 320.
Correspondingly, such as scheming the embodiment of the present application also provides a kind of preparation method of the VCSEL chip of improving laser gain
Shown in 4, including：
S101：Substrate is provided；
It is the schematic diagram of the section structure of substrate with reference to Fig. 5, Fig. 5, label 100 indicates the substrate in Fig. 5, optionally, institute
Stating substrate is gallium arsenide substrate.
S102：The first type clad, the first conductive structure, quantum well layer, the second conduction are sequentially formed over the substrate
Structure, second type clad and contact electrode layer；First conductive structure covers the first type clad, and described second leads
Electric structure covers the quantum well layer；
It is the schematic diagram of the section structure of the substrate and its surface texture after step S102 with reference to Fig. 6, Fig. 6；In Fig. 6,
Label 310 indicates that the first type clad, label 411 indicate that first conductive structure, label 500 indicate the Quantum Well
Layer, label 421 indicate that second conductive structure, label 320 indicate that second type clad, label 600 indicate that the electrode connects
Contact layer；In addition, also showing the first type reflecting layer 210 and second type reflecting layer 220 in Fig. 6.
S103：Oxidation processes are carried out to first conductive structure and the second conductive structure, by the first conductive structure
Both ends aoxidize to form the first oxidation structure, and the both ends of the second conductive structure are aoxidized to form the second oxidation structure；First oxygen
Change structure and remaining first conductive structure constitutes the first limiting layer, second oxidation structure and remaining second conductive structure
Constitute the second limiting layer；
The schematic diagram of the section structure of substrate and its surface texture after step S103 refers to Fig. 7；Label in Fig. 7
422 indicate second oxidation structure, and 420 indicate the second limiting layer, and 412 indicate first oxidation structure, and 410 indicate first
Limiting layer.
S104：Electrode structure is formed away from the one side of substrate in the contact electrode layer.
The cross-section structure for the VCSEL chip that the preparation method of VCSEL chip provided by the embodiments of the present application prepares is joined
Examine Fig. 2.Label 700 indicates electrode structure in Fig. 2, and 710 indicate first electrode, and 720 indicate second electrode.
With reference to Fig. 3, Fig. 3 is the current path schematic diagram of VCSEL chip interior shown in Fig. 2, is mentioned in the embodiment of the present application
In the VCSEL chip of confession, the path of the first limiting layer and the second limiting layer to the electric current for being injected into quantum well layer by electrode structure
It is limited, due to the insulation characterisitic of the first oxidation structure and the second oxidation structure, so that the electric current injected from electrode structure
It is limited between the first conductive structure and the second conductive structure, realizes the purpose of the injection to the high current of quantum well layer,
Guarantee that quantum well layer can be excited to generate and is used to form the light of laser.
And due to the first type clad, the first limiting layer, quantum well layer, the second limiting layer and second type clad
The cavity resonator structure of VCSEL chip is together constituted, the film layer for increasing the cavity resonator structure of VCSEL chip is constituted, thus real
Show the long increase of the chamber of cavity resonator structure, and then improve the gain for the light that cavity resonator structure generates quantum well layer,
Realize the purpose for improving the power of emergent ray of VCSEL chip.
It should be noted that the first type clad and second type clad are in addition to for constituting the cavity resonator structure
Except, also provide for carrier.
Referring still to Fig. 3, in order to further enhance the light extraction efficiency of chip, the epitaxial structure further includes：
The first type reflecting layer between the substrate and the first type clad；
Second type reflecting layer between the second type clad and the contact electrode layer.
First type reflecting layer is N-type distributed bragg reflector mirror DBR layer；
The second type reflecting layer is p-type DBR layer.
First type clad is N-type aluminum gallium arsenide (AlGaAs) layer；
The second type clad is p-type algaas layer；
The contact electrode layer is gallium phosphide layer；
The substrate is gallium arsenide substrate.
The contact electrode layer use gallium phosphide the reason of include：1, gallium phosphide can be in second type clad or second type
It is grown on reflecting layer, and quality of forming film is good；2, gallium phosphide has optical transparent properties, and quantum well layer excitation can be made to generate
Light passes through, and reduces absorption of the contact electrode layer to light, promotes the light utilization efficiency of VCSEL chip.
In the specific embodiment of the application, N-type DBR layer includes the reflector element of 32 stacked arrangements, p-type DBR
Layer includes the reflector element of 20 stacked arrangements, and the reflector element includes one layer of aluminium arsenide layer and one layer of arsenide layers, often
The relationship of the wavelength for the light that the thickness of a reflector element is emitted with VCSEL chip is：The thickness of reflector element=VCSEL chip
The a quarter of the wavelength of the light of outgoing.The quantum well layer includes the Quantum Well unit of three stackings, is concentrated with keeping high
Electric current injection.The value range of gallium phosphide layer ability thickness is 10nm-20nm, to realize between gallium phosphide layer and electrode structure
Good Ohmic contact.
On the basis of the above embodiments, in the alternative embodiment of the application, the thickness of the cavity resonator structure
It is N times of the wavelength of light that the VCSEL chip of the improving laser gain is emitted, wherein N≤2.
By the ceiling restriction of the thickness of the cavity resonator structure is the outgoing of VCSEL chip 2 times of wavelength of light the reason of
It is：When the thickness of cavity resonator structure is greater than twice of wavelength of light of VCSEL chip outgoing, will lead to VCSEL chip at
This is excessively high, not directly proportional to for the income of bring light power enhancing.
It, can be by adjusting the first type in the case where keeping quantum well layer includes that three Quantum Well units being laminated are constant
Clad, the first limiting layer, the second limiting layer and second type clad thicknesses of layers come the entirety for the cavity resonator structure realized
The adjusting of thickness.
In addition, in the mistake for the film layer for adjusting the first type clad, the first limiting layer, the second limiting layer and second type clad
Cheng Zhong needs to guarantee that the first type clad is identical with the thickness of second type clad.
On the basis of the above embodiments, in the alternative embodiment of the application, as shown in figure 8, improving laser increases
The preparation method of VCSEL chip of benefit includes：
S201：Substrate is provided；
S202：The first type clad, the first conductive structure, quantum well layer, the second conduction are sequentially formed over the substrate
Structure, second type clad and contact electrode layer；First conductive structure covers the first type clad, and described second leads
Electric structure covers the quantum well layer；
S203：Wet oxidation process is carried out to first conductive structure and the second conductive structure, by the first conductive knot
The both ends of structure aoxidize to form the first oxidation structure, and the both ends of the second conductive structure are aoxidized to form the second oxidation structure；Described
One oxidation structure and remaining first conductive structure constitute the first limiting layer, second oxidation structure and remaining second conduction
Structure constitutes the second limiting layer；
S204：Electrode structure is formed away from the one side of substrate in the contact electrode layer.
Wherein, the substantially process of wet oxidation includes：High temperature is heated to environment where substrate and its surface texture, and
Oxidation process is carried out under water vapor atmosphere.
In conclusion the embodiment of the present application provides a kind of VCSEL chip and preparation method thereof of improving laser gain,
In, in the epitaxial structure of the VCSEL chip of the improving laser gain, the first type clad, the first limiting layer, quantum well layer,
Second limiting layer and second type clad constitute cavity resonator structure, and the chamber for increasing the cavity resonator structure of VCSEL chip is long, from
And the gain for the light that cavity resonator structure generates quantum well layer is increased, realize the emergent ray for improving VCSEL chip
Power purpose.
And due to the presence of the first limiting layer and the second limiting layer, so that the electric current that electrode structure is transmitted to quantum well layer
Still it can be converged by the first limiting layer and the second limiting layer, be injected to realize to the concentration of the high current of quantum well layer, be protected
The basic function of VCSEL chip is demonstrate,proved.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment may refer to each other.
The foregoing description of the disclosed embodiments makes professional and technical personnel in the field can be realized or use the application.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the application.Therefore, the application
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
Claims (8)
1. a kind of VCSEL chip of improving laser gain, which is characterized in that including：
Substrate；
Epitaxial structure on the substrate, the epitaxial structure include the to be cascading positioned at the substrate surface
One type clad, the first limiting layer, quantum well layer, the second limiting layer, second type clad and contact electrode layer；First limit
Preparative layer includes the first conductive structure and the first oxidation structure positioned at first conductive structure two sides；The second limiting layer packet
Include the second conductive structure and the second oxidation structure positioned at second conductive structure two sides；
Deviate from the electrode structure of the one side of substrate positioned at the contact electrode layer；
The first type clad, the first limiting layer, quantum well layer, the second limiting layer and second type clad constitute resonant cavity knot
Structure.
2. the VCSEL chip of improving laser gain according to claim 1, which is characterized in that the cavity resonator structure
With a thickness of be emitted N times of wavelength of light of VCSEL chip of the improving laser gain, N≤2.
3. the VCSEL chip of improving laser gain according to claim 2, which is characterized in that the first type clad
It is identical with the thickness of second type clad.
4. the VCSEL chip of improving laser gain according to claim 1, which is characterized in that the epitaxial structure also wraps
It includes：
The first type reflecting layer between the substrate and the first type clad；
Second type reflecting layer between the second type clad and the contact electrode layer.
5. the VCSEL chip of improving laser gain according to claim 4, which is characterized in that first type reflecting layer
For N-type distributed bragg reflector mirror DBR layer；
The second type reflecting layer is p-type DBR layer.
6. the VCSEL chip of improving laser gain according to claim 1, which is characterized in that the first type clad
For N-type algaas layer；
The second type clad is p-type algaas layer；
The contact electrode layer is gallium phosphide layer；
The substrate is gallium arsenide substrate.
7. a kind of preparation method of the VCSEL chip of improving laser gain, which is characterized in that including：
Substrate is provided；
The first type clad, the first conductive structure, quantum well layer, the second conductive structure, second are sequentially formed over the substrate
Type clad and contact electrode layer；First conductive structure covers the first type clad, and second conductive structure covers
Cover the quantum well layer；
Oxidation processes are carried out to first conductive structure and the second conductive structure, the both ends of the first conductive structure are aoxidized into shape
At the first oxidation structure, the both ends of the second conductive structure are aoxidized to form the second oxidation structure；First oxidation structure and surplus
The first remaining conductive structure constitutes the first limiting layer, and second oxidation structure and remaining second conductive structure constitute the second limit
Preparative layer；
Electrode structure is formed away from the one side of substrate in the contact electrode layer.
8. the method according to the description of claim 7 is characterized in that described pair is tied first conductive structure and the second conduction
Structure carries out oxidation processes：
Wet oxidation process is carried out to first conductive structure and the second conductive structure.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109861078A (en) * | 2019-04-02 | 2019-06-07 | 中国科学院长春光学精密机械与物理研究所 | A kind of surface-emitting laser and a kind of surface emitting laser array |
| CN114234952A (en) * | 2021-12-21 | 2022-03-25 | 江西省纳米技术研究院 | High-resolution angular velocity sensor, and manufacturing method and application thereof |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070153865A1 (en) * | 2005-12-19 | 2007-07-05 | Osamu Maeda | Vertical cavity surface emitting laser |
| CN101394064A (en) * | 2007-09-21 | 2009-03-25 | 佳能株式会社 | Vertical cavity surface emitting laser and image forming apparatus using the vertical cavity surface emitting laser |
| CN101986488A (en) * | 2009-07-28 | 2011-03-16 | 佳能株式会社 | Surface emitting laser, method for manufacturing surface emitting laser, and image forming apparatus |
| CN102122792A (en) * | 2009-10-28 | 2011-07-13 | 索尼公司 | Semiconductor light emitting device |
| US20170256915A1 (en) * | 2016-03-04 | 2017-09-07 | Princeton Optronics, Inc. | High-Speed VCSEL Device |
| US20180226768A1 (en) * | 2011-07-27 | 2018-08-09 | Vixar Inc. | Method and apparatus including improved vertical-cavity surface-emitting lasers |
| CN208548573U (en) * | 2018-09-18 | 2019-02-26 | 厦门乾照半导体科技有限公司 | A kind of VCSEL chip of improving laser gain |
-
2018
- 2018-09-18 CN CN201811085148.4A patent/CN108879328A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070153865A1 (en) * | 2005-12-19 | 2007-07-05 | Osamu Maeda | Vertical cavity surface emitting laser |
| CN101394064A (en) * | 2007-09-21 | 2009-03-25 | 佳能株式会社 | Vertical cavity surface emitting laser and image forming apparatus using the vertical cavity surface emitting laser |
| CN101986488A (en) * | 2009-07-28 | 2011-03-16 | 佳能株式会社 | Surface emitting laser, method for manufacturing surface emitting laser, and image forming apparatus |
| CN102122792A (en) * | 2009-10-28 | 2011-07-13 | 索尼公司 | Semiconductor light emitting device |
| US20180226768A1 (en) * | 2011-07-27 | 2018-08-09 | Vixar Inc. | Method and apparatus including improved vertical-cavity surface-emitting lasers |
| US20170256915A1 (en) * | 2016-03-04 | 2017-09-07 | Princeton Optronics, Inc. | High-Speed VCSEL Device |
| CN208548573U (en) * | 2018-09-18 | 2019-02-26 | 厦门乾照半导体科技有限公司 | A kind of VCSEL chip of improving laser gain |
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| CN109861078A (en) * | 2019-04-02 | 2019-06-07 | 中国科学院长春光学精密机械与物理研究所 | A kind of surface-emitting laser and a kind of surface emitting laser array |
| CN109861078B (en) * | 2019-04-02 | 2021-01-05 | 中国科学院长春光学精密机械与物理研究所 | Surface emitting laser and surface emitting laser array |
| CN114234952A (en) * | 2021-12-21 | 2022-03-25 | 江西省纳米技术研究院 | High-resolution angular velocity sensor, and manufacturing method and application thereof |
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