CN108878506A - Layer structure, artificial lattice comprising GaAs Two-dimensional electron system and its preparation method and application - Google Patents
Layer structure, artificial lattice comprising GaAs Two-dimensional electron system and its preparation method and application Download PDFInfo
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- CN108878506A CN108878506A CN201710330785.2A CN201710330785A CN108878506A CN 108878506 A CN108878506 A CN 108878506A CN 201710330785 A CN201710330785 A CN 201710330785A CN 108878506 A CN108878506 A CN 108878506A
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- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 56
- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 claims description 21
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 16
- 238000010894 electron beam technology Methods 0.000 claims description 14
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 12
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- 238000004026 adhesive bonding Methods 0.000 claims description 10
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- 230000005533 two-dimensional electron gas Effects 0.000 claims description 9
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- 229910015844 BCl3 Inorganic materials 0.000 claims description 7
- 238000011161 development Methods 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 7
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 6
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 6
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims description 5
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- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 239000005030 aluminium foil Substances 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 2
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- 238000005516 engineering process Methods 0.000 abstract description 9
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- 238000012360 testing method Methods 0.000 description 5
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- 238000001451 molecular beam epitaxy Methods 0.000 description 4
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- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 1
- 239000009517 FM 100 Substances 0.000 description 1
- UIHCLUNTQKBZGK-UHFFFAOYSA-N Methyl isobutyl ketone Natural products CCC(C)C(C)=O UIHCLUNTQKBZGK-UHFFFAOYSA-N 0.000 description 1
- 150000001336 alkenes Chemical class 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The present invention provides a kind of in GaAs Two-dimensional electron system constructs the preparation method and application of artificial lattice, and the lattice period of this artificial lattice can be designed artificially, have certain flexibility, there is huge application value in terms of electronic technology；It can be hole from electrical adjustment, i.e. conversion between electron type device and cavity type device has huge application value in terms of electronic technology.
Description
Technical field
The invention belongs to semiconductor fields, and in particular to a kind of to construct artificial lattice's in GaAs Two-dimensional electron system
Preparation method.
Background technique
Special band structure (linear dispersion relationship) possessed by graphene causes it with many novel physical characteristics,
Its special π berry phase can make carrier be in certain special Topological Quantum states, therefore graphene is widely used in grinding
Novel quantum device is made, has the possibility for topological quantum computation.In addition, graphene majority carrier can be from electronics tune
Section is hole, i.e. conversion between electron type device and cavity type device, this also has huge using valence in terms of electronic technology
Value.
Theory prophesy is formed by after GaAs/AlGaAs Two-dimensional electron system applies periodic modulation gesture similar to graphite
The artificial lattice of alkene hexagonal arrangement can tentatively show linear dispersion relationship under certain condition.It is this artificial compared to graphene
The lattice period of lattice can be designed artificially, have certain flexibility.Qualified people is prepared in experimental physics
Work lattice is the top priority for verifying theory prophesy, and micro fabrication according to the present invention provides preparation artificial lattice
A kind of approach.
Summary of the invention
Therefore, the purpose of the present invention is to overcome the defects in the prior art, and the present invention is the micro Process of semiconductor devices
Technique combines the preparation method and application of the artificial lattice of preparation minor cycle using electron beam exposure and dry etching technology.
Exposure, development and etching parameters are the key that prepare uniform lattice.
Before illustrating technical solution of the present invention, it is as follows to define term used herein：
Term " PMMA " refers to：Polymethyl methacrylate.
Term " Hall Bar " refers to：Traditional four-end method measuring resistance device is in " Lv " shape.
Term " MIBK " refers to：Methylisobutylketone.
Term " two-dimensional electron gas " refers to：One layer of conducting channel positioned at the interface GaAs/AlGaAs, thickness 10nm magnitude,
But the movement of through-thickness is ignored, and is only considered along the carrier moving in interface, therefore is belonged to two dimension.
Term " EHT " refers to：Extra-high voltage, the parameter of electron beam exposure.
To achieve the above object, the first aspect of the present invention provides a kind of stratiform comprising GaAs Two-dimensional electron system
Structure, layered structure include：
It substrate and is set in turn on the substrate from bottom to up：
GaAs/AlxGa1-xAs superlattice layer；
First GaAs layers；
Two-dimensional electron gas-bearing formation is set to the first GaAs layers and the first AlxGa1-xAt the bed boundary As；
First AlxGa1-xAs layers；
Doped layer；
2nd AlxGa1-xAs layers；And
2nd GaAs layers.
Preferably, the GaAs/AlxGa1-xAs superlattice layer includes 40-60 gap periods, preferably 50 intervals
Period.
Preferably, the material of the Two-dimensional electron gas-bearing formation is GaAs/AlGaAs heterojunction with two-dimensional electron gas；And/or
The material of the doped layer is selected from silicon or germanium, preferably silicon；And/or
The material of the substrate is GaAs.
The second aspect of the present invention provides a kind of artificial lattice based on GaAs Two-dimensional electron system, the artificial crystalline substance
Lattice through the invention carve through electron beam exposure and dry method by the layer structure described in first aspect comprising GaAs Two-dimensional electron system
Erosion is made.
The present invention also provides the preparation method of the artificial lattice described in second aspect, the preparation method includes：
The layer structure gluing comprising GaAs Two-dimensional electron system and hot plate are toasted；
Electron beam exposure and development are carried out to the layer structure comprising GaAs Two-dimensional electron system after gluing；
To the layer structure after exposure comprising GaAs Two-dimensional electron system carry out dry etching and
It removes photoresist.
Preferably, the method further includes：
To the layer structure gluing comprising GaAs Two-dimensional electron system use PMMA glue, using desk-top sol evenning machine into
Row gluing, revolving speed are 5000~7000rpm；
The hot plate baking temperature is 100 DEG C~250 DEG C, preferably 150 DEG C~200 DEG C, most preferably 180 DEG C；With/
Or
The stripping process impregnates the layer structure comprising GaAs Two-dimensional electron system using acetone soln, preferably
Ground is covered with aluminium foil and is heated, and most preferably, heating temperature is 80 DEG C, and heating time is 10 minutes.
Preferably, by adjusting electron beam exposure state modulator artificial lattice's period in 100-600nm.
It is further preferred that carrying out electron beam exposure to the layer structure comprising GaAs Two-dimensional electron system after the gluing
Afterwards, development uses the mixed solution of MIBK and isopropanol, it is preferable that the volume ratio of MIBK and isopropanol is 1:3 to 1:4；It is optimal
The volume ratio of selection of land, MIBK and isopropanol is 1:3.
More preferably, is carried out to the layer structure sample comprising GaAs Two-dimensional electron system after the exposure dry method quarter
When erosion, BCl3Flow is 5.0~25.0sccm, Cl2Flow is 1.0~5.0sccm, and Ar flow is 0.0~15.0sccm, pressure
For 1.0~5.0mTorr, RF power is 5~25W, and ICP power is 100~500W, and temperature is 10~50 DEG C, corresponding to etch
Rate：150~500 nm/minutes；
Preferably, BCl3Flow is 8.0~12.0sccm, Cl2Flow be 2.0~4.0sccm, Ar flow be 8.0~
12.0sccm, pressure are 2.0~3.0mTorr, and RF power is 10~20W, and ICP power is 200~400W, and temperature is 20~30
DEG C, corresponding etch rate：200~400 nm/minutes；
Most preferably, BCl3Flow is 10.0sccm, Cl2Flow is 2.5sccm, and Ar flow is 10.0sccm, and pressure is
2.5mTorr, RF power are 15W, and ICP power 300W, temperature is 25 DEG C, etch rate：260~270 nm/minutes.
Third aspect present invention provides the stratiform knot described in first aspect present invention comprising GaAs Two-dimensional electron system
Artificial lattice based on GaAs Two-dimensional electron system described in structure or second aspect of the present invention is preparing answering in semiconductor devices
With；Preferably, the semiconductor devices is novel quantum device.
The present invention provides a kind of micro fabrication approach for preparation artificial lattice.This is related to micro- the adding of preparation Jie's sight device
Work technology：Conventional preparation Hall Bar device includes ultraviolet photolithographic and physical vapour deposition (PVD)；Submicron-scale device is prepared to set
Meter then needs electron beam exposure, and subsequent technique includes corresponding dry etching technology.Electron beam lithography in the present invention and
The artificial lattice of the available different cycles from 1000nm to 100nm of the cooperation of dry etching technology.Preferably, the device tool
There are following characteristics：Required semiconductor material is GaAs/AlGaAs heterojunction with two-dimensional electron gas.
The GaAs Two-dimensional electron system of offer of the invention and artificial lattice can have but be not limited to following beneficial to effect
Fruit：
1, graphene is compared, the lattice period of artificial lattice provided by the invention can be designed artificially, be had centainly
Flexibility；
It 2, is hole from electrical adjustment, i.e. conversion between electron type device and cavity type device has in terms of electronic technology
Huge application value.
Detailed description of the invention
Hereinafter, carry out the embodiment that the present invention will be described in detail in conjunction with attached drawing, wherein：
Fig. 1 shows the process flow of preparation artificial lattice's method provided by the invention；
Fig. 2 shows artificial lattice's top view provided by the invention, dot position is the place that etching is gone down；
Fig. 3 shows the layer structure used in the present invention comprising GaAs Two-dimensional electron system；
Fig. 4 shows electronics corresponding to the layer structure used in the present invention comprising GaAs Two-dimensional electron system and leads
The band structure bottom of with；
Fig. 5 shows the electron microscope of the device surface in different crystalline lattice period in the embodiment of the present invention 2, (a) period 100nm
(b) period 120nm (c) period 600nm；
Fig. 6 shows measuring device used in test example 1 of the present invention；
Fig. 7 shows the measurement result of test example 1 of the present invention.
Specific embodiment
Present invention will be further explained by specific examples below, it should be understood, however, that, these embodiments are only
It is to be used for specifically describing in more detail, but should not be understood as present invention is limited in any form.
This part carries out general description to the material and test method that arrive used in present invention test.Although
To realize the present invention many materials and operating method used in purpose be it is known in the art that still the present invention still herein
It is described in detail as far as possible.It will be apparent to those skilled in the art that within a context, if not specified, material therefor of the present invention
It is well known in the art with operating method.
Reagent and instrument used in the following embodiment are as follows：
Reagent：
PMMA 950A4 glue, MIBK are purchased from MicroChem；The concentrated sulfuric acid, hydrogen peroxide, acetone, isopropanol are purchased from traditional Chinese medicines
Group.Photoresist AR5350 is purchased from ALLRESIST, and Ga is purchased from Britain 5n plus company, and As is purchased from Furukawa company of Japan,
Al is purchased from Japanese vacuum Co., Ltd., and Si is purchased from MBE Components company of Germany；
Wet etching liquid：The concentrated sulfuric acid, hydrogen peroxide, deionized water mixing (1：8：100)
Instrument：
Desk-top sol evenning machine grinds electronics technology (China) Co., Ltd, model MODEL KW-4A purchased from prosperous；
Electron-beam exposure system is purchased from Raith, model Raith150；
Dry etching systems are purchased from OXFORD Instruments, model PlasmalabSystem100 (ICP180)；
Scanning electron microscope is purchased from Zeiss model SUPRA；
Molecular beam epitaxy system is purchased from RIBER model C 21HM；
Ultraviolet photolithographic machine is purchased from OAI model Model 200；
High electron energy diffractometer is purchased from STAIB INSTRUMENTS model RV-FM100.
3He refrigeration machine is purchased from OXFORD Instruments, model HelioxTL
Embodiment 1
The present embodiment is for illustrating the layer structure provided by the invention comprising GaAs Two-dimensional electron system
Preparation method.
The layer structure that the present invention is grown using molecular beam epitaxy technique is prepared with traditional top-down technique
Hall Bar device.
The growth of layer structure：GaAs substrate is placed on the warm table in the main chamber of molecular beam epitaxy system, pole is evacuated to
Limit vacuum.When growth, substrate is first sufficiently heated to 600~650 DEG C, and the corresponding crucible of the element for needing to use is heated, Gu
The raw material of state evaporates atom gas, and atom gas just forms line and enters cavity after baffle is opened, and reaches substrate surface.Atom quilt
Start after being adsorbed above substrate to spread along substrate surface, when atom reaches on some lattice-site, just with beneath lattice coupling
It is combined, new one layer will be paved with as atom is constantly spread.The crucible of Ga and the crucible of As open simultaneously when growth,
Ga atom and As atom reach on substrate simultaneously, and Ga atom and As atom press 1:1 pairing arranges, with following lattice coupling shape
At recruit's layer.The number of molecule layers grown needed for controllable with the synchronous detection of high-energy electron diffiraction means.In addition Al and Si
Atom is also to extend layer structure outside in the same manner.
Top-down technique prepares Hall Bar device：(1) photoresist AR5350 is coated in layer structure, utilizes purple
Outer photoetching carves the region of distribution of electrodes.(2) metal film Pd/Ge/Au is plated on entire sample, is removed with acetone soak more
Remaining glue and excess metal film, so that only distribution of electrodes region leaves metal film.(3) it anneals, reacts metal film with GaAs
And permeate down, form the contact with two-dimensional electron gas.(4) it coats photoresist and carries out second of ultraviolet photolithographic, obtained after development
The glue film of Hall Bar shape.(5) wet etching, no photoresist gear residence are corroded, and use acetone soak later
It removes photoresist, finally obtains the two-dimensional electron gas in Hall Bar distribution of shapes.
Embodiment 2
The present embodiment is used to illustrate the preparation method of artificial lattice provided by the invention.
(1) gluing：Using the PMMA 950A4 glue of MicroChem, glue is uniformly layered on using desk-top sol evenning machine includes
In the layer structure of GaAs Two-dimensional electron system, revolving speed is 5000-7000rpm.Then it is toasted on hot plate, 180 DEG C continue 2
Minute.
(2) electron beam exposure uses Raith150 system, and development presses 1 using MIBK and isopropanol:3 mixing.
Relevant parameter is varied because of lattice period difference, and concrete outcome is referring to table 1：
1. electron beam parameter of table with lattice period variation
(3) dry etching uses the PlasmalabSystem100 of OXFORD Instruments.
Etch rate matches according to special gas, pressure, RF source power, inductive coupling power and change, concrete outcome referring to
Table 2.
2. dry etching rate of table with flow and pressure variation
(RF power 15W, ICP power 300W, under the conditions of 25 DEG C of temperature)
Common one group of parameter is
BCl3/Cl2/ Ar flow：10.0/2.5/10.0sccm pressure：2.5mTorr, RF power：15W, ICP power：
300W, temperature：25 DEG C, practical etch rate：260 nm/minutes, practical etching depth is different because of demand, generally require more than as
The doped layer of layer structure shown in Fig. 3.
(4) it removes photoresist：Being immersed in acetone soln to remove photoresist (can according to circumstances be covered with aluminium foil and be heated to
80 DEG C), at least continue 10 minutes.
Fig. 5 shows the electron microscope of the device surface in the different crystalline lattice period according to the preparation of the present embodiment method, (a) week
Phase 100nm (b) period 120nm (c) period 600nm.
Test example 1
This test example is for illustrating the artificial lattice provided by the invention based on GaAs Two-dimensional electron system in novel quantum
Potential application in device.
Device is placed in3In He refrigeration machine, measure at low temperature, it is longitudinal as shown in Figure 6 to be passed through low current, in side
Longitudinal electrical resistance R is measured in the electrode of facexxWith lateral resistance Rxy, apply the magnetic field perpendicular to sample, change magnetic field size and obtain R-B
Curve is as shown in Figure 7.R in Fig. 7xxThe peak of curve corresponds to the circular orbit that electronics surrounds several artificial lattice's lattice points.The present invention mentions
The artificial lattice based on GaAs Two-dimensional electron system supplied can be used as the candidate materials of topological quantum computation.
Although present invention has been a degree of descriptions, it will be apparent that, do not departing from the spirit and scope of the present invention
Under the conditions of, the appropriate variation of each condition can be carried out.It is appreciated that the present invention is not limited to the embodiments, and it is attributed to right
It is required that range comprising the equivalent replacement of each factor.
Claims (10)
1. a kind of layer structure comprising GaAs Two-dimensional electron system, which is characterized in that layered structure includes：
It substrate and is set in turn on the substrate from bottom to up：
GaAs/AlxGa1-xAs superlattice layer；
First GaAs layers；
Two-dimensional electron gas-bearing formation is set to the first GaAs layers and the first AlxGa1-xAt the bed boundary As；
First AlxGa1-xAs layers；
Doped layer；
2nd AlxGa1-xAs layers；And
2nd GaAs layers.
2. the layer structure according to claim 1 comprising GaAs Two-dimensional electron system, which is characterized in that the GaAs/
AlxGa1-xAs superlattice layer includes 40-60 gap periods, preferably 50 gap periods.
3. the layer structure according to claim 1 comprising GaAs Two-dimensional electron system, which is characterized in that the two dimension electricity
The material of sub- gas-bearing formation is GaAs/AlGaAs heterojunction with two-dimensional electron gas；And/or
The material of the doped layer is selected from silicon or germanium, preferably silicon；And/or
The material of the substrate is GaAs.
4. a kind of artificial lattice based on GaAs Two-dimensional electron system, which is characterized in that the artificial lattice passes through claim 1
The layer structure comprising GaAs Two-dimensional electron system is made through electron beam exposure and dry etching.
5. the preparation method of artificial lattice according to claim 4, which is characterized in that the preparation method includes：
The layer structure gluing comprising GaAs Two-dimensional electron system and hot plate are toasted；
Electron beam exposure and development are carried out to the layer structure comprising GaAs Two-dimensional electron system after gluing；
Dry etching is carried out to the layer structure comprising GaAs Two-dimensional electron system after exposure；With
It removes photoresist.
6. according to the method described in claim 5, it is characterized in that, the method further includes：
PMMA glue is used to the layer structure gluing comprising GaAs Two-dimensional electron system, is applied using desk-top sol evenning machine
Glue, revolving speed are 5000~7000rpm；
The hot plate baking temperature is 100 DEG C~250 DEG C, preferably 150 DEG C~200 DEG C, most preferably 180 DEG C；And/or
The stripping process impregnates the layer structure comprising GaAs Two-dimensional electron system using acetone soln, it is preferable that uses
Aluminium foil covering heating, most preferably, heating temperature is 80 DEG C, and heating time is 10 minutes.
7. method according to claim 5 or 6, which is characterized in that manually brilliant by adjusting electron beam exposure state modulator
The lattice period is in 100-600nm.
8. according to the described in any item methods of claim 5-7, which is characterized in that include GaAs two dimension electricity to after the gluing
When the layer structure of subsystem carries out electron beam exposure, development uses the mixed solution of MIBK and isopropanol, it is preferable that MIBK with
The volume ratio of isopropanol is 1:3 to 1:4；Most preferably, the volume ratio of MIBK and isopropanol is 1:3.
9. according to the described in any item methods of claim 5-8, which is characterized in that include GaAs two dimension electricity to after the exposure
When the layer structure of subsystem carries out dry etching, BCl3Flow is 5.0~25.0sccm, Cl2Flow is 1.0~5.0sccm,
Ar flow is 0.0~15.0sccm, and pressure is 1.0~5.0mTorr, and RF power is 5~25W, and ICP power is 100~500W,
Temperature is 10~50 DEG C, corresponding etch rate：150~500 nm/minutes；Preferably, BCl3Flow be 8.0~
12.0sccm Cl2Flow is 2.0~4.0sccm, and Ar flow is 8.0~12.0sccm, and pressure is 2.0~3.0mTorr, RF function
Rate is 10~20W, and ICP power is 200~400W, and temperature is 20~30 DEG C, corresponding etch rate：200~400 nm/mins
Clock；
Most preferably, BCl3Flow is 10.0sccm, Cl2Flow is 2.5sccm, and Ar flow is 10.0sccm, and pressure is
2.5mTorr, RF power are 15W, and ICP power 300W, temperature is 25 DEG C, etch rate：260~270 nm/minutes.
10. the layer structure of any of claims 1 or 2 comprising GaAs Two-dimensional electron system as claimed in claim 4 is based on
The artificial lattice of GaAs Two-dimensional electron system is preparing the application in semiconductor devices；Preferably, the semiconductor devices is new
Type quantum device.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5060030A (en) * | 1990-07-18 | 1991-10-22 | Raytheon Company | Pseudomorphic HEMT having strained compensation layer |
| KR20040031923A (en) * | 2002-10-07 | 2004-04-14 | 주식회사 코리아시그널 | Method of manufactoring semiconductor device for high frequency applications using self-assembled quantum dots |
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2017
- 2017-05-11 CN CN201710330785.2A patent/CN108878506A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5060030A (en) * | 1990-07-18 | 1991-10-22 | Raytheon Company | Pseudomorphic HEMT having strained compensation layer |
| KR20040031923A (en) * | 2002-10-07 | 2004-04-14 | 주식회사 코리아시그널 | Method of manufactoring semiconductor device for high frequency applications using self-assembled quantum dots |
Non-Patent Citations (2)
| Title |
|---|
| NADVORNIK, L, ET AL.: "From laterally modulated two-dimensional electron gas towards artificial graphene", 《NEW JOURNAL OF PHYSICS》 * |
| SINGHA, A, ET AL.: "ENGINEERING ARTIFICIAL GRAPHENE IN A TWO-DIMENSIONAL ELECTRON GAS", 《11TH INTERNATIONAL CONFERENCE ON OPTICS OF EXCITONS IN CONFINED SYSTEMS (OECS11)》 * |
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