CN108878279B - Defect removing layer forming method - Google Patents

Defect removing layer forming method Download PDF

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Publication number
CN108878279B
CN108878279B CN201810389620.7A CN201810389620A CN108878279B CN 108878279 B CN108878279 B CN 108878279B CN 201810389620 A CN201810389620 A CN 201810389620A CN 108878279 B CN108878279 B CN 108878279B
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wafer
defect
free layer
back surface
metal salt
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CN108878279A (en
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下房大悟
原田晴司
竹内宽树
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Disco Corp
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Disco Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02307—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a liquid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/26—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device including materials for absorbing or reacting with moisture or other undesired substances, e.g. getters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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  • Manufacturing & Machinery (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

Provided is a method for forming a defect-free layer, which can form a defect-free layer without reducing the flexural strength. A defect-free layer forming method forms a defect-free layer on a back surface of a wafer having devices formed on a front surface, wherein the defect-free layer forming method comprises the steps of: a coating step of coating a solution of a metal salt on the back surface of the wafer; and a diffusion step of heating the wafer after the coating step is performed, and diffusing the metal salt in the coated solution on the back surface side to form a defect-free layer.

Description

Defect removing layer forming method
Technical Field
The present invention relates to a method for forming a defect-removing layer, which forms a defect-removing layer having a function of trapping impurities on a wafer.
Background
In order to make a device chip assembled in an electronic apparatus or the like thinner and lighter, there is an increasing opportunity to make a wafer thinner before dividing the wafer into device chips by a grinding method or the like. For example, a tool (grinding tool) having abrasive grains dispersed in a bonding material is rotated and pushed against a surface to be processed of a wafer, whereby the wafer can be ground and thinned.
However, when a wafer is processed by the above grinding, fine damage, strain, and the like are generated on the surface to be processed. The damage, strain, and the like have a defect removing function of trapping impurities such as copper (Cu) which adversely affect the device chip. Therefore, the wafer is left with damage, strain, or the like, whereby the yield of device chips due to impurities can be kept low.
On the other hand, when damage, strain, or the like remains in the wafer, the flexural strength of the device chip tends to be low. Therefore, after grinding the wafer, damage, strain, and the like are removed by grinding, etching, or the like in many cases. In this case, a desired defect removing function is obtained by forming a desired minimum damage, strain, and the like again in the wafer (for example, refer to patent documents 1, 2, 3, and the like).
Patent document 1: japanese patent laid-open publication No. 2014-63786
Patent document 2: japanese patent application laid-open No. 2015-46550
Patent document 3: japanese patent laid-open publication 2016-182669
However, even in the above-described method in which the wafer is subjected to the removal of the damage, strain, and the like by polishing, etching, and the like, and then the wafer is subjected to the formation of the minimum damage, strain, and the like, the flexural strength of the device chip is slightly lowered.
Disclosure of Invention
The present invention has been made in view of the above-described problems, and an object thereof is to provide a method for forming a defect-free layer capable of forming a defect-free layer without lowering the flexural strength.
According to one embodiment of the present invention, there is provided a method for forming a defect-free layer, which forms a defect-free layer on a back surface of a wafer having devices formed on a front surface, wherein the defect-free layer forming method includes the steps of: a coating step of coating a solution of a metal salt on the back surface of the wafer; and a diffusion step of heating the wafer after the coating step is performed, and diffusing the metal salt in the applied solution on the back surface side to form a defect-removed layer.
In one embodiment of the present invention, in the diffusing step, the metal salt may be diffused by heating the wafer by irradiating the wafer with a laser beam having a wavelength that is absorptive to the wafer. In one embodiment of the present invention, the metal salt may contain a metal having a valence of 2, and the defect-removing layer may contain a metal having a valence of 1cm 2 Is 1X 10 13 More than one of the metal atoms. In one embodiment of the present invention, the metal salt may contain a metal having a valence of 3, and the defect-free layer may contain a metal having a valence of 1cm 2 Is 1X 10 12 More than one of the metal atoms.
In the method for forming a defect-free layer according to one embodiment of the present invention, a solution of a metal salt is applied to the back surface of a wafer, and then the metal salt is diffused on the back surface side of the wafer by heating to form the defect-free layer. Therefore, impurities adversely affecting the device are trapped in the defect-free layer by the action of the metal salt.
In this method for forming a defect-free layer, it is not necessary to form damage, strain, and the like having a defect-free function in a wafer as in the prior art. That is, the flexural strength of the wafer is not reduced by damage, strain, or the like. In this way, according to the method for forming a defect-free layer of one embodiment of the present invention, a defect-free layer that does not decrease the flexural strength can be formed.
Drawings
Fig. 1 (a) is a perspective view schematically showing a configuration example of a wafer used in the method for forming a defect-free layer according to the present embodiment, and fig. 1 (B) is a perspective view for explaining a protective member attaching step.
Fig. 2 (a) is a side view for explaining the grinding step, and fig. 2 (B) is a side view for explaining the grinding step.
Fig. 3 (a) and 3 (B) are side views for explaining the coating step.
Fig. 4 (a) is a side view for explaining the diffusion step, and fig. 4 (B) is a plan view for explaining the diffusion step.
Description of the reference numerals
11: a wafer; 11a: a front face; 11b: a back surface; 13: dividing the predetermined line (spacer); 15: a device; 21: a protection member; 21a: a front face; 21b: a back surface; 31: a solution; 33: a coating film; 35: removing defective layers; 41: a laser beam; 2: a grinding device; 4: a chuck table; 4a: a holding surface; 6: a grinding unit; 8: a main shaft; 10: a mounting base; 12: grinding the grinding wheel; 14: a grinding wheel base; 16: grinding tool; 22: a grinding device; 24: a chuck table; 24a: a holding surface; 26: a grinding unit; 28: a main shaft; 30: a mounting base; 32: a polishing pad; 42: a spin coater; 44: a rotary table; 44a: a holding surface; 46: a nozzle; 52: a laser irradiation device; 54: a chuck table; 54a: a holding surface; 56: and a laser irradiation unit.
Detailed Description
An embodiment of the present invention will be described with reference to the drawings. The defect-free layer forming method of the present embodiment includes a protective member attaching step (see fig. 1 (B)), a grinding step (see fig. 2 (a)), a polishing step (see fig. 2 (B)), a coating step (see fig. 3 (a) and fig. 3 (B)), and a diffusing step (see fig. 4 (a) and fig. 4 (B)).
In the protective member attaching step, the protective member is attached to the front side of the wafer provided with the plurality of devices. In the grinding step, the back surface of the wafer is ground. In the polishing step, the back surface of the wafer is polished. In the coating step, a solution of a metal salt is coated on the back side of the wafer. In the diffusion step, a metal salt is diffused on the back surface side of the wafer by heating to form a defect-free layer. Hereinafter, the method for forming a defect-free layer according to the present embodiment will be described in detail.
Fig. 1 (a) is a perspective view schematically showing a configuration example of a wafer 11 used in the method for forming a defect-free layer according to the present embodiment. As shown in fig. 1a, the wafer 11 is formed into a disk shape using a material such as silicon (Si). The front surface 11a side of the wafer 11 is divided into a plurality of regions by dividing lines (streets) 13 set in a lattice shape, and devices 15 such as ICs (Integrated Circuit: integrated circuits) are formed in each region.
In the present embodiment, the disk-shaped wafer 11 made of a material such as silicon is used, but the material, shape, structure, size, and the like of the wafer 11 are not limited. A wafer 11 made of other semiconductor, ceramic, resin, metal, or the like may also be used. Also, the kind, number, shape, configuration, size, arrangement, and the like of the devices 15 are not limited.
In the method for forming a defect-free layer according to the present embodiment, first, a protective member attaching step is performed to attach a protective member to the front surface 11a side of the wafer 11. Fig. 1 (B) is a perspective view for explaining the protective member attaching step. The protective member 21 is, for example, a circular film (tape) having a diameter equivalent to that of the wafer 11, and a paste layer (adhesive material layer) having adhesive force is provided on the front surface 21a side thereof.
Therefore, by bringing the front surface 21a side into close contact with the front surface 11a side of the wafer 11, the protective member 21 can be attached to the front surface 21a side of the wafer 11. By attaching such a protection member 21, it is possible to alleviate the impact applied to the wafer 11 in the grinding step or polishing step, and to protect the device 15 or the like provided on the front surface 11a side.
After the protective member attaching step, a grinding step is performed to grind the back surface 11b side of the wafer 11.
Fig. 2 (a) is a side view for explaining the grinding step. For example, the grinding step is performed using the grinding device 2 shown in fig. 2 (a).
The grinding device 2 has a chuck table 4 for sucking and holding the wafer 11. The chuck table 4 is coupled to a rotation driving source (not shown) such as a motor, and rotates about a rotation axis substantially parallel to the vertical direction. A moving mechanism (not shown) is provided below the chuck table 4, and the chuck table 4 is moved in the horizontal direction by the moving mechanism.
A part of the upper surface of the chuck table 4 serves as a holding surface 4a for sucking and holding the front surface 11a side (the protective member 21 side) of the wafer 11. The holding surface 4a is connected to a suction source (not shown) via a suction path (not shown) or the like formed inside the chuck table 4. Therefore, for example, the wafer 11 is sucked and held on the chuck table 4 by bringing the front surface 11a side of the wafer 11 into contact with the holding surface 4a to cause the negative pressure of the suction source to act.
A grinding unit 6 is disposed above the chuck table 4. The grinding unit 6 has a spindle housing (not shown) supported by a lifting mechanism (not shown). A spindle 8 is accommodated in the spindle case, and a disk-shaped mount 10 is fixed to a lower end portion of the spindle 8.
A grinding wheel 12 having substantially the same diameter as the mount 10 is mounted on the lower surface of the mount 10. The grinding wheel 12 has a wheel base 14 formed of stainless steel, aluminum, or the like. A plurality of grinding tools 16 for dispersing abrasive grains into a bonding material are arranged in a ring shape on the lower surface of the grinding wheel base 14.
The upper end side (base end side) of the spindle 8 is coupled to a rotary drive source (not shown) such as a motor, and the grinding wheel 12 rotates about a rotation axis substantially parallel to the vertical direction by a force generated by the rotary drive source. A nozzle (not shown) for supplying a grinding fluid such as pure water to the wafer 11 or the like is provided in or near the grinding unit 6.
In the grinding step, first, the protective member 21 attached to the front surface 11a side of the wafer 11 is brought into contact with the holding surface 4a of the chuck table 4, and then negative pressure of the suction source is applied. Thereby, the wafer 11 is sucked and held on the chuck table 4 with the back surface 11b exposed upward.
Next, the chuck table 4 is moved to below the grinding unit 6. Then, as shown in fig. 2 a, the chuck table 4 and the grinding wheel 12 are rotated, and the spindle housing (spindle 8, grinding wheel 12) is lowered while supplying the grinding fluid to the back surface 11b of the wafer 11 or the like.
The lowering speed (lowering amount) of the spindle case is adjusted in a range where the lower surface of the grinding wheel 16 is pushed against the back surface 11b side of the wafer 11. This makes it possible to grind the back surface 11b side and thin the wafer 11. For example, when the wafer 11 is thinned to a prescribed thickness (finished thickness), the grinding step ends.
In the present embodiment, the back surface 11b side of the wafer 11 is ground by using 1 set of grinding units 6 (grinding tools 16), but the wafer 11 may be ground by using two or more sets of grinding units (grinding tools). For example, rough grinding is performed using a grinding tool in which abrasive grains having a large diameter are dispersed, and finish grinding is performed using a grinding tool in which abrasive grains having a small diameter are dispersed, whereby the time required for grinding is not greatly increased, and the flatness of the back surface 11b can be improved.
After the grinding step, a grinding step is performed to grind the back surface 11b of the wafer 11. Fig. 2 (B) is a side view for explaining the grinding step. For example, the polishing step is performed using the polishing apparatus 22 shown in fig. 2 (B).
The polishing apparatus 22 has a chuck table 24 for sucking and holding the wafer 11. The chuck table 24 is coupled to a rotation driving source (not shown) such as a motor, and rotates about a rotation axis substantially parallel to the vertical direction. A moving mechanism (not shown) is provided below the chuck table 24, and the chuck table 24 is moved in the horizontal direction by the moving mechanism.
A part of the upper surface of the chuck table 24 serves as a holding surface 24a for sucking and holding the front surface 11a side (the protective member 21 side) of the wafer 11. The holding surface 24a is connected to a suction source (not shown) via a suction path (not shown) or the like formed inside the chuck table 24. Therefore, for example, the wafer 11 is sucked and held on the chuck table 24 by bringing the front surface 11a side of the wafer 11 into contact with the holding surface 24a to cause the negative pressure of the suction source to act.
A polishing unit 26 is disposed above the chuck table 24. The polishing unit 26 has a spindle case (not shown) supported by a lifting mechanism (not shown). A spindle 28 is accommodated in the spindle case, and a disk-shaped mount 30 is fixed to a lower end portion of the spindle 28. A polishing pad 32 having substantially the same diameter as the mount 30 is attached to the lower surface of the mount 30. The polishing pad 32 is formed of, for example, a nonwoven fabric, polyurethane foam, or the like.
The upper end side (base end side) of the spindle 28 is coupled to a rotation driving source (not shown) such as a motor, and the polishing pad 32 rotates about a rotation axis substantially parallel to the vertical direction by a force generated by the rotation driving source. A nozzle (not shown) for supplying a polishing liquid (slurry) in which abrasive grains are dispersed to the wafer 11 or the like is provided in or near the polishing unit 26, for example.
In the polishing step, first, the protective member 21 attached to the front surface 11a side of the wafer 11 is brought into contact with the holding surface 24a of the chuck table 24, and then negative pressure of the suction source is applied. Thus, the wafer 11 is sucked and held on the chuck table 24 with the back surface 11b exposed upward.
Next, the chuck table 24 is moved below the polishing unit 26. Then, as shown in fig. 2B, the chuck table 24 and the polishing pad 32 are rotated, and the spindle housing (spindle 28, polishing pad 32) is lowered while supplying the polishing liquid to the back surface 11B of the wafer 11 or the like. The lowering speed (lowering amount) of the spindle case is adjusted in a range where the lower surface of the polishing pad 32 is pushed against the back surface 11b side of the wafer 11.
This removes, for example, fine damage, strain, and the like formed on the rear surface 11b in the grinding step, and improves the flexural strength of the wafer 11. In this polishing step, the polishing pad 32 containing no abrasive grains and the polishing liquid containing abrasive grains are used, but the polishing pad having abrasive grains dispersed and fixed therein and the polishing liquid containing no abrasive grains may be used. In this polishing step, dry polishing without using a polishing liquid may be used. Instead of the grinding step, an etching step may be performed to remove fine damage, strain, and the like of the rear surface 11b by etching.
After the polishing step, a coating step is performed to coat the solution of the metal salt on the back surface 11b of the wafer 11. Fig. 3 (a) and 3 (B) are side views for explaining the coating step. For example, the coating step of the present embodiment is performed using a spin coater 42 shown in fig. 3 (a) or the like.
The spin coater 42 has, for example, a spin table 44 for sucking and holding the wafer 11. The rotary table 44 is coupled to a rotary drive source (not shown) such as a motor, and rotates about a rotation axis substantially parallel to the vertical direction. A part of the upper surface of the rotary table 44 serves as a holding surface 44a for sucking and holding the front surface 11a side (the protective member 21 side) of the wafer 11.
The holding surface 44a is connected to a suction source (not shown) via a suction path (not shown) or the like formed inside the rotary table 44. Therefore, for example, the wafer 11 is sucked and held on the rotary table 44 by bringing the front surface 11a side of the wafer 11 into contact with the holding surface 44a to cause the negative pressure of the suction source to act. A nozzle 46 is disposed above the rotary table 44, and the nozzle 46 is used for dropping the solution 31, and the solution 31 contains a metal salt as a raw material of the defect-free layer.
In the coating step, first, the protective member 21 attached to the front surface 11a side of the wafer 11 is brought into contact with the holding surface 44a of the rotary table 44, and then negative pressure of the suction source is applied. Thus, the wafer 11 is sucked and held on the rotary table 44 in a state where the back surface 11b is exposed upward.
Next, as shown in fig. 3 (a), the solution 31 is dropped from the nozzle 6, and the rotary table 44 is rotated. Thus, the solution 31 is applied to the entire rear surface 11B side of the wafer 11, and a film 33 formed of the solution 31 is formed as shown in fig. 3 (B).
As the metal salt in the solution 31 (the film 33), a metal salt capable of appropriately trapping impurities such as copper (Cu) which adversely affect the device 15 is used. Specifically, for example, a metal salt of a metal forming intermetallic bonds with copper (a metal forming an alloy with copper) including titanium (Ti), aluminum (Al), tin (Sn), nickel (Ni), iron (Fe), cobalt (Co), beryllium (Be), zinc (Zn), manganese (Mn), lead (Pb), and the like can Be used.
On the other hand, the kind of the solvent is not particularly limited, but it is required that at least the above metal salt is soluble. Specifically, for example, an aqueous solution of nitric acid, hydrochloric acid (aqueous solution of hydrogen chloride), sulfuric acid (aqueous solution), aqueous solution of acetic acid, aqueous solution of sodium hydroxide, aqueous solution of ammonia (aqueous solution of ammonia), or the like is used according to the kind of metal salt or the like.
In the case of using a metal salt containing a metal such as titanium, tin, nickel or the like having a valence of 2, for example, the concentration of the solution 31 or the like is preferably adjusted so as to contain 1×10 in the state of the coating film 33 after application 13 atoms/cm 2 (i.e., every 1 cm) 2 Is 1X 10 13 A number of) the above metal atoms. This allows impurities such as copper (Cu) to be properly trapped, thereby preventing adverse effects on the device 15. In addition, for example, the amount of the metal to be coated is managed based on the analysis result or calculation of TXRF (total reflection X-ray fluorescence analysis) or the like.
On the other hand, in the case of using a metal salt containing a metal such as aluminum of 3 valence, for example, the concentration of the solution 31 or the like is preferably adjusted so as to contain 1×10 in the state of the coated film 33 12 atoms/cm 2 (i.e., every 1 cm) 2 Is 1X 10 12 A number of) the above metal atoms. In this case, too, impurities such as copper (Cu) can be appropriately trapped, and adverse effects on the device 15 can be prevented.
After the coating step, a diffusion step is performed to diffuse the metal salt on the back surface 11b side of the wafer 11 by heating, thereby forming a defect-free layer. Fig. 4 (a) is a side view for explaining the diffusion step, and fig. 4 (B) is a plan view for explaining the diffusion step. For example, the diffusion step of the present embodiment is performed using the laser irradiation apparatus 52 shown in fig. 4 (a).
The laser irradiation device 52 includes, for example, a chuck table 54 for sucking and holding the wafer 11. The chuck table 54 is coupled to a rotation driving source (not shown) such as a motor, and rotates about a rotation axis substantially parallel to the vertical direction. A moving mechanism (not shown) is provided below the chuck table 54, and the chuck table 54 is moved in the horizontal direction by the moving mechanism.
A part of the upper surface of the chuck table 54 serves as a holding surface 54a for sucking and holding the front surface 11a side (the protective member 21 side) of the wafer 11. The holding surface 54a is connected to a suction source (not shown) via a suction path (not shown) or the like formed inside the chuck table 54. Therefore, for example, the wafer 11 is sucked and held on the chuck table 54 by bringing the front surface 11a side of the wafer 11 into contact with the holding surface 54a to cause the negative pressure of the suction source to act.
A laser irradiation unit 56 is disposed above the chuck table 54. The laser irradiation unit 56 irradiates and condenses the laser beam 41 pulsed by a laser oscillator (not shown) at a predetermined position. The laser oscillator is configured to be capable of pulsing a laser beam 41 having a wavelength absorbed by the wafer 11 (a wavelength that is absorbed by the wafer 11 and a wavelength that is easily absorbed), for example.
In the diffusion step, first, the protective member 21 attached to the front surface 11a side of the wafer 11 is brought into contact with the holding surface 54a of the chuck table 54, and then negative pressure of the suction source is applied. Thus, the wafer 11 is sucked and held on the chuck table 54 with the back surface 11b exposed upward.
Next, the chuck table 54 is moved to below the laser irradiation unit 56. Then, as shown in fig. 4 (a), the chuck table 54 and the laser irradiation unit 56 are relatively moved while the laser beam 41 is irradiated from the laser irradiation unit 56 toward the back surface 11b of the wafer 11 below. In the present embodiment, the chuck table 54 is rotated and moved (reciprocated) in the horizontal direction so that the trajectory 43 of the laser beam 41 is drawn in a spiral shape as shown in fig. 4 (B).
The irradiation conditions of the laser beam 41 are, for example, as follows.
Wavelength of laser beam: 257nm
Output of laser beam: 1W
Repetition frequency: 200kHz
Diameter of the irradiation spot: 50 μm
Illumination interval (distance between centers of illumination spots): 20 μm
Thus, the metal salt in the film 33 can be diffused on the back surface 11b side of the wafer 11 by heating the back surface 11b of the wafer 11 by the laser beam 41. When the entire rear surface 11B of the wafer 11 is irradiated with the laser beam 41 as shown in fig. 4 (B) to form the defect-removed layer 35 formed by diffusing the metal salt on the rear surface 11B, the diffusion step is ended.
As described above, in the method of forming a defect-free layer according to the present embodiment, the solution 31 of the metal salt is applied to the back surface 11b of the wafer 11, and then the metal salt is diffused on the back surface 11b side of the wafer 11 by heating, thereby forming the defect-free layer 35. Therefore, impurities adversely affecting the device 15 are trapped in the defect-free layer 35 by the action of the metal salt.
In this method for forming a defect-free layer, it is not necessary to form damage, strain, and the like having a defect-free function on the wafer 11 as in the conventional method. That is, the flexural strength of the wafer 11 is not reduced by damage, strain, or the like. As described above, according to the method for forming a defect-free layer of the present embodiment, the defect-free layer 35 can be formed without lowering the flexural strength.
In the method for forming a defect-free layer according to the present embodiment, since the solution 31 of the metal salt is applied and heated, it is not necessary to prepare a special apparatus for forming the defect-free layer 35. Accordingly, the defect-removed layer 35 can be formed at low cost. In the present embodiment, since the metal salt is diffused by heating to form the defect-removed layer 35, the mechanical strength of the defect-removed layer can be improved as compared with, for example, a case where the defect-removed layer is formed by applying and drying the solution 31 of the metal salt.
Next, experiments performed to confirm the effect of the above-described defect-free layer 35 will be described. In this experiment, first, a solution of a metal salt was coated on one surface of a silicon wafer having a diameter of 8 inches and dried, thereby forming a defect-free layer.
As a solution of the metal salt, use is made ofAny of an aluminum standard solution (manufactured by Wako pure chemical industries, ltd.), a nickel standard solution (Ni 100) (manufactured by Wako pure chemical industries, ltd.), a titanium standard solution (manufactured by Wako pure chemical industries, ltd.), and a tin standard solution (manufactured by Kanto chemical industries, ltd.). And the amount of metal atoms in the defect-removed layer is adjusted to be 1×10 11 atoms/cm 2 、1×10 12 atoms/cm 2 、1×10 13 atoms/cm 2 Any one of the following. Here, the amount of metal atoms in the defect-removed layer is managed according to the analysis result and calculation of TXRF (total reflection X-ray fluorescence analysis). For the analysis, a total reflection X-ray fluorescence analyzer manufactured by TREX corporation was used.
Then, an aqueous solution of copper sulfate was applied to the defect-free layer side (one surface side) of the silicon wafer to forcibly contaminate the wafer. Here, an aqueous solution of copper sulfate was applied to one surface side of the silicon wafer so that the copper was 1X 10 13 atoms/cm 2 (i.e., every 1 cm) 2 Is 1X 10 13 And (c) a).
And, the silicon wafer was heat-treated at 350 ℃ for 3 hours after drying the aqueous solution of copper sulfate so that copper was easily diffused in the silicon wafer. Then, the amount of copper reaching the other surface of the cooled silicon wafer was measured by TXRF (total reflection X-ray fluorescence analysis). In addition, a total reflection X-ray fluorescence analyzer manufactured by TREX corporation was also used for the measurement.
Measurements were made in each of a plurality of regions dividing the other face of the wafer into 15mm×15 mm. After each region is measured, an average value of the entire silicon wafer is calculated from the measured value of each region. The results of the experiment are shown in table 1.
[ Table 1 ]
Al Ni Ti Sn
1×10 11 atoms/cm 2 × × × ×
1×10 12 atoms/cm 2 〇 × × ×
1×10 13 atoms/cm 2 〇 〇 〇 〇
In table 1, the results of the case where the aluminum standard solution was used are shown in Al columns, the results of the case where the nickel standard solution was used are shown in Ni columns, the results of the case where the titanium standard solution was used are shown in Ti columns, and the results of the case where the tin standard solution was used are shown in Sn columns. In table 1, the average value of the entire silicon wafer and the detection limit of the device were 0.5x10 10 atoms/cm 2 By comparison, the case where copper exceeding the detection limit is detected is indicated by "X", and no copper exceeding the detection limit is detectedThe case of copper is denoted by "good".
As shown in Table 1, when an aluminum standard solution in which 3-valent aluminum is dissolved is used, the amount of aluminum in the defect-free layer is set to 1X 10 11 atoms/cm 2 Copper was detected when the amount of aluminum in the deflectable layer was made 1X 10 12 atoms/cm 2 No copper was detected. That is, it is known that by making the amount of aluminum in the defect-removed layer 1X 10 12 atoms/cm 2 As described above, contamination by copper can be prevented on one surface side.
When any of a nickel standard solution in which nickel of 2 valence is dissolved, a tin standard solution in which tin of 2 valence is dissolved, and a titanium standard solution in which titanium of 2 valence is dissolved is used, the amount of each metal in the defect-free layer is set to 1×10 12 atoms/cm 2 Copper was detected when the amount of each metal in the defect-free layer was 1X 10 13 atoms/cm 2 No copper was detected. That is, it is known that by making the amount of each metal in the defect-removed layer 1×10 13 atoms/cm 2 As described above, contamination by copper can be prevented on one surface side.
In the present experiment, the defect-removing layer was formed by a method of applying a solution of a metal salt and drying the same, but it is assumed that the same defect-removing function can be obtained even when the defect-removing layer is formed by a method of applying a solution of a metal salt and heating the same. In addition, in the method of heating, the mechanical strength of the defect-removed layer can be improved as compared with the method of drying.
The present invention is not limited to the above embodiments and the like, and various modifications can be made. For example, in the above embodiment, the solution of the metal salt is applied by spin coating using a spin coater, but there is no particular limitation in the application method. For example, the metal salt solution may be applied by potting, ink-jet, or the like.
In the above embodiment, the laser beam 41 is irradiated so that the track 43 is drawn in a spiral shape, but the laser beam may be irradiated so that a linear track is drawn. The heating method of the wafer 11 is also not particularly limited. For example, instead of irradiation with the laser beam 41, an oven, a heater, a lamp, a heating plate, or the like may be used to heat the wafer 11. In these cases, the wafer 11 is preferably heated at 300 to 900 ℃.
In the above embodiment, the coating step and the diffusing step are performed after the protective member attaching step, the grinding step, and the polishing step, but the protective member attaching step, the grinding step, and the polishing step may be omitted.
The structure, method, and the like of the above-described embodiment can be modified and implemented as appropriate without departing from the scope of the object of the present invention.

Claims (5)

1. A method of forming a defect-free layer on a back surface of a wafer having devices formed on a front surface, the method comprising the steps of:
a grinding step of grinding the back surface of the wafer;
a polishing step of polishing the back surface of the wafer after the polishing step is performed, thereby removing damage and strain having a defect removing function, which are formed on the back surface in the polishing step;
a coating step of coating a solution of a metal salt on the back surface of the wafer from which the damage and strain having a defect removing function have been removed after the polishing step is performed; and
and a diffusion step of heating the wafer after the coating step is performed, and diffusing the metal salt in the applied solution on the back surface side to form a defect-free layer.
2. A method of forming a defect-free layer as claimed in claim 1, wherein,
the metal salt comprises a metal that forms an alloy with copper.
3. The method for forming a defect-free layer according to claim 1 or 2, wherein,
in the diffusing step, the wafer is heated by irradiating a laser beam having a wavelength absorbing to the wafer, so that the metal salt is diffused.
4. The method for forming a defect-free layer according to claim 1 or 2, wherein,
the metal salt contains a metal having a valence of 2, and the defect-removing layer contains a metal having a valence of 2 per 1cm 2 Is 1X 10 13 More than one atom of the metal.
5. The method for forming a defect-free layer according to claim 1 or 2, wherein,
the metal salt contains 3-valent metal, and the defect-removing layer contains 1cm of metal 2 Is 1X 10 12 More than one atom of the metal.
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