CN108875182A - A kind of saturation capacitance model modelling approach for simulating piezoelectric ceramic actuator Hysteresis Nonlinear - Google Patents

A kind of saturation capacitance model modelling approach for simulating piezoelectric ceramic actuator Hysteresis Nonlinear Download PDF

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CN108875182A
CN108875182A CN201810582221.2A CN201810582221A CN108875182A CN 108875182 A CN108875182 A CN 108875182A CN 201810582221 A CN201810582221 A CN 201810582221A CN 108875182 A CN108875182 A CN 108875182A
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capacitor
voltage
charge
limited
capacitance
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CN108875182B (en
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刘延芳
齐乃明
霍明英
杜德嵩
徐嵩
孙康
唐梦莹
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Harbin Institute of Technology
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Harbin Institute of Technology
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Abstract

The purpose of the present invention is to solve the big problems of the error of existing modeling piezoelectric ceramic actuator Hysteresis Nonlinear, belong to the Hysteresis Nonlinear simulation field of piezoelectric ceramic actuator.The present invention:Using the domain Weiss with negative capacitance switching of the parallel network of charge limited capacitor and ideal capacitor characterization piezoelectric ceramics;Using the domain Weiss with the switching of positive capacitor of the series network of voltage limited capacitor and ideal capacitor characterization piezoelectric ceramics;The Hysteresis Nonlinear that piezoelectric ceramic actuator is simulated by the series-parallel network of charge limited capacitor, voltage limited capacitor and ideal capacitor, establishes saturation capacitance model;Mode input:Pass through the quantity of electric charge of series-parallel network;Model output:The voltage value at series-parallel network both ends;The Hysteresis Nonlinear of hysteresis loop simulation piezoelectric ceramic actuator between input charge amount and output voltage.The root-mean-square error for the hysteresis loop that hysteresis loop and the piezoelectric ceramic actuator test that the present invention obtains obtain is 0.58%.

Description

A kind of saturation capacitance model modeling for simulating piezoelectric ceramic actuator Hysteresis Nonlinear Method
Technical field
The present invention relates to a kind of saturation capacitance model, in particular to a kind of simulation piezoelectric ceramic actuator Hysteresis Nonlinear Saturation capacitance model modelling approach.
Background technique
Piezoelectric ceramic actuator has the advantages such as response fast, High power output, high resolution, rigidity height, is widely used in essence The fields such as close driving, high-frequency drive.But the energy conversion of piezoelectric material therein complexity causes the piezoelectric ceramic actuator to be in Reveal a variety of non-linear.Wherein, Hysteresis Nonlinear show as output not only with currently input it is related, but also with the past input most It is worth related, i.e., local memory effect greatly.When being embodied in by periodically input, output-input curve is rendered as hysteresis loop. Tracking error maximum caused by the Hysteresis Nonlinear of piezoelectric ceramics can achieve the 15% of total kilometres, or even when influence closed-loop control The stability of system seriously constrains the performance of piezoelectric ceramics performance.
In order to describe and compensate Hysteresis Nonlinear, scholars successively propose Preisach model, Prandt- A variety of models such as Ishlinskii model and Bouc-Wen model.However these models are all the mathematical descriptions to hysteresis phenomenon, It can not give an explaination from physical principle.Maxwell model is a kind of Hysteresis Model based on physical principle, but the mould What type provided is the explanation of mechanics field, so the error of existing modeling piezoelectric ceramic actuator Hysteresis Nonlinear is all very Greatly.
Summary of the invention
Big the purpose of the present invention is to solve the error of existing modeling piezoelectric ceramic actuator Hysteresis Nonlinear Problem, the present invention provide a kind of saturation capacitance model modelling approach for simulating piezoelectric ceramic actuator Hysteresis Nonlinear.
The saturation capacitance model modelling approach of simulation piezoelectric ceramic actuator Hysteresis Nonlinear of the invention, the method For:
There is negative capacitance switching using the parallel network of charge limited capacitor and ideal capacitor characterization piezoelectric ceramics The domain Weiss;
There is the switching of positive capacitor using the series network of voltage limited capacitor and ideal capacitor characterization piezoelectric ceramics The domain Weiss;
Piezoelectric ceramics is simulated by the series-parallel network of charge limited capacitor, voltage limited capacitor and ideal capacitor The Hysteresis Nonlinear of actuator establishes saturation capacitance model;
The input of the saturation capacitance model is the quantity of electric charge by the series-parallel network, the excitation of corresponding piezoelectric ceramics Voltage;The output of the saturation capacitance model is the voltage value at the series-parallel network both ends, the deforming position of corresponding piezoelectric ceramics It moves;
The hysteresis loop that the quantity of electric charge of the saturation capacitance model inputs between voltage output simulates piezoelectric ceramic actuator Hysteresis Nonlinear.
Preferably, the method also includes:
It is equivalent to have the voltage of negative capacitance to be limited capacitor the parallel network of charge limited capacitor and ideal capacitor The series network of device and ideal capacitor, i.e.,:By the series-parallel network be equivalent to capacitor codomain be real number field voltage by It rations the power supply the series network of container, the series network is as saturation capacitance model.
Preferably, the governing equation of voltage limited capacitor is:
Wherein, S indicates that the elastance of voltage limited capacitor, u indicate voltage limited capacitor both end voltage, uSIt indicates The saturation capacitance value of voltage limited capacitor;Q indicates to flow through the charge of voltage limited capacitor;
The governing equation of charge limited capacitor is:
Wherein, CCIndicate the capacitance of charge limited capacitor, q indicates the surface charge of charge limited capacitor, QSIt indicates The charge saturation value of charge limited capacitor.
Preferably,
It is equivalent to have the voltage of negative capacitance to be limited capacitor the parallel network of charge limited capacitor and ideal capacitor The series network of device and ideal capacitor, equivalent relation are:
Wherein, CI、CCAnd CVRespectively indicate the capacitance of ideal capacitor, the capacitance and voltage of charge limited capacitor The capacitance of limited capacitor;
Preferably, the saturation capacitance model is that n voltage limited capacitor is connected with an ideal capacitance, middle part Component voltage limited capacitor uses positive capacitor, and portion voltage limited capacitor uses negative capacitance;
The governing equation of the saturation capacitance model is:
uiIndicate the both end voltage of voltage limited capacitor i, qiIndicate the surface charge of voltage limited capacitor i,
SiIndicate that the elastance of voltage limited capacitor i, Q indicate the quantity of electric charge of mode input, QS,iIndicate charge limited The charge saturation value of capacitor i, uPIndicate the voltage value of model output.
Above-mentioned technical characteristic may be combined in various suitable ways or be substituted by equivalent technical characteristic, as long as can reach To the purpose of the present invention.
The beneficial effects of the present invention are the present invention proposes after the characteristics of sufficiently analyzing the domain Weiss inside piezoelectric ceramics The saturation capacitance model of Hysteresis Nonlinear, gives the complete explanation of electricity field, is of great significance.Experiment proves that The hysteresis loop that model obtains through the invention and the root-mean-square error of hysteresis loop that piezoelectric ceramic actuator test obtains are 0.58%, hence it is evident that be better than existing model.
Detailed description of the invention
Fig. 1 is the series network schematic diagram that voltage is limited capacitor and ideal capacitance;
Fig. 2 is the voltage-charge equivalent relation schematic diagram in the domain Weiss of series network and the switching of positive capacitor;
Fig. 3 is the parallel network of charge limited capacitor and ideal capacitance;
Fig. 4 is the voltage-charge equivalent relation schematic diagram in the domain Weiss of parallel network and negative capacitance switching;
Fig. 5 is that the voltage that capacitor value is real number field is limited the series network schematic diagram of capacitor;
Fig. 6 is the retardant curve that test obtains;
Fig. 7 is the retardant curve that model of the invention obtains.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, those of ordinary skill in the art without creative labor it is obtained it is all its His embodiment, shall fall within the protection scope of the present invention.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase Mutually combination.
The present invention will be further explained below with reference to the attached drawings and specific examples, but not as the limitation of the invention.
The modeling method of the saturation capacitance model of piezoelectric ceramic actuator Hysteresis Nonlinear is simulated described in present embodiment For:
There is negative capacitance switching using the parallel network of charge limited capacitor and ideal capacitor characterization piezoelectric ceramics The domain Weiss;Using the series network of voltage limited capacitor and ideal capacitor characterization piezoelectric ceramics there is positive capacitor to cut The domain Weiss changed;
Piezoelectric ceramics is simulated by the series-parallel network of charge limited capacitor, voltage limited capacitor and ideal capacitor The Hysteresis Nonlinear of actuator establishes saturation capacitance model;
The input of the saturation capacitance model is the quantity of electric charge by the series-parallel network, the excitation of corresponding piezoelectric ceramics Voltage;The output of the saturation capacitance model is the voltage value at the series-parallel network both ends, the deforming position of corresponding piezoelectric ceramics It moves;
The hysteresis loop that the quantity of electric charge of the saturation capacitance model inputs between voltage output simulates piezoelectric ceramic actuator Hysteresis Nonlinear.
There is negative capacitance switching using the parallel network of charge limited capacitor and ideal capacitor characterization piezoelectric ceramics The domain Weiss;
The series network of voltage limited capacitor and ideal capacitor is as shown in Figure 1, what series network and positive capacitor switched The voltage in the domain Weiss-charge equivalent relation is as shown in Figure 2.Shown on the left of Fig. 2 equation, the domain Weiss of positive capacitor switching is pressure The capacitance with voltage showed in electroceramics when applying voltage is switched to the Weiss of more large capacitance when increasing to certain value Domain.Shown on the right side of Fig. 2 equation, voltage limited capacitor is that voltage has saturation value uSCapacitor, both end voltage u be less than saturation Value uSWhen, voltage limited capacitor has the property as ideal capacitance --- the rate of change of both end voltage u and surface electricity The rate of change of lotus q is directly proportional, i.e.,Both end voltage u reaches saturation value uSWhen, voltage limited capacitor behaves like reason Thinking conductor --- both end voltage u is remained unchanged, and the charge Q flowed through arbitrarily increases (both end voltage reaches positive saturation value) or reduces (both end voltage reaches negative saturation value).Therefore, the governing equation of voltage limited capacitor is:
Wherein, S indicates the elastance of voltage limited capacitor;
Present embodiment is had using the series network of voltage limited capacitor and ideal capacitor characterization piezoelectric ceramics The domain Weiss of positive capacitor switching.
The parallel network of charge limited capacitor and ideal capacitor is as shown in figure 3, what parallel network and negative capacitance switched The voltage in the domain Weiss-charge equivalent relation is as shown in Figure 4.Shown on the left of Fig. 4 equation, the domain Weiss of negative capacitance switching is pressure The capacitor showed in electroceramics when applying voltage is switched to the Weiss of a smaller value with capacitor when increasing to certain value Domain.Shown on the right side of Fig. 4, charge limited capacitor is that charge has saturation value QSCapacitor, surface charge q be less than saturated charge QSWhen, charge limited capacitor has the property as ideal capacitor --- the change rate and surface charge q of both end voltage u Change rate it is directly proportional, i.e.,Surface charge q reaches saturation value QSWhen, charge limited capacitor behaves like desired insulation Body --- surface charge q and input charge Q are remained unchanged, both end voltage u arbitrarily increase (surface charge reaches positive saturation value) or Reduce (surface charge reaches negative saturation value).Therefore, the governing equation of charge limited capacitor is:
Wherein, CCIndicate the capacitance of charge limited capacitor.
In preferred embodiment, the parallel network of charge limited capacitor and ideal capacitor is equivalent to have negative capacitance The series network of voltage limited capacitor and ideal capacitor, i.e.,:It is real that the series-parallel network, which is equivalent to capacitor codomain, The series network of the voltage limited capacitor of number field, the series network is as saturation capacitance model.
The sluggishness of piezoelectric ceramics is characterized as charge limited capacitor, voltage limited capacitor and ideal in present embodiment The series-parallel network of capacitor.According to the capacitor phase of series network ideal capacitor equal and therein in parallel network capacitor Deng available:
Wherein, CI、CCAnd CVRespectively indicate the capacitance of ideal capacitor, the capacitance and voltage of charge limited capacitor The capacitance of limited capacitor;
Due to having been generally acknowledged that capacitor is positive value, i.e. CI>0、CC>0, therefore, CVFor negative value, i.e., equivalent voltage is limited capacitor Device has negative capacitance.
The series-parallel network is equivalent to the voltage limited capacitor that capacitor codomain is real number field by present embodiment Series network, the series network as saturation capacitance model, specially as shown in figure 5, saturation capacitance model be n voltage by Container of rationing the power supply is connected with an ideal capacitance, and part of voltage limited capacitor uses positive capacitor, and portion voltage is limited capacitor Device uses negative capacitance;The voltage limited capacitor of the negative capacitance is charge limited capacitor equivalent.
The governing equation of the saturation capacitance model is:
uiIndicate the both end voltage of voltage limited capacitor i, qiIndicate the surface charge of voltage limited capacitor i,
SiIndicate that the elastance of voltage limited capacitor i, Q indicate the quantity of electric charge of mode input, QS,iIndicate charge limited The charge saturation value of capacitor i, uPIndicate the voltage value of model output;
The saturation capacitance model of present embodiment is in application:
1) the quantity n of determination unit first, i.e.,:The quantity of voltage limited capacitor recognizes the parameter S of modeliAnd QS,i
2) each cell surface charge q is calculated according to the charge Q of applicationi, and determine if to be saturated;
If 3) be saturated, the q is updatediQ is updated by calculated result if unsaturated for saturated chargei
4) its both end voltage u is calculated according to the surface charge of each uniti
5) voltage for being superimposed all units is the output voltage u of modelP
When the application model realization models piezoelectric ceramic actuator Hysteresis Nonlinear, the application charge Q of model is corresponding The input voltage a of piezoelectric ceramics, the output voltage of model correspond to the output displacement y of piezoelectric ceramics.
Piezoelectric ceramic actuator P- using the model in present embodiment, first to Physik Instrumente company 753.1 input voltages and output displacement are normalized;Using 5 units, saturated charge is determined as uniformly distributed, i.e. QS, i= 0.2i;The elastance that identification obtains each unit is S1=-0.1484, S2=-0.1056, S3=-0.0816, S4=- 0.0714, S5=1.1628;What is obtained is as shown in Figure 6 and Figure 7 to the fitting result of piezoelectric ceramic actuator Hysteresis Nonlinear, Square error is 0.58%.
Although describing the present invention herein with reference to specific embodiment, it should be understood that, these realities Apply the example that example is only principles and applications.It should therefore be understood that can be carried out to exemplary embodiment Many modifications, and can be designed that other arrangements, without departing from spirit of the invention as defined in the appended claims And range.It should be understood that different appurtenances can be combined by being different from mode described in original claim Benefit requires and feature described herein.It will also be appreciated that the feature in conjunction with described in separate embodiments can be used In other described embodiments.

Claims (5)

1. a kind of saturation capacitance model modelling approach for simulating piezoelectric ceramic actuator Hysteresis Nonlinear, which is characterized in that described Method is:
Using the parallel network of charge limited capacitor and ideal capacitor characterization piezoelectric ceramics there is negative capacitance to switch The domain Weiss;
Using the series network of voltage limited capacitor and ideal capacitor characterization piezoelectric ceramics there is positive capacitor to switch The domain Weiss;
Piezoelectric ceramics actuation is simulated by the series-parallel network of charge limited capacitor, voltage limited capacitor and ideal capacitor The Hysteresis Nonlinear of device establishes saturation capacitance model;
The input of the saturation capacitance model is the quantity of electric charge by the series-parallel network, the excitation electricity of corresponding piezoelectric ceramics Pressure;The output of the saturation capacitance model is the voltage value at the series-parallel network both ends, the deformation displacement of corresponding piezoelectric ceramics;
The quantity of electric charge of the saturation capacitance model inputs the slow of the hysteresis loop simulation piezoelectric ceramic actuator between voltage output It is stagnant non-linear.
2. the saturation capacitance model modelling approach of simulation piezoelectric ceramic actuator Hysteresis Nonlinear according to claim 1, It is characterized in that, the method also includes:
By the parallel network of charge limited capacitor and ideal capacitor be equivalent to have the voltage limited capacitor of negative capacitance with The series network of ideal capacitor, i.e.,:The series-parallel network is equivalent to the voltage that capacitor codomain is real number field to be rationed the power supply The series network of container, the series network is as saturation capacitance model.
3. the saturation capacitance model modeling side of simulation piezoelectric ceramic actuator Hysteresis Nonlinear according to claim 1 or 2 Method, which is characterized in that the governing equation of voltage limited capacitor is:
Wherein, S indicates that the elastance of voltage limited capacitor, u indicate voltage limited capacitor both end voltage, uSIndicate voltage The saturation capacitance value of limited capacitor;Q indicates to flow through the charge of voltage limited capacitor;
The governing equation of charge limited capacitor is:
Wherein, CCIndicate the capacitance of charge limited capacitor, q indicates the surface charge of charge limited capacitor, QSIndicate charge The charge saturation value of limited capacitor.
4. the saturation capacitance model modelling approach of simulation piezoelectric ceramic actuator Hysteresis Nonlinear according to claim 1, It is characterized in that,
By the parallel network of charge limited capacitor and ideal capacitor be equivalent to have the voltage limited capacitor of negative capacitance with The series network of ideal capacitor, equivalent relation are:
Wherein, CI、CCAnd CVIt is limited to respectively indicate the capacitance of ideal capacitor, the capacitance of charge limited capacitor and voltage The capacitance of capacitor;
5. the saturation capacitance model modelling approach of simulation piezoelectric ceramic actuator Hysteresis Nonlinear according to claim 4, It is characterized in that, the saturation capacitance model is that n voltage limited capacitor is connected with an ideal capacitance, part of voltage Limited capacitor uses positive capacitor, and portion voltage limited capacitor uses negative capacitance;
The governing equation of the saturation capacitance model is:
uiIndicate the both end voltage of voltage limited capacitor i, qiIndicate the surface charge of voltage limited capacitor i,
SiIndicate that the elastance of voltage limited capacitor i, Q indicate the quantity of electric charge of mode input, QS,iIndicate charge limited capacitor The charge saturation value of device i, uPIndicate the voltage value of model output.
CN201810582221.2A 2018-06-07 2018-06-07 Saturated capacitance model modeling method for simulating piezoelectric ceramic actuator hysteresis nonlinearity Active CN108875182B (en)

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