CN108873523B - Array substrate, liquid crystal display panel and display device - Google Patents
Array substrate, liquid crystal display panel and display device Download PDFInfo
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- CN108873523B CN108873523B CN201810714042.XA CN201810714042A CN108873523B CN 108873523 B CN108873523 B CN 108873523B CN 201810714042 A CN201810714042 A CN 201810714042A CN 108873523 B CN108873523 B CN 108873523B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
Abstract
The invention discloses an array substrate, a liquid crystal display panel and a display device, wherein the array substrate comprises: the scanning line array comprises a substrate base plate, a data line and a scanning line, wherein the data line and the scanning line are arranged on the substrate base plate; a plurality of pixel regions, each pixel region including a first sub-pixel region and a second sub-pixel region; the first sub-pixel region comprises a first storage capacitor sub-region, and the second sub-pixel region comprises a second storage capacitor sub-region; the first storage capacitor sub-region and the second storage capacitor sub-region are arranged along the extending direction of the data line, the scanning line used for driving the first pixel electrode and the second pixel electrode is positioned between the first storage capacitor sub-region and the second storage capacitor sub-region, and the light transmission region does not occupy the region where the first storage capacitor and the second storage capacitor are positioned in a mode of arranging the light transmission region between the first storage capacitor sub-region and the second storage capacitor sub-region, so that the compensation for the brightness of the liquid crystal display panel is realized under the condition that the storage capacitance value is not influenced.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a liquid crystal display panel and a display device.
Background
The liquid crystal display panel in the prior art can be divided into a transmission type, a reflection type and a semi-reflection and semi-transmission type according to the form of a provided light source, wherein the reflection type does not need to be provided with a backlight source, the semi-reflection and semi-transmission type only needs to be provided with the backlight source in a transmission area, and the power consumption of the liquid crystal display panel can be greatly reduced by reducing the setting of the backlight source, so that the reflection type and the semi-reflection and semi-transmission type liquid crystal display panel are more and more concerned by people.
However, the area ratio of the reflective region to the transmissive region in the transflective lcd panel is usually 40% to 60%, and the reflective display effect is inferior to that of the reflective lcd panel in the reflective display mode.
In the existing liquid crystal display panel, when the external light is insufficient, the display brightness of the reflective liquid crystal display panel is insufficient, which affects the display effect. In order to alleviate the above problem, a transmissive region is disposed in the middle of the pixel region, or transmissive regions are disposed at two boundaries of the pixel sub-region in the extending direction of the gate line, and the luminance of the liquid crystal display panel is compensated by the transmissive region. However, the transmissive region occupies the area of the storage capacitor, so that the area of each electrode of the storage capacitor is reduced, and the value of the storage capacitor is greatly affected, thereby affecting the display effect.
Therefore, it is an urgent need to solve the problem of the art how to compensate the brightness of the lcd panel without affecting the storage capacitance.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a liquid crystal display panel and a display device, which are used for solving the technical problem that storage capacitance is influenced by setting a transmission region to compensate the brightness of the liquid crystal display panel in the prior art.
An embodiment of the present invention provides an array substrate, including: the scanning line array comprises a substrate base plate, a data line and a scanning line, wherein the data line and the scanning line are arranged on the substrate base plate; the pixel structure comprises a plurality of pixel areas arranged in an array mode, wherein each pixel area comprises a first sub-pixel area provided with a first pixel electrode and a second sub-pixel area provided with a second pixel electrode;
the first sub-pixel region comprises a first storage capacitor sub-region, and the second sub-pixel region comprises a second storage capacitor sub-region; the first storage capacitor sub-region and the second storage capacitor sub-region are arranged along the extending direction of the data line, and the scanning line for driving the first pixel electrode and the second pixel electrode is positioned between the first storage capacitor sub-region and the second storage capacitor sub-region, wherein the first storage capacitor sub-region is provided with a first storage capacitor, and the second storage capacitor sub-region is provided with a second storage capacitor;
and a light-transmissive region between the first and second storage capacitor sub-regions.
On the other hand, the embodiment of the invention also provides a liquid crystal display panel, which comprises the array substrate, an opposite substrate and a liquid crystal layer positioned between the array substrate and the opposite substrate, wherein the array substrate and the opposite substrate are provided by the embodiment of the invention;
the opposite substrate comprises a color resistance area, and the orthographic projection of the color resistance area on the substrate at least covers the orthographic projection of the light transmission area on the substrate.
On the other hand, the embodiment of the invention also provides a display device, which comprises the liquid crystal display panel provided by the embodiment of the invention.
The invention has the following beneficial effects:
the embodiment of the invention provides an array substrate, a liquid crystal display panel and a display device, wherein the array substrate comprises: the scanning line array comprises a substrate base plate, a data line and a scanning line, wherein the data line and the scanning line are arranged on the substrate base plate; the pixel structure comprises a plurality of pixel areas arranged in an array mode, wherein each pixel area comprises a first sub-pixel area provided with a first pixel electrode and a second sub-pixel area provided with a second pixel electrode; the first sub-pixel region comprises a first storage capacitor sub-region, and the second sub-pixel region comprises a second storage capacitor sub-region; the first storage capacitor sub-region and the second storage capacitor sub-region are arranged along the extending direction of the data line, and the scanning line for driving the first pixel electrode and the second pixel electrode is positioned between the first storage capacitor sub-region and the second storage capacitor sub-region, wherein the first storage capacitor sub-region is provided with a first storage capacitor, and the second storage capacitor sub-region is provided with a second storage capacitor; through setting up the light transmission area the first storage capacitor subregion with the mode between the second storage capacitor subregion makes this light transmission area not occupy the region at first storage capacitor and second storage capacitor place, consequently the value of first storage capacitor and second storage capacitor does not receive the influence to realize making the compensation for liquid crystal display panel's luminance under the not influenced circumstances of storage capacitance value of assurance, with the display effect who improves liquid crystal display panel.
Drawings
Fig. 1 is a schematic plan view illustrating an array substrate of a related art lcd panel;
FIG. 2 is a cross-sectional view of the array substrate taken along the direction A1-A2 in FIG. 1;
FIG. 3 is a schematic plan view of another array substrate in a related art LCD panel;
FIG. 4 is a cross-sectional view of the array substrate taken along the direction B1-B2 in FIG. 3;
fig. 5 is a schematic plan view illustrating an array substrate of an lcd panel according to an embodiment of the present invention;
FIG. 6 is a cross-sectional view of an array substrate taken along the direction D1-D2 in FIG. 5;
fig. 7 is a schematic plan view of another array substrate in an lcd panel according to an embodiment of the invention;
FIG. 8 is a cross-sectional view of the array substrate taken along the direction D1-D2 in FIG. 7;
fig. 9 is a schematic plan view illustrating another array substrate in an lcd panel according to an embodiment of the invention;
FIG. 10 is a cross-sectional view of the array substrate taken along the direction D1-D2 in FIG. 9;
fig. 11 is a schematic plan view illustrating another array substrate in an lcd panel according to an embodiment of the invention;
FIG. 12 is a cross-sectional view of the array substrate taken along the direction D1-D2 in FIG. 11;
fig. 13 is a schematic plan view illustrating another array substrate in an lcd panel according to an embodiment of the invention;
FIG. 14 is a cross-sectional view of the array substrate taken along the direction D1-D2 in FIG. 13;
fig. 15 is a schematic plan view illustrating another array substrate in an lcd panel according to an embodiment of the invention;
FIG. 16 is a cross-sectional view of the array substrate taken along the direction D1-D2 in FIG. 15;
fig. 17 is a schematic cross-sectional view of an array substrate according to an embodiment of the invention;
fig. 18 is a schematic cross-sectional view illustrating a switching transistor in an array substrate according to an embodiment of the invention;
fig. 19 is a schematic plan view illustrating an arrangement of pixels in an array substrate according to an embodiment of the invention;
fig. 20 is a schematic structural diagram of one shape of a light-transmitting region disposed in an array substrate according to an embodiment of the present invention;
fig. 21 is a schematic structural diagram of another shape of a light-transmitting region disposed in an array substrate according to an embodiment of the invention;
fig. 22 is a schematic cross-sectional view of a liquid crystal display panel according to an embodiment of the invention;
fig. 23 is a schematic plan view of a display device according to an embodiment of the present invention.
Detailed Description
In order to alleviate the problem of insufficient display brightness of the reflective liquid crystal display panel under the condition of insufficient external light, as shown in fig. 1 and fig. 2, the array substrate comprises Data lines (Data1/Data2), Gate lines (Gate1/Gate2/Gate3), pixel regions arranged in a matrix, pixel electrodes 13 covering each pixel sub-region (PX1/PX2), a storage capacitor C1 and a reflective metal layer 14 covering the region where the storage capacitor is located, and in order to compensate the display brightness, a transmission region a is arranged at the middle position of the pixel sub-region to compensate the brightness of the liquid crystal display panel. However, the transmissive region a occupies the area of the storage capacitor C1, and the area occupied by the storage capacitor C1 is reduced. Specifically, as shown in fig. 2, the first electrode 11 of the storage capacitor C1 and the second electrode 12 of the storage capacitor C1 together form a storage capacitor C1, and the first electrode 11 and the second electrode 12 that should originally be disposed in the a region are partially hollowed out to compensate for the luminance of the liquid crystal display panel, so as to form a transmissive region a, and due to the arrangement of the transmissive region a, the facing area of the first electrode 11 and the second electrode 12 of the storage capacitor C1 is greatly reduced, which causes the value of the storage capacitor C1 to be greatly influenced, thereby affecting the display effect.
In addition to providing the transmissive region at the middle of the pixel region, as shown in fig. 3 and 4, the transmissive region a is also provided at two boundaries of the pixel sub-region (PX1/PX2) in the extending direction of the gate line to compensate for the luminance of the liquid crystal display panel, but this arrangement of the transmissive region a also occupies the area originally provided with the storage capacitor C1, so that the value of the storage capacitor C1 is reduced. Compared with the above embodiments, the difference is only in the position of the transmission region a, and other hierarchical structures are the same as the structures of the array substrates shown in fig. 1 and fig. 2, and are not repeated herein.
In view of the problems of the embodiments, embodiments of the present invention provide an array substrate, a liquid crystal display panel and a display device. In order to make the objects, technical solutions and advantages of the present invention clearer, specific embodiments of an array substrate, a liquid crystal display panel and a display device according to embodiments of the present invention are described in detail below with reference to the accompanying drawings. It should be understood that the preferred embodiments described below are only for illustrating and explaining the present invention and are not to be used for limiting the present invention. And the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
The shapes and sizes of the various elements in the drawings are not to scale and are merely intended to illustrate the invention.
Specifically, as shown in fig. 5 and 6, an array substrate provided in an embodiment of the present invention includes: a base substrate 20, Data lines (Data1/Data2) and scan lines (Gate1/Gate2/Gate3) provided on the base substrate 20; and a plurality of pixel regions arranged in an array, each pixel region including a first sub-pixel region PX1 provided with the first pixel electrode 23 and a second sub-pixel region PX2 provided with the second pixel electrode 33;
the first sub-pixel region PX1 includes a first storage capacitor sub-region C1, and the second sub-pixel region PX2 includes a second storage capacitor sub-region C2; the first storage capacitor sub-region C1 and the second storage capacitor sub-region C2 are arranged along the extending direction of the Data lines (Data1/Data2), and the scanning lines (Gate1/Gate2/Gate3) for driving the first pixel electrode 23 and the second pixel electrode 33 are located between the first storage capacitor sub-region C1 and the second storage capacitor sub-region C2, wherein the first storage capacitor sub-region C1 is provided with a first storage capacitor, and the second storage capacitor sub-region C2 is provided with a second storage capacitor;
and a light transmission region b between the first and second storage capacitor sub-regions C1 and C2.
The embodiment of the invention provides an array substrate, a liquid crystal display panel and a display device, wherein the array substrate comprises: the scanning line array comprises a substrate base plate, a data line and a scanning line, wherein the data line and the scanning line are arranged on the substrate base plate; the pixel structure comprises a plurality of pixel areas arranged in an array manner, wherein each pixel area comprises a first sub-pixel area provided with a first pixel electrode and a second sub-pixel area provided with a second pixel electrode; the first sub-pixel region comprises a first storage capacitor sub-region, and the second sub-pixel region comprises a second storage capacitor sub-region; the first storage capacitor sub-region and the second storage capacitor sub-region are arranged along the extending direction of the data line, and a scanning line for driving the first pixel electrode and the second pixel electrode is positioned between the first storage capacitor sub-region and the second storage capacitor sub-region, wherein the first storage capacitor sub-region is provided with a first storage capacitor, and the second storage capacitor sub-region is provided with a second storage capacitor; through the mode of setting the light transmission area between first storage capacitor subregion and second storage capacitor subregion, make this light transmission area not occupy the region at first storage capacitor and second storage capacitor place, consequently first storage capacitor and second storage capacitor's value does not receive the influence to realize making the compensation for liquid crystal display panel's luminance under the not influenced circumstances of assurance storage capacitor value, with the display effect who improves liquid crystal display panel.
It should be noted that, in the above array substrate provided in the embodiment of the present invention, as shown in fig. 5 and 6, the first pixel electrode 23 is composed of a first transparent electrode 25 and a first reflective metal layer 24 in contact with the first transparent electrode 25, and the second pixel electrode 33 is composed of a second transparent electrode 35 and a second reflective metal layer 24 in contact with the second transparent electrode 25; the light-transmitting region b refers to a region b1 which is not covered by the first reflective metal layer 24 above the first transparent electrode 25 and a region b2 which is not covered by the second reflective metal layer 34 above the second transparent electrode 35, in order to drive the first pixel electrode 23 and the second pixel electrode 33, the first pixel electrode 23 and the second pixel electrode 33 are insulated from each other, a region d between the first pixel electrode 23 and the second pixel electrode 33 cannot be used for display under the drive of the pixel electrode because the pixel electrode is not arranged, and the scanning line Gate2 is usually made of metal, and can block the light of the backlight source from passing through, so the region d is not a light-transmitting region.
It is to be noted that, in the array substrate provided in the embodiment of the present invention, as shown in fig. 6, the first storage capacitor includes a first electrode 21 and a second electrode 22, the second storage capacitor includes a first electrode 31 and a second electrode 32, in an actual application process, the first pixel electrode 23 can also be multiplexed as the second electrode of the first storage capacitor, the second pixel electrode 33 can also be multiplexed as the second electrode of the second storage capacitor, when the first pixel electrode 23 is multiplexed as the second electrode of the first storage capacitor, an area of a sub-region of the first storage capacitor is based on an area occupied by the first electrode 21 of the first storage capacitor, that is, an area facing the first electrode 21 of the first storage capacitor and the first pixel electrode 23 is based on an area of the first electrode 21 of the first storage capacitor (based on an area of a smaller electrode), and the second storage capacitor is the same as the first storage capacitor, and will not be described in detail herein.
The array substrate shown in fig. 5 is illustrated by taking three Gate lines (Gate1/Gate2/Gate3) between the first storage capacitor sub-region C1 and the second storage capacitor sub-region C2 as an example, and the above embodiment is also applicable to a case where two Gate lines are used to respectively drive the first pixel electrode and the second pixel electrode, and the principle of the embodiment is the same as that of the above embodiment, and is not repeated here.
Alternatively, in the array substrate provided in the embodiment of the present invention, as shown in fig. 6, the light transmission region b includes a first sub light transmission region b1 corresponding to the first sub pixel region PX1, and a second sub light transmission region b2 corresponding to the second sub pixel region PX 2.
Specifically, in the array substrate provided by the embodiment of the present invention, as shown in fig. 6, the first sub light-transmitting area b1 refers to an area above the first pixel electrode 23 that is not covered by the first reflective metal layer 24; the second sub light transmission region b2 is a region above the second pixel electrode 33 not covered by the second reflective metal layer 34, and the luminance of the liquid crystal display panel can be compensated by the first sub light transmission region b1 and the second sub light transmission region b 2. The first sub light transmission region b1 and the second sub light transmission region b2 are arranged at two sides of each grid line, and the arrangement of the light transmission regions is convenient because spaces exist at two sides of each grid line; the signal lines arranged in the partial area near the grid line are less, so that the distance between the array substrate of the partial area and the opposite substrate is larger, the reflection effect is poor, and the influence of the light transmission area arranged in the partial area on the reflection light of the liquid crystal display panel is smaller; meanwhile, the light-transmitting area is arranged in the area, so that the problem of light leakage and color mixing among pixels can not be caused.
Alternatively, in the array substrate provided in the embodiment of the present invention, as shown in fig. 7 to 12, the scan line between the first pixel electrode 23 and the second pixel electrode 33 includes a first scan line Gate1, a second scan line Gate2 and a third scan line Gate3, the first sub light transmission region b1 is located between the first scan line Gate1 and the second scan line Gate2, and/or the second sub light transmission region b2 is located between the second scan line Gate2 and the third scan line Gate 3.
Specifically, in the array substrate provided in the embodiment of the present invention, as shown in fig. 7 and 8, the first sub light-transmitting region b1 is located between the first scan line Gate1 and the second scan line Gate2, in the extending direction of the Data line (Data1/Data2), the first pixel electrode 23 completely covers the region where the first scan line Gate1 is located, the first pixel electrode 23 partially covers the region where the second scan line Gate2 is located, and the first sub light-transmitting region b1 may be located between the region covered by the first reflective metal layer 24 and the region covered by the second scan line Gate 2; as shown in fig. 9 and 10, the second sub light transmission region b2 is located between the second scan line Gate2 and the third scan line Gate3, in the extending direction of the Data line (Data1/Data2), the second pixel electrode 33 completely covers the region where the third scan line Gate3 is located, the second pixel electrode 33 partially covers the region where the second scan line Gate2 is located, and the first sub light transmission region b2 may be disposed between the region covered by the second reflective metal layer 34 and the region covered by the second scan line Gate 2; of course, as shown in fig. 11 and 12, the first sub light-transmitting region b1 and the second sub light-transmitting region b2 may be disposed between the scan lines, and the specific hierarchical structure thereof is the same as that of fig. 7 to 10, and will not be described again here.
Because the scanning lines for driving the first pixel electrode and the second pixel electrode are positioned between the first storage capacitor sub-area and the second storage capacitor sub-area, and a plurality of switch transistors connected with the scanning lines are also arranged between the first storage capacitor sub-area and the second storage capacitor sub-area, more spaces exist between the scanning lines, the space on the array substrate can be reasonably utilized by arranging the first sub light transmission area and the second sub light transmission area between the scanning lines, and the compensation of the display brightness of the liquid crystal display panel can be realized without occupying the areas where the first storage capacitor and the second storage capacitor are positioned.
Specifically, in the array substrate provided in the embodiment of the present invention, as can be seen from fig. 7, 9 and 11, the first pixel region PX1 and the second pixel region PX2 are disconnected from each other (i.e., the first pixel electrode and the second pixel electrode are insulated from each other), the first pixel electrode and the second pixel electrode are arranged along the direction in which the Data line Data1 extends, the first scan line Gate1, the second scan line Gate2 and the third scan line Gate3 arranged along the first direction are disposed between the first pixel electrode and the second pixel electrode, the first thin film transistor, the second thin film transistor and the third thin film transistor are further disposed between the first pixel electrode and the second pixel electrode (the specific structure of the thin film transistor is not shown in the figure), the Gate of the second thin film transistor is connected to the second scan line Gate2, the source of the second thin film transistor is connected to the Data line 1 corresponding to the first pixel electrode and the second pixel electrode at the same time, the second thin film transistor comprises a first drain electrode and a second drain electrode, the first drain electrode of the second thin film transistor is connected with the source electrode of the first thin film transistor, and the second drain electrode of the second thin film transistor is connected with the source electrode of the third thin film transistor; a Gate electrode of the first thin film transistor is connected to the first scan line Gate1, and a drain electrode of the first thin film transistor is connected to the first pixel electrode; the Gate of the third thin film transistor is connected to the third scan line Gate3, and the drain of the third thin film transistor is connected to the second pixel electrode, that is, the first pixel electrode is driven by the second thin film transistor and the first thin film transistor, and the second pixel electrode is driven by the second thin film transistor and the third thin film transistor, so that the first pixel electrode and the second pixel electrode can be independently provided with a driving voltage, and certainly, the second thin film transistor, the first thin film transistor, and the third thin film transistor can be simultaneously turned on, and the first pixel electrode and the second pixel electrode are simultaneously provided with a driving voltage, so as to realize 64-color display of the liquid crystal display panel.
Optionally, in the array substrate provided in the embodiment of the invention, as shown in fig. 13 to 16, the first sub light transmissive region b1 is located between the first storage capacitor sub-region C1 and the scan line, and/or the second sub light transmissive region b2 is located between the second storage capacitor sub-region C2 and the scan line.
Specifically, in the array substrate provided in the embodiment of the present invention, as shown in fig. 13 and 14, the first sub light-transmitting area b1 is located between the first storage capacitor sub-area C1 and the first scan line Gate1, and the areas where the first storage capacitor sub-area C1 and the first scan line Gate1 are located are covered with the first reflective metal layer 24; as shown in fig. 15 and 16, the second sub light transmission region b2 is located between the second storage capacitor sub region C2 and the third scan line Gate3, and the regions where the second storage capacitor sub region C2 and the third scan line Gate3 are located are both covered with the second reflective metal layer 34; of course, in the array substrate provided in the above embodiments, the first sub light-transmitting region b1 may be disposed between the first storage capacitor sub-region C1 and the first scan line Gate1, and the second sub light-transmitting region b2 may be disposed between the second storage capacitor sub-region C2 and the third scan line Gate3 at the same time, and the hierarchical structure thereof is the same as that shown in fig. 13 to 16, and is not repeated herein.
The arrangement of the wiring is less except for the switch transistor connected with the first scanning line arranged between the first scanning signal line and the first storage capacitor sub-region, and the arrangement of the first sub-light-transmitting region in the region has less influence on other structures on the array substrate; similarly, the arrangement of the wiring is less between the third scanning signal line and the second storage capacitor sub-region except for the switch transistor connected with the third scanning line, and the arrangement of the second sub-light-transmitting region in the region has less influence on other structures on the array substrate.
Optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 6, the first pixel electrode 23 includes a first transparent electrode 25 and a first reflective metal layer 24, and the first transparent electrode 25 is in contact with the first reflective metal layer 24;
the second pixel electrode 33 includes a second transparent electrode 35 and a second reflective metal layer 34, and the second transparent electrode 35 is in contact with the second reflective metal layer 34;
the first reflective metal layer 24 covers at least the first storage capacitor, and the second reflective metal layer 34 covers at least the second storage capacitor;
the first transparent electrode 25 has at least a first overlapping area with the first scan line, and the second transparent electrode 35 has at least a second overlapping area with the third scan line.
Specifically, in the array substrate provided in the embodiment of the present invention, the first transparent electrode and the first reflective metal layer jointly form a first pixel electrode, the second transparent electrode and the second reflective metal layer jointly form a second pixel electrode, the first reflective electrode at least covers the first storage capacitor, and the second reflective metal layer at least covers the second storage capacitor, that is, both the first storage capacitor sub-region where the first storage capacitor is located and the second storage capacitor sub-region where the second storage capacitor is located are reflective regions, and no light-transmitting region is provided, so as to ensure that the value of the first storage capacitor and the value of the second storage capacitor are not affected; the first transparent electrode and the first scanning line at least have a first overlapping area, the second transparent electrode and the third scanning line at least have a second overlapping area, at least the first sub light-transmitting area is arranged between the first scanning line and the first storage capacitor sub-area, and at least the second sub light-transmitting area is arranged between the third scanning line and the second storage capacitor sub-area, so as to compensate the brightness of the liquid crystal display panel.
In addition to the above arrangement, as shown in fig. 17, the first pixel electrode and the second pixel electrode may be formed by multiplexing the first reflective metal layer 24 as a part of the first pixel electrode 23, and arranging the first transparent electrode 25 only in the first sub light-transmitting region b1 such that the first transparent electrode 25 is in contact with the first reflective metal layer 24, and the first transparent electrode 25 and the first reflective metal layer 24 together form the first pixel electrode; of course, the second reflective metal layer 34 may be multiplexed as a part of the second pixel electrode 33, the second transparent electrode 35 may be disposed only in the second sub light transmission region b2, the second transparent electrode 35 may be in contact with the second reflective metal layer 34, and the second transparent electrode 35 and the second reflective metal layer 34 may be used together as the second pixel electrode 33; the thickness of the array substrate can be reduced through the arrangement, and the thinning of the liquid crystal display panel is facilitated.
Optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 18, the array substrate further includes: a switching transistor connected to the data line and the scan line;
the first storage capacitor and the second storage capacitor respectively include a first electrode 21/31 and a second electrode 22/32, and the first electrode 21 of the first storage capacitor and/or the first electrode 31 of the second storage capacitor are disposed at the same level as the gate G of the switching transistor.
Specifically, in the array substrate provided in the embodiment of the present invention, as shown in fig. 18, the switching transistor connected to the data line and the scan line includes an active layer B, a gate G, a source electrode S, and a drain electrode D sequentially located on the substrate, where the source electrode S and the drain electrode D are respectively connected to the active layer B through vias, and in the embodiment of the present invention, the first electrode 21 of the first storage capacitor or the first electrode 31 of the second storage capacitor is on the same layer as the gate G of the switching transistor, so that the number of layers of the array substrate can be reduced, and the thickness of the array substrate is reduced while the production cost is saved.
The first electrode of the first storage capacitor and the first electrode of the second storage capacitor are loaded with common electrode signals and are connected with the common electrodes through via holes or signal lines.
Optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 18, the second electrode 22 of the first storage capacitor and/or the second electrode 32 of the second storage capacitor are disposed at the same layer as a source-drain electrode (S/D) of the switch transistor.
Specifically, in the array substrate provided in the embodiment of the present invention, as shown in fig. 18, the second electrode 22 of the first storage capacitor or the second electrode 32 of the second storage capacitor is in the same layer as the source electrode S and the drain electrode D of the switching transistor, so that the number of layers of the array substrate can be reduced, the thickness of the array substrate is reduced, and the production cost is saved.
The second electrode of the first storage capacitor is connected with the first pixel electrode through the first via hole, and/or the second electrode of the second storage capacitor is connected with the second pixel electrode through the second via hole, that is, the second electrode of the first storage capacitor loads a signal of the first pixel electrode, and the second electrode of the second storage capacitor loads a signal of the second pixel electrode.
It should be noted that the first pixel electrode may be multiplexed as the second electrode of the first storage capacitor, and the second pixel electrode may be multiplexed as the second electrode of the second storage capacitor, but compared to that the second electrode of the first storage capacitor and the second electrode of the second storage capacitor are on the same layer as the source electrode and the drain electrode of the switching transistor, the first pixel electrode is farther away from the first electrode of the first storage capacitor, so that the first storage capacitance value per unit area is smaller.
Optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 19, an area of the first sub-pixel region PX1 is not equal to an area of the second sub-pixel region PX 2.
Specifically, in the above array substrate provided by the embodiment of the present invention, in order to reduce power consumption of the liquid crystal display panel and enable 64-color display of the liquid crystal display panel by smaller power consumption, as shown in fig. 19 in particular, each pixel region includes a first sub-pixel region PX1 and a second sub-pixel region PX2, wherein the area of the first sub-pixel region PX1 is larger than the area of the second sub-pixel region PX 2. Each sub-pixel in the above structure can display four colors at most: black, a first color generated by the single first sub-pixel region PX1, a second color generated by the single second sub-pixel region PX2, and a superimposed color generated when the first sub-pixel region PX1 and the second sub-pixel region PX2 are simultaneously driven, when the pixel array includes pixels of three colors (i.e., a red pixel region, a blue pixel region, and a green pixel region), 64-color display of the liquid crystal display panel can be realized by supplying only two different driving voltages of an on state and an off state to each pixel electrode, and power consumption due to a change in the driving voltage is reduced.
Optionally, in the array substrate provided in the embodiment of the present invention, the shape of the light-transmitting region may be rectangular as shown in fig. 5, or may be one or a combination of triangular, polygonal and/or circular as shown in fig. 20. Of course, the shape may be a rhombus as shown in fig. 21, or any other shape that can be applied to the light-transmitting region, and is not particularly limited herein.
The light-transmitting regions shown in fig. 5, 20, and 21 are not limited to the shapes of the light-transmitting regions, and are not limited to the shapes of the light-transmitting regions at certain positions on the array substrate, and the light-transmitting regions at any positions may be any of the shapes described above, or a combination of a plurality of shapes, and are not particularly limited herein.
Based on the same inventive concept, an embodiment of the present invention further provides a liquid crystal display panel, as shown in fig. 22, including the array substrate 50, the opposite substrate 40, and the liquid crystal layer 60 located between the array substrate 50 and the opposite substrate 40 in any of the above embodiments of the present invention;
the opposite substrate 40 includes a color resistance region 41, and an orthographic projection of the color resistance region 41 on the substrate at least covers an orthographic projection of the light transmission region (b1/b2) on the substrate.
Specifically, in the liquid crystal display panel provided in the embodiment of the present invention, the liquid crystal display panel further includes: the common electrode layer is arranged on one side of the array substrate facing the opposite substrate or one side of the opposite substrate facing the array substrate;
the voltage on the first electrode of the first storage capacitor and/or the first electrode of the second storage capacitor is the same as the voltage on the common electrode layer.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, as shown in fig. 23, including the liquid crystal display panel provided by the embodiment of the present invention. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. Other essential components of the display device are understood by those skilled in the art, and are not described herein or should not be construed as limiting the invention. The implementation of the display device can be seen in the above embodiments of the liquid crystal display panel, and repeated descriptions are omitted.
The embodiment of the invention provides an array substrate, a liquid crystal display panel and a display device, wherein the array substrate comprises: the scanning line array comprises a substrate base plate, a data line and a scanning line, wherein the data line and the scanning line are arranged on the substrate base plate; the pixel structure comprises a plurality of pixel areas arranged in an array mode, wherein each pixel area comprises a first sub-pixel area provided with a first pixel electrode and a second sub-pixel area provided with a second pixel electrode; the first sub-pixel region comprises a first storage capacitor sub-region, and the second sub-pixel region comprises a second storage capacitor sub-region; the first storage capacitor sub-region and the second storage capacitor sub-region are arranged along the extending direction of the data line, and the scanning line for driving the first pixel electrode and the second pixel electrode is positioned between the first storage capacitor sub-region and the second storage capacitor sub-region, wherein the first storage capacitor sub-region is provided with a first storage capacitor, and the second storage capacitor sub-region is provided with a second storage capacitor; through setting up the light transmission area the first storage capacitor subregion with the mode between the second storage capacitor subregion makes this light transmission area not occupy the region at first storage capacitor and second storage capacitor place, consequently the value of first storage capacitor and second storage capacitor does not receive the influence to realize making the compensation for liquid crystal display panel's luminance under the not influenced circumstances of storage capacitance value of assurance, with the display effect who improves liquid crystal display panel.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. An array substrate, comprising: the scanning line array comprises a substrate base plate, a data line and a scanning line, wherein the data line and the scanning line are arranged on the substrate base plate; the pixel structure comprises a plurality of pixel areas arranged in an array mode, wherein each pixel area comprises a first sub-pixel area provided with a first pixel electrode and a second sub-pixel area provided with a second pixel electrode;
the first sub-pixel region comprises a first storage capacitor sub-region, and the second sub-pixel region comprises a second storage capacitor sub-region; the first storage capacitor sub-region and the second storage capacitor sub-region are arranged along the extending direction of the data line, and the scanning line for driving the first pixel electrode and the second pixel electrode is positioned between the first storage capacitor sub-region and the second storage capacitor sub-region, wherein the first storage capacitor sub-region is provided with a first storage capacitor, and the second storage capacitor sub-region is provided with a second storage capacitor;
the light-transmitting area is positioned between the first storage capacitor sub-area and the second storage capacitor sub-area;
the light-transmitting area comprises a first sub light-transmitting area corresponding to the first sub pixel area and a second sub light-transmitting area corresponding to the second sub pixel area;
the scanning lines between the first pixel electrode and the second pixel electrode comprise a first scanning line, a second scanning line and a third scanning line, the first sub light-transmitting area is located between the first scanning line and the second scanning line, and/or the second sub light-transmitting area is located between the second scanning line and the third scanning line.
2. The array substrate of claim 1, wherein the first sub-transmissive region is located between the first storage capacitor sub-region and the scan line, and/or wherein the second sub-transmissive region is located between the second storage capacitor sub-region and the scan line.
3. The array substrate of claim 1, wherein the first pixel electrode comprises a first transparent electrode and a first reflective metal layer, the first transparent electrode and the first reflective metal layer being in contact;
the second pixel electrode comprises a second transparent electrode and a second reflective metal layer, and the second transparent electrode is in contact with the second reflective metal layer;
the first reflecting metal layer at least covers the first storage capacitor, and the second reflecting metal layer at least covers the second storage capacitor;
the first transparent electrode at least has a first overlapping area with the first scanning line, and the second transparent electrode at least has a second overlapping area with the third scanning line.
4. The array substrate of claim 1, further comprising: a switching transistor connected to the data line and the scan line;
the first storage capacitor and the second storage capacitor respectively comprise a first electrode and a second electrode, and the first electrode of the first storage capacitor and/or the first electrode of the second storage capacitor and the gate of the switching transistor are arranged in the same layer.
5. The array substrate of claim 4, wherein the second electrode of the first storage capacitor and/or the second electrode of the second storage capacitor is disposed at the same layer as a source/drain electrode of the switching transistor.
6. The array substrate of any one of claims 1-5, wherein an area of the first sub-pixel region is not equal to an area of the second sub-pixel region.
7. The array substrate of any one of claims 1-5, wherein the shape of the light transmissive region comprises: one or a combination of rectangular, triangular, polygonal and/or circular.
8. A liquid crystal display panel comprising the array substrate according to any one of claims 1 to 7, an opposite substrate, and a liquid crystal layer between the array substrate and the opposite substrate;
the opposite substrate comprises a color resistance area, and the orthographic projection of the color resistance area on the substrate at least covers the orthographic projection of the light transmission area on the substrate.
9. The liquid crystal display panel according to claim 8, further comprising: the common electrode layer is arranged on one side of the array substrate facing the opposite substrate or one side of the opposite substrate facing the array substrate;
the voltage on the first electrode of the first storage capacitor and/or the first electrode of the second storage capacitor is the same as the voltage on the common electrode layer.
10. A display device comprising the liquid crystal display panel according to claim 8 or 9.
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| CN202110538280.1A CN113219748B (en) | 2018-06-29 | 2018-06-29 | Array substrate, liquid crystal display panel and display device |
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| JP7181777B2 (en) * | 2018-12-05 | 2022-12-01 | 株式会社ジャパンディスプレイ | Display device |
| CN109585525B (en) * | 2019-01-08 | 2021-04-13 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof, display panel and display device |
| CN111290185B (en) * | 2020-03-31 | 2022-11-29 | 成都中电熊猫显示科技有限公司 | Array substrate, manufacturing method thereof and display panel |
| CN114609813B (en) * | 2022-03-22 | 2023-07-25 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and liquid crystal display panel |
| CN114660864B (en) * | 2022-03-22 | 2023-10-13 | Tcl华星光电技术有限公司 | Pixel structure and display panel |
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| CN113219748A (en) | 2021-08-06 |
| CN113219748B (en) | 2023-05-26 |
| CN108873523A (en) | 2018-11-23 |
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