CN108873523A - A kind of array substrate, liquid crystal display panel and display device - Google Patents
A kind of array substrate, liquid crystal display panel and display device Download PDFInfo
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- CN108873523A CN108873523A CN201810714042.XA CN201810714042A CN108873523A CN 108873523 A CN108873523 A CN 108873523A CN 201810714042 A CN201810714042 A CN 201810714042A CN 108873523 A CN108873523 A CN 108873523A
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- storage capacitance
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- scan line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
Abstract
The invention discloses a kind of array substrate, liquid crystal display panel and display device, which includes：The data line on underlay substrate and scan line is arranged in underlay substrate；Multiple pixel regions, each pixel region include the first sub-pixel area domain and the second subpixel area；The first sub-pixel area domain includes the first storage capacitance subregion, and the second subpixel area includes the second storage capacitance subregion；First storage capacitance subregion and the second storage capacitance subregion are arranged along the extending direction of data line, for driving the scan line of the first pixel electrode and the second pixel electrode between the first storage capacitance subregion and the second storage capacitance subregion, pass through mode transmission region being arranged between the first storage capacitance subregion and the second storage capacitance subregion, make the region where vacant first storage capacitance of the transmission region and the second storage capacitance, makes compensation in the case where guaranteeing that storage capacitance value is unaffected to realize for the brightness of liquid crystal display panel.
Description
Technical field
The present invention relates to field of display technology, espespecially a kind of array substrate, liquid crystal display panel and display device.
Background technique
Liquid crystal display panel in the prior art can be divided into transmission-type, reflective and half anti-half by the form of provided light source
Saturating formula, wherein reflective no setting is required backlight, half-reflection and half-transmission formula only need to be arranged backlight in transmission region, pass through and reduce back
The setting of light source can greatly reduce the power consumption of liquid crystal display panel, therefore, reflective and half-reflection and half-transmission formula LCD display
Plate has been to be concerned by more and more people.
However, in half-reflection and half-transmission formula liquid crystal display panel the area ratio of reflecting region and transmission region usual 40% to
60%, under reflection display mode, the effect of display is reflected not as good as reflecting type liquid crystal display panel.
In current liquid crystal display panel, reflective liquid crystal display panel is shown in the insufficient situation of extraneous illumination
Show that brightness is inadequate, influences display effect.To alleviate the above problems, area is penetrated using in the setting of the middle position of pixel region, or
Two boundaries setting of person's pixel subregion on grid line extending direction penetrates area, by being set as liquid crystal display through area
The brightness of panel compensates.But be arranged occupy storage capacitance area through area through the above way, make each of storage capacitance
The area of electrode can be reduced, and the value of storage capacitance is caused to will receive very big influence, to influence display effect.
Therefore, how compensation is done in the brightness in the case where guaranteeing that storage capacitance value is unaffected for liquid crystal display panel is
Those skilled in the art's urgent problem to be solved.
Summary of the invention
The embodiment of the present invention provides a kind of array substrate, liquid crystal display panel and display device, to solve the prior art
In by be arranged through area be liquid crystal display panel brightness do compensation influence storage capacitance value the technical issues of.
The embodiment of the invention provides a kind of array substrates, including：The number on the underlay substrate is arranged in underlay substrate
According to line and scan line；And multiple pixel regions being arranged in array, each pixel region include being provided with the first pixel
The first sub-pixel area domain of electrode and the second subpixel area for being provided with the second pixel electrode；
The first sub-pixel area domain includes the first storage capacitance subregion, and second subpixel area is deposited including second
Storage holds subregion；The extension of the first storage capacitance subregion and the second storage capacitance subregion along the data line
Direction arrangement is deposited for driving the scan line of first pixel electrode and second pixel electrode to be located at described first
Storage is held between subregion and the second storage capacitance subregion, wherein the first storage capacitance subregion is provided with the
One storage capacitance, the second storage capacitance subregion are provided with the second storage capacitance；
It further include transmission region, the transmission region is located at the first storage capacitance subregion and the second storage electricity
Hold between subregion.
On the other hand, the embodiment of the invention also provides a kind of liquid crystal display panel, including it is provided in an embodiment of the present invention
Above-mentioned array substrate, opposite substrate and the liquid crystal layer between the array substrate and the opposite substrate；
The opposite substrate includes color blocking region, and orthographic projection of the color blocking region on the underlay substrate is at least covered
Cover orthographic projection of the transmission region on the underlay substrate.
On the other hand, the embodiment of the present invention also provides a kind of display device, including above-mentioned liquid provided in an embodiment of the present invention
LCD panel.
The present invention has the beneficial effect that：
A kind of array substrate, liquid crystal display panel and display device provided in an embodiment of the present invention, the array substrate include：
The data line on the underlay substrate and scan line is arranged in underlay substrate；And multiple pixel regions being arranged in array, often
A pixel region includes the first sub-pixel area domain for being provided with the first pixel electrode and be provided with the second pixel electrode the
Two subpixel areas；The first sub-pixel area domain includes the first storage capacitance subregion, and second subpixel area includes
Second storage capacitance subregion；The first storage capacitance subregion and the second storage capacitance subregion are along the data line
Extending direction arrangement, it is described for driving the scan line of first pixel electrode and second pixel electrode to be located at
Between first storage capacitance subregion and the second storage capacitance subregion, wherein the first storage capacitance subregion is set
It is equipped with the first storage capacitance, the second storage capacitance subregion is provided with the second storage capacitance；By the way that transmission region is arranged
Mode between the first storage capacitance subregion and the second storage capacitance subregion, keeps the transmission region vacant
Region where first storage capacitance and the second storage capacitance, thus the value of the first storage capacitance and the second storage capacitance not by
To influence, compensation is made for the brightness of liquid crystal display panel in the case where guaranteeing that storage capacitance value is unaffected to realize,
To improve the display effect of liquid crystal display panel.
Detailed description of the invention
Fig. 1 is the planar structure schematic diagram of one of liquid crystal display panel in the related technology array substrate；
Fig. 2 is the sectional view along the array substrate in the direction A1-A2 in Fig. 1；
Fig. 3 is the planar structure schematic diagram of another array substrate in liquid crystal display panel in the related technology；
Fig. 4 is the sectional view along the array substrate in the direction B1-B2 in Fig. 3；
Fig. 5 is the planar structure schematic diagram of one of liquid crystal display panel provided in an embodiment of the present invention array substrate；
Fig. 6 is the sectional view along a kind of array substrate in the direction D1-D2 in Fig. 5；
Fig. 7 is the planar structure signal of another array substrate in liquid crystal display panel provided in an embodiment of the present invention
Figure；
Fig. 8 is the sectional view along the array substrate in the direction D1-D2 in Fig. 7；
Fig. 9 is the planar structure signal of another array substrate in liquid crystal display panel provided in an embodiment of the present invention
Figure；
Figure 10 is the sectional view along the array substrate in the direction D1-D2 in Fig. 9；
Figure 11 is the planar structure signal of another array substrate in liquid crystal display panel provided in an embodiment of the present invention
Figure；
Figure 12 is the sectional view along the array substrate in the direction D1-D2 in Figure 11；
Figure 13 is the planar structure signal of another array substrate in liquid crystal display panel provided in an embodiment of the present invention
Figure；
Figure 14 is the sectional view along the array substrate in the direction D1-D2 in Figure 13；
Figure 15 is the planar structure signal of another array substrate in liquid crystal display panel provided in an embodiment of the present invention
Figure；
Figure 16 is the sectional view along the array substrate in the direction D1-D2 in Figure 15；
Figure 17 is one of array substrate provided in an embodiment of the present invention the schematic diagram of the section structure；
Figure 18 is the schematic diagram of the section structure of the switching transistor in array substrate provided in an embodiment of the present invention；
Figure 19 is the planar structure schematic diagram of the pixel arrangement in array substrate provided in an embodiment of the present invention；
Figure 20 is that a kind of structure of shape of transmission region set in array substrate provided in an embodiment of the present invention is shown
It is intended to；
Figure 21 is the structure of another shape of transmission region set in array substrate provided in an embodiment of the present invention
Schematic diagram；
Figure 22 is the schematic diagram of the section structure of liquid crystal display panel provided in an embodiment of the present invention；
Figure 23 is the planar structure schematic diagram of display device provided in an embodiment of the present invention.
Specific embodiment
In order to alleviate reflective liquid crystal display panel inadequate problem of display brightness in the insufficient situation of extraneous illumination,
As depicted in figs. 1 and 2, which includes data line (Data1/Data2), grid line (Gate1/Gate2/Gate3), in square
The pixel region of battle array arrangement and pixel electrode 13, storage capacitance C1 and the covering of each pixel subregion (PX1/PX2) of covering are deposited
Storage holds the reflective metal layer 14 of region, can be in the middle position of pixel subregion in order to compensate to display brightness
Setting penetrates area a, compensates for the brightness of liquid crystal display panel.But the setting of penetrating region a can occupy storage capacitance C1
Area, cause area shared by storage capacitance C1 reduce.Specifically, as shown in Fig. 2, the first electrode 11 of storage capacitance C1 with
The second electrode 12 of storage capacitance C1 together constitutes storage capacitance C1, in order to the brightness to liquid crystal display panel compensates will be former
The region a first electrode 11 should be set and 12 part of second electrode hollows out, formd through area a, due to setting through area a
It sets, so that the first electrode 11 of storage capacitance C1 and the positive area of second electrode 12 greatly reduce, leads to storage capacitance C1's
Value will receive very big influence, to influence display effect.
In addition in the setting of the middle position of pixel region through other than area, as shown in Figure 3 and Figure 4, also can be in the extension of grid line
Two boundaries setting of pixel subregion (PX1/PX2) penetrates area a on direction, compensates for the brightness of liquid crystal display panel,
But this kind of set-up mode for penetrating area a equally occupies the area that storage capacitance C1 is arranged originally, so that storage capacitance C1
Value reduces.Compared with above-described embodiment, difference is only that, through the difference of position set by area a, other hierarchical structures are equal
Identical as the structure of Fig. 1 and array substrate shown in Fig. 2, details are not described herein.
Above-described embodiment there are aiming at the problem that, the embodiment of the invention provides a kind of array substrates, liquid crystal display panel
And display device.In order to make the purpose of the present invention, the technical scheme and advantages are more clear, with reference to the accompanying drawing, to of the invention real
The specific embodiment for applying array substrate, liquid crystal display panel and display device that example provides is described in detail.It should manage
Solution, preferred embodiment disclosed below is only for the purpose of illustrating and explaining the present invention and is not intended to limit the present invention.And it is not rushing
In the case where prominent, the features in the embodiments and the embodiments of the present application be can be combined with each other.
The shapes and sizes of each component do not react actual proportions in attached drawing, and purpose is schematically illustrate the content of present invention.
Specifically, a kind of array substrate provided in an embodiment of the present invention, as shown in Figure 5 and Figure 6, which includes：
Data line (Data1/Data2) and scan line (Gate1/Gate2/ on underlay substrate 20 is arranged in underlay substrate 20
Gate3)；And multiple pixel regions being arranged in array, each pixel region include be provided with the first pixel electrode 23
One subpixel area PX1 and the second subpixel area PX2 for being provided with the second pixel electrode 33；
The first sub-pixel area domain PX1 includes that the first storage capacitance subregion C1, the second subpixel area PX2 is deposited including second
Storage holds subregion C2；First storage capacitance subregion C1 and the second storage capacitance subregion C2 are along data line (Data1/
Data2 extending direction arrangement), for driving the scan line (Gate1/ of the first pixel electrode 23 and the second pixel electrode 33
Gate2/Gate3) between the first storage capacitance subregion C1 and the second storage capacitance subregion C2, wherein the first storage
Capacitor subregion C1 is provided with the first storage capacitance, and the second storage capacitance subregion C2 is provided with the second storage capacitance；
It further include transmission region b, transmission region b is located at the first storage capacitance subregion C1 and the second storage capacitance subregion
Between C2.
A kind of array substrate, liquid crystal display panel and display device provided in an embodiment of the present invention, the array substrate include：
The data line on underlay substrate and scan line is arranged in underlay substrate；And multiple pixel regions being arranged in array, each picture
Plain region includes the first sub-pixel area domain for being provided with the first pixel electrode and the second sub-pixel for being provided with the second pixel electrode
Region；The first sub-pixel area domain includes the first storage capacitance subregion, and the second subpixel area includes the second storage capacitance sub-district
Domain；First storage capacitance subregion and the second storage capacitance subregion are arranged along the extending direction of data line, for driving the
The scan line of one pixel electrode and the second pixel electrode be located at the first storage capacitance subregion and the second storage capacitance subregion it
Between, wherein the first storage capacitance subregion is provided with the first storage capacitance, and the second storage capacitance subregion is provided with the second storage
Capacitor；By mode transmission region being arranged between the first storage capacitance subregion and the second storage capacitance subregion, make
Region where vacant first storage capacitance of the transmission region and the second storage capacitance, therefore the first storage capacitance and second is deposited
The value that storage is held is not affected, so that realizing is liquid crystal display panel in the case where guaranteeing that storage capacitance value is unaffected
Brightness make compensation, to improve the display effect of liquid crystal display panel.
It should be noted that in above-mentioned array substrate provided in an embodiment of the present invention, as it can be seen in figures 5 and 6, the first pixel
Electrode 23 is made of first transparency electrode 25 and the first reflective metal layer 24 being in contact with first transparency electrode 25, the second picture
Plain electrode 33 is made of second transparency electrode 35 and the second reflective metal layer 24 being in contact with second transparency electrode 25；This is thoroughly
Light region b refers to above first transparency electrode 25 without the region b1 and second transparency electrode 35 of the covering of the first reflective metal layer 24
The region b2 that top is covered without the second reflective metal layer 34, in order to realize to the first pixel electrode 23 and the second pixel electrode 33
Driving, therefore the first pixel electrode 23 and the second pixel electrode 33 are mutually insulated, the first pixel electrode 23 and the second picture
Region d between plain electrode 33, cannot be under the driving of pixel electrode for showing due to being not provided with pixel electrode, and scans
The usual metal of line Gate2, can stop the light of backlight to pass through, and therefore, the region d is not transmission region.
It is worth noting that, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in fig. 6, the first storage electricity
Holding includes first electrode 21 and second electrode 22, and the second storage capacitance includes first electrode 31 and second electrode 32, is actually being answered
With in the process, the first pixel electrode 23 can also can be multiplexed with to the second electrode of the first storage capacitance, the second pixel electrode
33 can also be multiplexed with the second electrode of the second storage capacitance, be multiplexed with the second of the first storage capacitance in the first pixel electrode 23
When electrode, the area of the first storage capacitance subregion is subject to area shared by the first electrode 21 of the first storage capacitance, i.e.,
The first electrode 21 of one storage capacitance and the positive area of the first pixel electrode 23 are the first electrodes 21 with the first storage capacitance
Area subject to the area of smaller electrode (be subject to), similarly for the second storage capacitance and the first storage capacitance, herein not
It repeats again.
Wherein, array substrate shown in fig. 5 is to be located at the first storage capacitance subregion C1 and the second storage capacitance sub-district
Illustrated for three grid lines (Gate1/Gate2/Gate3) between the C2 of domain, certain above-described embodiment is also applied for adopting
The case where respectively driving the first pixel electrode and the second pixel electrode with two grid lines, the principle phase of principle and above-described embodiment
Together, details are not described herein.
Optionally, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in fig. 6, transmission region b includes corresponding to
The sub- transmission region b1 of the first of the first sub-pixel area domain PX1, and, the second sub- transparent area of corresponding second subpixel area PX2
Domain b2.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in fig. 6, the first sub- transmission region b1
Refer to above the first pixel electrode 23 without the region of the first reflective metal layer 24 covering；Second sub- transmission region b2 refers to second
Without the region of the second reflective metal layer 34 covering above pixel electrode 33, pass through the first sub- sub- light transmission of transmission region b1 and second
Region b2 can compensate the brightness of liquid crystal display panel.The first sub- sub- transmission region b2 setting of transmission region b1 and second
In the two sides of each grid line, since each grid line two sides inherently have space, convenient for the setting of transmission region；And part near grid line
The signal wire of region setting is less, causes the array substrate of the partial region larger apart from the distance of opposite substrate, reflecting effect
It is bad, thus the region setting transmission region reflected light of liquid crystal display panel is had an impact it is smaller；Meanwhile in the region
Setting transmission region will not lead to the problem of light leakage colour mixture between each pixel.
Optionally, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in Fig. 7 to Figure 12, it is located at the first picture
Scan line between plain electrode 23 and the second pixel electrode 33 includes the first scan line Gate1, the second scan line Gate2 and third
Scan line Gate3, the first sub- transmission region b1 between the first scan line Gate1 and the second scan line Gate2, and/or,
Two sub- transmission region b2 are between the second scan line Gate2 and third scan line Gate3.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in Figure 7 and Figure 8, the first sub- transparent area
Domain b1 is between the first scan line Gate1 and the second scan line Gate2, on data line (Data1/Data2) extending direction,
The first region scan line Gate1, the second scanning of 23 part of the first pixel electrode covering is completely covered in first pixel electrode 23
The region line Gate2, the region that the region that the first reflective metal layer 24 is covered and the second scan line Gate2 are covered it
Between the first sub- transmission region b1 can be set；As shown in Figure 9 and Figure 10, the second sub- transmission region b2 is located at the second scan line
Between Gate2 and third scan line Gate3, on data line (Data1/Data2) extending direction, the second pixel electrode 33 is completely
The region third scan line Gate3 is covered, 33 part of the second pixel electrode covers the second region scan line Gate2,
The first son can be set between the region that the region and the second scan line Gate2 that second reflective metal layer 34 is covered are covered
Transmission region b2；The first sub- transmission region b1 can certainly be set simultaneously between each scan line as is illustrated by figs. 11 and 12
With the second sub- transmission region b2, specific hierarchical structure is identical as the hierarchical structure of Fig. 7 to Figure 10, and details are not described herein.
Due to for driving the scan line of the first pixel electrode and the second pixel electrode to be respectively positioned on the first storage capacitance sub-district
Between domain and the second storage capacitance subregion, and also set between the first storage capacitance subregion and the second storage capacitance subregion
Multiple switching transistors being connected with each scan line are equipped with, therefore, there are more spaces between each scan line, by the first son
Transmission region and the second sub- transmission region are arranged between each scan line can carry out reasonable benefit to the space in array substrate
With, and be not take up the first storage capacitance and the second storage capacitance region can be achieved with compensating display for liquid crystal display panel it is bright
Degree.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, it can be seen from Fig. 7, Fig. 9 and Figure 11
One pixel region PX1 and the second pixel region PX2 mutually disconnects (i.e. the first pixel electrode and the second pixel electrode mutually insulated),
And first pixel electrode and the second pixel electrode arranged along the direction that data line Data1 extends, the first pixel electrode and second
The first scan line Gate1, the second scan line Gate2 and third scan line arranged in the first direction are provided between pixel electrode
Gate3, be additionally provided between the first pixel electrode and the second pixel electrode first film transistor, the second thin film transistor (TFT) and
Third thin film transistor (TFT) (specific structure of thin film transistor (TFT) is being not shown in the figure), the grid of the second thin film transistor (TFT) is swept with second
Line Gate2 is retouched to be connected, it is corresponding with the first pixel electrode and the second pixel electrode when the source electrode of the second thin film transistor (TFT) is connected to
Data line Data1, the second thin film transistor (TFT) include first drain electrode and second drain electrode, the second thin film transistor (TFT) first drain electrode with
The source electrode of first film transistor is connected, and the second drain electrode of the second thin film transistor (TFT) is connected with the source electrode of third thin film transistor (TFT)；
The grid of first film transistor is connected with the first scan line Gate1, the drain electrode of first film transistor and the first pixel electrode
It is connected；The grid of third thin film transistor (TFT) is connected with third scan line Gate3, the drain electrode of third thin film transistor (TFT) and the second pixel
Electrode is connected, that is to say, that drives the first pixel electrode by the second thin film transistor (TFT) and first film transistor, passes through second
Thin film transistor (TFT) and third thin film transistor (TFT) drive the second pixel electrode, so as to be embodied as the first pixel electrode and the second picture
Plain electrode separately provides driving voltage, naturally it is also possible to keep the second thin film transistor (TFT), first film transistor and third film brilliant
Body pipe simultaneously turns on, while providing driving voltage for the first pixel electrode and the second pixel electrode, to realize liquid crystal display panel
64 colors show.
Optionally, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 13 to figure 16, the first sub- light transmission
Region b1 between the first storage capacitance subregion C1 and scan line, and/or, the second sub- transmission region b2 be located at second storage
Between capacitor subregion C2 and scan line.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in Figure 13 and Figure 14, the first sub- light transmission
Region b1 is between the first storage capacitance subregion C1 and the first scan line Gate1, the first storage capacitance subregion C1 and
Region where scan line Gate1 is all covered with the first reflective metal layer 24；As shown in Figure 15 and Figure 16, the second sub- transparent area
Domain b2 is between the second storage capacitance subregion C2 and third scan line Gate3, the second storage capacitance subregion C2 and third
Region where scan line Gate3 is all covered with the second reflective metal layer 34；Certainly, in array substrate provided by the above embodiment
In can also simultaneously between the first storage capacitance subregion C1 and the first scan line Gate1 be arranged the first sub- transmission region b1,
And the second sub- transmission region b2, hierarchical structure are set between the second storage capacitance subregion C2 and third scan line Gate3
Identical as hierarchical structure shown in Figure 13 to Figure 16, details are not described herein.
Due to being connect in addition to being provided with the first scan line between the first scan signal line and the first storage capacitance subregion
Switching transistor outside, the setting of wiring is less, the region be arranged the first sub- transmission region in array substrate other knot
Structure influences smaller；Similarly, it is scanned in addition to being provided with third between third scan signal line and the second storage capacitance subregion
Line connection switching transistor outside, the setting of wiring be also it is less, the region be arranged the second sub- transmission region to array substrate
On other structures influence it is smaller.
Optionally, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in fig. 6, the first pixel electrode 23 wraps
First transparency electrode 25 and the first reflective metal layer 24 are included, first transparency electrode 25 and the first reflective metal layer 24 are in contact；
Second pixel electrode 33 includes second transparency electrode 35 and the second reflective metal layer 34, second transparency electrode 35 and the
Two reflective metal layers 34 are in contact；
First reflective metal layer 24 at least covers the first storage capacitance, and the second reflective metal layer 34 at least covers the second storage
Capacitor；
First transparency electrode 25 is at least with the first scan line there are the first overlapping region, and second transparency electrode 35 is at least with
There are the second overlapping regions for three scan line.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, first transparency electrode and the first reflective metals
Layer together constitutes the first pixel electrode, and second transparency electrode and the second reflective metal layer together constitute the second pixel electrode,
First reflecting electrode at least cover the first storage capacitance and, the second reflective metal layer at least covers the second storage capacitance, that is,
Say the first storage capacitance subregion where the first storage capacitance and the second storage capacitance subregion where the second storage capacitance
It is reflecting region, is not provided with transmission region, with the value of the value of the first storage capacitance of guarantee and the second storage capacitance not by shadow
It rings；Make first transparency electrode at least with the first scan line there are the first overlapping region, second transparency electrode is at least scanned with third
There are the second overlapping regions for line, and at least the first sub- transmission region can be arranged in the first scan line and the first storage capacitance sub-district
Between domain, at least the second sub- transmission region is arranged between third scan line and the second storage capacitance subregion, to liquid crystal
The brightness of display panel compensates.
Wherein, the first pixel electrode and the second pixel electrode, can also as shown in figure 17 in addition to above-mentioned facilities, will
First reflective metal layer 24 is multiplexed with a part of the first pixel electrode 23, and only setting first is saturating in the first sub- transmission region b1
Prescribed electrode 25 makes first transparency electrode 25 be in contact with the first reflective metal layer 24, first transparency electrode 25 and the first reflection gold
Belong to layer 24 collectively as the first pixel electrode；Second reflective metal layer 34 can certainly be multiplexed with the second pixel electrode 33
Second transparency electrode 35 is only arranged in a part in the second sub- transmission region b2, and second transparency electrode 35 and second is made to reflect gold
Belong to layer 34 to be in contact, second transparency electrode 35 and the second reflective metal layer 34 are collectively as the second pixel electrode 33；By above-mentioned
The thickness that array substrate can be reduced is set, the slimming of liquid crystal display panel is advantageously implemented.
Optionally, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 18, which is also wrapped
It includes：The switching transistor being connected with data line and scan line；
First storage capacitance and the second storage capacitance respectively include first electrode 21/31 and second electrode 22/32, and first
The grid G same layer of the first electrode 21 of storage capacitance and/or the first electrode 31 of the second storage capacitance and switching transistor is arranged.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 18, with data line and scan line
Connected switching transistor includes the active layer B being sequentially located on underlay substrate, grid G, source electrode S and drain electrode D, wherein source
Electrode S and drain electrode D passes through via hole respectively and is connected with active layer B, in embodiment provided by the invention, makes the first storage capacitance
First electrode 21 or the second storage capacitance first electrode 31 and switching transistor grid G same layer, can reduce in this way
The setting of the number of plies of array substrate has saved production cost while reducing the thickness of array substrate.
Wherein, the first electrode of the first electrode of the first storage capacitance and the second storage capacitance loads public electrode letter
Number, it is connected by via hole or signal wire with public electrode.
Optionally, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 18, the of the first storage capacitance
Source-drain electrode (S/D) same layer of the second electrode 32 of two electrodes 22 and/or the second storage capacitance and switching transistor is arranged.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 18, the of the first storage capacitance
The source electrode S and drain electrode D same layer of the second electrode 32 of two electrodes 22 or the second storage capacitance and switching transistor, in this way may be used
To reduce the setting of the number of plies of array substrate, production cost has been saved while reducing the thickness of array substrate.
Wherein, the second electrode of the first storage capacitance is connected by the first via hole with the first pixel electrode, and/or, second
The second electrode of storage capacitance is connected by the second via hole with the second pixel electrode, i.e. the second electrode load of the first storage capacitance
The signal of first pixel electrode, the second electrode of the second storage capacitance load the signal of the second pixel electrode.
It should be noted that the first pixel electrode can be multiplexed with the second electrode of the first storage capacitance, the second pixel electricity
The second electrode of the second storage capacitance can be extremely multiplexed with, still, compare with by the second electrode of the first storage capacitance and second
For the second electrode of storage capacitance and the source electrode and drain electrode same layer of switching transistor, the first pixel electrode distance first is deposited
The first electrode that storage is held farther out so that the first storage capacitance value of unit area is smaller, therefore, by the of the first storage capacitance
The source electrode and drain electrode same layer of two electrodes and switching transistor, it is possible to reduce the first electrode of the first storage capacitance and the second electricity
The distance between pole, increases the first storage capacitance value of unit area, the first electrode of the second storage capacitance and second electrode
Similarly with the first storage capacitance, details are not described herein for setting.
Optionally, in above-mentioned array substrate provided in an embodiment of the present invention, as shown in figure 19, the first sub-pixel area domain
The area of PX1 and the area of the second subpixel area PX2 are unequal.
Specifically, in above-mentioned array substrate provided in an embodiment of the present invention, in order to reduce liquid crystal display panel power consumption, and
It can realize that 64 colors of liquid crystal display panel are shown by lesser power consumption, specific as shown in figure 19, each pixel region includes
The first sub-pixel area domain PX1 and the second subpixel area PX2, wherein the area of the first sub-pixel area domain PX1 is greater than the second sub- picture
The area of plain region PX2.Each sub-pixel can at most show four kinds of colors in above structure：Black, independent first sub-pixel
Second color of the first color, independent second subpixel area PX2 generation that region PX1 is generated, while driving the first sub-pixel
The superposition color generated when region PX1 and the second subpixel area PX2, it is (i.e. red when pixel array includes the pixel of three colors
Color pixel region, blue pixel area and green pixel area), it is only necessary to opening state and closing are provided to each pixel electrode
The two different driving voltages of state, so that it may realize that 64 colors of liquid crystal display panel are shown, reduce driving voltage variation institute
Bring power consumption.
Optionally, in above-mentioned array substrate provided in an embodiment of the present invention, the shape of transmission region can be for such as Fig. 5 square
Shape can also be one of triangle as shown in figure 20, polygon and/or circle or combination.It certainly can also be figure
Diamond shape shown in 21, also to be not specifically limited herein for other any shapes for being applicable to transmission region.
It should be noted that transmission region shown in Fig. 5, Figure 20 and Figure 21, is carried out to the shape of transmission region
It limits, certain position for not being located at array substrate to the transmission region of which kind of shape is defined, the transparent area of any position
Domain can be the combination of any of the above-described shape or multiple shapes, be not specifically limited herein.
Based on the same inventive concept, the embodiment of the invention also provides a kind of liquid crystal display panels, as shown in figure 22, including
Array substrate 50, opposite substrate 40 in any of the above-described embodiment of the present invention and be located at array substrate 50 and opposite substrate 40 it
Between liquid crystal layer 60；
Opposite substrate 40 includes color blocking region 41, and orthographic projection of the color blocking region 41 on underlay substrate at least covers light transmission
Orthographic projection of the region (b1/b2) on underlay substrate.
Specifically, in above-mentioned liquid crystal display panel provided in an embodiment of the present invention, further include：It is arranged in array substrate face
To the common electrode layer of side or opposite substrate towards array substrate side of opposite substrate；
Voltage and common electrode layer in the first electrode of the first electrode of first storage capacitance and/or the second storage capacitance
On voltage it is identical.
Based on the same inventive concept, the embodiment of the invention also provides a kind of display devices, as shown in figure 23, including this hair
The above-mentioned liquid crystal display panel that bright embodiment provides.The display device can be：Mobile phone, tablet computer, television set, display,
Any products or components having a display function such as laptop, Digital Frame, navigator.For the other of the display device
Essential component part is it will be apparent to an ordinarily skilled person in the art that having, and this will not be repeated here, is not also answered
As limitation of the present invention.The implementation of the display device may refer to the embodiment of above-mentioned liquid crystal display panel, repeat place
It repeats no more.
A kind of array substrate, liquid crystal display panel and display device provided in an embodiment of the present invention, the array substrate include：
The data line on the underlay substrate and scan line is arranged in underlay substrate；And multiple pixel regions being arranged in array, often
A pixel region includes the first sub-pixel area domain for being provided with the first pixel electrode and be provided with the second pixel electrode the
Two subpixel areas；The first sub-pixel area domain includes the first storage capacitance subregion, and second subpixel area includes
Second storage capacitance subregion；The first storage capacitance subregion and the second storage capacitance subregion are along the data line
Extending direction arrangement, it is described for driving the scan line of first pixel electrode and second pixel electrode to be located at
Between first storage capacitance subregion and the second storage capacitance subregion, wherein the first storage capacitance subregion is set
It is equipped with the first storage capacitance, the second storage capacitance subregion is provided with the second storage capacitance；By the way that transmission region is arranged
Mode between the first storage capacitance subregion and the second storage capacitance subregion, keeps the transmission region vacant
Region where first storage capacitance and the second storage capacitance, thus the value of the first storage capacitance and the second storage capacitance not by
To influence, compensation is made for the brightness of liquid crystal display panel in the case where guaranteeing that storage capacitance value is unaffected to realize,
To improve the display effect of liquid crystal display panel.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (12)
1. a kind of array substrate, which is characterized in that including：Underlay substrate, the data line being arranged on the underlay substrate and sweeps
Retouch line；And multiple pixel regions being arranged in array, each pixel region include be provided with the first pixel electrode
One subpixel area and the second subpixel area for being provided with the second pixel electrode；
The first sub-pixel area domain includes the first storage capacitance subregion, and second subpixel area includes the second storage electricity
Hold subregion；The extending direction of the first storage capacitance subregion and the second storage capacitance subregion along the data line
Arrangement, for driving the scan line of first pixel electrode and second pixel electrode to be located at the first storage electricity
Hold between subregion and the second storage capacitance subregion, wherein the first storage capacitance subregion is provided with first and deposits
Storage is held, and the second storage capacitance subregion is provided with the second storage capacitance；
It further include transmission region, the transmission region is located at the first storage capacitance subregion and second storage capacitance
Between region.
2. array substrate as described in claim 1, which is characterized in that the transmission region includes corresponding first sub-pixel
The sub- transmission region of the first of region, and, the second sub- transmission region of corresponding second subpixel area.
3. array substrate as claimed in claim 2, which is characterized in that be located at first pixel electrode and second pixel
The scan line between electrode includes the first scan line, the second scan line and third scan line, the first sub- transmission region
Between first scan line and second scan line, and/or, the second sub- transmission region is located at described second and sweeps
It retouches between line and the third scan line.
4. array substrate as claimed in claim 2, which is characterized in that the first sub- transmission region is located at first storage
Between capacitor subregion and the scan line, and/or, the second sub- transmission region is located at the second storage capacitance subregion
Between the scan line.
5. array substrate as described in claim 1, which is characterized in that first pixel electrode include first transparency electrode and
First reflective metal layer, the first transparency electrode and first reflective metal layer are in contact；
Second pixel electrode includes second transparency electrode and the second reflective metal layer, the second transparency electrode and described
Two reflective metal layers are in contact；
First reflective metal layer at least covers first storage capacitance, described in second reflective metal layer at least covers
Second storage capacitance；
At least there are the first overlapping regions with first scan line for the first transparency electrode, and the second transparency electrode is at least
There are the second overlapping regions with the third scan line.
6. array substrate as described in claim 1, which is characterized in that further include：With the data line and the scan line phase
Switching transistor even；
First storage capacitance and second storage capacitance respectively include first electrode and second electrode, and described first deposits
The first electrode and/or the first electrode of second storage capacitance and the grid same layer of the switching transistor that storage is held are set
It sets.
7. array substrate as claimed in claim 6, which is characterized in that the second electrode of first storage capacitance and/or institute
The source-drain electrode same layer of the second electrode and the switching transistor of stating the second storage capacitance is arranged.
8. such as the described in any item array substrates of claim 1-7, which is characterized in that the area in the first sub-pixel area domain with
The area of second subpixel area is unequal.
9. such as the described in any item array substrates of claim 1-7, which is characterized in that the shape of the transmission region includes：Square
One of shape, triangle, polygon and/or circle or combination.
10. a kind of liquid crystal display panel, which is characterized in that including such as described in any item array substrates of claim 1-9, opposite direction
Substrate and the liquid crystal layer between the array substrate and the opposite substrate；
The opposite substrate includes color blocking region, and orthographic projection of the color blocking region on the underlay substrate at least covers institute
State orthographic projection of the transmission region on the underlay substrate.
11. liquid crystal display panel as claimed in claim 10, which is characterized in that further include：It is arranged in the array substrate face
To the common electrode layer of side or the opposite substrate towards the array substrate side of the opposite substrate；
Voltage and the public affairs in the first electrode of the first electrode of first storage capacitance and/or second storage capacitance
Voltage in common electrode layer is identical.
12. a kind of display device, which is characterized in that including liquid crystal display panel as described in claim 10 or 11.
Priority Applications (2)
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| CN201810714042.XA CN108873523B (en) | 2018-06-29 | 2018-06-29 | Array substrate, liquid crystal display panel and display device |
| CN202110538280.1A CN113219748B (en) | 2018-06-29 | 2018-06-29 | Array substrate, liquid crystal display panel and display device |
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| CN201810714042.XA CN108873523B (en) | 2018-06-29 | 2018-06-29 | Array substrate, liquid crystal display panel and display device |
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| CN202110538280.1A Division CN113219748B (en) | 2018-06-29 | 2018-06-29 | Array substrate, liquid crystal display panel and display device |
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Also Published As
| Publication number | Publication date |
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| CN108873523B (en) | 2021-06-08 |
| CN113219748B (en) | 2023-05-26 |
| CN113219748A (en) | 2021-08-06 |
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