CN108845963A - A kind of rapid transmission method of the CIS AFE(analog front end) data based on FPGA - Google Patents
A kind of rapid transmission method of the CIS AFE(analog front end) data based on FPGA Download PDFInfo
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Abstract
A kind of rapid transmission method of the CIS AFE(analog front end) data based on FPGA, it is characterised in that:It includes the following steps:(1) CIS AFE(analog front end) multichannel point-by-point data cache on high-speed chip using the RAM of FPGA;(2) it when getting three full line data of rgb format of the point-by-point data of CIS AFE(analog front end) multichannel, reorders to data;(3) by FPGA by three full line data conversions of the rgb format after sequence at three full line data of yuv format, and be buffered in the RAM of FPGA;(4) three full line data of the yuv format cached in RAM are transferred to the camera class data-interface of back-end processor, and return step (1) by FPGA.This method can not only reduce production and design cost, optimization complete machine operational performance but also the camera class data-interface that can be compatible with back-end processor.
Description
Technical field
The present invention relates to technical field of data transmission, and in particular to a kind of CIS AFE(analog front end) data based on FPGA it is fast
Fast transmission method.
Background technique
Contact-type image sensor (Contact Image Sensor, hereinafter referred to as CIS) is mainly used for duplicator, fax
Machine starts the photoelectric signal collection equipment applied to financial machine and tool in recent years.The working principle of CIS is utilized with matrix arrangement
Built-in light emitting diode be small light source after scanned medium reflection light, capture that be converted into electric signal final by photoreceptor
Form the complete image of sweep object.By LED light source array, micro- self-focusing rod type lens array, photoelectric sensor battle array inside CIS
The multiple portions composition such as column and its circuit board.Focusing rod-shaped lens inside CIS scanner are grouping settings, and every group by several
A micro- self-focusing rod-shaped lens are discharged by array, are discharged side by side between group and group, thus one big focusing rod-shaped lens of composition
Array.
The electric signal that 3-6 analog channel is usually arranged for the storage of output photoelectric sensor in CIS at present is to improve scanning
Speed obtains CIS AFE(analog front end) number after the analog output in above-mentioned multiple channels is linked into multi-disc multi-channel parallel output ADC
According to.Such as A3 breadth, 7344 pixels of a behavior are set, using 6 analog channels H1, H2, H3, H4, H5, H6, wherein
H1 respective pixel 1, pixel 2 ... pixel 1296, H2 respective pixel 1297, pixel 1298 ... pixel 2592, H3 respective pixel 2593,
Pixel 2594 ... pixel 3888, H4 respective pixel 3889, pixel 3890 ... pixel 5184, H5 respective pixel 5185, pixel
5186 ... pixels 6480, H6 respective pixel 6481, pixel 6482 ... pixel 7344.In this way using the quick RAM of FPGA to simulation
When multichannel point-by-point data in front end carry out receiving caching on high-speed chip, three full line data of the rgb format of CIS are got such as
Under:
It can see from three full line data derived above, what CIS was exported is the data of rgb format, and sequence is complete
It is disturbed entirely, it is not corresponding with the home position of each pixel.And the back-end processor of existing mobile phone, tablet computer etc. generally connects
What is received is the camera class data of yuv format, because the data of yuv format compare the data of rgb format in terms of data compression
With greater advantage, and data compression to data it is quick transmission play an important role.Therefore at present usually at rear end
Conversion module is set on reason device, the data for the rgb format that CIS can not only be enable to export are transferred to the camera class of back-end processor
Data-interface, and since back-end processor has Memory Controller Hub, it can facilitate and the data being sequentially disturbed are accessed.
But the transmission method of existing CIS AFE(analog front end) data still has following technical problem:Due to different productions
The circuit of product, its rear end processor is ever-changing, and conversion module is arranged on back-end processor, needs for different products
The circuit of different back-end processors is designed, this undoubtedly increases the cost of production and design;And at A3 (297mm*400mm)
In the application of breadth high speed scanner, it is desirable that paper feed number is sent into the figure of back-end processor from AFE(analog front end) in 120/point or more
In 200MB/s or more, back-end processor needs to carry out gray scale stretching, white balance correction, gamma and rectifys picture data-interface bandwidth requirement
Just, edge such as cuts at the multinomial time-consuming operation, and the increase of conversion module, undoubtedly increases subsequent flow chart of data processing, makes original
The arithmetic speed for originally needing to carry out the back-end processor of multinomial time-consuming operation is further slack-off, to also affect the fast of data
Speed transmission.
Summary of the invention
The technical problem to be solved by the present invention is to:Production and design cost, optimization complete machine operation can both have been reduced by providing one kind
Performance, again can be compatible with back-end processor camera class data-interface the CIS AFE(analog front end) data based on FPGA quick biography
Transmission method.
The technical solution of the invention is as follows:A kind of rapid transmission method of the CIS AFE(analog front end) data based on FPGA, should
Method is applied to the quick transmission devices of CIS AFE(analog front end) data, and the quick transmission devices of the CIS AFE(analog front end) data include
FPGA, CIS and back-end processor, it is characterised in that:It includes the following steps:
(1) CIS AFE(analog front end) multichannel point-by-point data cache on high-speed chip using the RAM of FPGA;
(2) when getting three full line data of rgb format of the point-by-point data of CIS AFE(analog front end) multichannel, to data
It reorders, keeps it corresponding with the home position of each pixel;
(3) by FPGA by three full line data conversions of the rgb format after sequence at three full line data of yuv format,
And by three full line data buffer storages of yuv format in the RAM of FPGA;
(4) three full line data of the yuv format cached in RAM are transferred to the camera class of back-end processor by FPGA
Data-interface, completes the transmission of three full line data of a rgb format, and return step (1) carries out rgb format next time
The transmission of three full line data.
After adopting the above method, the present invention has the following advantages that:
The present invention is based on the rapid transmission methods of the CIS AFE(analog front end) data of FPGA by the Data Format Transform of RGB and YUV
Process setting carries out on CIS, so that the circuit of back-end processor can make CIS AFE(analog front end) number without resetting
According to the compatible back-end processor of output format camera class data-interface, so that the cost of production and design be greatly saved;
Secondly as the data of CIS final output are yuv formats, to be effectively simplified the process that data enter back-end processor, no
It will affect back-end processor and carry out multinomial time-consuming operation, so that complete machine operational performance improves, and be conducive to data and quickly transmit;Again
It is secondary before being converted into yuv format, also first reorder to three full line data of rgb format, so that it is fast to be conducive to FPGA
Speed access data, therefore also further improve the transmission speed of data.
Preferably, the yuv format is YUV422 format, conversion formula is as follows:
Y=0.257R+0.504G+0.098B+16
Cb=-0.148R-0.291G+0.439B+128
Cr=0.439R-0.368G-0.071B+128.
YUV422 format can be preferably compatible with camera class data-interface, facilitates subsequent carry out image procossing, and occupy
Memory is less, is conducive to the compression of data, so as to make the transmission of data more rapidly.
Preferably, the CIS has 7344 pixels, the CIS got in step (2) using A3 breadth and a line
Three full line data of the rgb format of the point-by-point data of AFE(analog front end) multichannel are as follows:
After resetting to it, data are as follows:
The image that the setting can be such that CIS scanning obtains is relatively clear, and display effect is preferable.
Preferably, the RAM of the FPGA is quick RAM, the camera class data-interface of the back-end processor is
MIPI interface.The setting can further improve the transmission speed of data.
Detailed description of the invention:
Fig. 1 is that the present invention is based on the flow charts of the rapid transmission method of the CIS AFE(analog front end) data of FPGA;
Specific embodiment
With reference to the accompanying drawing, and in conjunction with the embodiments the present invention is described further.
Embodiment:
A kind of rapid transmission method of the CIS AFE(analog front end) data based on FPGA, this method are applied to CIS AFE(analog front end) number
According to quick transmission devices, the quick transmission devices of the CIS AFE(analog front end) data include FPGA, CIS and back-end processor, with
For A3 breadth, a line has 7344 pixels, and this approach includes the following steps:
(1) CIS AFE(analog front end) multichannel point-by-point data cache on high-speed chip using the quick RAM of FPGA;
(2) when three full line data of the rgb format for getting the point-by-point data of CIS AFE(analog front end) multichannel:
It reorders to it, keeps it corresponding with the home position of each pixel, three of the rgb format after reordering
Full line data are as follows:
(3) by FPGA by three full line data conversions of the rgb format after sequence at three full line numbers of YUV422 format
According to conversion formula is as follows:
Y=0.257R+0.504G+0.098B+16
Cb=-0.148R-0.291G+0.439B+128
Cr=0.439R-0.368G-0.071B+128,
By three full line data buffer storages of the yuv format after above-mentioned conversion in the quick RAM of FPGA;
(4) three full line data of the yuv format cached in quick RAM are transferred to the MIPI of back-end processor by FPGA
Interface completes the transmission of three full line data of a rgb format, and return step (1) carries out three of rgb format next time
The transmission of full line data.
The present invention is based on the rapid transmission methods of the CIS AFE(analog front end) data of FPGA by the Data Format Transform of RGB and YUV
Process setting carries out on CIS, so that the circuit of back-end processor can make the output data of CIS without resetting
The camera class data-interface of compatible back-end processor, so that the cost of production and design be greatly saved;Secondly as CIS
The data of final output are yuv formats, to be effectively simplified the process that data enter back-end processor, be will not influence at rear end
It manages device and carries out multinomial time-consuming operation, so that complete machine operational performance improves, and be conducive to data and quickly transmit;It is being converted into again
Before yuv format, also first reorder to three full line data of rgb format, thus be conducive to FPGA quick access to data,
Therefore the transmission speed of data is also further improved.
Claims (4)
1. a kind of rapid transmission method of the CIS AFE(analog front end) data based on FPGA, this method is applied to CIS AFE(analog front end) data
Quick transmission devices, the quick transmission devices of the CIS AFE(analog front end) data include FPGA, CIS and back-end processor, special
Sign is:It includes the following steps:
(1) CIS AFE(analog front end) multichannel point-by-point data cache on high-speed chip using the RAM of FPGA;
(2) when getting three full line data of rgb format of the point-by-point data of CIS AFE(analog front end) multichannel, data are carried out
It reorders, keeps it corresponding with the home position of each pixel;
(3) by FPGA by three full line data conversions of the rgb format after sequence at three full line data of yuv format, and will
Three full line data buffer storages of yuv format are in the RAM of FPGA;
(4) three full line data of the yuv format cached in RAM are transferred to the camera class data of back-end processor by FPGA
Interface completes the transmission of three full line data of a rgb format, and return step (1) carries out three of rgb format next time
The transmission of full line data.
2. a kind of rapid transmission method of CIS AFE(analog front end) data based on FPGA according to claim 1, feature exist
In:The yuv format is YUV422 format, and conversion formula is as follows:
Y=0.257R+0.504G+0.098B+16
Cb=-0.148R-0.291G+0.439B+128
Cr=0.439R-0.368G-0.071B+128.
3. a kind of rapid transmission method of CIS AFE(analog front end) data based on FPGA according to claim 1, feature exist
In:The CIS has 7344 pixels, the CIS AFE(analog front end) multichannel got in step (2) using A3 breadth and a line
Three full line data of the rgb format of point-by-point data are as follows:
After resetting to it, data are as follows:
4. a kind of rapid transmission method of CIS AFE(analog front end) data based on FPGA according to claim 1, feature exist
In:The RAM of the FPGA is quick RAM, and the camera class data-interface of the back-end processor is MIPI interface.
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Cited By (1)
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