CN108829969A - A kind of new and old circuit meshwork list comparison method and system based on circuit layout verifying - Google Patents
A kind of new and old circuit meshwork list comparison method and system based on circuit layout verifying Download PDFInfo
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- CN108829969A CN108829969A CN201810602009.8A CN201810602009A CN108829969A CN 108829969 A CN108829969 A CN 108829969A CN 201810602009 A CN201810602009 A CN 201810602009A CN 108829969 A CN108829969 A CN 108829969A
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- 238000000034 method Methods 0.000 title claims abstract description 15
- 239000003086 colorant Substances 0.000 claims abstract description 10
- 238000003780 insertion Methods 0.000 claims description 6
- 230000037431 insertion Effects 0.000 claims description 6
- 230000008676 import Effects 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims 1
- 230000008859 change Effects 0.000 abstract description 6
- 230000000116 mitigating effect Effects 0.000 abstract description 3
- 238000012544 monitoring process Methods 0.000 description 4
- 238000012795 verification Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 241000571940 Dracula Species 0.000 description 1
- 241000282312 Proteles Species 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Architecture (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The present invention provides a kind of new and old circuit meshwork list comparison methods and system based on circuit layout verifying, including：S1, new and old circuit meshwork list is exported using software for editing of universal circuit layout；S2, new and old circuit meshwork list is successively imported using new and old circuit meshwork list comparison software, is compared line by line；S3, comparison result is exported using document module for reading and writing, selectes and save output result path, and resultant content is in different colors or font is labeled.The present invention penetrates graphical operation automatic generation, and time and energy need to be expended by substantially mitigating circuit layout developer comparison new old edition circuit change place, and because being marked at the similarities and differences using different colours and font, output result readability is substantially improved.
Description
Technical field
The present invention relates to circuit layouts to verify field of automation technology, especially a kind of based on the new and old of circuit layout verifying
Circuit meshwork list comparison method and system.
Background technique
LVS full name be Layout Versus Schematics, be the verification tool of Dracula, for verify domain and
Whether logic chart matches.LVS compares the connectivity of domain and logic chart in transistor level, and exports all inconsistent ground
Side.It includes the inspection between domain and domain, logical AND logic, domain and logic.
It is advanced to automated circuit by traditional manual circuit layout (Layout) after the development of many decades electronics industry and evolution
Layout verification (EDA, Electronic Design Automation) tool is developed application successively, and existing most general
Circuit meshwork list alignment schemes mostly need additionally to buy more integrated circuit layout verification tool and carry out automation comparison or artificial
Mode compares, but this two scheme often results in need to additionally buy more integrated circuit layout verification tool, but actually only uses part
Netlist comparison function causes development cost and the wasting of resources, and manual type comparison is then easier to cause comparison result incorrect etc.
Problem.
Summary of the invention
The object of the present invention is to provide a kind of new and old circuit meshwork list comparison method and system based on circuit layout verifying, purports
Solve in the prior art for circuit layout verifying in using automation compare or manual type comparison exist it is at high cost
And the problem of wasting of resources, when realizing that substantially mitigating circuit layout developer comparison new old edition circuit change place need to expend
Between and energy, it is readable that output result is substantially improved.
To reach above-mentioned technical purpose, the present invention provides a kind of new and old circuit meshwork list comparisons based on circuit layout verifying
Method, which is characterized in that include the following steps：
S1, new and old circuit meshwork list is exported using software for editing of universal circuit layout；
S2, new and old circuit meshwork list is successively imported using new and old circuit meshwork list comparison software, is compared line by line；
S3, comparison result is exported using document module for reading and writing, selectes and save output result path, and resultant content is with difference
Color or font are labeled.
Preferably, described to be specially using software for editing of the universal circuit layout new and old circuit meshwork list of output：
Firstly, using software for editing of universal circuit layout generation circuit netlist and storing document；
Then, circuit layout content is changed, is generated again and storage new edition circuit meshwork list.
Preferably, the document format is * .dat or * .txt.
Preferably, described compare line by line is specially：
S201, using novel circuit netlist as file destination, using old circuit meshwork list as source file；
S202, it is respectively that an array TS [m] and TD [n] is arranged in source file and file destination, is used to store each element
Flag bit；
Whether S203, the element for the corresponding position for comparing source file and file destination are identical, from target if not identical
File current location is searched backward, if finding the element with source file Match of elemental composition, is arranged TD [j]=1, while TS
[i]=j, if TD [j]=- 1, while TS [i]=- 1 can be arranged with matched element by not finding；
S204, each of array TS [m] value is regarded into starting elemental respectively, then subsequent numerical value is sentenced
It is disconnected, increasing element number is recorded, finally compares each value as increasing element in starting elemental obtained TS [m] array
Number takes the largest number of one as a result, the element for be -1 in array TS [m] is the element deleted, is -1 in array TD [n]
Element be insertion element, complete compare.
The present invention also provides a kind of new and old circuit meshwork list Compare Systems based on circuit layout verifying, including：
New and old circuit meshwork list output module, for exporting new and old circuit meshwork list using software for editing of universal circuit layout；
Comparison module successively imports new and old circuit meshwork list for comparing software using new and old circuit meshwork list, is compared line by line
It is right；
As a result output module is selected for exporting comparison result using document module for reading and writing and saves output result path, and
Resultant content is in different colors or font is labeled.
Preferably, the new and old circuit meshwork list output module includes：
Old circuit meshwork list unit, for utilizing software for editing of universal circuit layout generation circuit netlist and storing document；
Novel circuit netlist unit generates and storage new edition circuit meshwork list again for changing circuit layout content.
Preferably, the document format is * .dat or * .txt.
Preferably, the comparison module includes：
File type determination unit is used for using novel circuit netlist as file destination, using old circuit meshwork list as source file；
Array initialization unit is arranged an array TS [m] and TD [n] for respectively source file and file destination, uses
To store the flag bit of each element；
Position comparing unit, it is whether identical for comparing the element of corresponding position of source file and file destination, if not
It is identical, it searches from file destination current location, if finding the element with source file Match of elemental composition, is arranged TD [j] backward
=1, while TS [i]=j, if TD [j]=- 1, while TS [i]=- 1 can be arranged with matched element by not finding；
Array end value determination unit is then right for each of array TS [m] value to be regarded starting elemental respectively
Subsequent numerical value is judged, is recorded increasing element number, is finally compared each value as the obtained TS of starting elemental [m]
Increasing element number in array, take the largest number of one as a result, the element for being -1 in array TS [m] be delete member
Element, the element for being -1 in array TD [n] are the element of insertion, complete to compare.
The effect provided in summary of the invention is only the effect of embodiment, rather than invents all whole effects, above-mentioned
A technical solution in technical solution has the following advantages that or beneficial effect：
Compared with prior art, the present invention carries out corresponding Net_ using the concept that automation parses new and old two parts of circuit meshwork lists
Name and Node_Nme content compares line by line, and different colours and font mark output comparison result, therefore unrestricted only services
Device product uses, it is only necessary to use circuit meshwork list source grade (the * .dat for needing first to obtain the output of circuit layout software for editing before this tool
Or * .txt File Format), and sequentially import with this source shelves, parsing and compare i.e. exportable new and old circuit meshwork list line by line and compare
As a result, Apache POI increases income program module as quite universal Java open source program at the same time, therefore in NLC software transfer
It is very convenient, graphical operation automatic generation is finally penetrated, substantially mitigates circuit layout developer and compares new old edition electricity
Road change place need to expend time and energy, and because output result is readable at using different colours and the font mark similarities and differences
It is substantially improved.
Detailed description of the invention
Fig. 1 is a kind of new and old circuit meshwork list comparison method based on circuit layout verifying provided in the embodiment of the present invention
Flow chart；
Fig. 2 is a kind of new and old circuit meshwork list comparison output content stencil schematic diagram provided in the embodiment of the present invention；
Fig. 3 is a kind of new and old circuit meshwork list Compare System based on circuit layout verifying provided in the embodiment of the present invention
Structural block diagram.
Specific embodiment
In order to clearly illustrate the technical characterstic of this programme, below by specific embodiment, and its attached drawing is combined, to this
Invention is described in detail.Following disclosure provides many different embodiments or example is used to realize different knots of the invention
Structure.In order to simplify disclosure of the invention, hereinafter the component of specific examples and setting are described.In addition, the present invention can be with
Repeat reference numerals and/or letter in different examples.This repetition is that for purposes of simplicity and clarity, itself is not indicated
Relationship between various embodiments and/or setting is discussed.It should be noted that illustrated component is not necessarily to scale in the accompanying drawings
It draws.Present invention omits the descriptions to known assemblies and treatment technology and process to avoid the present invention is unnecessarily limiting.
It is provided for the embodiments of the invention a kind of new and old circuit meshwork list based on circuit layout verifying with reference to the accompanying drawing
Comparison method is described in detail with system.
As shown in Figure 1, the embodiment of the invention discloses a kind of new and old circuit meshwork lists based on circuit layout verifying to compare other side
Method includes the following steps：
S1, new and old circuit meshwork list is exported using software for editing of universal circuit layout；
S2, new and old circuit meshwork list is successively imported using new and old circuit meshwork list comparison software, is compared line by line；
S3, comparison result is exported using document module for reading and writing, selectes and save output result path, and resultant content is with difference
Color or font are labeled.
Using software for editing of universal circuit layout, such as Protel etc. exports new and old circuit meshwork list, specially following behaviour
Make：
First with software for editing of universal circuit layout generation circuit netlist and document is stored, the document format is *
Or * .txt .dat；
Then circuit layout content, including newly-increased original part and route modification are changed, after changing circuit layout content, then
Secondary generation and storage new edition circuit meshwork list.
Realize that new and old circuit meshwork list compares software NLC by the cross-platform sentence such as Java high, click respectively " Load Old
Nelist " with " Load New Nelist " key, successively import new and old circuit meshwork list.
Since new and old circuit network tableau format is identical, when circuit content changes, corresponding field can also change
Become, therefore the circuit meshwork list to * .dat or * .txt format is taken to be compared line by line, in embodiments of the present invention using monitoring
The text comparison algorithm of content of text variation is compared.Text comparison algorithm for monitoring content of text variation is different from
Common text comparison algorithm, the main function of monitoring are whether monitoring file content changes, but for being monitored
Whether variation out is that minimum difference requirement is not stringent, is not necessary to guaranty that maximum matching, comparison rate can be improved.
Using novel circuit netlist as file destination, using old circuit meshwork list as source file.Assuming that source file has m element,
And file destination has n element, firstly, an array TS [m] and TD [n] is arranged in respectively source file and file destination, is used to
The flag bit for storing each element, whether the element for comparing the corresponding position of source file and file destination is identical, if not identical
It then searches from file destination current location, if finding the element with source file Match of elemental composition, is arranged TD [j]=1 backward,
TS [i]=j simultaneously, if TD [j]=- 1, while TS [i]=- 1 can be arranged with matched element by not finding.When source
After all elements of file are primary all compared with file destination, the array TS [m] and TD [n] of two assignment are just obtained.It will count
Each of group TS [m] value regards starting elemental respectively, then judges subsequent numerical value, record increasing element
Number, finally compares each value as increasing element number in starting elemental obtained TS [m] array, takes the largest number of one
It is a as a result, it is assumed that k is designated as under the element, the value before last TS [k] is changed to -1 entirely, behind nonincreasing values be also changed to -
1, it is exported according to the value of TS [m] and TD [n] as a result, result can be divided into two parts, the element for being -1 in array TS [m] is deletion
Element, the element for being -1 in array TD [n] is the element of insertion.During entire matched, if successful match
The element crossed cannot participate in the matching of other elements again.
After the completion of comparison, by clicking another key of NLC software " Compare two Nelist ", Java open source is called
EXCEL document module for reading and writing Apache POI exports comparison result, selectes and saves output result path, and resultant content is with difference
Color or font are labeled, as shown in Fig. 2, allow operator can be with the new and old circuit meshwork list change of apparent at.
The present invention carries out corresponding Net_Name and Node_Nme using the concept that automation parses new and old two parts of circuit meshwork lists
Content compares line by line, and different colours and font mark output comparison result, therefore unrestricted only server product uses, it is only necessary to
Use circuit meshwork list source shelves (* .dat or * the .txt archives lattice for needing first to obtain the output of circuit layout software for editing before this tool
Formula), and source shelves, parsing are imported sequentially with this and compare i.e. exportable new and old circuit meshwork list comparison result line by line, at the same time
Apache POI increases income program module as quite universal Java open source program, therefore very convenient in NLC software transfer, finally
Through graphical operation automatic generation, substantially mitigating circuit layout developer comparison new old edition circuit change place needs to consume
Time-consuming and energy, and because output result readability is substantially improved at using different colours and the font mark similarities and differences.
As shown in figure 3, the embodiment of the invention also discloses a kind of new and old circuit meshwork list comparisons based on circuit layout verifying
System, including：
New and old circuit meshwork list output module, for exporting new and old circuit meshwork list using software for editing of universal circuit layout；
Comparison module successively imports new and old circuit meshwork list for comparing software using new and old circuit meshwork list, is compared line by line
It is right；
As a result output module is selected for exporting comparison result using document module for reading and writing and saves output result path, and
Resultant content is in different colors or font is labeled.
The new and old circuit meshwork list output module includes：
Old circuit meshwork list unit, for utilizing software for editing of universal circuit layout generation circuit netlist and storing document, institute
Stating document format is * .dat or * .txt；
Novel circuit netlist unit generates and storage new edition circuit meshwork list again for changing circuit layout content.
The comparison module includes：
File type determination unit is used for using novel circuit netlist as file destination, using old circuit meshwork list as source file；
Array initialization unit is arranged an array TS [m] and TD [n] for respectively source file and file destination, uses
To store the flag bit of each element；
Position comparing unit, it is whether identical for comparing the element of corresponding position of source file and file destination, if not
It is identical, it searches from file destination current location, if finding the element with source file Match of elemental composition, is arranged TD [j] backward
=1, while TS [i]=j, if TD [j]=- 1, while TS [i]=- 1 can be arranged with matched element by not finding；
Array end value determination unit is then right for each of array TS [m] value to be regarded starting elemental respectively
Subsequent numerical value is judged, is recorded increasing element number, is finally compared each value as the obtained TS of starting elemental [m]
Increasing element number in array, take the largest number of one as a result, the element for being -1 in array TS [m] be delete member
Element, the element for being -1 in array TD [n] are the element of insertion, complete to compare.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within mind and principle.
Claims (8)
1. a kind of new and old circuit meshwork list comparison method based on circuit layout verifying, which is characterized in that include the following steps：
S1, new and old circuit meshwork list is exported using software for editing of universal circuit layout；
S2, new and old circuit meshwork list is successively imported using new and old circuit meshwork list comparison software, is compared line by line；
S3, comparison result is exported using document module for reading and writing, selectes and save output result path, and resultant content is in different colors
Or font is labeled.
2. a kind of new and old circuit meshwork list comparison method based on circuit layout verifying according to claim 1, feature exist
In described to be specially using software for editing of the universal circuit layout new and old circuit meshwork list of output：
Firstly, using software for editing of universal circuit layout generation circuit netlist and storing document；
Then, circuit layout content is changed, is generated again and storage new edition circuit meshwork list.
3. a kind of new and old circuit meshwork list comparison method based on circuit layout verifying according to claim 2, feature exist
In the document format is * .dat or * .txt.
4. a kind of new and old circuit meshwork list comparison method based on circuit layout verifying according to claim 1, feature exist
In described compare line by line is specially：
S201, using novel circuit netlist as file destination, using old circuit meshwork list as source file；
S202, it is respectively that an array TS [m] and TD [n] is arranged in source file and file destination, is used to store the mark of each element
Will position；
Whether S203, the element for the corresponding position for comparing source file and file destination are identical, from file destination if not identical
Current location is searched backward, if finding the element with source file Match of elemental composition, is arranged TD [j]=1, while TS [i]=
J, if TD [j]=- 1, while TS [i]=- 1 can be arranged with matched element by not finding；
S204, each of array TS [m] value is regarded into starting elemental respectively, then subsequent numerical value is judged, is remembered
Increasing element number is recorded, finally compares each value as increasing element number in starting elemental obtained TS [m] array, takes
The largest number of one as a result, the element for being -1 in array TS [m] is the element deleted, the member for being -1 in array TD [n]
Element is the element of insertion, completes to compare.
5. a kind of new and old circuit meshwork list Compare System based on circuit layout verifying, which is characterized in that including：
New and old circuit meshwork list output module, for exporting new and old circuit meshwork list using software for editing of universal circuit layout；
Comparison module successively imports new and old circuit meshwork list for comparing software using new and old circuit meshwork list, is compared line by line；
As a result output module is selected for exporting comparison result using document module for reading and writing and saves output result path, and result
Content is in different colors or font is labeled.
6. a kind of new and old circuit meshwork list Compare System based on circuit layout verifying according to claim 5, feature exist
In the new and old circuit meshwork list output module includes：
Old circuit meshwork list unit, for utilizing software for editing of universal circuit layout generation circuit netlist and storing document；
Novel circuit netlist unit generates and storage new edition circuit meshwork list again for changing circuit layout content.
7. a kind of new and old circuit meshwork list Compare System based on circuit layout verifying according to claim 6, feature exist
In the document format is * .dat or * .txt.
8. a kind of new and old circuit meshwork list Compare System based on circuit layout verifying according to claim 6, feature exist
In the comparison module includes：
File type determination unit is used for using novel circuit netlist as file destination, using old circuit meshwork list as source file；
An array TS [m] and TD [n] is arranged for respectively source file and file destination, for depositing in array initialization unit
Put the flag bit of each element；
Position comparing unit, it is whether identical for comparing the element of corresponding position of source file and file destination, if not identical
It then searches from file destination current location, if finding the element with source file Match of elemental composition, is arranged TD [j]=1 backward,
TS [i]=j simultaneously, if TD [j]=- 1, while TS [i]=- 1 can be arranged with matched element by not finding；
Array end value determination unit, for each of array TS [m] value to be regarded starting elemental respectively, then to below
Numerical value judged, record increasing element number, finally compare each value as starting elemental obtained TS [m] array
Middle increasing element number, take the largest number of one as a result, the element for being -1 in array TS [m] be delete element, number
The element for being -1 in group TD [n] is the element of insertion, completes to compare.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810602009.8A CN108829969A (en) | 2018-06-12 | 2018-06-12 | A kind of new and old circuit meshwork list comparison method and system based on circuit layout verifying |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810602009.8A CN108829969A (en) | 2018-06-12 | 2018-06-12 | A kind of new and old circuit meshwork list comparison method and system based on circuit layout verifying |
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| CN108829969A true CN108829969A (en) | 2018-11-16 |
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| CN201810602009.8A Withdrawn CN108829969A (en) | 2018-06-12 | 2018-06-12 | A kind of new and old circuit meshwork list comparison method and system based on circuit layout verifying |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112416867A (en) * | 2020-12-11 | 2021-02-26 | 北京华大九天软件有限公司 | Method for comparing netlists in batches |
| CN112579376A (en) * | 2020-12-16 | 2021-03-30 | 中国建设银行股份有限公司 | Double-run-stage data verification method, system, equipment and storage medium |
-
2018
- 2018-06-12 CN CN201810602009.8A patent/CN108829969A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112416867A (en) * | 2020-12-11 | 2021-02-26 | 北京华大九天软件有限公司 | Method for comparing netlists in batches |
| CN112579376A (en) * | 2020-12-16 | 2021-03-30 | 中国建设银行股份有限公司 | Double-run-stage data verification method, system, equipment and storage medium |
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Application publication date: 20181116 |
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