CN108809330B - LDPC code decoding method for NAND-Flash storage medium - Google Patents
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Abstract
The invention particularly relates to an LDPC code decoding method aiming at NAND-Flash storage media and based on variable node message preprocessing. The decoding method fully utilizes the channel characteristics of NAND-Flash, firstly selects the storage units with the voltage values in the overlapping area among the storage states, selects the corresponding fuzzy variable nodes from the selected storage units, divides the fuzzy variable nodes into a set, and then performs message preprocessing on the set. The three-step operation in the message pre-processing updates the fuzzy variable node with a message that is considered reliable and prevents the transfer of the fuzzy variable node message. After the information of the fuzzy variable node is considered to be reliable, the oscillation phenomenon in the original decoding method is considered, and the alternate updating step aiming at the oscillation variable node is adopted in the subsequent decoding iteration. The result shows that the decoding method for the NAND-Flash storage medium has higher decoding precision.
Description
Technical Field
The invention relates to the technical field of communication, in particular to an LDPC code decoding method for NAND-Flash storage media.
Background
An LDPC (Low Density Parity Check) code is a linear block code first proposed by Gallager in the sixties of the twentieth century, and compared with a Turbo code, an LDPC code is easier to implement in hardware and has a shorter decoding delay. Because the LDPC code is an error correction code that can maximally approach the shannon limit performance, the LDPC code has become a class of error correction codes selected in the ITU standards for 5G communications.
In the early days of the proposed LDPC codes, although they showed good performance in error correction, they were not well developed because of limitations in storage and computation capabilities at that time. Until 1996, MacKay and Neal summarized on the basis of their results, and further showed that LDPC codes are really a practical good code from the standpoint of practical performance and theory of LDPC codes through detailed discussion. Moreover, based on Gallager research, MacKay and Neal discuss a specific implementation method of Belief Propagation (BP) in detail. This achievement is a milestone in the field of error correction coding, which has greatly pushed the research of LDPC codes. With the development of 20 years later, the LDPC code is gradually taking advantage of it and plays an indispensable role in the fields of communication, storage, and computers. For example, LDPC codes play an important role in optical fiber communications, network data transmission, deep space communications, and high speed wireless local area network communications.
Decoding methods of LDPC codes are generally classified into hard-decision decoding and soft-decision decoding. The hard decision decoding realizes error correction by inverting the bit, has the advantages of low decoding complexity and simple hardware implementation, but has the defect of poor performance and can not achieve the expected error correction performance in some practical applications. In the soft-decision decoding, there is a more classical decoding algorithm, which is called BP decoding algorithm. The BP decoding algorithm and the LLR-BP decoding algorithm in the logarithm domain are decoded in a parallel mode, the performance of the BP decoding algorithm is greatly improved compared with that of a decision decoding algorithm, and the decoding complexity is increased. Because the decoding algorithm based on parallel scheduling cannot utilize the message obtained by updating the iteration in one iteration, the decoding performance of the decoding algorithm has a bottleneck and the convergence speed is low. For the situation, Zhang and Hocevar, etc. respectively provide a decoding algorithm based on serial scheduling, so that the updated information of the current iteration can be immediately transmitted for subsequent updating, the decoding convergence speed is doubled, and a lower error code level layer is possessed. In recent years, various dynamic scheduling algorithms have been proposed successively on the basis of a serial scheduling-based decoding algorithm to further increase the convergence rate and improve the decoding performance, but the excellent decoding performance and the fast convergence rate are obtained at the cost of extremely high decoding complexity.
NAND-Flash is a nonvolatile solid-state memory which is widely applied at present, and has the characteristics of high read-write speed, low power consumption, light volume and the like. The NAND-Flash can be further classified into SLC, MLC, TLC and QLC types according to the number of bits capable of storing data bits in a memory cell. SLC means that one memory cell can store 1 bit of data, MLC means that one memory cell can store 2 bits of data, TLC means that one memory cell can store 3 bits of data, and QLC means that one memory cell can store 4 bits of data. With the development of the technology, the storage capacity of the NAND-Flash is larger and larger, but at the same time, the overlapping condition between the voltage distribution states is more serious due to the improvement of the storage density, the interference between the storage units is greatly increased, and the noise tolerance of the NAND-Flash is greatly reduced. The NAND-Flash mainly has interference noise, programming noise, random telegraph noise, and data retention noise between memory cells. Therefore, in order to guarantee the reliability of data, an error correction code must be applied to the NAND-Flash memory system. With the increase of the storage capacity of NAND-Flash, the error correction capability of BCH codes and RS codes decoded based on hard decision is far from meeting the requirement of the system on decoding performance, so that a code with strong error correction capability needs to be applied to the NAND-Flash. The LDPC code has excellent error correction performance, can approach to the Shannon limit to the greatest extent, and has higher convergence rate and lower error code level, so that the application of the LDPC code to the NAND-Flash memory is a main solution for solving the problem of reliability of data stored in the existing Flash memory technology and is also a main research hotspot in the field of high-density storage at present.
The LDPC code is applied to the NAND-Flash, so that the decoding performance is ensured, and the specific application scene of the NAND-Flash is met. For example, the requirements of low latency, high throughput, and low cost of high density flash memory need to be met. Therefore, a reasonable trade-off between coding performance and coding efficiency needs to be made.
Disclosure of Invention
The error correction performance of the hard decision decoding algorithm of the LDPC code and the traditional LLR-BP parallel decoding algorithm is not good enough, and the requirement of NAND-Flash on the data reliability under high storage density cannot be met. Meanwhile, the complexity of the dynamic scheduling decoding algorithm is very high, the hardware implementation difficulty is high, and the requirements of a high-density flash memory on low time delay and high throughput are completely not met.
In order to overcome the defects of the prior art, the invention provides an LDPC code decoding method aiming at a NAND-Flash storage medium, which balances decoding performance and decoding complexity, and provides the LDPC code decoding method aiming at the NAND-Flash storage medium based on variable node message preprocessing based on the traditional serial scheduling decoding algorithm and aiming at the channel characteristics of NAND-Flash, so that the algorithm can concentrate computing resources at the initial decoding stage, update the messages considered unreliable by using the messages considered reliable, and block the unreliable messages to prevent the unreliable messages from participating in the updating process of other variable nodes. The decoding method can accelerate the convergence speed of the algorithm and improve the decoding performance.
In view of the above technical problems, the present invention is to solve the following problems: an LDPC code decoding method aiming at NAND-Flash storage media comprises the following steps:
s1, in a NAND-Flash storage medium channel, overlapping areas exist among voltage states possibly existing in each storage unit, the more erasing times of the NAND-Flash storage medium channel are, the more obvious the overlapping areas are, the storage units with voltage values in the overlapping areas are screened out, bits with values tending to be uncertain are selected from each storage unit, variable nodes corresponding to the bits are marked as fuzzy variable nodes, transmission of V2C messages of the fuzzy variable nodes is blocked, and the V2C messages refer to information transmitted to check nodes by the variable nodes; simultaneously, screening the bits which are not selected in the storage units in the overlapping area and all the bits in the storage units in the non-overlapping area, and classifying the variable nodes corresponding to the bits into non-fuzzy variable nodes;
s2, classifying the classes of the check nodes according to the number of fuzzy variable nodes connected with the check nodes, specifically: such check nodes without any fuzzy variable nodes connected are called check nodes of type 0 and are denoted as T0(ii) a Such check nodes connected with 1 fuzzy variable node are called I-type check nodes and marked as T1(ii) a Such check nodes connected with 2 fuzzy variable nodes are called II type check nodes and marked as T2(ii) a The check nodes connected with n (n is more than or equal to 3) fuzzy variable nodes are called n check nodes and marked as Tn；
S3, based on the check node type, executing message preprocessing operation on the fuzzy variable node: the fuzzy variable nodes are updated with the non-fuzzy variable node messages until all fuzzy variable nodes have been transformed into non-fuzzy variable nodes and a message can be generated that is considered reliable, and the message preprocessing operation ends. After the message preprocessing operation, all fuzzy variable nodes are processed, and at this time, the fuzzy variable nodes can be considered to be reliable enough, so that the messages of the fuzzy variable nodes can be spread and contribute to the subsequent iterative updating process.
S4, executing an alternate decoding scheduling strategy: firstly, sequentially updating all variable nodes, dividing the variable nodes with opposite LLR values before and after updating into oscillation variable nodes to form an oscillation variable node set, and marking as O; then, sequentially updating and decoding variable nodes in the set O; if the decoding fails and the maximum iteration number is not reached, clearing the set O and continuously repeating S4; if the decoding is successful or the maximum iterative decoding times are reached, the decoding process is exited and the decoding is finished. In step S4, in order to partition the oscillation variable node set O, each variable node needs to be detected: assume a variable node is viThe LLR value before update is L (v)i) The updated LLR value is L' (v)i). If L (v)i)·L’(vi)<0, then the variable node v is indicatediIn the oscillation state, convergence is not achieved yet, and therefore the variable nodes need to be sequentially divided into the set O, and then all the variable nodes in the set O are updated in sequence.
The decoding method firstly screens out fuzzy variable nodes, firstly blocks the transmission of messages, reduces the decoding complexity, and then updates the fuzzy variable nodes to convert the fuzzy variable nodes into non-fuzzy variable nodes, accelerates the convergence speed of the algorithm and improves the decoding performance.
Further, all fuzzy variable nodes form a fuzzy variable node set V, and all non-fuzzy variable nodes form a non-fuzzy variable node V'; the message preprocessing operation comprises the following specific steps:
s31, carrying out cyclic search on fuzzy variable nodes in the set V in sequence, and only updating the fuzzy variable nodes connected with at least 2I-type check nodes; after updating, the fuzzy variable node is converted into a non-fuzzy variable node, and meanwhile, a message which is considered to be reliable can be transmitted, and the variable node is removed from the set V; repeating the step S31 until no fuzzy variable node meeting the updating condition of the step is found;
s32, carrying out cyclic search on the fuzzy variable nodes in the set V in sequence, and only updating the fuzzy variable nodes connected with at least 1I-type check node; after updating, removing the variable node from the set V; if the check nodes connected with a certain fuzzy variable node only contain 1I-type check node, the fuzzy variable node transmits a message which is considered to be unreliable to the I-type check node after updating; to prevent the delivery of messages that are considered unreliable, the fuzzy variable nodes need to be partitioned into a set V1Performing the following steps; repeating the step S32 until no fuzzy variable node meeting the updating condition of the step is found;
s33, pair set V1The propagation of the V2C message generated in S32, which is deemed unreliable, is prevented by each variable node in the group, at which point the message preprocessing operation is completed.
Further, the specific steps of updating the fuzzy variable node are as follows:
let the fuzzy variable node be viThe non-fuzzy variable node is v', and all the I-type check nodes c1j∈N’(vi) Update C2V message
Wherein N' (v)i) Representation and fuzzy variable node viLinked T1The set of (a) and (b),
representing class I check nodes c1jTo fuzzy variable node viThe C2V message refers to information transmitted by the check node to the variable node, and the specific calculation formula is as follows:
wherein, N (c)1j)\viIndicating node v except for fuzzy variableiAll other check nodes C1jA set of connected non-fuzzy variable nodes v',
indicating that the non-fuzzy variable node v' is transferred to the class I check node c1jV2C message of (a);
obtaining a fuzzy variable node v according to the updated C2V messageiUpdated LLR values:
wherein, L' (v)i) Representing fuzzy variable node viThe updated LLR values are then updated to the LLR values,
representing fuzzy variable node viThe initial LLR values of the received channel,
representing class I check nodes c1jTo fuzzy variable node viC2V message;
at the same time, the fuzzy variable node viUpdating all check nodes c connected theretoj∈N(vi) V2C message:
wherein, N (v)i)\cjIndicating the exception of check node cjAll-out and fuzzy variable node viSet of connected check nodes, N (v)i) Representing all and fuzzy variable nodes viA set of connected check nodes.
Further, the specific method for updating the non-fuzzy variable node is as follows:
let the variable node be vkFor all check nodes cl∈N(vk) Update messages
WhereinN(vk) Representation and variable node vkThe set of all check nodes that are connected,
represents check node clTo variable node vkThe specific calculation formula of (2) is as follows:
wherein, N (c)l)\vkRepresenting a divisor variable node vkAll and check nodes c outsidelA set of connected variable nodes v,
representing variable node v to check node clV2C message.
Obtaining a variable node v according to the formula (5) according to the C2V message obtained in the previous stepkUpdated LLR values:
wherein, N (v)k) Representation and variable node vkThe set of all check nodes that are connected,
represents check node clTo fuzzy variable node vkC2V message.
At the same time, variable node vkTo all check nodes c connected theretol∈N(vk) V2C message, calculated by the following equation:
wherein, N (v)k)\cjIndicating the exception of check node cjAll-out and variable node viA set of connected check nodes. By using the above specific updating method for the variable nodes in step S4, the operations of updating all variable nodes, dividing the oscillation variable node set O, and updating the set O can be implemented.
Compared with the prior art, the invention has the beneficial effects that:
the method fully utilizes the characteristics of the NAND-Flash channel, divides the variable nodes into a set aiming at the condition that the error rate of partial variable nodes in an overlapping area is high, defines the variable nodes as fuzzy variable nodes and defines other corresponding variable nodes as non-fuzzy variable nodes. The error rate of the non-fuzzy variable node is very low, so that the node can be regarded as a type of highly reliable variable node. In step S1, the hard decision values of all variable nodes in the fuzzy variable node set V tend to be uncertain, i.e. the messages they deliver are considered unreliable, so the messages of these fuzzy variable nodes are not allowed to propagate. The message preprocessing method updates the fuzzy variable nodes with messages of non-fuzzy variable nodes that are considered reliable, while completely prohibiting message propagation of fuzzy variable nodes in the process, and can contribute their messages in subsequent iterations only if all fuzzy variable nodes are updated and have been considered reliable. After the message preprocessing method is finished, most variable nodes tend to be stable along with the increase of the iteration times, and the variable nodes which are easy to make mistakes are all in a vibration state, so the invention provides an alternative decoding scheduling strategy, directly utilizes the information of the iteration to carry out vibration judgment, accurately positions the vibration nodes and enables the vibration nodes to carry out decoding in the correct direction. By means of message preprocessing operation and alternate decoding scheduling strategies, decoding performance can be remarkably improved on the basis of an original decoding method, and decoding convergence speed is increased.
Drawings
Fig. 1 is a graph of the voltage distribution probability density of each memory cell of the NAND-Flash of the MLC type.
FIG. 2 is a general flow chart of the decoding method of the present invention.
Fig. 3 is a flow diagram of fuzzy variable node message preprocessing.
Fig. 4(a) to (d) are schematic diagrams illustrating the updating in step S31 according to the present invention.
Fig. 5(a) to (d) are schematic diagrams illustrating the updating in step S32 according to the present invention.
Fig. 6(a) to (d) are schematic diagrams illustrating the updating in step S4 according to the present invention.
Fig. 7(a) to (d) are schematic diagrams illustrating sequential update of oscillation variable nodes according to the present invention.
FIG. 8 is a comparison of error correction performance of the 0.9- (3780,3402) LDPC code.
FIG. 9 is a comparison of error correction performance of the 0.92- (8000,7360) LDPC code.
FIG. 10 is a comparison of the convergence performance of the 0.92- (8000,7360) LDPC code.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
VNBP-MP represents the abbreviation of Variable-Node-Based Belief-Propagation with Message Pre-processing, and represents the "Belief Propagation decoding algorithm Based on Variable Node with Message preprocessing", which is the abbreviation of the decoding method of the present invention.
The channel model of MLC NAND-Flash with an erase/write period PE of 15000 and a retention time coefficient T of 1 is shown in fig. 1, where the abscissa is the threshold voltage and the ordinate is the probability density, and each curve represents the probability density function in each storage state. In NAND-Flash of the MLC type, each memory cell stores two bits of data, and thus can represent four data storage states, in order from low to high: 11 (erased state), 10 (programmed state), 00 (programmed state), and 01 (programmed state). To obtain the 2 bits of information stored in each cell, the present invention first uses a non-uniform set of read voltages-R1,R2,R3,R4,R5And R6To obtain the quantization regions D1-D4 where each memory cell is located. By combining the non-uniform group of read voltages with equations (7) and (8), initial LLR values of variable nodes corresponding to high and low bits in each memory cell can be obtained, wherein,
and
the voltage distribution probability density functions of states 11, 10, 00, and 01 are expressed by expressions (9), (10), (11), and (12), respectively:
wherein L ismsbInitial LLR value, L, of variable node corresponding to high order bitlsbThe initial LLR value of the variable node corresponding to the low-order bit.
In addition, the first and second substrates are,
V1,V2and VmaxWhich respectively represent the threshold voltages of four states in NAND-Flash of the MLC type, the voltage distributions of the corresponding states are shown in fig. 1.Δ VppWhich indicates the voltage value charged each time the memory cell is charged at the time of a write operation. The data stored in MLC NAND-Flash are subject to various kinds ofNoise interferes, causing the probability density curves of the various voltage states to change as noise is introduced. Wherein the content of the first and second substances,
and
respectively representing the standard deviation of probability density distribution obtained after the four states of 11, 10, 00 and 01 are subjected to noise interference,
and
the mean values of the probability density distributions of the data retention noise of the four states are respectively represented. In addition, erf (x) is a gaussian error function, and is expressed as follows:
according to the general flow chart of the VNBP-MP decoding method shown in fig. 2 and in combination with the flow chart based on fuzzy variable node message preprocessing shown in fig. 3, the specific steps of the VNBP-MP decoding method are as follows:
s1, for each frame of LDPC code word, obtaining a quantization area where each storage unit is located through non-uniform reading voltage, and knowing whether an overlapping area exists in the storage unit or not according to a voltage distribution probability density function, wherein the overlapping area exists all the time actually, and in experimental simulation, when the erasing times are about 10000 times, the overlapping area is obvious. Selecting bits with uncertain values from each storage unit, marking variable nodes corresponding to the bits as fuzzy variable nodes, further screening out all fuzzy variable nodes, dividing the fuzzy variable nodes into a fuzzy variable node set V, and marking variable nodes corresponding to other bits as non-fuzzy variable nodes. In the MLC-type NAND-Flash, fuzzy variable nodes are defined as variable nodes corresponding to lower bits in the regions E1 and E3 in fig. 1 and upper bits in the region E2 in fig. 1, and the remaining variable nodes are defined as non-fuzzy variable nodes. Then, the initial LLR information value is calculated by the equations (7) and (8) according to the region where each variable node is located.
S2, according to the fuzzy variable node set stored in the set V, the types of all check nodes can be judged, and the method specifically comprises the following steps: such check nodes without any fuzzy variable nodes connected are called check nodes of type 0 and are denoted as T0(ii) a Such check nodes connected with 1 fuzzy variable node are called I-type check nodes and marked as T1(ii) a Such check nodes connected with 2 fuzzy variable nodes are called II type check nodes and marked as T2(ii) a The check nodes connected with n (n is more than or equal to 3) fuzzy variable nodes are called n check nodes and marked as Tn；
And S3, executing message preprocessing operation based on variable nodes, as shown in figure 3. The method comprises the following specific steps:
s31. As shown in FIGS. 4(a) to (d), black dots represent fuzzy variable nodes, white dots represent non-fuzzy variable nodes, and boxes represent check nodes c1To c5T below0To T2Indicating the type of check node. Firstly, carrying out cyclic search on variable nodes in the set V in sequence, and updating when fuzzy variable nodes connected with at least 2I-type check nodes are found. V as in FIGS. 4(a) and (b)11Then, all check nodes c belonging to class I are updated using formula (1)1And c4To fuzzy variable node v11C2V message
And
then, the fuzzy variable node v is updated by the formula (2)11LLR value L' (v) of11) Finally, updating the fuzzy variable node v by using the formula (3)11Transfer ofFor check node cjV2C message
Wherein c isj∈N(v11)，N(v11) Representation and fuzzy variable node v11All check nodes connected. At this time, the fuzzy variable node v11Converting into non-fuzzy variable node, changing the class of all check nodes connected with the node, and checking node c belonging to class I1And c4Becomes check node belonging to class 0, check node c belonging to class II3Becomes a check node belonging to class I. Then searching the next fuzzy variable node v12When, v12From updates v11Before the step is not satisfied, the updating condition is changed into coincidence, so that v is also matched12Is subjected to11Same step update, FIG. 4(c) and (d), after update, check node c belonging to class I2And c3Becomes check node belonging to class 0, check node c belonging to class II5Becomes a check node belonging to class I. S31 is repeated until no more fuzzy variable node satisfying the update condition of this step can be found.
S32. Next, as shown in FIGS. 5(a) to (d), when a fuzzy variable node connecting at least 1 class I check node is found, v as shown in FIGS. 5(a) and (b)21Then, all check nodes c belonging to class I are updated using formula (1)1To fuzzy variable node v21C2V message
Then, the fuzzy variable node v is updated by the formula (2)21LLR value L' (v) of21) Finally, updating the fuzzy variable node v by using the formula (3)21To check node cjV2C message
Wherein c isj∈N(v21)，N(v21) Representation and fuzzy variable node v21All check nodes connected. At this time, the categories of all check nodes connected with the check nodes are changed and belong toCheck node c in class II3And c5Become check node belonging to class I, check node c belonging to class I1Becomes a check node belonging to class 0. The change of the check node type ensures that the search mode can always find the fuzzy variable nodes which meet the conditions until all the fuzzy variable nodes can be updated. When all fuzzy variable nodes are updated, all check nodes become class 0. If the fuzzy variable node found in the updating process of step S32 is connected to only 1I-type check node, such as v in FIGS. 5(c) and (d)22At v is21After update, c3Becomes class I, so v22It becomes a fuzzy variable node connected to only 1 class I check node. For v22According to formula (3), v22The V2C information passed to the class II and class n check nodes can receive C2V information passed from the class I check node that is considered reliable, and the V22The V2C information passed to the I-type check node is not received in the update of formula (3) and other I-type check nodes are passed to V22Is considered reliable C2V information and will therefore be considered unreliable, and therefore v needs to be identified22Updated and subdivided into sets V1And in a subsequent step S33 on the set V1All variable nodes in the set that would produce V2C information that is deemed unreliable. In fig. 5(b) to (d), dots with horizontal stripes represent a set V1The variable node in (1). Step S32 is repeated until no more fuzzy variable node satisfying the above condition is found. When step S32 ends, all variable nodes that would generate a V2C message considered unreliable have been divided into the set V1In (1).
S33, collecting the set V1The variable node in (1) is marked as v3i. Updating check node c by formula (4)jTo variable node v3iC2V message
Wherein c isj∈N(v3i)，N(v3i) Representation and variable node v3iAll check nodes connected, the C2V message referring to check nodesThe point passes information to the variable node. Then, the variable node v is updated by the expression (5)3iLLR value L' (v) of3i) Finally, the variable node v is updated by using the formula (6)3iTo check node cjV2C message
At this point, the variable node-based message preprocessing operation is complete, and the fuzzy variable nodes originally in the set V can contribute messages that they are considered reliable in subsequent updates.
And S4, executing an alternate decoding scheduling strategy. All variable nodes are sequentially updated, and the specific updating process is shown in fig. 6(a) to (d). First, as shown in fig. 6(a), check node c is updated by equation (4)jTo variable node v1C2V message
Wherein c isj∈N(v1)，N(v1) Representation and variable node v1All check nodes c connected1、c3And c4. Then, the variable node v is updated by the expression (5)1LLR value L' (v) of1) If the symbol is equal to the last updated LLR value L (v)1) Otherwise, mark as oscillation variable node and divide it into set O. Finally, the variable node v is updated by the formula (6) again as shown in FIG. 6(b)1To check node cjV2C message
Variable node v as in FIGS. 6(c) to (d)2It is implemented as v1The sign of the LLR value obtained in the updating process is opposite to that of the LLR value updated last time, so v is changed2The nodes labeled oscillation variables are represented by dots with vertical stripes in FIG. 6(d) and are divided in the set O. When all the variable nodes are updated once, all the oscillating variable nodes in the set O are sequentially updated, as shown in fig. 7(a) to (d). With vo1For example, the formulas (4), (5) and (6) are applied to update the phases thereof respectivelyShould be that
L’(vo1) And
a value of wherein cj∈N(vo1)，N(vo1) Representation and variable node vo1All check nodes connected. For vo2And executing the same updating operation until all the oscillation variable nodes are updated, and finally emptying the set O. And repeating the step S4, that is, repeating the above alternative decoding scheduling strategies for all the variable nodes and the oscillation variable node set O until the decoding is successful or the maximum iteration number is reached, and ending the specific steps of the decoding method provided by the present invention.
In the VNBP-MP decoding method provided by the invention, a message preprocessing method based on variable nodes is the core. Since the class I check nodes are connected to the fuzzy variable nodes to be updated, except the fuzzy variable node to be updated, which are considered to be reliable, the correspondingly obtained C2V message is necessarily considered to be reliable, so that the C2V message can be transmitted to the fuzzy variable node connected to the same. For class II or class n check nodes, besides the fuzzy variable node to be updated currently, the check nodes are connected with 1 or (n-1) fuzzy variable nodes, and according to the updating formula of the C2V message, as long as a V2C message which is considered unreliable exists, the symbol value of the C2V message which is obtained correspondingly tends to be uncertain. In other words, this updated C2V message is considered unreliable, and therefore the C2V message should not be passed to the fuzzy variable node to be updated. The message blocking mechanism can effectively prevent the message which is considered as unreliable from spreading, and simultaneously efficiently utilize the message which is considered as reliable, so that the message can be widely spread in the initial decoding stage, thereby greatly improving the success rate of decoding and accelerating the convergence speed of decoding.
In order to verify the excellent performance of the VNBP-MP decoding method proposed in the present patent, the present embodiment needs to perform computer simulation.The specific method is to construct two regular LDPC code words with high code rate by using the PEG method, wherein the code lengths are (3780,3402) and (8000,7360), respectively. The information bits of each codeword are grouped, and adjacent 2 information bits are stored in one cell of MLC NAND-Flash without repetition. Since the data stored in the cell is disturbed by various noises, the voltage values represented by the states are not an exact value but exhibit a distribution, as shown in fig. 1. The writing, erasing and reading process of the LDPC codeword in the MLC NAND-Flash can be considered as passing a noisy channel. The invention uses Visual Studio2015 as a simulation platform, and compares the decoding performance of the LLR BP parallel decoding method, the SBP serial decoding method, the QA BP decoding method proposed by Aslam and the like and the VNBP-MP decoding method proposed by the invention. The programming language uses C + +, sets the retention time coefficient T as 1 and the maximum iteration number I max5. When the number of error frames reaches 100 frames, stopping the simulation iteration, counting the corresponding frame error rate FER, and drawing a corresponding decoding performance graph, as shown in fig. 8 and 9.
FIG. 8 is a (3780,3402) comparison graph of decoding performance obtained by using different decoding algorithms on MLC type NAND-Flash channel, with the abscissa being the erasure period PE and the ordinate being the frame error rate FER. It can be seen from the figure that the VNBP-MP decoding algorithm proposed by the present invention has the best error correction performance. The LLRBP decoding algorithm is updated in a parallel scheduling mode, and a new message obtained by the iteration can only be used for the next iteration, so that the error correction performance of the LLRBP decoding algorithm is far inferior to that of other three serial decoding algorithms. In addition, compared with the SBP decoding algorithm, the decoding performance of the VNBP-MP decoding algorithm is greatly improved, wherein when the erasure period PE is 15000, the FER of the VNBP-MP algorithm is only 1/3 of the SBP algorithm. And at a FER of 10-4In this case, the number of erasures of the VNBP-MP algorithm is close to 1000 times more than that of the SBP algorithm, which indicates that: the VNBP-MP algorithm can still achieve the same error correction performance as the SBP algorithm in case of worse channel conditions. The decoding performance of the QABP algorithm proposed by asam et al is not much different from that of the VNBP-MP algorithm in the erase and write cycles of 11000 times and 13000 times, but in other erase and write times,the decoding performance is inferior to the latter.
FIG. 9 is a comparison graph of (8000,7360) decoding performance of codewords obtained by different decoding algorithms on MLC type NAND-Flash channel, with the abscissa being the erasure period PE and the ordinate being the frame error rate FER. Under any erasing times shown in FIG. 9, the decoding performance of the VNBP-MP decoding algorithm is better than that of the other three decoding algorithms. At an erasure period PE of 16000, the FER of the VNBP-MP algorithm is reduced by more than a factor of two compared to the FER of the QABP algorithm. When the erasure period PE is 15000, the FER of the VNBP-MP algorithm is only 1/6 of the former compared to the FER of the SBP algorithm. Moreover, as can be seen from fig. 8 and 9, the error correction performance of the VNBP-MP algorithm becomes more and more significant as the codeword grows.
Fig. 10 is a (8000,7360) convergence performance comparison graph obtained by using different decoding algorithms on a channel of MLC type NAND-Flash, where the ordinate is frame error rate FER and the abscissa is maximum iteration number MaxIter of the decoding algorithm. The erase/write period PE is set to 16000 and the retention time coefficient T is set to 1, and the maximum number of iterations is varied from 1 to 20 in order to compare the decoding convergence rates of the algorithms. It can be seen that, compared with other algorithms in the figure, the VNBP-MP algorithm has the fastest decoding convergence rate, i.e., only a small number of iterations is required to obtain a relatively excellent error correction performance. Meanwhile, with the increase of the maximum iteration times, each algorithm gradually reaches a convergence state, and the VNBP-MP algorithm has the best convergence performance.
The related documents of the SBP serial decoding method: J.Zhang, M.P.C.Fossoorier.Shuffled iterative decoding [ J ] IEEE Transactions on Communications, Feb.2005,53(2): 209-.
Relevant documents of QABP decoding methods: (QA-BP) decoding for MLC NAND flash memory [ C ]. 201510 th International Conference on Information, communication and Signal Processing (ICICS), Singapore, Dec.2015, pp:1-5.
Claims (1)
1. An LDPC code decoding method for NAND-Flash storage media is characterized by comprising the following steps:
s1, screening out storage units with voltage values in an overlapping area in a NAND-Flash storage medium channel, selecting one bit of bits with uncertain values from each storage unit, marking variable nodes corresponding to the bits as fuzzy variable nodes, and blocking transmission of V2C messages of the fuzzy variable nodes, wherein the V2C messages refer to information transmitted to check nodes by the variable nodes; simultaneously, screening out bits which are not selected from the storage units in the overlapping area and all bits from the storage units in the non-overlapping area, and classifying variable nodes corresponding to the bits into non-fuzzy variable nodes;
s2, classifying the classes of the check nodes according to the number of fuzzy variable nodes connected with the check nodes, specifically: such check nodes without any fuzzy variable nodes connected are called check nodes of type 0 and are denoted as T0(ii) a Such check nodes connected with 1 fuzzy variable node are called I-type check nodes and marked as T1(ii) a Such check nodes connected with 2 fuzzy variable nodes are called II type check nodes and marked as T2(ii) a The check nodes connected with n (n is more than or equal to 3) fuzzy variable nodes are called n check nodes and marked as Tn；
S3, based on the check node type, executing message preprocessing operation on the fuzzy variable node: updating the fuzzy variable nodes by using the information of the non-fuzzy variable nodes until all the fuzzy variable nodes are converted into the non-fuzzy variable nodes;
s4, executing an alternate decoding scheduling strategy: firstly, sequentially updating all variable nodes, and dividing the variable nodes with opposite LLR value signs before and after updating into oscillation variable nodes to form an oscillation variable node set O; then, sequentially updating and decoding variable nodes in the set O; if the decoding fails and the maximum iteration number is not reached, clearing the set O and continuously repeating S4; if the decoding is successful or the maximum iterative decoding times are reached, the decoding process is exited, and the decoding is finished;
all the fuzzy variable nodes form a fuzzy variable node set V, and all the non-fuzzy variable nodes form a non-fuzzy variable node V'; the message preprocessing operation comprises the following specific steps:
s31, carrying out cyclic search on fuzzy variable nodes in the set V in sequence, and only updating the fuzzy variable nodes connected with at least 2I-type check nodes; after updating, the fuzzy variable node is converted into a non-fuzzy variable node, and meanwhile, a message which is considered to be reliable can be transmitted, and the variable node is removed from the set V; repeating the step S31 until no fuzzy variable node meeting the updating condition of the step is found;
s32, carrying out cyclic search on the fuzzy variable nodes in the set V in sequence, and only updating the fuzzy variable nodes connected with at least 1I-type check node; after updating, removing the variable node from the set V; if only 1I-type check node is found in the check nodes connected with the fuzzy variable node, the fuzzy variable node is divided into a set V after being updated1And blocking its message delivery; repeating the step S32 until the fuzzy variable nodes meeting the updating condition of the step can not be found, so that all the fuzzy variable nodes are converted into non-fuzzy variable nodes;
s33, pair set V1Updating each variable node in the node;
the specific steps for updating the fuzzy variable node are as follows:
setting the fuzzy variable node as vi and the non-fuzzy variable node as v', and checking all the I-type check nodes1j∈ N' (vi), update C2V messages
Wherein N' (vi) denotes T connected to the fuzzy variable node vi1The set of (a) and (b),
representing class I check nodes c1jThe specific calculation formula of the message transmitted to the fuzzy variable node vi is as follows:
wherein, N (c)1j) \\ vi denotes all and class I check nodes c except the fuzzy variable node vi1jA set of connected non-fuzzy variable nodes v',
indicating that the non-fuzzy variable node v' is transferred to the class I check node c1jV2C message of (a);
and according to the updated C2V message, obtaining an LLR value after updating of the fuzzy variable node vi:
wherein L' (vi) represents an LLR value after updating of the fuzzy variable node vi, CviIndicating the initial LLR values of the channel received by the fuzzy variable node vi,
representing class I check nodes c1jA C2V message passed to fuzzy variable node vi;
at the same time, the fuzzy variable node vi updates all check nodes c connected with the fuzzy variable node vij∈ N (vi) V2C message:
wherein, N (vi) \\ cjIndicating the exception of check node cjExcept the set of all check nodes connected with the fuzzy variable node vi, N (vi) represents the set of all check nodes connected with the fuzzy variable node vi;
the specific method for updating the non-fuzzy variable node is as follows:
let the variable node be vkFor all check nodes c1∈N(vk) Update messages
Wherein N (v)k) Representation and variable node vkThe set of all check nodes that are connected,
represents check node c1To variable node vkThe specific calculation formula of (2) is as follows:
wherein, N (c)1)\vkRepresenting a divisor variable node vkAll and check nodes c outside1A set of connected variable nodes v,
representing variable node v to check node c1V2C message of (a);
obtaining a variable node v according to the formula (5) according to the C2V message obtained in the previous stepkUpdated LLR values:
wherein, N (v)k) Representation and variable node vkThe set of all check nodes that are connected,
represents check node c1To fuzzy variable node vkC2V message;
at the same time, variable node vkTo all check nodes c connected thereto1∈N(vk) V2C message, calculated by the following equation:
wherein, N (v)k)\cjIndicating the exception of check node cjAnd (4) all the check nodes connected with the variable node vi.
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