CN108806513B - Display panel and display device - Google Patents
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- CN108806513B CN108806513B CN201810713555.9A CN201810713555A CN108806513B CN 108806513 B CN108806513 B CN 108806513B CN 201810713555 A CN201810713555 A CN 201810713555A CN 108806513 B CN108806513 B CN 108806513B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
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Abstract
The embodiment of the invention discloses a display panel and a display device. The substrate base plate in the display panel comprises a device setting area, a first non-display area, a display area and a second non-display area, wherein the first non-display area surrounds the device setting area, and the display area surrounds the first non-display area; a plurality of data lines formed on the substrate base plate; the data lines comprise first routing parts, and the first routing parts are positioned in the second metal layer; the part of the data line passing through the first non-display area also comprises first bridging parts, and each first bridging part is positioned in the third metal layer; or each first bridging part is positioned in the first metal layer; or, a part of the first bridging portion is located in the third metal layer, and a part of the first bridging portion is located in the first metal layer, so that the display panel can be normally installed and used on the premise of ensuring that the display screen ratio of the display panel is high.
Description
Technical Field
The present invention relates to display technologies, and in particular, to a display panel and a display device.
Background
With the continuous development of display technology, display panels are widely applied to electronic devices such as mobile phones, tablet computers, information query machines in halls of public places, and the like, and bring convenience to the lives of people.
At present, the screen ratio becomes an important parameter for measuring the quality of the display panel. The larger the "screen duty" means the smaller the bezel of the display panel, which makes it impossible for the bezel of the display panel to accommodate larger sized devices such as cameras, headphones, or infrared sensors. Therefore, how to enable each larger device to be normally mounted and used becomes an urgent problem to be solved on the premise of ensuring that the display panel has a high screen ratio.
Disclosure of Invention
The invention provides a display panel and a display device, which aim to solve the problem that devices with larger sizes can be normally installed and used on the premise of ensuring higher screen occupation ratio of the display panel.
In a first aspect, an embodiment of the present invention provides a display panel, including:
the display device comprises a substrate base plate, a first display area and a second display area, wherein the substrate base plate comprises a device setting area, a first non-display area, a display area and a second non-display area, the first non-display area surrounds the device setting area, the display area surrounds the first non-display area, and the second non-display area surrounds the display area;
the array substrate comprises a plurality of data lines, a plurality of scanning lines and a plurality of pixel units which are formed on the substrate base plate, wherein the pixel units are arranged in an array structure; in the display area, the data lines extend along the column direction of the array structure, and the scanning lines extend along the row direction of the array structure; each pixel unit is electrically connected with the corresponding data line and the corresponding scanning line;
a first metal layer, a second metal layer and a third metal layer formed on the substrate base plate, wherein the first metal layer is positioned between the substrate base plate and the second metal layer, and the second metal layer is positioned between the first metal layer and the third metal layer;
each data line comprises a first routing part, and the first routing part is positioned in the second metal layer; the first wiring part of the data line passing through the first non-display area is arranged around the device arrangement area; the data line passing through the first non-display area further comprises a first bridging part, and the first bridging part is positioned in the first non-display area and arranged around the device arrangement area; the first routing parts of the data lines including the first bridging parts are electrically connected with the corresponding first bridging parts;
each first crossover portion is located in the third metal layer; or each first bridging part is positioned in the first metal layer; or, a part of the first bridging portion is located in the third metal layer, and a part of the first bridging portion is located in the first metal layer.
In a second aspect, an embodiment of the present invention further provides a display device, where the display device includes any one of the display panels provided in the embodiments of the present invention.
The embodiment of the invention has the following beneficial effects: firstly, through addding first non-display area to set up first non-display area and surround the device and set up the district, the display area surrounds first non-display area, and the essence is to carry out the rearrangement to each region of display panel, adjusts the position in device setting district, with each region of make full use of display panel, and then reaches under the prerequisite of guaranteeing that the display panel screen accounts for comparatively high, makes the great device of each size can normally install the purpose of using. Secondly, all the first bridging parts are arranged in the third metal layer; or each first bridging part is positioned in the first metal layer; or, part of the first bridging portions are located in the third metal layer, and part of the first bridging portions are located in the first metal layer, so that the distance between two adjacent data lines in the same metal layer can be increased, the capacitive coupling effect between two adjacent data lines in the same metal layer is further reduced, the signal crosstalk between the adjacent data lines in the same metal layer is inhibited, and the purpose of improving the display effect is further achieved. In addition, on the premise of ensuring that signal crosstalk between adjacent data lines in the same metal layer is small, the area of the first non-display area can be fully reduced, and the screen occupation ratio is improved.
Drawings
Fig. 1 is a schematic structural diagram of a conventional display panel;
fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 3 is an enlarged schematic structural view of a device disposition region and a first non-display region in fig. 2;
FIG. 4 is a schematic perspective view of the region D in FIG. 3;
FIG. 5 is a schematic sectional view taken along line B1-B2 in FIG. 3;
fig. 6 is a schematic cross-sectional view illustrating another display panel according to an embodiment of the present invention;
fig. 7 is a schematic cross-sectional view illustrating another display panel according to an embodiment of the invention;
fig. 8 is a schematic partial structure diagram of another display panel according to an embodiment of the present invention;
FIG. 9 is a cross-sectional view of the display panel of FIG. 8 taken along a first plane;
fig. 10 is a schematic cross-sectional view of another display panel taken along a first plane according to an embodiment of the present invention;
fig. 11 is a schematic cross-sectional view of another display panel taken along a first plane according to an embodiment of the present invention;
fig. 12-14 are schematic cross-sectional views of three display panels taken along a first plane according to an embodiment of the invention;
FIG. 15 is an exploded view of the layout of data lines of FIG. 14;
fig. 16 is a schematic cross-sectional view of another display panel taken along a first plane according to an embodiment of the present invention;
FIG. 17 is a schematic structural diagram of a Demux circuit according to an embodiment of the present invention;
fig. 18 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic structural diagram of a conventional display panel. Referring to fig. 1, the display panel includes a substrate base plate 010. The substrate 010 includes a device setting region 011, a display region 013, and a second non-display region 014, the second non-display region 014 surrounding the display region 013 and the device setting region 011, and the display region 013 and the device setting region 011 are spaced apart by a certain distance. The display panel further includes a plurality of data lines 020, a plurality of scan lines 030, and a plurality of pixel cells 040 formed in the display region 013 of the substrate 010. The pixel units 040 are arranged in an array structure, the data line 020 extends along the column direction 100 of the array structure, and the scanning line 030 extends along the row direction 200 of the array structure; each pixel cell 040 is electrically connected to the corresponding data line 020 and the corresponding scanning line 030. The device setting area 011 is used for setting a camera, a headphone, an infrared sensor, or the like.
With the continuous development of display technologies, the frame of the display panel is smaller and smaller, and the screen occupies a larger area, which results in the size of the second non-display area 014 being smaller and smaller, so that the second non-display area 014 cannot accommodate larger devices, such as a camera, an earphone or an infrared sensor. Therefore, how to enable each larger device to be normally mounted and used becomes an urgent problem to be solved on the premise of ensuring that the display panel has a high screen ratio.
In view of the above, embodiments of the present application provide a display panel. Fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention. Fig. 3 is an enlarged structural view of the device disposition region and the first non-display region in fig. 2. Fig. 4 is a schematic perspective view of a region D in fig. 3. FIG. 5 is a schematic sectional view taken along line B1-B2 in FIG. 3. Referring to fig. 2, 3, 4 and 5, the display panel includes: the display device comprises a substrate base plate 10, wherein the substrate base plate 10 comprises a device setting area 11, a first non-display area 12, a display area 13 and a second non-display area 14, the first non-display area 12 surrounds the device setting area 11, the display area 13 surrounds the first non-display area 12, and the second non-display area 14 surrounds the display area 13; a plurality of data lines 20, a plurality of scan lines 30, and a plurality of pixel units 40 formed on the substrate base plate 10, the plurality of pixel units 40 being arranged in an array structure; in the display area 13, the data lines 20 extend in a column direction 100 of the array structure, and the scan lines 30 extend in a row direction 200 of the array structure; each pixel unit 40 is electrically connected with the corresponding data line 20 and the corresponding scanning line 30; a first metal layer M1, a second metal layer M2 and a third metal layer M3 formed on the base substrate 10, the first metal layer M1 being located between the base substrate 10 and the second metal layer M2, the second metal layer M2 being located between the first metal layer M1 and the third metal layer M3; each data line 20 includes a first routing portion 21, and the first routing portion 21 is located in the second metal layer M2; the first wire portion 21 of the portion of the data line 20 passing through the first non-display region 12 is disposed around the device disposition region 11; the portion of the data line 20 passing through the first non-display region 12 further includes a first crossover 22, the first crossover 22 being located in the first non-display region 12 and disposed around the device disposition region 11; the first routing portions 21 of the data lines 20 including the first bridge portions 22 are electrically connected to the corresponding first bridge portions 22; each first crossover 22 is located in the third metal layer M3.
Comparing fig. 1 and fig. 2, in the above technical solution, by additionally providing the first non-display area 12, and setting the first non-display area 12 to surround the device setting area 11, and the display area 13 to surround the first non-display area 12, it is essential to rearrange the areas of the display panel, and adjust the position of the device setting area 11, so as to fully utilize the areas of the display panel, and further achieve the purpose of enabling the devices with larger sizes to be normally installed and used on the premise of ensuring the display panel has a higher screen occupation ratio.
In consideration of the conventional display panel, in an actual operation, during a display time of one frame, data line signals are sequentially input to the data lines in a row direction of the array structure to charge the pixel units electrically connected thereto. For example, after a data signal is input to the ith data line, a data signal is input to the (i + 1) th data line adjacent to the ith data line, and the data signal that needs to be input to the (i + 1) th data line is not equal to the data signal input to the ith data line. This will cause the data signal on the ith data line to jump due to the coupling capacitance when the data signal is input to the (i + 1) th data line, i.e. cause signal crosstalk between two adjacent data lines. When a severe picture is displayed, the display luminance of the pixel unit connected to the data line where the signal crosstalk occurs is greatly different from the display luminance of the pixel unit connected to the data line where the signal crosstalk does not occur, thereby causing uneven display.
Research shows that the larger the coupling capacitance between adjacent data lines, the larger the signalThe more severe the sign crosstalk phenomenon. According to the formula
Where C is a coupling capacitance value between two adjacent data lines 20, and e is a dielectric permittivity between two adjacent data lines 20, which is constant depending on a material of the dielectric. S is a facing area of two adjacent data lines 20, d is a distance between the two adjacent data lines 20, and k is an electrostatic force constant, which is a constant value. As can be known from the above formula, for two adjacent data lines 20 located in the same metal layer, the facing area S of the two adjacent data lines 20 is a fixed value, the larger the distance d between the two adjacent data lines 20 is, the smaller the coupling capacitance C between the two adjacent data lines 20 is, and the less signal crosstalk occurs between the two adjacent data lines 20.
In the above technical solution, by setting "each first bridging portion is located in the third metal layer M3", the data lines passing through the first non-display area 12 are substantially divided into two types, one type is formed by using the third metal layer M3, and the other type is formed by using the second metal layer M2. Therefore, under the condition that the total number P of the data lines passing through the first non-display area 12 is constant, the number of the data lines in each metal layer (including the third metal layer M3 and the second metal layer M2) is less than P, so that the distance between two adjacent data lines 20 in the same metal layer can be increased, the capacitive coupling effect between two adjacent data lines 20 in the same metal layer is further reduced, the signal crosstalk between the adjacent data lines 20 in the same metal layer is suppressed, and the purpose of improving the display effect is further achieved.
Compared with the scheme that the data lines passing through the first non-display area are all formed by the same metal layer in the first non-display area, as shown in fig. 4, the data lines of the first non-display area 12 are formed by the third metal layer M2 and the second metal layer M2, on the premise that the signal crosstalk between the adjacent data lines 20 is small, the area of the first non-display area 12 can be sufficiently reduced, and the screen occupation ratio is improved.
The device installation area 11 is an area for installing devices such as a camera, a headphone, or an infrared sensor. In actual installation, according to the requirement of a device to be installed, the device installation area 11 is optionally cut out of the liner base substrate 10 together with each film layer formed in the area; alternatively, the base substrate 10 in the device installation region 11 is left, and at least a part of the film layer formed in this region is cut out, or the like. This is not limited by the present application.
In fig. 2 and 3, the shape of the device arrangement region 11 is set to be circular, which is merely a specific example of the present application, and is not a limitation of the present application. In actual installation, the device installation region 11 is optionally shaped as a polygon (such as a rectangle) or an ellipse. Similarly, the shape of the first non-display area 12 may also be a polygon, a circle, an ellipse, or the like.
In addition, "the first wire portion 21 of the data line 20 passing through the first non-display region 12 is disposed around the device disposition region 11" in "surrounding" means that the first wire portion 21 bypasses along the edge of the device disposition region 11 within the first non-display region 12. Exemplarily, in fig. 3, a connection line between a starting point B3 of the first wire portion 21 that runs around along the edge of the device disposition region 11 and a center O of the device disposition region 11 (alternatively, the center O of the device disposition region 11 is a geometric center of the device disposition region 11) is B3O, and an end point B4 of the first wire portion 21 that runs around along the edge of the device disposition region 11 forms an angle α with a connection line B4O, B3O, and B4O of the center O of the device disposition region 11, which is smaller than 180 °. In actual implementation, optionally, an included angle α formed by B3O and B4O has a value range greater than 0 ° and less than 360 °, that is, the first wire trace portion 21 may surround the device installation region 11, or may not surround the device installation region 11. This is not limited by the present application.
Similarly, the "first bridge portion 22 is located in the first non-display region 12 and disposed around the device disposition region 11" means that the first bridge portion 22 goes around along an edge of the device disposition region 11. The first bridge portion 22 may surround the device installation region 11, or may not surround the device installation region 11. This is not limited by the present application.
Fig. 6 is a schematic cross-sectional view of another display panel according to an embodiment of the invention. In contrast to fig. 5, in the display panel provided in fig. 6, each first crossover 22 is located in the first metal layer M1. The essence of this arrangement is to divide the portion of the data line passing through the first non-display area 12 into two categories, one category using the first metal layer M1 and one category using the second metal layer M2. Therefore, under the condition that the total number P of the data lines passing through the first non-display area 12 is constant, the number of the data lines in each metal layer (including the first metal layer M1 and the second metal layer M2) is less than P, so that the distance between two adjacent data lines 20 in the same metal layer can be increased, the capacitive coupling effect between two adjacent data lines 20 in the same metal layer is further reduced, the signal crosstalk between the adjacent data lines 20 in the same metal layer is suppressed, and the purpose of improving the display effect is further achieved. In addition, the arrangement can sufficiently reduce the area of the first non-display region 12 and improve the screen occupation ratio on the premise of ensuring that the signal crosstalk between the adjacent data lines 20 in the same metal layer is small.
Fig. 7 is a schematic cross-sectional structure diagram of another display panel according to an embodiment of the invention. In comparison with fig. 5, in the display panel provided in fig. 7, a portion of the first crossover 22 is located in the third metal layer M3, and a portion of the first crossover 22 is located in the first metal layer M1. The essence of this arrangement is to divide the portion of the data line passing through the first non-display area 12 into three categories, one category using the first metal layer M1, one category using the second metal layer M2, and the last category using the third metal layer M3. Therefore, under the condition that the total number P of the data lines passing through the first non-display area 12 is constant, the number of the data lines in each metal layer (including the first metal layer M1, the second metal layer M2 and the third metal layer M3) is less than P, so that the distance between two adjacent data lines 20 in the same metal layer can be increased, the capacitive coupling effect between two adjacent data lines 20 in the same metal layer is reduced, the signal crosstalk between the adjacent data lines 20 in the same metal layer is inhibited, and the purpose of improving the display effect is achieved. In addition, the arrangement can sufficiently reduce the area of the first non-display region 12 and improve the screen occupation ratio on the premise of ensuring that the signal crosstalk between the adjacent data lines 20 in the same metal layer is small.
Consider two data lines 20 that are located closer together in different metal layers, if there is a positive alignmentArea S according to the formula
When the facing area S is a fixed value, the larger the distance d between two adjacent data lines 20 is, the smaller the coupling capacitance value C between the two data lines 20 is. Therefore, as shown in fig. 5, optionally, if the minimum distance d1 between the first metal layer M1 and the second metal layer M2 is smaller than the minimum distance d2 between the second metal layer M2 and the third metal layer M3; each first crossover 22 is located in the third metal layer M3. The advantage of setting up like this is, can further reduce the coupling capacitance value C that is located between the nearer data line of adjacent metal level, and then reach the signal crosstalk phenomenon of restraining to be located between the nearer data line of adjacent metal level.
There are various specific implementation methods for the above-mentioned scheme of the present application, and the following detailed description is given with reference to specific examples, but the present application is not limited thereto.
Since the scheme of "each first crossover is located in the third metal layer M3" is similar to the scheme of "each first crossover is located in the first metal layer M1", the following description will be given only by taking "each first crossover is located in the third metal layer M3" as an example.
With continued reference to fig. 5, optionally, the first crossover 22 is located in the third metal layer M3; in the first non-display area 12, the vertical projection of all the first bridge portions 22 on the substrate base plate 10 is not coincident with the vertical projection of all the first routing portions 21 on the substrate base plate 10. By the arrangement, the facing area S between each first bridging portion 22 and any one first routing portion 21 is 0, so that the coupling capacitance value C between any two data lines 20 located in different metal layers is 0, and the purposes of suppressing signal crosstalk between the data lines located in different metal layers and improving the display effect are achieved.
In designing, there are various designs satisfying the condition that "the perpendicular projections of all the first bridge portions 22 on the base board 10 do not coincide with the perpendicular projections of all the first routing portions 21 on the base board 10". For example, alternatively, as shown in fig. 3, 4 and 5, in the first non-display region 12, odd-numbered data lines 20 include first bridge portions 22 and first routing portions 21, and even-numbered data lines 20 include only the first routing portions 21, which are directed toward the display region 13 along the center O of the device disposition region 11 and are parallel to the row direction 200 of the array structure. The essence of this arrangement is that the part of the data line 20 passing through the first non-display area 12 is evenly or approximately evenly distributed in the second metal layer M2 and the third metal layer M3, so as to sufficiently reduce the number of data lines 20 required to be laid in each metal layer in the first non-display area 12, further reduce the area of the first non-display area 12, implement a narrow frame, and improve the screen occupation ratio.
Similarly, it may be arranged that the even-numbered data lines 20 include the first bridge portions 22 and the first routing portions 21 and the odd-numbered data lines 20 include only the first routing portions 21 in the first non-display region 12, which are directed toward the display region 13 along the center O of the device arrangement region 11 and are parallel to the row direction 200 of the array structure. By the arrangement, the parts of the data lines 20 passing through the first non-display area 12 can be equally or approximately equally distributed in the second metal layer M2 and the third metal layer M3, so that the number of the data lines 20 required to be arranged in each metal layer in the first non-display area 12 is sufficiently reduced, the area of the first non-display area 12 is further reduced, a narrow frame is realized, and the screen occupation ratio is improved.
Fig. 8 is a schematic partial structure diagram of another display panel according to an embodiment of the present invention. The dotted line l in fig. 8 represents the intersection of the first plane and the plane of the substrate base in the display panel. Fig. 9 is a schematic cross-sectional view of the display panel of fig. 8 taken along a first plane. Referring to fig. 8 and 9, in the display panel, the first bridge portion 22 is optionally located in the third metal layer M3; a plane perpendicular to the plane of the substrate base plate 10, parallel to the row direction 100 of the array structure and passing through the center O of the device arrangement region 11 is a first plane; in the first non-display area 12, a perpendicular projection of a region 22a where all the first bridge portions 22 overlap the first plane on the base substrate 10 at least partially coincides with a perpendicular projection of a region 21a where all the first routing portions 21 overlap the first plane on the base substrate 10. The essence of such setting is that, on the premise of ensuring that the signal crosstalk between the adjacent data lines 20 in the same metal layer is small, the distance between the adjacent data lines 20 in the same metal layer can be sufficiently reduced, so that the area of the first non-display area 12 is reduced, a narrow frame is realized, and the screen occupation ratio is improved.
In fig. 8 and 9, the first bridge portions 22 located in the third metal layer M3 and the first routing portions 21 located in the second metal layer M2 are arranged in a one-to-one correspondence, and a vertical projection of a region 22a where each first bridge portion 22 overlaps the first plane on the substrate 10 completely coincides with a vertical projection of a corresponding region 21a where the first routing portion 21 overlaps the first plane on the substrate 10. Alternatively, only one area 22a where the first crossing portions 22 overlap the first plane may be present, and a vertical projection of one area 21a where the first routing portions 21 overlap the first plane on the base substrate 10 may partially overlap the vertical projection of the area 22a on the base substrate 10, and any other area 22a where the first crossing portions 22 overlap the first plane may not overlap the vertical projection of the area 21a where each of the first routing portions 21 overlap the first plane on the base substrate 10 except for the first crossing portions 22.
In the above technical solution, "part of the first crossover section 22 is located in the third metal layer M3, and part of the first crossover section 22 is located in the first metal layer M1", there are various specific implementation methods, for convenience of description, the first crossover section includes a first sub-crossover section and a second sub-crossover section, the first sub-crossover section is located in the first metal layer, and the second sub-crossover section is located in the third metal layer; the data lines passing through the first non-display area comprise first data lines, second data lines and third data lines; the first data line only comprises a first routing part, and the second data line simultaneously comprises the first routing part and a first sub-bridging part; the third data line simultaneously comprises a first routing part and a second sub-crossover part. That is, the part of each first data line passing through the first non-display area is formed by the second metal layer, the part of each second data line passing through the first non-display area is formed by the first metal layer, and the part of each third data line passing through the first non-display area is formed by the third metal layer.
Further, all the first data lines are charged simultaneously, all the second data lines are charged simultaneously, and all the third data lines are charged simultaneously. By setting all the first data lines to be charged simultaneously, the phenomenon that signals are interfered due to the fact that signals on the adjacent first data lines which transmit the data signals first are jumped because the data signals transmitted on the first data lines which transmit the data signals later are transmitted can be avoided. Similarly, by setting all the second data lines to be charged simultaneously, the occurrence of a bad phenomenon of signal crosstalk caused by the fact that a signal on the adjacent second data line which transmits the data signal first is jumped due to the data signal transmitted on the second data line which transmits the data signal later can be avoided. By setting all the third data lines to be charged simultaneously, the phenomenon that signals on the adjacent third data lines which transmit data signals first are jumped to cause signal crosstalk due to the fact that the data signals transmitted on the third data lines which transmit the data signals later are transmitted sequentially can be avoided.
A plane which is perpendicular to the plane of the substrate base plate 10, parallel to the row direction of the array structure and passes through the center of the device arrangement area 11 is a first plane; fig. 10 is a schematic cross-sectional view of another display panel provided by an embodiment of the invention, the cross-sectional view being cut by a first plane. Referring to fig. 10, in the display panel, in the first non-display area 12, a vertical projection of all regions 21a where the first wire traces 21 overlap the first plane on the substrate 10 is a first projection, a vertical projection of all regions 221a where the first sub-bridges 221 overlap the first plane on the substrate 10 is a second projection, and a vertical projection of all regions 222a where the second sub-bridges 222 overlap the first plane on the substrate 10 is a third projection; within the first non-display area 12, any two of the first projection, the second projection and the third projection are non-coincident. Through setting up in first projection, second projection and the third projection arbitrary two all do not coincide, can be so that two arbitrary data lines that are located different metal layers just to area S be 0, can make like this, two arbitrary coupling capacitance values C that are located between the data lines of different metal layers are 0, and then reach the signal crosstalk phenomenon that the suppression is located between the data lines in different metal layers.
Fig. 11 is a schematic cross-sectional view of another display panel provided by an embodiment of the invention, the cross-sectional view being cut by a first plane. Referring to fig. 11, a plane perpendicular to the plane of the substrate base plate 10, parallel to the row direction of the array structure, and passing through the center of the device installation region 11 is defined as a first plane; in the first non-display area 12, the vertical projection of the area 21a where all the first wire traces 21 overlap the first plane on the substrate base plate 10 is a first projection, the vertical projection of the area 221a where all the first sub-bridges 221 overlap the first plane on the substrate base plate 10 is a second projection, and the vertical projection of the area 222a where all the second sub-bridges 222 overlap the first plane on the substrate base plate 10 is a third projection; within the first non-display area 12, at least two of the first projection, the second projection and the third projection are partially coincident. The advantage of setting up like this is, fully reduces the distance between the adjacent data line in the same metal level, and then reduces the area of first non-display area 12, realizes narrow frame, improves the screen and accounts for the ratio.
There are various ways of achieving "at least two of the first projection, the second projection, and the third projection are partially overlapped within the first non-display area 12". Exemplarily, in fig. 11, the first projection and the second projection are not overlapped completely within the first non-display area 12; the first projection and the third projection are completely misaligned; the second projection and the third projection at least partially coincide.
In the above technical solutions, the light emitting colors of the pixel units connected to the same data line may be the same or different. The light emission colors of the pixel units connected to different data lines may be the same or different. This is not limited by the present application.
Exemplarily, the light emission color of the pixel unit connected to the data line is represented by Y1, Y2, and Y3 in fig. 10 and 11, where Y1, Y2, and Y3 are different. Referring to fig. 10 and 11, alternatively, the light emitting colors of the pixel cells connected to the first data lines are the same, the light emitting colors of the pixel cells connected to the second data lines are the same, the light emitting colors of the pixel cells connected to the third data lines are the same, and any two of the light emitting colors of the pixel cells connected to the first data lines, the light emitting colors of the pixel cells connected to the second data lines, and the light emitting colors of the pixel cells connected to the third data lines are different. Illustratively, the light emitting color of the pixel units connected to each first data line is red, the light emitting color of the pixel units connected to each second data line is blue, and the light emitting color of the pixel units connected to each third data line is green. The advantage of this arrangement is that it facilitates the driving of the data lines by a demultiplexer circuit (Demux circuit for short). The Demux circuit includes a plurality of data selection circuits in each of which a plurality of data lines are connected to one data signal output port. The use of the Demux circuit can reduce the number of data signal output ports of the data driving circuit and reduce the cost of the display panel on the premise of keeping higher resolution. And the Demux circuit is used for conveniently realizing the simultaneous charging of all the first data lines, the simultaneous charging of all the second data lines and the simultaneous charging of all the third data lines.
With continued reference to fig. 10 or fig. 11, optionally, a plurality of touch traces 50 (denoted by T in fig. 10 and fig. 11 to distinguish from the data lines) are further included in the display panel. At least one touch wire 50 passes through the first non-display area 12; each touch trace 50 includes a second routing portion 51, and the second routing portion 51 is located in the third metal layer M3; in the first non-display area 12, each second routing portion 51 is located between two adjacent second sub-bridging portions 222 of the same layer. The essence of this is to provide the second sub-crossover 222 and the second wire trace 51 in the same metal layer. The advantage of setting up like this is, can further reduce the thickness of display panel to only need once etching process in the manufacture procedure, need not to make the mask plate respectively to second sub-bridging portion 222 and second routing portion 51, saved the cost, reduced process quantity, improved production efficiency.
Alternatively, in the display panel, any two of the first projection (i.e., the vertical projection of the region 21a where all the first wire traces 21 overlap the first plane on the substrate base plate 10), the second projection (i.e., the vertical projection of the region 221a where all the first sub-bridges 221 overlap the first plane on the substrate base plate 10), and the third projection (i.e., the vertical projection of the region 222a where all the second sub-bridges 222 overlap the first plane on the substrate base plate 10) at least partially coincide in the first non-display region 12. Therefore, the distance between adjacent data lines in the same metal layer can be further reduced, the area of the first non-display area 12 is further reduced, a narrow frame is realized, and the screen occupation ratio is improved.
There are various designs of the display panel satisfying the condition that any two of the first projection, the second projection, and the third projection are at least partially overlapped. Fig. 12-14 are schematic cross-sectional views of three display panels provided by an embodiment of the invention, the cross-sectional views being cut by a first plane. The display panels given in fig. 12, 13 and 14 all satisfy the above-described condition that any two of the first projection, the second projection and the third projection are at least partially overlapped.
With continued reference to fig. 12, 13, or 14, optionally, in the first non-display area 12, the data line corresponding to the region 21a where the first routing portion 21 and the first plane overlap, the data line corresponding to the region 221a where the first sub crossover portion 221 and the first plane overlap, and the data line corresponding to the region 222a where the second sub crossover portion 222 and the first plane overlap, which are all at least partially overlapped with each other in vertical projection on the substrate base plate 10, are charged simultaneously. The advantage of setting up like this is avoided because of carrying data signal in proper order, and the bad phenomenon that the projection has signal crosstalk on the data link of overlap portion appears, suppresses the demonstration uneven.
With continued reference to fig. 12 or fig. 13, optionally, the display panel further includes a plurality of touch traces; at least one touch wire 50 passes through the first non-display area 12; each touch trace 50 only includes a second routing portion 51, and the second routing portion 51 is located in the third metal layer M3; in the first non-display area 12, a vertical projection of a region 51a where all the second wire traces 51 overlap the first plane on the substrate base plate 10 is a fourth projection; within the first non-display area 12, the fourth projection at least partially coincides with at least one of the first projection and the third projection. The essence of the arrangement is that the second sub-crossover portion 222 and the second routing portion 51 are arranged in the same metal layer, so that the thickness of the display panel is reduced, only one etching process is needed in the manufacturing process, no mask plate needs to be manufactured on the second sub-crossover portion 222 and the second routing portion 51, the cost is saved, the number of manufacturing processes is reduced, and the production efficiency is improved. In addition, by setting at least one of the fourth projection and the first projection and the third projection to be partially overlapped, it is beneficial to distribute each data line and the touch trace in three metal layers as evenly as possible in the first non-display area 12, and in the third metal layer M3, on the premise that the distance between two adjacent second sub-bridging portions 222, the distance between two adjacent second sub-bridging portions 222 and the second routing portion 51, and the distance between two adjacent second routing portions 51 are appropriate, the area of the first non-display area 12 is reduced, a narrow frame is realized, and the screen occupation ratio is improved.
Fig. 15 is an exploded view of the layout of the data lines in fig. 14. With continued reference to fig. 14 and fig. 15, optionally, the display panel further includes a plurality of touch traces 50; at least one touch wire 50 passes through the first non-display area 12; each touch trace 50 includes a second trace portion 51; the touch traces passing through the first non-display area 12 include a first touch trace, a second touch trace and a third touch trace; the first touch trace only includes a second trace 51, and the second touch trace includes both the second trace 51 and a third sub-crossover 52; the third touch trace includes both the second trace portion 52 and the fourth sub-crossover portion 53; the vertical projections of the third sub-crossover 52 and the fourth sub-crossover 53 on the substrate base plate 10 are both located within the first non-display area 12; the second wire traces 51 are located in the third metal layer M3, the third sub-crossover 52 is located in the first metal layer M1, and the fourth sub-crossover 53 is located in the second metal layer M2; in the first non-display area 12, the vertical projection of all the areas 51a of the second routing portions 51, which overlap the first plane, on the substrate 10 is a fourth projection, the vertical projection of all the areas 52a of the third sub-bridging portions 52, which overlap the first plane, on the substrate 10 is a fifth projection, and the vertical projection of all the areas 53a of the fourth sub-bridging portions 53, which overlap the first plane, on the substrate 10 is a sixth projection; at least two parts of the fourth projection, the fifth projection and the sixth projection are overlapped and are not overlapped with the first projection, the second projection and the third projection. The arrangement is also favorable for equally distributing each data line and the touch-control wiring in the three metal layers as much as possible in the first non-display area 12, and in each metal layer, on the premise that the distance between two adjacent data lines and the distance between the adjacent data lines and the touch-control wiring are appropriate, the area of the first non-display area 12 is reduced, a narrow frame is realized, and the screen occupation ratio is improved.
Fig. 16 is a schematic cross-sectional view of another display panel provided by an embodiment of the invention, the cross-sectional view being cut by a first plane. Referring to fig. 16, the display panel further includes a plurality of touch traces 50; at least one touch wire 50 passes through the first non-display area 12; each touch trace 50 includes a second routing portion 51, and the second routing portion 51 is located in the third metal layer M3 (not shown in fig. 16); each touch trace 50 passing through the first non-display area 12 further includes a second bridging portion 54; the vertical projection of the second bridging portion 54 on the substrate base plate 10 is located in the first non-display area 12; second crossover 54 is in second metal layer M2; a vertical projection of the region 54a where all the second bridge portions 54 overlap the first plane on the substrate base plate 10 is a seventh projection; in the first non-display area 12, at least one of the seventh projection and the second projection (the vertical projection of the region 221a where all the first sub-bridges 221 overlap the first plane on the substrate base plate 10) and the third projection (the vertical projection of the region 222a where all the second sub-bridges 222 overlap the first plane on the substrate base plate 10) at least partially overlaps. The arrangement is also favorable for equally distributing each data line and the touch-control wiring in the three metal layers as much as possible in the first non-display area 12, and in each metal layer, on the premise that the distance between two adjacent data lines and the distance between the adjacent data lines and the touch-control wiring are appropriate, the area of the first non-display area 12 is reduced, a narrow frame is realized, and the screen occupation ratio is improved.
Further, the light emission colors of the pixel units connected to the data line are represented by Y1, Y2, and Y3 in fig. 12 to 16, where Y1, Y2, and Y3 are different. Referring to fig. 12 to 16, in order to form an overall line group with a plurality of data lines projected on the substrate 10 in a direction perpendicular to the substrate 10, the pixel cells connected to the data lines in the same line group may have the same emission color, and the pixel cells connected to the data lines in the adjacent line group may have different emission colors. The advantage of this arrangement is that it facilitates the driving of the data lines by the Demux circuit. On the basis, the data lines in the same line group are optionally charged simultaneously.
Fig. 17 is a schematic structural diagram of a Demux circuit according to an embodiment of the present invention. Referring to fig. 17, the display panel includes a Demux circuit including m data selection circuits 60 and 1 st to nth timing signal lines CK1 to CKn (exemplarily, m is 2 and n is 3 in fig. 17) located in a second non-display area (not shown in fig. 17). The data selection circuit 60 includes at least one data signal output port 61, n data selection switches 62; the data selection switches 62 are provided in one-to-one correspondence with the data lines 20; in the same data line selection circuit 60, the input end of each data selection switch 62 is electrically connected to the corresponding data signal output port 61, the output end of each data selection switch 62 is electrically connected to the corresponding data line 20, the ith timing signal line CKi is electrically connected to the control end of the ith data selection switch 62 of each data selection circuit, and the ith timing signal line is used for controlling the on or off of the ith data selection switch 62 of each data selection circuit 61, so that the data lines 20 connected to each ith data selection switch 62 are charged simultaneously when the ith data selection switch 62 is turned on; i. m and n are positive integers, i is more than or equal to 1 and less than or equal to n, m is more than or equal to 2, and mxn is less than or equal to the total number of the data lines 20 in the display panel. The data signal output port 61 refers to a data signal output port in the data driving circuit. In this way, by controlling the input of the timing signals on the 1 st to nth timing signal lines CK1 to CKn, the plurality of data lines can be charged simultaneously, thereby reducing the signal crosstalk between adjacent data lines.
On the basis of the above technical solution, optionally, the light emitting colors of the plurality of pixel units include n colors; the light emission colors of the pixel units connected to the same data line 20 are the same; n is a positive integer greater than or equal to 3.
On the basis of the above technical solutions, optionally, each scan line 30 is located on the first metal layer M1. The essence of this arrangement is that if at least a part of the first bridging portion 22 of the data line 20 is disposed in the first metal layer M1, the part of the first bridging portion 22 and the scan line 30 are fabricated on the same layer, thereby reducing the thickness of the display panel, and only one etching process is needed in the fabrication process, and no mask plate needs to be fabricated on the first bridging portion 22 and the scan line 30, thereby saving the cost, reducing the number of processes, and improving the production efficiency.
Further, at the time of actual setting, alternatively, the scanning lines 30 are set not to pass through the first non-display area 12; or when the first bridge portions 22 are all located in the third metal layer M3, the scan lines 30 pass through the first non-display area 12, and a portion passing through the first non-display area 12 is disposed around the device disposition area 11.
Based on the same inventive concept, the embodiment of the invention also provides a display device. Fig. 18 is a schematic structural diagram of a display device according to an embodiment of the present invention. Referring to fig. 18, the display device 300 includes any one of the display panels 400 provided in the embodiments of the present invention, and the display device 300 may be a mobile phone, a tablet computer, a smart wearable device, and the like.
Since the display device 300 according to the embodiment of the present invention includes any one of the display panels 400 according to the embodiment of the present invention, the display device 300 has the corresponding advantages of the display panel 400 included therein, and details thereof are not repeated herein.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (14)
1. A display panel, comprising:
the display device comprises a substrate base plate, a first display area and a second display area, wherein the substrate base plate comprises a device setting area, a first non-display area, a display area and a second non-display area, the first non-display area surrounds the device setting area, the display area surrounds the first non-display area, and the second non-display area surrounds the display area;
the array substrate comprises a plurality of data lines, a plurality of scanning lines and a plurality of pixel units which are formed on the substrate base plate, wherein the pixel units are arranged in an array structure; in the display area, the data lines extend along the column direction of the array structure, and the scanning lines extend along the row direction of the array structure; each pixel unit is electrically connected with the corresponding data line and the corresponding scanning line;
characterized in that, the display panel still includes:
a first metal layer, a second metal layer and a third metal layer formed on the substrate base plate, wherein the first metal layer is positioned between the substrate base plate and the second metal layer, and the second metal layer is positioned between the first metal layer and the third metal layer;
each data line comprises a first routing part, and the first routing part is positioned in the second metal layer; the first wiring part of the data line passing through the first non-display area is arranged around the device arrangement area; the data line passing through the first non-display area further comprises a first bridging part, and the first bridging part is positioned in the first non-display area and arranged around the device arrangement area; the first routing parts of the data lines including the first bridging parts are electrically connected with the corresponding first bridging parts;
a portion of the first bridge is located in the third metal layer and a portion of the first bridge is located in the first metal layer;
the touch control device also comprises a plurality of touch control wires;
at least one touch routing wire passes through the first non-display area;
each touch routing comprises a second routing part, and the second routing part is positioned in the third metal layer;
the first crossover includes a first sub-crossover and a second sub-crossover, the first sub-crossover being located in the first metal layer, the second sub-crossover being located in the third metal layer;
the data lines passing through the first non-display area comprise first data lines, second data lines and third data lines; the first data line only comprises the first routing part, and the second data line simultaneously comprises the first routing part and the first sub-crossover part; the third data line simultaneously comprises the first routing part and the second sub-crossover part;
all the first data lines are charged simultaneously, all the second data lines are charged simultaneously, and all the third data lines are charged simultaneously.
2. The display panel according to claim 1,
enabling the plane which is perpendicular to the plane of the substrate base plate and parallel to the row direction of the array structure to be the first plane, and enabling the plane which passes through the center of the device arrangement area to be the first plane;
in the first non-display area, a vertical projection of a region where all the first routing parts overlap with the first plane on the substrate base plate is a first projection, a vertical projection of a region where all the first sub-bridging parts overlap with the first plane on the substrate base plate is a second projection, and a vertical projection of a region where all the second sub-bridging parts overlap with the first plane on the substrate base plate is a third projection;
within the first non-display area, any two of the first projection, the second projection, and the third projection are non-coincident.
3. The display panel according to claim 1,
enabling the plane which is perpendicular to the plane of the substrate base plate and parallel to the row direction of the array structure to be the first plane, and enabling the plane which passes through the center of the device arrangement area to be the first plane;
in the first non-display area, a vertical projection of a region where all the first routing parts overlap with the first plane on the substrate base plate is a first projection, a vertical projection of a region where all the first sub-bridging parts overlap with the first plane on the substrate base plate is a second projection, and a vertical projection of a region where all the second sub-bridging parts overlap with the first plane on the substrate base plate is a third projection;
within the first non-display area, at least two of the first projection, the second projection, and the third projection are partially coincident.
4. The display panel according to claim 3,
within the first non-display area, the first projection is completely misaligned with the second projection; the first projection and the third projection are completely misaligned; the second projection and the third projection at least partially coincide.
5. Display panel according to claim 2 or 4, characterized in that
In the first non-display area, each second routing portion is located between two adjacent second sub-bridging portions on the same layer.
6. The display panel according to claim 3,
any two of the first projection, the second projection, and the third projection are at least partially coincident within the first non-display region.
7. The display panel according to claim 6,
in the first non-display area, a data line corresponding to a region where the first routing portion and the first plane overlap, a data line corresponding to a region where the first sub-crossover portion and the first plane overlap, and a data line corresponding to a region where the second sub-crossover portion and the first plane overlap, which are vertically projected onto the substrate, are simultaneously charged.
8. The display panel according to claim 6, wherein each of the touch traces includes only a second trace portion, the second trace portion being located in the third metal layer;
in the first non-display area, the vertical projection of all the areas, overlapping with the first plane, of the second routing parts on the substrate base plate is a fourth projection;
within the first non-display area, the fourth projection at least partially coincides with at least one of the first projection and the third projection.
9. The display panel of claim 6, wherein each of the touch traces comprises a second trace portion;
the touch control wires passing through the first non-display area comprise a first touch control wire, a second touch control wire and a third touch control wire; the first touch routing only comprises the second routing part, and the second touch routing simultaneously comprises the second routing part and a third sub-crossover part; the third touch routing comprises the second routing part and a fourth sub-crossover part at the same time; the vertical projections of the third sub-crossover and the fourth sub-crossover on the substrate base plate are both positioned in the first non-display area;
the second routing portion is located in the third metal layer, the third sub-crossover portion is located in the first metal layer, and the fourth sub-crossover portion is located in the second metal layer;
in the first non-display area, a vertical projection of a region where all the second routing parts overlap with the first plane on the substrate is a fourth projection, a vertical projection of a region where all the third sub-crossover parts overlap with the first plane on the substrate is a fifth projection, and a vertical projection of a region where all the fourth sub-crossover parts overlap with the first plane on the substrate is a sixth projection;
at least two of the fourth projection, the fifth projection, and the sixth projection are partially coincident and are not coincident with the first projection, the second projection, and the third projection.
10. The display panel according to claim 6, wherein each of the touch traces includes a second trace portion, the second trace portion being located in the third metal layer; each touch wire passing through the first non-display area further comprises a second bridging part; the vertical projection of the second bridging part on the substrate base plate is positioned in the first non-display area; the second crossover portion is located in the second metal layer;
a vertical projection of all the areas of the second bridging parts, which are overlapped with the first plane, on the substrate base plate is a seventh projection;
within the first non-display area, the seventh projection at least partially coincides with at least one of the second projection and the third projection.
11. The display panel according to claim 1, further comprising m data selection circuits and 1 st to nth timing signal lines in the second non-display region;
the data selection circuit comprises at least one data signal output port and n data selection switches; the data selection switches are arranged in one-to-one correspondence with the data lines; in the same data line selection circuit, the input end of each data selection switch is electrically connected with the corresponding data signal output port, the output end of each data selection switch is electrically connected with the corresponding data line, an ith time sequence signal line is electrically connected with the control end of the ith data selection switch of each data selection circuit, and the ith time sequence signal line is used for controlling the on or off of the ith data selection switch of each data selection circuit so as to charge the data lines connected with the ith data selection switches simultaneously when the ith data selection switch is on;
i. m and n are positive integers, i is more than or equal to 1 and less than or equal to n, m is more than or equal to 2, and mxn is less than or equal to the total number of the data lines in the display panel.
12. The display panel according to claim 11,
the light emission colors of the plurality of pixel units include n colors; the light emitting colors of the pixel units connected with the same data line are the same;
n is a positive integer greater than or equal to 3.
13. The display panel according to claim 1,
each scanning line is located on the first metal layer.
14. A display device characterized by comprising the display panel according to any one of claims 1 to 13.
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| CN109273517B (en) * | 2018-11-23 | 2022-05-20 | 京东方科技集团股份有限公司 | Display panel, mobile terminal and control method thereof |
| KR102714931B1 (en) * | 2018-11-30 | 2024-10-10 | 삼성디스플레이 주식회사 | Display panel |
| CN109493726A (en) * | 2018-12-04 | 2019-03-19 | 武汉华星光电半导体显示技术有限公司 | Display panel |
| CN109541867B (en) * | 2018-12-28 | 2022-01-07 | 厦门天马微电子有限公司 | Display panel and display device |
| KR20200094877A (en) | 2019-01-30 | 2020-08-10 | 삼성디스플레이 주식회사 | Display device |
| CN110189627B (en) * | 2019-05-30 | 2021-12-24 | 武汉天马微电子有限公司 | Display panel and display device |
| KR102675920B1 (en) | 2019-07-29 | 2024-06-17 | 엘지디스플레이 주식회사 | Display device with through hole |
| US11703978B2 (en) | 2019-10-29 | 2023-07-18 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Touch substrate and touch display device |
| KR20210064498A (en) | 2019-11-25 | 2021-06-03 | 삼성디스플레이 주식회사 | Display device |
| CN111413815B (en) * | 2020-04-08 | 2022-06-17 | 厦门天马微电子有限公司 | Display panel and display device |
| CN113838383B (en) * | 2020-06-05 | 2023-02-03 | 京东方科技集团股份有限公司 | Display substrate and display device |
| CN111916486B (en) | 2020-08-27 | 2024-01-30 | 武汉天马微电子有限公司 | Display panel and display device |
| US20240241542A1 (en) * | 2021-12-20 | 2024-07-18 | Boe Technology Group Co., Ltd. | Display panel and display device |
| CN116794888A (en) * | 2023-06-30 | 2023-09-22 | 厦门天马微电子有限公司 | Display panel and display device |
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| JP2009047902A (en) * | 2007-08-20 | 2009-03-05 | Hitachi Displays Ltd | Display device |
| JP2010032760A (en) * | 2008-07-29 | 2010-02-12 | Hitachi Displays Ltd | Display device |
| KR102476563B1 (en) * | 2015-12-01 | 2022-12-12 | 엘지디스플레이 주식회사 | Display device |
| KR102483956B1 (en) * | 2016-03-31 | 2023-01-03 | 삼성디스플레이 주식회사 | Display device |
| CN107680995B (en) * | 2017-11-02 | 2023-08-08 | 武汉天马微电子有限公司 | Display panel and display device |
| CN107911507B (en) * | 2017-11-22 | 2019-09-13 | Oppo广东移动通信有限公司 | Display screen component and electronic equipment |
| CN108010449B (en) * | 2017-11-30 | 2020-12-22 | 武汉天马微电子有限公司 | Display panel, manufacturing method thereof and display device |
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