CN108736900B - Turbo code decoding control method and device, computer readable medium and terminal - Google Patents

Turbo code decoding control method and device, computer readable medium and terminal Download PDF

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CN108736900B
CN108736900B CN201710269107.XA CN201710269107A CN108736900B CN 108736900 B CN108736900 B CN 108736900B CN 201710269107 A CN201710269107 A CN 201710269107A CN 108736900 B CN108736900 B CN 108736900B
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system data
siso decoder
decoding
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siso
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CN108736900A (en
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蔡晓
仲崇祥
李俊强
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Spreadtrum Communications Shanghai Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/091—Parallel or block-wise CRC computation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
    • H04L1/0051—Stopping criteria

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Abstract

A Turbo code decoding control method and device, a computer readable medium and a terminal. The method comprises the following steps: in the current iterative decoding process of the Turbo decoder, obtaining log-likelihood information output by the first SISO decoder; calculating the average bit error rate and the average mutual information of the system data received at the current time according to the log-likelihood information output by the first SISO decoder, and performing CRC (cyclic redundancy check) on the hard decision result of the first SISO decoder; and when the CRC check result, the average bit error rate of the system data received at the current time and the average mutual information meet corresponding iteration stop conditions, controlling the second SISO decoder to stop iterative decoding and outputting a decoding result. By applying the scheme, the Turbo decoder is accurately controlled to stop iteration in advance.

Description

Turbo code decoding control method and device, computer readable medium and terminal
Technical Field
The invention relates to the technical field of decoding, in particular to a Turbo code decoding control method and device, a computer readable medium and a terminal.
Background
Existing communication systems, such as Long Term Evolution (LTE) systems and Wideband Code Division Multiple Access (W-CDMA) systems, all use Turbo codes to perform channel coding. Accordingly, the receiving end performs decoding using Turbo codes.
Turbo codes are a channel coding technique with superior performance. Turbo codes gain performance improvements by exchanging extrinsic information between two Soft Input Soft Output (SISO) decoders through a mutual iterative process. The higher the iteration number, the better the decoding performance, but also brings the disadvantages of high complexity and long decoding delay time. For communication systems with higher transmission rate requirements, balancing decoding delay and decoding performance has become a major issue.
At present, some Turbo code decoding control methods are used to control a Turbo decoder to stop iteration in advance, so as to take decoding delay and decoding performance into consideration. However, the existing Turbo code decoding control method cannot accurately control the Turbo decoder to stop iteration in advance.
Disclosure of Invention
The problem to be solved by the invention is how to accurately control the Turbo decoder to stop iteration in advance.
In order to solve the above problem, an embodiment of the present invention provides a method for controlling Turbo code decoding, where the method includes: in the current iterative decoding process of the Turbo decoder, obtaining log-likelihood information output by a first SISO decoder, wherein the first SISO decoder is a decoder for performing SISO decoding on currently received system data, first check data and data obtained by de-interleaving external information output by a second SISO decoder in the last iterative decoding process, and the second SISO decoder is a decoder for performing SISO decoding on the currently received system data, the data obtained by interleaving the external information output by the first SISO decoder and the second check data; calculating the average bit error rate and the average mutual information of the system data received at the current time according to the log-likelihood information output by the first SISO decoder, and performing CRC (cyclic redundancy check) on the hard decision result of the first SISO decoder; and when the CRC check result, the average bit error rate of the system data received at the current time and the average mutual information meet corresponding iteration stop conditions, controlling the second SISO decoder to stop iterative decoding and outputting a decoding result.
Optionally, the performing, according to log-likelihood information output by the first SISO decoder, CRC check on a hard decision result of the first SISO decoder includes: when the system data received in the whole decoding process of the Turbo decoder is a transmission block and the transmission block corresponds to a code block, performing CRC (cyclic redundancy check) on a hard decision result of the first SISO decoder by adopting a first CRC generator polynomial to obtain a CRC result of whether the CRC passes or not; when the system data received in the decoding process of the Turbo decoder is more than two transmission blocks or is one transmission block but the transmission block corresponds to more than two code blocks, a corresponding CRC generator polynomial is adopted, CRC check is carried out on the hard decision result of the first SISO decoder to obtain CRC check bits corresponding to current iterative decoding, a CRC check result is determined according to the CRC check bits corresponding to the current iterative decoding, and the corresponding CRC generator polynomial is different from the first CRC generator polynomial.
Optionally, the determining a CRC check result according to the CRC check bit corresponding to the current iterative decoding includes: and comparing whether the CRC check bit corresponding to the current iterative decoding is the same as the CRC check bit corresponding to the last iterative decoding, adjusting the value of an accumulation counter according to the comparison result, and taking the value of the accumulation counter as the CRC check result.
Optionally, the adjusting the value of the accumulation counter according to the comparison result includes: and when the CRC check bit corresponding to the current iterative decoding is the same as the CRC check bit corresponding to the last iterative decoding, controlling the value of the accumulation counter to increase by a preset first value, otherwise, controlling the value of the accumulation counter to be 0.
Optionally, when the CRC check result, the average bit error rate of the system data, and the average mutual information satisfy corresponding iteration stop conditions, controlling the second SISO decoder to stop iterative decoding and output a decoding result includes: when the system data received in the decoding process of the Turbo decoder is a transmission block and the transmission block is a code block, if CRC passes, controlling the second SISO decoder to stop iterative decoding, otherwise, determining whether to control the second SISO decoder to stop iterative decoding or not based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time; when the system data received in the decoding process of the Turbo decoder is more than two transmission blocks or is one transmission block but the transmission block corresponds to more than two code blocks, if the value of the accumulation counter is greater than 0 and the average mutual information of the system data received at the current time is greater than the upper limit value of the preset average mutual information or the value of the accumulation counter is greater than the threshold value of the preset accumulation counter, the second SISO decoder is controlled to stop iterative decoding, otherwise, whether the second SISO decoder is controlled to stop iterative decoding is determined based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time.
Optionally, the determining whether to control the second SISO decoder to stop iterative decoding based on the average bit error rates of the current and first time system data and the average mutual information of the current time system data includes: and when the following conditions are met, controlling the second SISO decoder to stop iterative decoding, otherwise, controlling the second SISO decoder to perform SISO decoding on the data obtained by interweaving the currently received system data and the external information output by the first SISO decoder and the second check data, inputting the external information output by the second SISO decoder into the first SISO decoder, and executing the next iterative decoding: the average bit error rate of the system data received at the current time is greater than the product of the average bit error rate of the system data received at the first time and a preset average bit error rate termination probability value; the average mutual information of the system data received at the current time is smaller than the lower limit value of the preset average mutual information; the average bit error rate of the system data received for the first time is greater than a preset initial value of the average bit error rate.
Optionally, the method further comprises: and when the CRC check result, the average bit error rate of the system data and the average mutual information do not meet the preset iteration stop condition, controlling the second SISO decoder to carry out SISO decoding on the system data, the data obtained by interweaving the external information output by the first SISO decoder and the second check data, inputting the external information output by the second SISO decoder into the first SISO decoder, and executing next iteration decoding.
The embodiment of the invention also provides a control device for decoding the Turbo code, which comprises: the system comprises an acquisition unit, a decoding unit and a decoding unit, wherein the acquisition unit is suitable for acquiring log-likelihood information output by a first SISO decoder in the current iterative decoding process of a Turbo decoder, the first SISO decoder is used for carrying out SISO decoding on currently received system data, first check data and data obtained by de-interleaving external information output by a second SISO decoder in the last iterative decoding process, and the second SISO decoder is used for carrying out SISO decoding on the currently received system data, the data obtained by interleaving the external information output by the first SISO decoder and the second check data; the average bit error rate calculation unit is suitable for calculating the average bit error rate and the average mutual information of the system data received at the current time according to the log-likelihood information output by the first SISO decoder, and performing CRC (cyclic redundancy check) on the hard decision result of the first SISO decoder; an average mutual information calculation unit, adapted to calculate the average mutual information of the currently received system data according to the extrinsic information output by the first SISO decoder; a CRC check unit, adapted to perform CRC check on the hard decision result of the first SISO decoder according to the extrinsic information output by the first SISO decoder; and the control unit is suitable for controlling the second SISO decoder to stop iterative decoding and output a decoding result when the CRC check result, the average bit error rate of the currently received system data and the average mutual information meet corresponding iterative stop conditions.
Optionally, the CRC check unit includes: the first check subunit is adapted to, when the system data received in the whole decoding process of the Turbo decoder is a transport block and the transport block corresponds to a code block, perform, by using a first CRC generator polynomial, CRC check on the hard decision result of the first SISO decoder to obtain a CRC check result indicating whether the CRC check passes; and the second check subunit is suitable for performing CRC check on the hard decision result of the first SISO decoder by adopting a corresponding CRC generator polynomial when the system data received in the decoding process of the Turbo decoder is more than two transmission blocks or is one transmission block but the transmission block corresponds to more than two code blocks to obtain CRC check bits corresponding to the current iterative decoding, and determining a CRC check result according to the CRC check bits corresponding to the current iterative decoding, wherein the corresponding CRC generator polynomial is different from the first CRC generator polynomial.
Optionally, the second check subunit is further adapted to, when the system data received in the decoding process of the Turbo decoder is two or more transport blocks or the two or more transport blocks are two or more code blocks, compare whether CRC check bits corresponding to current iterative decoding are the same as CRC check bits corresponding to last iterative decoding, and adjust a value of the accumulation counter according to a comparison result.
Optionally, the second syndrome unit is adapted to compare whether a CRC check bit corresponding to a current iterative decoding is the same as a CRC check bit corresponding to a previous iterative decoding, adjust a value of an accumulation counter according to a comparison result, and use the value of the accumulation counter as a CRC check result.
Optionally, the control unit includes: the first control subunit is suitable for controlling the second SISO decoder to stop iterative decoding if the received system data in the decoding process of the Turbo decoder is a transmission block and the transmission block is a code block, if CRC passes, the second SISO decoder is controlled to stop iterative decoding, and otherwise, whether the second SISO decoder is controlled to stop iterative decoding or not is determined based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time; and the second control subunit is adapted to, when the system data received in the decoding process of the Turbo decoder is more than two transport blocks, or is one transport block but the transport block corresponds to more than two code blocks, control the second SISO decoder to stop iterative decoding if the value of the accumulation counter is greater than 0 and the average mutual information of the system data received at the current time is greater than the upper limit value of the preset average mutual information, or the value of the accumulation counter is greater than the preset threshold value of the accumulation counter, and otherwise determine whether to control the second SISO decoder to stop iterative decoding based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time.
Optionally, the first control subunit and the second control subunit are both adapted to control the second SISO decoder to stop iterative decoding when the following conditions are simultaneously satisfied, and otherwise control the second SISO decoder to perform SISO decoding on the currently received system data and the second parity data interleaved with the extrinsic information output by the first SISO decoder, and input the extrinsic information output by the second SISO decoder to the first SISO decoder, and perform next iterative decoding: the average bit error rate of the system data received at the current time is greater than the product of the average bit error rate of the system data received at the first time and a preset average bit error rate termination probability value; the average mutual information of the system data received at the current time is smaller than the lower limit value of the preset average mutual information; the average bit error rate of the system data received for the first time is greater than a preset initial value of the average bit error rate.
Optionally, the control unit is further adapted to control the second SISO decoder to perform SISO decoding on the system data and the second check data after interleaving the extrinsic information output by the first SISO decoder and the system data when the CRC check result, the average bit error rate of the system data, and the average mutual information do not satisfy a preset iteration stop condition, and input the extrinsic information output by the second SISO decoder to the first SISO decoder to perform next iterative decoding.
Embodiments of the present invention also provide a computer-readable storage medium, on which computer instructions are stored, and when the computer instructions are executed, the method steps of any one of the above methods are executed.
The embodiment of the present invention further provides a terminal, where the terminal includes a memory and a processor, and the memory stores computer instructions capable of being executed on the processor, and is characterized in that the processor executes the computer instructions to perform any of the steps of the method.
Compared with the prior art, the embodiment of the invention has the advantages that:
by adopting the scheme, the average bit error rate and the average mutual information of the system data received at the current time are calculated, the CRC check is carried out on the hard decision result of the first SISO decoder, whether the second SISO decoder is controlled to stop iterative decoding is judged based on the CRC check result, the average bit error rate and the average mutual information of the system data received at the current time, and whether the second SISO decoder is controlled to stop iterative decoding is judged based on the average mutual information of the system data received at the current time, so that the Turbo decoder can be controlled to stop iterative decoding in advance more accurately.
Drawings
FIG. 1 is a schematic diagram of a Turbo decoder;
FIG. 2 is a flowchart of a control method for decoding Turbo codes according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a method for determining whether to stop iterative decoding in advance according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a control device for decoding Turbo codes according to an embodiment of the present invention.
Detailed Description
FIG. 1 is a schematic structural diagram of a Turbo decoder. Referring to fig. 1, the Turbo decoder may include: a first SISO decoder 11, an adder 12, an interleaver 13, a second SISO decoder 14, a deinterleaver 15, and a decision device 16.
Before each iterative decoding, the Turbo decoder receives data to be decoded. The data to be decoded may be decomposed into system data, first parity data, and second parity data.
Taking the system data in the current iteration decoding process as ysThe first check data is yp1The second check data is yp2For example, the first SISO decoder 11 performs decoding on the currently received system data ysFirst verification data yp1And the data L after the deinterleaving of the extrinsic information output by the second SISO decoder 14 in the last iterative decoding process1SISO decoding is performed.
The first SISO decoder 11 performs SISO decoding on the data to obtain log-likelihood information, i.e., system data ysLog likelihood ratio information of each bit in the tree, and obtaining corresponding external information L according to the log likelihood informatione0. At this time, the decider 16 mayAnd judging whether the Turbo decoder stops iterative decoding in advance according to output information of SISO decoding.
When the decider 16 decides that the Turbo decoder stops the iterative decoding in advance, the second SISO decoder 14 does not perform the subsequent decoding operation any more.
When the decider 16 decides that the Turbo decoder cannot stop the iterative decoding in advance, the second SISO decoder 14 continues to perform the subsequent decoding operation. Specifically, the extrinsic information L output from the first SISO decoder 11e0And system data is ysThe signal is input to an interleaver 13 for interleaving after passing through an adder 12, and prior information L of a second SISO decoder 14 is obtained0. The prior information L0And the second check-up data is yp2Input to the second SISO decoder 14, and the prior information L is decoded by the second SISO decoder 140And the second check-up data is yp2SISO decoding is performed, i.e. the extrinsic information L output by the first SISO decoder 11e0And the system data is ysAnd the second check-up data is yp2Performs SISO decoding and outputs extrinsic information Le1. Extrinsic information L output by the second SISO decoder 14e1May be used as input data for the first SISO decoder 11 in the next iterative decoding process.
At present, the decision device 16 usually only determines whether the Turbo decoder stops iteration in advance according to the average mutual information of the system data received at the current time, and the accuracy is poor.
In view of the above problems, embodiments of the present invention provide a method for controlling Turbo code decoding, which determines whether to control a second SISO decoder to stop iterative decoding by simultaneously determining, based on a CRC check result of a hard decision result of a first SISO decoder, an average bit error rate and average mutual information of system data received at a current time, and may more accurately control the Turbo decoder to stop iterative decoding in advance, compared with determining whether to control the second SISO decoder to stop iterative decoding based on the average mutual information of the system data received at the current time.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Referring to fig. 2, an embodiment of the present invention provides a method for controlling Turbo code decoding, where the method includes the following steps:
and step 21, acquiring log-likelihood information output by the first SISO decoder in the current iterative decoding process of the Turbo decoder.
The first SISO decoder is used for carrying out SISO decoding on the currently received system data, the first check data and the data obtained by de-interleaving the external information output by the second SISO decoder in the last iterative decoding process, and the second SISO decoder is used for carrying out SISO decoding on the currently received system data, the data obtained by interleaving the external information output by the first SISO decoder and the second check data. For example, referring to fig. 1, the first SISO decoder 11 is said first SISO decoder and the second SISO decoder 14 is said second SISO decoder.
In a specific implementation, the log-likelihood information output by the first SISO decoder is log-likelihood ratio information of each bit of the system data.
And step 22, calculating the average bit error rate of the system data received at the current time and the average mutual information between any two bits according to the log-likelihood information output by the first SISO decoder, and performing CRC check on the hard decision result of the first SISO decoder.
In an embodiment of the present invention, the following formula may be adopted to calculate the bit error rate of each bit in the currently received system data:
Figure BDA0001276034830000081
wherein p isbThe bit error rate of a certain bit in the currently received system data is l, which is the log-likelihood ratio of the bit.
After the bit error rate of each bit in the system data received at the current time is obtained according to the formula (1), the average bit error rate of the system data received at the current time can be further obtained according to the formula (2):
Figure BDA0001276034830000082
wherein, BER is an average bit error rate of the currently received system data, and N is a bit number of the currently received system data.
Meanwhile, it can be known from the formula (2) that the average bit error rate of the system data received at the present time is a floating point number. Therefore, for the convenience of implementation, the bit error rate of each bit in the currently received system data may be quantized in a fixed point, and the obtained average bit error rate of the currently received system data may be represented by the following formula:
Figure BDA0001276034830000083
the AveBER is an average bit error rate of the currently received system data, and the LUT _ BER (| l |) is a fixed-point quantization value corresponding to a bit error rate of a certain bit in the currently received system data.
In a specific implementation, the fixed-point quantization value corresponding to the bit error rate of each bit in the currently received system data may be obtained by looking up a table.
For example, when the bit width of the fixed-point quantization is 6bits, the fixed-point quantization values of the bit error rates corresponding to the absolute values of the different log likelihood ratios are shown in table 1:
TABLE 1
|l| 0 1 2 3 4 >＝5
LUT_BER(|l|) 16 8 4 1 1 0
In a specific implementation, for two discrete random variables, their possible values are x respectivelyi(i ═ 1,2, …, n) and yj(j ═ 1,2, …, m). X for a certain specific resulti，Y＝yi，(xi,yi) The method is a combination of possible values of two random variables X and Y, and if X emits 0 or 1 with equal probability, mutual information between X and Y can be obtained through the following formula according to the principle of information theory:
Figure BDA0001276034830000091
wherein I (X; Y) is mutual information between X and Y, and l is log-likelihood information output by the first SISO decoder.
According to the formula (4), the average mutual information of the system data received at the current time can be calculated.
For the convenience of specific implementation, the average mutual information of the system data received at the current time may be quantized at a fixed point, and the obtained average mutual information of the system data received at the current time may be represented by the following formula:
Figure BDA0001276034830000092
wherein, aveMI is the average mutual information of the currently received system data, and LUT _ BER | l |) is the fixed point quantization value corresponding to the mutual information of some two bits in the currently received system data.
In a specific implementation, the fixed-point quantization value corresponding to the mutual information of two bits in the currently received system data may be obtained by looking up a table.
For example, when the bit width of the fixed-point quantization is 6bits, the fixed-point quantization values of the mutual information corresponding to the absolute values of the different log likelihood ratios are shown in table 2:
TABLE 2
|l| 0 1 2 3 4 5 6 >＝7
LUT_MI(|l|) 0 5 15 22 27 29 30 31
In a specific implementation, CRC check may be performed on the hard decision result of the first SISO decoder in various ways according to log-likelihood information output by the first SISO decoder.
In an embodiment of the present invention, CRC check may be performed on the hard decision result of the first SISO decoder according to the number of transport blocks and the number of code blocks included in system data received in the whole decoding process of the Turbo decoder.
Specifically, when the system data received in the whole decoding process of the Turbo decoder is a transmission block and the transmission block corresponds to a code block, a first CRC generator polynomial is used to perform CRC check on the hard decision result of the first SISO decoder, so as to obtain a CRC check result indicating whether the CRC check passes or not. Wherein the first CRC generator polynomial is a unique generator polynomial that can be determined according to a CRC check algorithm. For example, "true" may be output when the CRC check of the hard decision result of the first SISO decoder passes, and "failed" may be output otherwise.
When the system data received in the decoding process of the Turbo decoder is more than two transmission blocks or is one transmission block but the transmission block corresponds to more than two code blocks, the corresponding CRC generator polynomial is adopted to perform CRC check on the hard decision result of the first SISO decoder to obtain the CRC check bit corresponding to the current iterative decoding, and the CRC check result is determined according to the CRC check bit corresponding to the current iterative decoding.
In a specific implementation, the corresponding CRC generator polynomial may be set in advance and is different from the first CRC generator polynomial. When the system data received in the Turbo decoder decoding process is more than two transport blocks, the more than two transport blocks may correspond to one code block or correspond to a plurality of code blocks.
In a specific implementation, a CRC check result may be determined in a variety of ways according to the CRC check bits corresponding to the current iterative decoding.
In an embodiment of the present invention, after the CRC check bit corresponding to the current iterative decoding is obtained, the value of the cumulative counter may be adjusted according to the comparison result by comparing whether the CRC check bit corresponding to the current iterative decoding is the same as the CRC check bit corresponding to the previous iterative decoding, and the value of the cumulative counter is used as the CRC check result. Compared with the method of adjusting the value of the accumulation counter by comparing all the bits of the hard decision results of two times before and after, only 24 check bits are needed to be stored and compared, but the bits of the whole code block are not stored and compared, so that the occupied storage space and the number of bits needing to be compared are smaller.
In specific implementation, the value of the accumulation counter can be adjusted according to the statistical result by counting the number of iterations when the CRC check bit is unchanged. Specifically, when the value of the accumulation counter is adjusted, the value of the accumulation counter may be controlled to increase by a preset first value when the CRC check bit corresponding to the current iterative decoding is the same as the CRC check bit corresponding to the previous iterative decoding, otherwise, the value of the accumulation counter is controlled to be 0.
For example, taking the current iteration process as the nth iteration, when the CRC check bit of the nth iteration is the same as the CRC check bit of the (n-1) th iteration, the value CntCRC of the accumulation counter is increased by 1, otherwise, the value is cleared.
And step 23, when the CRC check result, the average bit error rate of the system data received at the current time, and the average mutual information satisfy the corresponding iteration stop conditions, controlling the second SISO decoder to stop the iterative decoding and output a decoding result.
In a specific implementation, a corresponding iteration stop condition may be set according to the number of transport blocks and the number of code blocks included in the system data received in the whole decoding process of the Turbo decoder. It is understood that how to set the iteration stop condition specifically is not a limitation of the present invention and is within the scope of the present invention.
In a specific implementation, when the CRC check result, the average bit error rate of the system data, and the average mutual information do not satisfy a preset iteration stop condition, the second SISO decoder is controlled to perform SISO decoding on the system data and the data after the interleaving of the extrinsic information output by the first SISO decoder and the second check data, and the extrinsic information output by the second SISO decoder is input to the first SISO decoder to perform next iteration decoding.
Fig. 3 is a method for determining whether to stop iterative decoding in advance according to the CRC check result, the average bit error rate of the system data received at the current time, and the average mutual information.
Referring to fig. 3, the method may include the steps of:
step 31, judging whether the system data received in the decoding process of the Turbo decoder is a transmission block and the transmission block is a code block.
When the system data received in the Turbo decoder decoding process is a transport block and the transport block is a code block, step 32 is executed, otherwise step 34 is executed.
Step 32, determine whether the CRC check passes.
If the CRC check passes, step 33 is performed, otherwise step 35 is performed.
And step 33, controlling the second SISO decoder to stop iterative decoding.
If the system data received in the Turbo decoder decoding process is a transmission block and the transmission block is a code block, and the CRC check passes, it indicates that the decoding is correct, so that the second SISO decoder can be controlled to stop iterative decoding.
Step 34, determining whether the value cntcc of the cumulative counter is greater than 0 and the average mutual information AveMI of the system data received at the current time is greater than the upper limit value MI _ HIGH of the preset average mutual information, or determining that the value cntcc of the cumulative counter is greater than the preset cumulative counter threshold value three _ cntcc.
If CntCRC > 0 and AveMI > MI _ HIGH, or CntCRC > THRE _ CntCRC, then step 36 is performed, otherwise step 35 is performed.
And step 35, determining whether to control the second SISO decoder to stop iterative decoding or not based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time.
In an embodiment of the present invention, the second SISO decoder may be controlled to stop iterative decoding when the following conditions are satisfied simultaneously, otherwise, the second SISO decoder may be controlled to perform SISO decoding on the currently received system data, which is interleaved with the extrinsic information output by the first SISO decoder, and the second parity data, and input the extrinsic information output by the second SISO decoder to the first SISO decoder, and perform next iterative decoding:
the average bit error rate AveBER of the system data received at the present time is larger than the product of the average bit error rate AveBER _ Iter0 of the system data received at the first time and a preset average bit error rate termination probability value Ratio _ BER _ TERM, namely, AveBER > AveBER _ Iter0 rate _ BER _ TERM;
the average mutual information AveMI of the system data received at the current time is smaller than a preset lower limit value MI _ LOW of the average mutual information, namely AveMI is smaller than MI _ LOW;
the average bit error rate aveBER _ Iter0 of the system data received for the first time is greater than the preset initial VALUE SMALL _ BER _ VALUE of the average bit error rate, i.e. AveBER _ Iter0 > SMALL _ BER _ VALUE.
When the three conditions are met, the signal quality of the decoded input data is poor, and the correct decoding result cannot be obtained even if the iteration is continued, so that the second SISO decoder can be controlled to stop the iterative decoding.
And step 36, controlling the second SISO decoder to stop iterative decoding.
If cntcc > 0 and AveMI > MI _ HIGH, or cntcc > THRE _ cntcc, it indicates correct decoding, so the second SISO decoder can be controlled to stop iterative decoding.
As can be seen from the above, the method for controlling Turbo code decoding in the embodiment of the present invention determines whether to control the second SISO decoder to stop iterative decoding based on the CRC result of the hard decision result of the first SISO decoder, the average bit error rate of the system data received at the present time, and the average mutual information, so that the Turbo decoder can be more accurately controlled to stop iterative decoding in advance.
In order to make those skilled in the art better understand and implement the present invention, the following describes in detail a control device, a computer readable storage medium, and a terminal for Turbo code decoding corresponding to the control method for Turbo code decoding.
Referring to fig. 4, an embodiment of the present invention provides a control device 40 for decoding a Turbo code, where the control device 40 may include: an acquisition unit 41, an average bit error rate calculation unit 42, an average mutual information calculation unit 43, a CRC check unit 44, and a control unit 45. Wherein:
the obtaining unit 41 is adapted to obtain log-likelihood information output by a first SISO decoder in a current iterative decoding process of the Turbo decoder, where the first SISO decoder is a decoder for SISO decoding the currently received system data, the first check data, and data obtained by deinterleaving the extrinsic information output by a second SISO decoder in a last iterative decoding process, and the second SISO decoder is a decoder for SISO decoding the currently received system data, the data obtained by interleaving the extrinsic information output by the first SISO decoder, and the second check data;
the average bit error rate calculation unit 42 is adapted to calculate an average bit error rate and average mutual information of the currently received system data according to the log-likelihood information output by the first SISO decoder, and perform CRC check on the hard decision result of the first SISO decoder;
the average mutual information calculating unit 43 is adapted to calculate the average mutual information of the currently received system data according to the extrinsic information output by the first SISO decoder;
the CRC check unit 44 is adapted to perform CRC check on the hard decision result of the first SISO decoder according to the extrinsic information output by the first SISO decoder;
the control unit 45 is adapted to control the second SISO decoder to stop iterative decoding and output a decoding result when the CRC check result, the average bit error rate of the system data received at the current time, and the average mutual information satisfy corresponding iteration stop conditions.
In an embodiment of the present invention, the CRC check unit 44 may include: a first syndrome unit 441 and a second syndrome unit 442. Wherein:
the first check subunit 441 is adapted to, when the system data received in the whole decoding process of the Turbo decoder is a transport block and the transport block corresponds to a code block, perform, by using a first CRC generator polynomial, CRC check on the hard decision result of the first SISO decoder to obtain a CRC check result indicating whether the CRC check passes;
the second check subunit 442 is adapted to, when the system data received in the decoding process of the Turbo decoder is more than two transport blocks, or is one transport block but the transport block corresponds to more than two code blocks, perform CRC check on the hard decision result of the first SISO decoder by using a corresponding CRC generator polynomial, to obtain CRC check bits corresponding to the current iterative decoding, and determine a CRC check result according to the CRC check bits corresponding to the current iterative decoding, where the corresponding CRC generator polynomial is different from the first CRC generator polynomial.
In an embodiment of the present invention, the second syndrome unit 442 is further adapted to compare whether CRC check bits corresponding to current iterative decoding are the same as CRC check bits corresponding to previous iterative decoding when system data received in a decoding process of the Turbo decoder is more than two transport blocks or the more than two transport blocks are more than two code blocks, and adjust a value of an accumulation counter according to a comparison result.
In an embodiment of the present invention, the second checking subunit 442 is adapted to compare whether CRC check bits corresponding to current iterative decoding are the same as CRC check bits corresponding to previous iterative decoding, adjust a value of an accumulation counter according to a comparison result, and use the value of the accumulation counter as a CRC check result.
In an embodiment of the present invention, the control unit 45 may include: a first control subunit 451 and a second control subunit 452. Wherein:
the first control subunit 451 is adapted to, when the system data received in the decoding process of the Turbo decoder is a transport block and the transport block is a code block, control the second SISO decoder to stop iterative decoding if CRC check passes, otherwise, determine whether to control the second SISO decoder to stop iterative decoding based on an average bit error rate of the system data received at the current time and the first time and an average mutual information of the system data received at the current time;
the second control subunit 452 is adapted to, when the system data received in the decoding process of the Turbo decoder is more than two transport blocks, or is one transport block but the transport block corresponds to more than two code blocks, control the second SISO decoder to stop iterative decoding if the value of the accumulation counter is greater than 0 and the average mutual information of the system data received at the current time is greater than the upper limit value of the preset average mutual information, or the value of the accumulation counter is greater than the preset threshold value of the accumulation counter, otherwise determine whether to control the second SISO decoder to stop iterative decoding based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time.
In an embodiment of the present invention, the first control subunit and the second control subunit are both adapted to control the second SISO decoder to stop iterative decoding when the following conditions are simultaneously satisfied, and otherwise control the second SISO decoder to perform SISO decoding on data obtained by interleaving currently received system data with extrinsic information output by the first SISO decoder and second parity data, and input extrinsic information output by the second SISO decoder to the first SISO decoder, and perform next iterative decoding:
the average bit error rate of the system data received at the current time is greater than the product of the average bit error rate of the system data received at the first time and a preset average bit error rate termination probability value;
the average mutual information of the system data received at the current time is smaller than the lower limit value of the preset average mutual information;
the average bit error rate of the system data received for the first time is greater than a preset initial value of the average bit error rate.
In a specific implementation, the control unit 35 is further adapted to control the second SISO decoder to perform SISO decoding on the system data and the second check data after interleaving the extrinsic information output by the first SISO decoder and the system data when the CRC check result, the average bit error rate of the system data, and the average mutual information do not meet a preset iteration stop condition, and input the extrinsic information output by the second SISO decoder to the first SISO decoder to perform next iteration decoding.
The embodiment of the invention also provides a computer readable storage medium, wherein a computer instruction is stored on the computer readable storage medium, and the step of the Turbo code decoding control method in the embodiment of the invention is executed when the computer instruction runs.
In particular implementations, the computer-readable storage medium may include: ROM, RAM, magnetic or optical disks, and the like.
The embodiment of the invention also provides a terminal, which can comprise a memory and a processor, wherein the memory stores computer instructions capable of running on the processor, and the terminal is characterized in that the processor executes the steps of the control method for Turbo code decoding in the embodiment of the invention when running the computer instructions.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (14)

1. A Turbo code decoding control method is characterized by comprising the following steps:
in the current iterative decoding process of the Turbo decoder, obtaining log-likelihood information output by a first SISO decoder, wherein the first SISO decoder is a decoder for performing SISO decoding on currently received system data, first check data and data obtained by de-interleaving external information output by a second SISO decoder in the last iterative decoding process, and the second SISO decoder is a decoder for performing SISO decoding on the currently received system data, the data obtained by interleaving the external information output by the first SISO decoder and the second check data;
calculating the average bit error rate and the average mutual information of the system data received at the current time according to the log-likelihood information output by the first SISO decoder, and performing CRC (cyclic redundancy check) on the hard decision result of the first SISO decoder;
when the CRC check result, the average bit error rate of the currently received system data and the average mutual information meet corresponding iteration stop conditions, controlling the second SISO decoder to stop iterative decoding and outputting a decoding result;
the performing, according to log-likelihood information output by the first SISO decoder, CRC check on a hard decision result of the first SISO decoder includes: when the system data received in the whole decoding process of the Turbo decoder is a transmission block and the transmission block corresponds to a code block, performing CRC (cyclic redundancy check) on a hard decision result of the first SISO decoder by adopting a first CRC generator polynomial to obtain a CRC result of whether the CRC passes or not; when the system data received in the decoding process of the Turbo decoder is more than two transmission blocks or is one transmission block but the transmission block corresponds to more than two code blocks, a corresponding CRC generator polynomial is adopted, CRC check is carried out on the hard decision result of the first SISO decoder to obtain CRC check bits corresponding to current iterative decoding, a CRC check result is determined according to the CRC check bits corresponding to the current iterative decoding, and the corresponding CRC generator polynomial is different from the first CRC generator polynomial.
2. The Turbo code decoding control method according to claim 1, wherein the determining a CRC check result according to the CRC check bits corresponding to the current iterative decoding includes:
and comparing whether the CRC check bit corresponding to the current iterative decoding is the same as the CRC check bit corresponding to the last iterative decoding, adjusting the value of an accumulation counter according to the comparison result, and taking the value of the accumulation counter as the CRC check result.
3. The Turbo code decoding control method according to claim 2, wherein the adjusting the value of the accumulation counter according to the comparison result comprises:
and when the CRC check bit corresponding to the current iterative decoding is the same as the CRC check bit corresponding to the last iterative decoding, controlling the value of the accumulation counter to increase by a preset first value, otherwise, controlling the value of the accumulation counter to be 0.
4. The Turbo code decoding control method according to claim 3, wherein when the CRC check result, the average bit error rate of the system data, and the average mutual information satisfy corresponding iteration stop conditions, controlling the second SISO decoder to stop the iterative decoding and output a decoding result, comprises:
when the system data received in the decoding process of the Turbo decoder is a transmission block and the transmission block is a code block, if CRC passes, controlling the second SISO decoder to stop iterative decoding, otherwise, determining whether to control the second SISO decoder to stop iterative decoding or not based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time;
when the system data received in the decoding process of the Turbo decoder is more than two transmission blocks or is one transmission block but the transmission block corresponds to more than two code blocks, if the value of the accumulation counter is greater than 0 and the average mutual information of the system data received at the current time is greater than the upper limit value of the preset average mutual information or the value of the accumulation counter is greater than the threshold value of the preset accumulation counter, the second SISO decoder is controlled to stop iterative decoding, otherwise, whether the second SISO decoder is controlled to stop iterative decoding is determined based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time.
5. The Turbo code decoding control method of claim 4, wherein the determining whether to control the second SISO decoder to stop the iterative decoding based on the average bit error rate of the current and first time system data and the average mutual information of the current time system data comprises:
and when the following conditions are met, controlling the second SISO decoder to stop iterative decoding, otherwise, controlling the second SISO decoder to perform SISO decoding on the data obtained by interweaving the currently received system data and the external information output by the first SISO decoder and the second check data, inputting the external information output by the second SISO decoder into the first SISO decoder, and executing the next iterative decoding:
the average bit error rate of the system data received at the current time is greater than the product of the average bit error rate of the system data received at the first time and a preset average bit error rate termination probability value;
the average mutual information of the system data received at the current time is smaller than the lower limit value of the preset average mutual information;
the average bit error rate of the system data received for the first time is greater than a preset initial value of the average bit error rate.
6. The Turbo code decoding control method according to any one of claims 1 to 5, further comprising:
and when the CRC check result, the average bit error rate of the system data and the average mutual information do not meet the preset iteration stop condition, controlling the second SISO decoder to carry out SISO decoding on the system data, the data obtained by interweaving the external information output by the first SISO decoder and the second check data, inputting the external information output by the second SISO decoder into the first SISO decoder, and executing next iteration decoding.
7. A Turbo code decoding control device, comprising:
the system comprises an acquisition unit, a decoding unit and a decoding unit, wherein the acquisition unit is suitable for acquiring log-likelihood information output by a first SISO decoder in the current iterative decoding process of a Turbo decoder, the first SISO decoder is used for carrying out SISO decoding on currently received system data, first check data and data obtained by de-interleaving external information output by a second SISO decoder in the last iterative decoding process, and the second SISO decoder is used for carrying out SISO decoding on the currently received system data, the data obtained by interleaving the external information output by the first SISO decoder and the second check data;
the average bit error rate calculation unit is suitable for calculating the average bit error rate and the average mutual information of the system data received at the current time according to the log-likelihood information output by the first SISO decoder, and performing CRC (cyclic redundancy check) on the hard decision result of the first SISO decoder;
an average mutual information calculation unit, adapted to calculate the average mutual information of the currently received system data according to the extrinsic information output by the first SISO decoder;
a CRC check unit, adapted to perform CRC check on the hard decision result of the first SISO decoder according to the extrinsic information output by the first SISO decoder;
the control unit is suitable for controlling the second SISO decoder to stop iterative decoding and output a decoding result when the CRC check result, the average bit error rate of the currently received system data and the average mutual information meet corresponding iterative stop conditions;
the CRC check unit includes:
the first check subunit is adapted to, when the system data received in the whole decoding process of the Turbo decoder is a transport block and the transport block corresponds to a code block, perform, by using a first CRC generator polynomial, CRC check on the hard decision result of the first SISO decoder to obtain a CRC check result indicating whether the CRC check passes;
and the second check subunit is suitable for performing CRC check on the hard decision result of the first SISO decoder by adopting a corresponding CRC generator polynomial when the system data received in the decoding process of the Turbo decoder is more than two transmission blocks or is one transmission block but the transmission block corresponds to more than two code blocks to obtain CRC check bits corresponding to the current iterative decoding, and determining a CRC check result according to the CRC check bits corresponding to the current iterative decoding, wherein the corresponding CRC generator polynomial is different from the first CRC generator polynomial.
8. The Turbo code decoding control device according to claim 7, wherein the second parity checking subunit is further adapted to compare whether CRC check bits corresponding to a current iterative decoding are the same as CRC check bits corresponding to a previous iterative decoding when the system data received in the Turbo decoder decoding process is two or more transport blocks or the two or more transport blocks are two or more code blocks, and adjust a value of an accumulation counter according to a comparison result.
9. The Turbo code decoding control device according to claim 7, wherein the second syndrome unit is adapted to compare whether CRC check bits corresponding to a current iterative decoding are the same as CRC check bits corresponding to a previous iterative decoding, adjust a value of an accumulation counter according to a comparison result, and use the value of the accumulation counter as a CRC check result.
10. The Turbo code decoding control device according to claim 9, wherein the control unit includes:
the first control subunit is suitable for controlling the second SISO decoder to stop iterative decoding if the received system data in the decoding process of the Turbo decoder is a transmission block and the transmission block is a code block, if CRC passes, the second SISO decoder is controlled to stop iterative decoding, and otherwise, whether the second SISO decoder is controlled to stop iterative decoding or not is determined based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time;
and the second control subunit is adapted to, when the system data received in the decoding process of the Turbo decoder is more than two transport blocks, or is one transport block but the transport block corresponds to more than two code blocks, control the second SISO decoder to stop iterative decoding if the value of the accumulation counter is greater than 0 and the average mutual information of the system data received at the current time is greater than the upper limit value of the preset average mutual information, or the value of the accumulation counter is greater than the preset threshold value of the accumulation counter, and otherwise determine whether to control the second SISO decoder to stop iterative decoding based on the average bit error rate of the system data received at the current time and the first time and the average mutual information of the system data received at the current time.
11. The Turbo code decoding control device according to claim 10, wherein the first control sub-unit and the second control sub-unit are adapted to control the second SISO decoder to stop iterative decoding when the following conditions are satisfied simultaneously, and otherwise control the second SISO decoder to SISO decode the data obtained by interleaving the currently received system data with the extrinsic information output from the first SISO decoder and the second parity data, and input the extrinsic information output from the second SISO decoder to the first SISO decoder, and perform next iterative decoding:
the average bit error rate of the system data received at the current time is greater than the product of the average bit error rate of the system data received at the first time and a preset average bit error rate termination probability value;
the average mutual information of the system data received at the current time is smaller than the lower limit value of the preset average mutual information;
the average bit error rate of the system data received for the first time is greater than a preset initial value of the average bit error rate.
12. The Turbo code decoding control device according to any one of claims 7 to 11, wherein the control unit is further adapted to control the second SISO decoder to SISO decode the interleaved data of the system data and the extrinsic information output from the first SISO decoder and the second check data, and input the extrinsic information output from the second SISO decoder to the first SISO decoder to perform next iterative decoding when the CRC check result, the average bit error rate of the system data, and the average mutual information do not satisfy a predetermined iteration stop condition.
13. A computer readable storage medium having computer instructions stored thereon, wherein the computer instructions when executed perform the steps of the method of any one of claims 1 to 6.
14. A decoded terminal, comprising a memory and a processor, the memory having stored thereon computer instructions executable on the processor, when executing the computer instructions, performing the steps of the method of any of claims 1 to 6.
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