CN108735856A - Silicon chip detection method and its silicon wafer carrying device used - Google Patents
Silicon chip detection method and its silicon wafer carrying device used Download PDFInfo
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- CN108735856A CN108735856A CN201710265950.0A CN201710265950A CN108735856A CN 108735856 A CN108735856 A CN 108735856A CN 201710265950 A CN201710265950 A CN 201710265950A CN 108735856 A CN108735856 A CN 108735856A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 218
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 215
- 239000010703 silicon Substances 0.000 title claims abstract description 215
- 238000001514 detection method Methods 0.000 title claims abstract description 50
- 238000012360 testing method Methods 0.000 claims abstract description 53
- 238000001816 cooling Methods 0.000 claims abstract description 17
- 230000007547 defect Effects 0.000 claims abstract description 14
- 238000010438 heat treatment Methods 0.000 claims description 17
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 14
- 230000006378 damage Effects 0.000 claims description 4
- 230000008646 thermal stress Effects 0.000 abstract description 20
- 239000000463 material Substances 0.000 abstract description 18
- 238000002474 experimental method Methods 0.000 abstract description 5
- 238000000034 method Methods 0.000 description 18
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- 229910001220 stainless steel Inorganic materials 0.000 description 6
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- 238000002791 soaking Methods 0.000 description 4
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- 235000020679 tap water Nutrition 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
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- 238000011161 development Methods 0.000 description 2
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- 238000006062 fragmentation reaction Methods 0.000 description 2
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- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 2
- 238000010248 power generation Methods 0.000 description 2
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- 238000003860 storage Methods 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1876—Particular processes or apparatus for batch treatment of the devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The silicon chip detection method of the present invention has the silicon chip of micro-crack defect for detecting identification, including：Silicon slice under test is positioned over silicon wafer carrying device；Silicon wafer carrying device is heat-treated；Cooling aforementioned thermally treated silicon slice under test；Detect whether silicon slice under test after cooling has micro-crack defect.The silicon wafer carrying device for above-mentioned silicon chip detection method of the present invention includes the carrier of handle and placement silicon slice under test, has on carrier and keep off tooth for being inserted into the integral type of silicon slice under test.The silicon chip detection method of the present invention is easy to operate, easy to implement；Implementation cost is cheap, and required auxiliary material is cheap；Detection efficiency is high, and flexibility is stronger.The insert part surface of the silicon wafer carrying device of the present invention has the gear tooth linearly arranged, and for being inserted into silicon slice under test, the material one in insert part and bar body portion is shown ensures that heat exchange will not be in contact because material is different in Thermal Stress Experiment gear tooth；Insert part is point contact with silicon chip, to ensure the being heated evenly property of silicon chip.
Description
Technical field
The invention belongs to photovoltaic solar cell Defect detection technique fields, and in particular to a kind of silicon chip detection side
Method further relates to a kind of silicon wafer carrying device for above-mentioned detection method.
Background technology
In today that global economy is advanced by leaps and bounds, the energy and environment are always the main problem for perplexing countries in the world development.
The main energy sources that coal, oil, natural gas etc. are produced as the mankind, lived at present, because exhaustive exploitation has faced exhaustion, and its is right
The negative effect that earth environment generates also increasingly is shown.For this purpose, a kind of sustainable green energy resource of searching is for human future pole
It is important.Wherein, solar energy is inexhaustible as a kind of new energy and renewable resource, and green non-pollution,
Paid attention to by countries in the world, especially crystal silicon chip battery is that the development of leading photovoltaic solar industry especially induces one to note
Mesh.
Silicon chip quality is to influence the key factor of solar cell power generation efficiency.The internal flaw of silicon chip, for example, it is hidden split it is (micro-
Crackle) etc., breakage risk of the solar power generation devices in transport process can be increased, while can also reduce the use of photovoltaic plant
Service life.In silicon chip manufacturing process, how quickly and efficiently to reject there are it is hidden split, the bad silicon chip of micro-crack, seek a kind of low
The finished product silicon chip quality detecting method of cost weighs the total quality with batch silicon chip, ensures that silicon chip quality is particularly important.
Currently, artificial visual detection method is silicon chip micro-crack defects detection method the most direct.But this method mainly according to
Rely the working experience of testing staff, and be vulnerable to the influence of ambient light intensity, incidence angle, often leads to different testing staff couple
Same crack of silicon chip situation obtains different conclusions.In addition, artificial visual detection is not it is observed that defect inside silicon chip, Er Qiexiao
Rate is low, so this method is usually used in Si wafer quality sampling observation and the auxiliary detection of other detection sides.
In order to overcome the technological deficiency of visual inspection, the novel detection method of a variety of silicon chip micro-cracks to come into being.Example
Such as, the 24th research institute of Ministry of Information Industry's electronics using the translucency of light have developed a kind of new polishing material surface defect without
Damage detection device.In addition, using luminescence generated by light principle, electroluminescent principle, the silicon chip designed in conjunction with ccd image sensor detects
Equipment also has application in microcrack zone field.But these novel silicon chip microcrack zone technologies exist bar none
Following drawback：
(1) equipment manufacturing costs such as reflectoscope, infrared damage instrument and electro-luminescent systems are high, and price is usually more than ten
Ten thousand differ to hundreds of thousands, and high-quality, dependable performance silicon chip sorting machine is even as high as millions of, many enterprises and R&D institution without
Power is bought；
(2) these equipment principles are complicated, flow is cumbersome, it is bulky, need professional's execute-in-place, for most of
It is operated for skilled worker more difficult；
(3) with the change of the market demand, silicon wafer thickness tends to sheet at present, and existing detection device is increasingly difficult to hold
The task of load detection sheet silicon chip inside quality；
(4) to silicon chip inside 1mm micro-cracks below, existing silicon chip sorting machine None- identified, during producing line circulates,
Especially downstream solar components Lamination station, micro-crack can extend, and then influence the performance of finished product solar cell module.
Invention content
The purpose of the present invention is to provide a kind of silicon chip detection method, it can be used for weighing, assess the entirety with batch silicon chip
Quality, with quickly and efficiently reject there are it is hidden split, the bad silicon chip of the internal flaws such as micro-crack.
The present invention also aims to provide a kind of silicon wafer carrying device for above-mentioned detection method.
A kind of technical solution of the present invention is：Silicon chip detection method has micro-crack defect for detecting identification
Silicon chip, including step：
Silicon wafer carrying device and silicon slice under test are provided, silicon slice under test is positioned over silicon wafer carrying device；
The silicon slice under test for being opposite to silicon wafer carrying device is heat-treated；
Cooling aforementioned thermally treated silicon slice under test；And
Detect whether aforementioned silicon slice under test after cooling has micro-crack defect.
The features of the present invention also characterized in that
In the step of being heat-treated to silicon slice under test, by silicon slice under test and the silicon wafer carrying device of carrying silicon slice under test
It is placed in 80 DEG C~500 DEG C of heating device, 10~30min is kept the temperature at such a temperature, to ensure that silicon slice under test is heated evenly.
Silicon slice under test after heat treatment, which is placed in water, to be cooled down.
Using silicon chip sorting machine testing, whether unbroken silicon slice under test has micro-crack defect after cooling.
The heat treatment temperature of silicon slice under test is 100~400 DEG C.
Heating device selects Muffle furnace.
Another technical solution of the present invention is：For the silicon wafer carrying device of above-mentioned silicon chip detection method, packet
It includes handle and places the carrier of silicon slice under test, handle and carrier detachable connection, have on carrier and waited for for being inserted into
The integral type for surveying silicon chip keeps off tooth.
The features of the present invention also characterized in that
Carrier includes two paralleled end plates, and an at least supporting rod and at least is arranged in parallel between the medial surface of two end plates
Two inserted sheet bars, supporting rod are located at the lower section of inserted sheet bar, and inserted sheet bar is located at supporting rod both sides, and inserted sheet bar surface has one
Formula keeps off tooth, and silicon slice under test is inserted between the integral type gear tooth of the inserted sheet bar of supporting rod both sides, is provided on the lateral surface of end plate
Connect the fastener of handle.
Carrier includes three supporting rods and four inserted sheet bars, wherein a supporting rod connects the base portion center of two end plates,
Another two supporting rods are evenly distributed on the both sides of the supporting rod at base portion center, the side of two end plates it is each it is uniform connection two
Root inserted sheet bar.
Inserted sheet bar includes bar body portion and insert part, and bar body portion connects the side of two end plates, the middle part in bar body portion
Position outwardly convex forms insert part, and insert part surface has keeps off tooth for being inserted into the integral type of silicon chip linearly arranged.
The beneficial effects of the invention are as follows：The silicon chip detection method of the present invention at least has the advantages that following or advantageous effect：
(1) detection method of the invention is easy to operate, and easy to implement, common operating personnel only needs simple training, can be fast
Speed is grasped, and tracking instruction is carried out without professional person；
(2) its implementation is of low cost, and required auxiliary material is inexpensively, wherein required heating device price is usually thousands of
For member between tens of thousands of members, the price than existing CCD detection devices is lower；
(3) this method detection efficiency is high, compared to the detection that infra-red inspection instrument or reflectoscope etc. need scanning imagery
Method, this method is more efficient, and flexibility is stronger；
(4) this method can be used as the auxiliary detection means of existing sorting machine testing.Existing sorting machine is split in progress silicon chip
When line detects, the small crack of silicon chip of usual None- identified, and after being handled by thermal stress, these micro-cracks can be made in thermal stress
It is extended under, it is, thermal stress has amplification, the micro-crack that in this way can be difficult to sorting machine to micro-crack
By thermal stress handle screen out come.
The silicon wafer carrying device for above-mentioned detection method of the present invention is directed to the thermal stress detection side of silicon chip internal flaw
Method and design, the material selection heat proof material of carrier and have certain thermal fatigue, it is preferable that the material of carrier is stainless
Steel, the requirement of silicon chip Thermal Stress Experiment can be completed.The shape of two end plates is designed as including base portion and setting in base edge
Both sides U-shaped, the own wt of end plate can be mitigated, meanwhile, the connection of supporting rod, inserted sheet bar enhances carrier
Fastness.Unlike ordinary flower basket, the insert part surface of inserted sheet bar has the gear tooth linearly arranged, and gear tooth is for being inserted into
Silicon chip to be detected, insert part is consistent with the material in bar body portion, for example is preferred stainless steel, to ensure in thermal stress reality
It will not be in contact heat exchange because material is different in testing；In addition, contact of the insert part with silicon chip is point contact, to ensure that
The being heated evenly property of silicon chip full wafer.
Description of the drawings
Fig. 1 is the test result figure that silicon chip detection method using the present invention carries out Si wafer quality assessment；
Fig. 2 is the three-dimensional structure diagram of the carrier of the silicon wafer carrying device of the present invention；
Fig. 3 is the vertical view of Fig. 2；
Fig. 4 is the cross-sectional view of Fig. 2 end plates；
Fig. 5 is the dimensional structure diagram of inserted sheet bar in Fig. 2；
Fig. 6 is the three-dimensional structure diagram of the handle of the silicon wafer carrying device of the present invention；
Fig. 7 be the present invention silicon wafer carrying device carrier and handle cooperation before schematic diagram；
Fig. 8 be the present invention silicon wafer carrying device carrier and handle cooperation after schematic diagram.
In figure, 1. carriers, 11. end plates, 12. supporting rods, 13. inserted sheet bars, 14. fasteners, 111. sides, 112. bases
Portion, 131. bar body portions, 132. insert parts, 2. handles, 21. grip parts, 22. engaging portions.
Specific implementation mode
The following describes the present invention in detail with reference to the accompanying drawings and specific embodiments.
Embodiment 1
Silicon chip is heated when carrying out water-cooled process again, because of the unexpected release of heat, can be formed and is unevenly distributed inside silicon chip
Thermal field generates temperature gradient, further generates thermal stress.The thermal stress is related with the temperature difference before and after water cooling, and the temperature difference is bigger, and heat is answered
Power is bigger.Under identical thermal stress, i.e., under the identical annealing temperature difference, silicon chip degree of injury is bigger, and existing fragmentation risk is got over
It is high.The present invention is based on above-mentioned principles, propose a kind of silicon chip detection method, quickly to identify that silicon chip micro-crack defect, detection are same
The overall quality of batch silicon chip.Compared with existing silicon chip detection method, this method is easy to operate, direct, of low cost, Er Qiejian
Survey process speed is fast, and accuracy is high, has certain application advantage.
Tester prepares a certain number of silicon slices under test, and silicon slice under test is heated to certain temperature using heating device,
Heat preservation a period of time, it is ensured that all silicon chips are heated evenly, and reach assigned temperature, later quickly by surveyed silicon chip put into room temperature,
Water cooling is carried out in clean tap water.After water cooling, die crack situation is checked, and the batch silicon chip is estimated according to silicon chip fragment rate
In the quantity of hidden sliver and the overall quality of silicon chip.
Specifically, the present invention includes the following steps the silicon chip detection method of silicon chip internal flaw auxiliary detection：
Silicon slice under test is inserted into silicon wafer carrying device by step 1).Silicon slice under test is random from the silicon chip product of same batch
It chooses, or extracts.When implementing this method, 50 silicon slices under test are can be inserted into every group of silicon wafer carrying device.This silicon chip is held
It carries and sets different from general silicon chip flower basket, the special designing for this method, concrete structure is referring to embodiment 2.
Step 2), opening heating device quickly will be described in step 1) after the temperature in thermal to be added rises to target temperature
Silicon wafer carrying device is put into heating device, 10min~30min is kept the temperature under target temperature, it is ensured that in silicon wafer carrying device
All silicon slices under test are heated evenly.
In the present embodiment, heating device is preferably Muffle furnace, and maximum temperature can be heated to 1000 DEG C.Open Muffle
Stove sets gradually the cavity temperature after current cavity temperature, furnace chamber heating-up time, target temperature, soaking time, heat preservation.
After being provided with, begin to warm up.
After furnace chamber rises to target temperature, fire door is opened rapidly, and the carrier 1 for being inserted with silicon slice under test is quickly put into stove
Intracavitary, and keep the temperature 20 minutes.In general, silicon slice under test can ensure to be heated evenly in furnace chamber inside holding 10min~30min,
Preferably, soaking time 20min is selected.
Step 3), after soaking time, quickly by carrier 1 from being removed and placed in water cooling in sink in heating device,
Ensure that the water in sink did not had all silicon chips.In this step, it is preferable that the water cooling wet concentration tap water that water temperature is room temperature.
As for the time of water cooling, the present embodiment does not limit explicitly.
Step 4) after water cooling, is checked silicon chip breakage, while recording broken, unbroken silicon chip number, is calculated
The fragment rate of silicon chip.According to the fragment rate of silicon chip, the quality condition of entire batch silicon chip is assessed.In order to ensure unbroken silicon chip
Quality can select silicon chip sorting machine to recheck unbroken silicon chip.
The method of the present invention may be used in the case of unknown Si wafer quality to certain batch silicon chip, silicon chip is sampled
Detection illustrates hidden to split silicon chip containing more in this batch silicon chip if the fragment rate detected is higher.
In order to confirm that the reliability of the present embodiment silicon chip detection method, the present embodiment give experimental verification data.From
1000 are randomly selected in up-to-standard top grade silicon chip, randomly selects 1000 in silicon chip from known hidden split, use is above-mentioned
Method, verification thermal stress is to top grade silicon chip, the hidden Different Effects for splitting silicon chip.It is excellent in order to ensure the validity of experiment sample selection
Level silicon wafer and the hidden silicon chip that splits are cut by same process, geometric dimension having the same, for example thickness, chord width and chord length are thrown
Shadow etc..
50 selected silicon chips are respectively put into each silicon wafer carrying device, open Muffle furnace, setting target temperature is respectively 50
DEG C, 80 DEG C, 100 DEG C, 200 DEG C, 250 DEG C, 300 DEG C, 350 DEG C, 400 DEG C, 500 DEG C and 600 DEG C, wait for that the temperature in Muffle furnace rises to
After target temperature, quickly silicon wafer carrying device is put into the furnace chamber of Muffle furnace, keeps the temperature 20min under target temperature, it is ensured that silicon chip
Silicon slice under test in bogey is heated evenly.After soaking time, quickly silicon wafer carrying device is taken out from Muffle furnace
And it is put into water cooling in the sink for fill tap water, the water in sink did not had all silicon chips.After water cooling, silicon chip breakage feelings are checked
Condition, while recording broken, unbroken silicon chip number.To unbroken silicon chip, rechecked with silicon chip sorting machine.Different heating temperature
The statistical result of lower fragment rate is shown in Table 1：
Under 1 different temperatures of table, top grade silicon chip and the hidden fragment rate split after silicon chip thermal stress
As it can be seen from table 1 either top grade silicon chip or it is hidden split silicon chip, with the liter of target temperature (annealing temperature)
Height, fragment rate are gradually increasing.At 600 DEG C, top grade silicon chip and hidden split silicon chip finally whole fragmentations, fragment rate reach 100%.
In 50~500 DEG C of target temperature range, thermal stress is different with the hidden influence for splitting silicon chip to top grade silicon chip, splits defect with hidden
Silicon slice under test more cracky, for example, at 80 DEG C and 500 DEG C, the fragment rate of top grade silicon chip is only 8% and 74% respectively, and hidden
The fragment rate for splitting silicon chip is up to 30% and 95% unexpectedly.Linear fit is carried out to the experimental data of table 1, curve obtained is shown in Fig. 1, by scheming
1 can be seen that at a temperature of identical thermal stress, hidden sliver more cracky than top grade silicon chip.It is this that this, which is also further demonstrated,
The design principle of the silicon chip detection method of invention, i.e., fragment rate is higher at a temperature of identical thermal stress, this batch Si wafer quality
Poorer, existing hidden sliver is also more.Consider silicon wafer thickness, die size, heat energy loss, implement the factors such as difficulty or ease, temperature
Preferably 80~500 DEG C, further preferably 200~350 DEG C of degree.
Embodiment 2
The present embodiment is to coordinating above-mentioned silicon chip detection method and the silicon wafer carrying device of special designing illustrates.It is whole and
Speech, the silicon wafer carrying device can be divided into 2 two parts of carrier 1 and handle.Carrier 1 is the load of thermal stress silicon chip to be detected
Body is used for containing silicon slice.Handle 2 is used cooperatively with carrier 1, for realizing the depositing in wafer heat equipment of carrier 1
It puts and takes out.Thermal stress in view of silicon wafer carrying device for silicon chip internal flaw detects Aided design, carrier 1 and its contains
Silicon chip to be subjected to high-temperature heating process, the material selection heat proof material of carrier 1 and have certain thermal fatigue, it is preferable that
The material of carrier 1 is stainless steel, can complete the requirement of silicon chip Thermal Stress Experiment.In addition to stainless steel material, it is other can
Be resistant to high temperature and material indeformable, that chemical modification does not occur is also that can meet the requirements, be equally applicable to the system of carrier 1
It makes, there is no particular limitation for material of the present embodiment to carrier 1 and handle 2.
Fig. 2 and Fig. 3 gives a kind of structure of preferred carrier 1.Carrier 1 includes two end plates disposed in parallel
11, supporting rod 12 and inserted sheet bar 13 disposed in parallel are installed between two end plates 11.Distinguish the end of supporting rod 12 and inserted sheet bar 13
It is connect with two end plates 11, the spacing distance between such two end plates 11 depends on the length of supporting rod 12, inserted sheet bar 13.As for branch
The connection type of strut 12, inserted sheet bar 13 and end plate 11, it is preferable that supporting rod 12, the end of inserted sheet bar 13 and end plate 11 weld,
Or with weld matched other fixed connection modes or other non-solder fixed connection modes.In conjunction with shown in Fig. 2 and Fig. 3, in order to subtract
The own wt of light end plate 11, the shape of end plate 11 are designed as U-shaped.For structure, 11 structure of end plate is as shown in figure 4, end plate
11 include base portion 112 and being arranged in the both sides 111 at 112 edge of base portion, and base portion 112 is in the lower section of side 111.Base portion 112
For connection support bar 12, side 111 is for connecting inserted sheet bar 13.
An at least supporting rod 12 and at least two inserted sheet bars 13 are arranged in parallel between two end plates 11, supporting rod 12 is inserted
Piece bar 13 connects two end plates 1 and surrounds the space for accommodating silicon chip.Silicon chip is inserted into silicon chip accommodation space, silicon from the top of carrier 1
The side of piece is contacted with inserted sheet bar 13, and the bottom edge of silicon chip is supported by supporting rod 12.A kind of realization side as the present embodiment
Formula, carrier 1 further include a supporting rod 12 and two inserted sheet bars 13 in addition to including two end plates 11 disposed in parallel.This root
Supporting rod 12 is connected at 112 center of base portion of two end plates 11, and two inserted sheet bars 13 are symmetricly set on the side 111 of end plate 11,
The side of two end plates respectively connects an inserted sheet bar 13.In this way, the receiving need of silicon chip full wafer on the carrier 1 there can be met
It asks.
As shown in Fig. 2, the setting quantity of the supporting rod 12, inserted sheet bar 13 in carrier 1 can also be further preferred, for example,
Three supporting rods 12 and four inserted sheet bars 13 are set between the two end plates 11 of carrier 1, wherein a supporting rod 12 is connected to
At 112 center of base portion of two end plates 11, another two supporting rods 12 are evenly distributed on the supporting rod 12 at 112 center of base portion
Both sides, in two inserted sheet bars 13 of each uniform connection in the side of two end plates 11 111.Exist so set, can both meet silicon chip full wafer
Receiving demand on carrier 1, and the fastness of carrier 1 is increased, simultaneously, moreover it is possible to effectively itself weight of control carrier 1
Amount.It about the distributing position of three supporting rods 12, can be more preferably the support being located at 11 base portion of end plate, 112 center
Bar 12 can be contacted with silicon chip, and another two supporting rods 12 are not contacted with silicon chip.
Unlike the ordinary silicon chip gaily decorated basket, also design is optimized to the construction of inserted sheet bar 13 in the present embodiment.Such as Fig. 5
Shown, inserted sheet bar 13 is different from the equal diameter cylindrical structure of supporting rod 12, for ease of description the structure of inserted sheet bar 13, inserted sheet
Bar 13 can be divided into bar body portion 131 and insert part 132.The structure in bar body portion 131 is similar to supporting rod 12, bar body portion
The side 111 of 131 connection two end plates 11, and insert part 132 can regard the medium position outwardly convex in bar body portion 131 as
It is formed, and 132 surface of insert part has the integral type gear tooth (or perhaps screw thread) linearly arranged.Gear tooth is for being inserted into silicon
Piece, contact of the gear tooth with silicon chip is point contact, to ensure that the being heated evenly property of silicon chip full wafer.As insert part 132 into
One step Mechanism Optimization, insert part 132 are that the uniform outwardly convex of medium position in bar body portion 131 is formed, cylindrical, inserted sheet
132 overall diameter of portion is more than the overall diameter in bar body portion 131, in the long axis centerline in bar body portion 131 and the long axis of insert part 132
Heart line overlaps, and the gear tooth in insert part 132 is continuously arranged.
For the ease of storage and taking-up of the carrier 1 in silicon chip heating equipment, it is additionally provided with fastener on the carrier 1 there
14.Preferably, the material of fastener 14 is stainless steel, is fixed in by welding at least end plate 11.Such as Fig. 2 institutes
Showing, fastener 14 is oppositely arranged with supporting rod 12, inserted sheet bar 13, and fastener 14 can be only welded on end plate 11,
Fastener 14 can be welded in two end plates 11.The structure of fastener 14 is matched with handle 2, and fastener 14 has
Higher intensity is enough to hold on entire silicon wafer carrying device by handle 2.In the present embodiment, do not have to the structure of fastener 14
There is special restriction, as long as can coordinate with handle 2, realizes storage, takes out carrier 1, be all that can meet the technical solution
It is required that.That is, construction of the construction of fastener 14 depending on handle 2.
Fig. 6 gives a kind of 14 matched handle 2 of fastener on carrier 1.This handle 2 includes grip part 21
With engaging portion 22, the wherein construction of engaging portion 22 is matched with the fastener 14.Preferably, carrier 1 with
Two handles 2 are used cooperatively.As shown in Figure 7 and Figure 8, in operation, by 2 left-hand thread of handle on fastener 14, the gripping of handle 2
Portion 21 is heat resistant rubber, heat-insulated to have the function that.Other than the grip part of handle 2 21, other materials are stainless steel, tool
There is certain thermal fatigue, the requirement of silicon chip Thermal Stress Experiment can be completed.
Claims (10)
1. silicon chip detection method, which is characterized in that for detecting silicon chip of the identification with micro-crack defect, including step：
Silicon wafer carrying device and silicon slice under test are provided, the silicon slice under test is positioned over the silicon wafer carrying device；
The silicon slice under test for being opposite to silicon wafer carrying device is heat-treated；
Cooling aforementioned thermally treated silicon slice under test；And
Detect whether aforementioned silicon slice under test after cooling has micro-crack defect.
2. silicon chip detection method according to claim 1, which is characterized in that is be heat-treated to the silicon slice under test
In step, the silicon wafer carrying device of the silicon slice under test and the carrying silicon slice under test is placed in 80 DEG C~500 DEG C of heating and is filled
In setting, 10~30min is kept the temperature at such a temperature, to ensure that the silicon slice under test is heated evenly.
3. silicon chip detection method according to claim 1, which is characterized in that the silicon slice under test after heat treatment is placed in water
It is cooled down.
4. silicon chip detection method according to claim 1, which is characterized in that do not broken after cooling using silicon chip sorting machine testing
Whether the silicon slice under test of damage has micro-crack defect.
5. silicon chip detection method according to claim 2, which is characterized in that the heat treatment temperature of the silicon slice under test is 100
~400 DEG C.
6. silicon chip detection method according to claim 2, which is characterized in that the heating device selects Muffle furnace.
7. the silicon wafer carrying device for silicon chip detection method as claimed in any one of claims 1 to 6, which is characterized in that including
Handle (2) and the carrier (1) for placing the silicon slice under test, the handle (2) and carrier (1) detachable connection, it is described
Have on carrier (1) and keeps off tooth for being inserted into the integral type of the silicon slice under test.
8. being used for the silicon wafer carrying device of silicon chip detection method according to claim 7, which is characterized in that the carrier
(1) include two paralleled end plates (11), an at least supporting rod (12) and extremely is arranged in parallel between the medial surface of two end plates (11)
Few two inserted sheet bars (13), the supporting rod (12) are located at the lower section of inserted sheet bar (13), and the inserted sheet bar (13) is located at institute
The both sides of supporting rod (12) are stated, there is the integral type to keep off tooth on inserted sheet bar (13) surface, and the silicon slice under test is inserted in two
Between the integral type gear tooth of side inserted sheet bar (13), the fastener of connection handle (2) is provided on the lateral surface of the end plate (11)
(14)。
9. being used for the silicon wafer carrying device of silicon chip detection method according to claim 8, which is characterized in that the carrier
(1) include three supporting rods (12) and four inserted sheet bars (13), wherein the base portion of supporting rod (12) connection two end plates (11)
(112) center, another two supporting rods (12) are evenly distributed on the both sides of the supporting rod (12) at base portion (112) center,
Two inserted sheet bars (13) of each uniform connection in side (111) of two end plates (11).
10. being used for the silicon wafer carrying device of silicon chip detection method according to claim 8 or claim 9, which is characterized in that the inserted sheet
Bar (12) includes bar body portion (131) and insert part (132), and bar body portion (131) connect the side (111) of two end plates (11),
Medium position outwardly convex in bar body portion (131) forms insert part (132), and insert part (132) surface, which has, to be used for
It is inserted into the integral type gear tooth of silicon slice under test linearly arranged.
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Cited By (1)
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|---|---|---|---|---|
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Application publication date: 20181102 |