CN108735595A - Method and apparatus for being chemically treated semiconductor substrate - Google Patents
Method and apparatus for being chemically treated semiconductor substrate Download PDFInfo
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- CN108735595A CN108735595A CN201711100490.2A CN201711100490A CN108735595A CN 108735595 A CN108735595 A CN 108735595A CN 201711100490 A CN201711100490 A CN 201711100490A CN 108735595 A CN108735595 A CN 108735595A
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- semiconductor substrate
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- back side
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- etch media
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- 238000000034 method Methods 0.000 title claims abstract description 73
- 239000000758 substrate Substances 0.000 title claims description 211
- 239000004065 semiconductor Substances 0.000 title claims description 201
- 238000012545 processing Methods 0.000 claims abstract description 31
- 239000012429 reaction media Substances 0.000 claims description 28
- 239000000126 substance Substances 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 239000003795 chemical substances by application Substances 0.000 claims description 8
- 230000008569 process Effects 0.000 claims description 8
- 238000005498 polishing Methods 0.000 claims description 6
- 239000002253 acid Substances 0.000 claims description 4
- 210000000056 organ Anatomy 0.000 claims description 4
- 229910021645 metal ion Inorganic materials 0.000 claims 1
- 238000007790 scraping Methods 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 92
- 238000005516 engineering process Methods 0.000 description 28
- 239000002609 medium Substances 0.000 description 27
- 239000000306 component Substances 0.000 description 21
- 239000010410 layer Substances 0.000 description 12
- 238000006243 chemical reaction Methods 0.000 description 11
- 238000003825 pressing Methods 0.000 description 9
- SQGYOTSLMSWVJD-UHFFFAOYSA-N silver(1+) nitrate Chemical compound [Ag+].[O-]N(=O)=O SQGYOTSLMSWVJD-UHFFFAOYSA-N 0.000 description 9
- 238000013461 design Methods 0.000 description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 7
- 239000000376 reactant Substances 0.000 description 7
- 238000000926 separation method Methods 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 5
- 238000007654 immersion Methods 0.000 description 5
- 239000007788 liquid Substances 0.000 description 5
- 239000000047 product Substances 0.000 description 5
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 4
- 239000003054 catalyst Substances 0.000 description 4
- 230000005670 electromagnetic radiation Effects 0.000 description 4
- 229910017604 nitric acid Inorganic materials 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000010276 construction Methods 0.000 description 3
- 230000001276 controlling effect Effects 0.000 description 3
- 230000000875 corresponding effect Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 229910001961 silver nitrate Inorganic materials 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 239000007795 chemical reaction product Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 235000009421 Myristica fragrans Nutrition 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000007872 degassing Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000001115 mace Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000013028 medium composition Substances 0.000 description 1
- 229910001960 metal nitrate Inorganic materials 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910021426 porous silicon Inorganic materials 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- -1 precipitation Object Substances 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000036632 reaction speed Effects 0.000 description 1
- 238000004064 recycling Methods 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- 238000010992 reflux Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000007704 wet chemistry method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30608—Anisotropic liquid etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
- H01L21/67086—Apparatus for fluid treatment for etching for wet etching with the semiconductor substrates being dipped in baths or vessels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67706—Mechanical details, e.g. roller, belt
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/6776—Continuous loading and unloading into and out of a processing chamber, e.g. transporting belts within processing chambers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Weting (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
The present invention relates to a kind of device and method for the asymmetric processing wafer (2) in unique step.
Description
Technical field
The present invention relates to a kind of methods for being chemically treated semiconductor substrate.The invention further relates to one kind to be used at chemistry
The equipment for managing semiconductor substrate.Finally, the present invention relates to a kind of methods for manufacturing solar cell.
Background technology
Overall Steps when manufacturing solar cell by wafer include the processing to wafer frontside and the back side.It is advantageous herein
, discriminatively handle the front and back of wafer.This usually requires very bothersome method.
Such as processing half is become known for by 20,16/,012 405 A1 of patent document DE 10 2,011 056 495 A1 and WO
The method of conductor substrate.
Invention content
The invention solves a technical problem be, be modified to chemical treatment semiconductor substrate method.
Above-mentioned technical problem is solved by the method according to the invention, i.e., a kind of side for being chemically treated semiconductor substrate
Method comprising following step：
The semiconductor substrate with front and back is prepared,
It prepares for carrying out textured equipment to the semiconductor substrate, the equipment has to be situated between for accommodating etching
The slot equipment of matter,
The etch media in the slot is prepared,
The semiconductor substrate is introduced the slot, wherein the front of the semiconductor substrate and its back side are all at least temporarily
When be completely immersed in etch media,
The semiconductor substrate is handled by the etch media so that the back side of the semiconductor substrate has anti-
Positive reflectance greatly at least 2% of the degree of penetrating than the semiconductor substrate.
Core of the invention is, handles semiconductor substrate as described below, that is, carry out asymmetric processing, especially into
The texturing of row asymmetric.It means that the line of the positive texture of semiconductor substrate and the back side with semi-conductive substrate
Reason is different.
In general, the present invention relates to the sides of front and back arbitrary, for asymmetric processing semiconductor substrate
Method.It is, for example, coating method, deposition method or structural method, especially lithographic method herein.The especially unlimited Mr. Yu of the present invention
A kind of method of determination.
It can be etched back by the present invention, be for example etched back for example on the front of semiconductor substrate by generating porous silicon
Emitter.Meanwhile wet chemistry formula edge insulation can be carried out on the back side of the semiconductor substrate.
Illustrate present invention aspect related with the texturing of wafer first below.
The texturing on the surface of semiconductor substrate is usually characterized with its reflectance.This is interpreted as to the feelings in vertical incidence
Mean reflectance under condition in 400nm to the wave-length coverage between 1100nm.The measurement is usually using commercial spectrophotometer
It is carried out in 300nm to the wave-length coverage between 1200nm, wherein 400nm to the range between 1100nm is considered for commenting
Estimate.Here, both having measured irreflexive light using integrating sphere, the light directly reflected is also measured.
It especially provides, handles semiconductor substrate, the i.e. back side tool of semiconductor substrate by etch media as described below
Some reflectance RRThan the positive reflectance R of the semiconductor substrateVBig at least 2%, especially at least 5%, especially at least 8%.
The reflectance R at the back side of semiconductor substrateRIn particular it is more than 28%, especially at least 30%, especially at least 33%.
The positive reflectance R of semiconductor substrateVIn particular highest 27%, particularly up to 23%, particularly up to 20%.
The method according to the invention especially leads to the positive texturing of semiconductor substrate and leads to the back of the body of semiconductor substrate
The polishing in face.Here, polished side is interpreted as the side with the reflectance more than 28%.It also sometimes referred to as " subtracts
Few texture ".
The semiconductor substrate especially wafer.It especially can be Silicon Wafer, especially can be crystalline substance made of polysilicon
Circle.The wafer can especially have from 50 μm to 1000 in μ m, the thickness especially from 140 μm to 200 in μ m.Institute
Wafer is stated to be formed by polycrystalline block sawing particular by diamond wire sawing method.
According to one aspect of the present invention, the semiconductor substrate for being handled by etch media introduces as described below
In technology groove so that etch media is all fully immersed at the front of semiconductor substrate and its back side.According to a further aspect, described half
Conductor substrate completely immerses etch media during whole service.
The immersion depth of the semiconductor substrate is especially in the range from 1mm to 50mm, especially in the range to 30mm
In, especially in the range to 20mm, especially in the range to 10mm.
The back side of the semiconductor substrate is especially directed to herein.The back side of the semiconductor substrate is especially towards in slot
Etch media Free Surface.
It realizes the especially reliable monitoring of the processing of double of conductor substrate.This makes semiconductor substrate be easier in processing
It is steered.
Other side according to the invention, semiconductor substrate immerse etch media unprocessedly.It means that being used for
The front and back of the semiconductor substrate of etch media is immersed all that protective layer is not arranged.In other words, semiconductor substrate is being just
The surface at the surface in face and the back side of semiconductor substrate is made up of the crystal structure of semiconductor substrate.However it can also be real
Texturing step before at least partly, especially fully removal sawing generate damage.
Greatly reduce the asymmetrical textured consuming for executing semiconductor substrate with this.It can according to the present invention
Know, can to avoid semiconductor substrate pretreatment, particularly avoid with one or more protective layer to semiconductor substrate capping layer.
Other side according to the invention, the positive texturing of semiconductor substrate and the back side of the semiconductor substrate
Polishing is carried out at the same time.The two especially carries out in a unique processing step.
Reduce the consuming for this method with this.This, which is also resulted in, saves the time.
The method especially double-side technology.It is different from single-sided process, in single-sided process, the front of semiconductor substrate
It is successively handled with the back side and/or is handled using different media successively.
In the method according to the invention, semiconductor substrate is located on the whole in the slot with etch media.It is especially feasible
, the basic composition of etch media in the positive region of semiconductor substrate in the region at the back side of semiconductor substrate
In etch media composition substantially it is roughly the same.
According to Alternative designs, the concentration of the component of the composition of medium, especially medium is unevenly distributed in slot.Under
Can be also described in detail in text, it is particularly possible to provide so that treatment conditions on the front of semiconductor substrate in semiconductor substrate
Treatment conditions on the back side are different.The component of the medium, especially medium, especially reactant and/or reaction product can be half
Can especially have different concentration and/or temperature in the region of the front and back of conductor substrate.
Other side according to the invention, acid are used as etch media.The etch media can especially have gold
Belong to ion.Especially can be to be used for metal Assisted Chemical Etching Process (English：Metal Assisted Chemical Etching, i.e.,
MACE etch media).
The etch media can especially have hydrofluoric acid (HF) and/or nitric acid (HNO3) and/or metal nitrate, especially
Silver nitrate (AgNO3)。
The share of hydrofluoric acid is especially in the range from 1% to 25%, especially in the model from 3% to 21% in etch media
It encloses, especially in the range from 15% to 20%, preferably in the range from 15% to 16%.
In etch media the share of nitric acid preferably in the range from 5% to 30%, especially about 12% to 20%, especially about
15% to highest 20%, preferably in the range from 18% to 20%.
The share of silver nitrate possessed by etch media is especially in the range from 0.0001% to 0.1%, especially from most
In high 0.001% to 0.05% range, particularly up to 0.015%.
Data above is mass percent.
Preferably, the temperature of etch media during the processing of semiconductor substrate in from 5 DEG C up in 50 DEG C of region,
Especially from 10 DEG C up in 45 DEG C of region, especially up to 30 DEG C.
Other side according to the invention is formed by bubble extremely during handling semiconductor substrate by etch media
Partially removed from the back side of semiconductor substrate.
Surprisingly, with the texturing of this asymmetric that can facilitate semiconductor substrate.
It is another aspect of this invention to provide that with machinery and/or hydromechanical and/or calorifics and/or chemical side
Formula removes the bubble on the back side of semiconductor substrate.
This more particularly to selected done in one or more suitable method.
For example, in order to go bubble removing regulation to scrape method from the back side of semiconductor substrate.Bubble especially can be by wiping
Roller (English：Squeegee it) is removed from the back side of semiconductor substrate.It scrapes roller and may be used as the semiconductor substrate in slot simultaneously
Fixture.Roller is scraped especially to extend on the entire width of semiconductor substrate.
Alternatively or additionally, can by the flowing of the etch media in slot, particular by the etching in slot
The surface of medium, which is flowed from the back side of semiconductor substrate, removes bubble removing.It can especially be produced by slot being configured to the design of overflow launder
Raw surface stream.The slot can have the side wall of energy vertical adjusting, the side wall to play the work of barrier element or obstacle thus
With.
The surface stream for flowing into mouth and generating etch media suitably arranged for etch media can also be passed through.It is standby herein
It selects in scheme, it can control table surface current in a particularly simple way.The inflow mouth can especially have for controlling etch media
Inflow velocity and/or direction control device.Mouth is flowed into especially can adjustably to arrange relative to slot.
In order to go bubble removing may further specify that from the back side of semiconductor substrate, the back side of semiconductor substrate is heated.
This can be realized by electromagnetic radiation, particular by infra-red radiation.The heating at the back side of semiconductor substrate can be caused half
Convection current between the back side of conductor substrate and the Free Surface of etch media.
Reaction enthalpy can also cause to heat.
In order to remove bubble removing from the back side of semiconductor substrate, chemical reaction can also be designed.Chemistry can be added thus
Agent is added into etch media, in the region especially between the back side of semiconductor substrate and the Free Surface of etch media.
The chemical addition agent for example can introduce etch media by nip rolls.Chemical addition agent can also be used as air-flow and introduce etching Jie
Matter.Chemical addition agent can also introduce etch media by flowing into mouth.
In order to contribute to the back side from semiconductor substrate to remove bubble removing, it is particularly possible to be helped using one or more degassing
Agent.
Ultrasonic method can be used for removing bubble removing from the back side of semiconductor substrate.Herein, it is particularly possible in slot
Wave is formed in region between the back side of semiconductor substrate and the Free Surface of etch media.
Other side according to the invention, semiconductor substrate are oriented generally horizontally in slot during processing.Partly lead
The back side of body substrate is especially directed to herein, that is is directed toward the Free Surface of etch media.The front of semiconductor substrate is especially
Under direction, that is be directed toward the bottom of slot.
It can be realized in a simple manner with this, the bubble constituted on the downwardly directed front of semiconductor substrate is by half
Conductor substrate prevents to rise from etch media and escape.Thus the bubble at least overwhelming majority stays on the front of semiconductor substrate.
It by horizontal orientation of the semiconductor substrate in slot, thus can help to realize in a simple manner, in processing half
The concentration of the bubble constituted on the front of semiconductor substrate when conductor substrate, which is more than, to be constituted on the back side of semiconductor substrate
The concentration of bubble.
Bubble is a specific example of the component about the medium for handling semiconductor substrate.It is replaced as to bubble
Generation, can influence, other components for especially controlling medium for handling semiconductor substrate, especially reactant, product, precipitation
Object, catalyst or process conditions, especially handle medium temperature, to make its semiconductor substrate on the front and back that
This is different.
Here, particularly by geometry it is asymmetric, especially wafer following above and processing medium different volumes promote
At the asymmetric for the treatment of conditions.It especially can also be by additional device, such as heating element and/or radiation appliance, especially use
In by electromagnetic radiation, especially infra-red range, the electromagnetic radiation in visible-range or within the scope of UV only irradiate semiconductor lining
The radiation appliance of one side at bottom facilitates the asymmetric for the treatment of conditions.
As described above, the asymmetric for the treatment of conditions can also be facilitated by hydromechanical device.
According to one aspect of the present invention, one or more semiconductor substrate constitute separating layer, especially at one or
At least substantially impermeable separating layer between the region of the following above and of multiple semiconductor substrates.It can also be facilitated with this
The asymmetric of semiconductor substrate is handled.
To this end it is advantageous that technology groove is completely covered in wafer as far as possible.The front of semiconductor substrate in lead-ingroove or
Say the summation of the area at the back side be preferably the cross section of technology groove 40% to 95% between, between especially 60% to 80%,
In range between especially 70% to 80%.In the case where the cross section of technology groove is according to its Level Change, above-mentioned data with
Based on the height of the transporting flat of wafer.Given value is also referred to as coverage.
The method especially tandem method for handling semiconductor substrate.
Other side according to the invention, semiconductor substrate pass through slot by conveying device conveying during processing.Especially
It is continually by slot.With this simplification of flowsheet and it is improved particularly production capacity.
Other side according to the invention, semiconductor substrate is when conveying passes through slot relative to the conveying of conveying device member
Part holding position is fixed.The semiconductor substrate can especially be fixed relative to supporting member holding position.It especially can be by
This supporting member conveying passes through slot.
The semiconductor substrate can also be moved when conveying passes through slot relative to one or more supporting member.Especially
The conveying roller of conveying device can be used as supporting member.
Preferably, supporting member constructs as described below, i.e., the supporting member constitutes the device for influencing flowing simultaneously,
It is opposite in the positive region of semiconductor substrate particularly for influencing the etch media when conveying semiconductor substrate and passing through slot
Flowing.Especially it is possible that supporting member is configured with deflector.The deflector is preferably configured as so that in conveying semiconductor lining
When bottom passes through etch media flowing blind area is formed in the positive region of semiconductor substrate.With this prevent semiconductor substrate just
The bubble formed on face is removed due to transmission process from the front of semiconductor substrate.
Supporting member can especially facilitate the region on the front of semiconductor substrate and the back side in the semiconductor substrate
On region separation.This especially may be constructed for reducing the reaction medium exchange with lower section in the top of semiconductor substrat
Device.This can especially make the gap retained between two adjacent semiconductor substrates at least partly, especially arrive at least 50%,
Especially arrive at least 70%, especially 90%, especially complete Land cover.
The distance between two adjacent semiconductor substrates is preferably highest 20cm, particularly up on supporting member
10cm, particularly up to 5cm, particularly up to 3cm, particularly up to 2cm, particularly up to 1cm, particularly up to 5mm, particularly up to 3mm,
Particularly up to 2mm, particularly up to 1mm.
In another aspect, the present invention relates to a kind of method handling semiconductor substrate for asymmetric, this method
Include the following steps：
The semiconductor substrate with front and back is prepared,
Prepare the equipment for carrying out asymmetric processing to the semiconductor substrate, wherein the equipment, which has, to be used for
The slot of reaction medium is accommodated,
The reaction medium in the slot is prepared,
The semiconductor substrate is introduced the slot, wherein the front and back of the semiconductor substrate is all at least temporarily
Ground is completely immersed in reaction medium,
Influence the reaction medium in slot so that the region of the semiconductor substrate is in and the semiconductor substrate
Lower section the different process conditions in region in.
One in other words multiple semiconductor substrates itself especially constituted herein for separating the semiconductor substrate
The separating layer in the region below region and the semiconductor substrate.
One or more can be especially arranged for influencing the area in the region above wafer and/or below wafer
The device of the temperature of reaction medium in domain.
One or more can be especially arranged for influencing in region square on a semiconductor substrate and/or in semiconductor
The device of the concentration of one or more component of the medium for handling semiconductor substrate in the region below substrate.
For other details and advantage, with reference to already described and following description.
The technical problem to be solved in the present invention also resides in, the equipment for being modified to chemical treatment semiconductor substrate.The technology
Problem is solved by equipment according to the invention, and the equipment belt is useful for bubble at least partly from half be arranged in slot
The device of the surface removal of conductor substrate.
Its advantage is obtained by above description.
The equipment is particularly suitable for implementing method already described above.
The equipment includes the slot for accommodating etch media.Especially overflow launder herein.The equipment preferably includes back
Flow device, especially circulating pump.
The reflux is preferably capable of control.
The equipment further includes for semiconductor substrate being conveyed the conveying device by being arranged in the etch media in slot.
The conveying device preferably is arranged as so that using conveying device conveying by the semiconductor substrate of the slot fully
Immerse the etch media.The conveying device is especially arranged at least 1mm below the minimum upper edge of the slot, especially extremely
At few 1cm.This is equivalent to the minimum packed height when equipment is run in the slot
Inflow based on medium is especially formed in the pond liquid level of the horizontal top of overflow element.Liquid level and overflow element in pond
Upper edge between difference in height be at least 1mm, especially at least 10mm, especially at least 15mm.
The conveying device can have multiple conveying rollers and/or conveyer belt.The conveying device, which preferably has, to be used for
Place the supporting member of semiconductor substrate.Details are with reference to explanation above.Conveying speed be 0.5m/min to 2.5m/min it
Between, especially in 2.0m/min to the region between 2.5m/min
According to one aspect of the present invention, for by bubble at least partly from the table for the semiconductor substrate being arranged in slot
The device of face removal has for making the etch media in slot generate the device of flowing, particularly for making the etching in slot be situated between
Matter generates the device of surface stream.
The flowing generates device and especially constitutes as described below, i.e., in the case where equipment is run, etch media is at it
Have in the region of Free Surface than the level of bigger in the region relative to the transporting flat of Free Surface perpendicular separation
Flow velocity, semiconductor substrate are pumped through the quarter in the region of the transporting flat relative to Free Surface perpendicular separation
Lose medium.
It especially may be implemented with this, etch media has in the region at the back side of semiconductor substrate being directed upwards towards than half
The flow velocity of bigger in the positive region of conductor substrate.It may be implemented that bubble is had into difference from two sides of semiconductor substrate with this
Strange land removes.
It also contributes to differentially remove bubble removing from two sides of semiconductor substrate by the buoyancy acted on bubble.?
On the bottom side of semiconductor substrate, the rising of bubble is stopped by wafer itself.
Along transporting flat conveying by slot, the transporting flat is substantially horizontally oriented semiconductor substrate.Transporting flat
Extend with being especially arranged essentially parallel to the Free Surface of the etch media in slot.
Transporting flat especially may be constructed region in the top of semiconductor substrat and the area in the lower section of semiconductor substrate
Parting surface between domain.The separation in region in the top of semiconductor substrat from the region in the lower section of semiconductor substrate is outstanding herein
It can be realized by semiconductor substrate itself.The separation can be changed by the arrangement as gapless as possible of semiconductor substrate
Into.It is alternatively possible to which the suitable construction by delivery element facilitates the separation.
Flow generation unit can have at least one clamping element that can vertically adjust or overflow element.
The overflow element that can be adjusted of slot is especially disposed in the side that the conveying direction for being parallel to semiconductor substrate of slot extends
On face.
Preferably there is the surface stream of etch media principal component, the principal component to be basically perpendicular to the conveying of semiconductor substrate
Extend to direction.The principal component is directed toward in which can also be parallel to or favour conveying direction.
Flow generation unit can have one or more inflow mouth.Details are with reference to explanation above.
Flow generation unit can have the device for generating air-flow in the region of the Free Surface of etch media.Institute
State the outwardly extension that air-flow is preferably substantially parallel to etch media herein.It can contribute to bubble selectively with this
It is removed from the back side of semiconductor substrate.
The device of flowing for generating etch media can have in semiconductor substrate towards etch media
The device of convection current is generated on the side of Free Surface, especially on the back side of semiconductor substrate.Help selectively to this
Bubble is removed from the side of semiconductor substrate.
Other side according to the invention, for by bubble at least partly from the semiconductor substrate being arranged in slot
The device of surface removal has one or more mechanical organ.
Can be scraper element (English herein：Squeegee (scraper)).The scraper element can simultaneously serve as being used for
Semiconductor substrate is retained on the compactor of the scheduled upright position in slot.
The conveying direction that the scraper element and/or roller pressing are especially substantially perpendicular to semiconductor substrate is directed toward ground cloth
It sets in slot.
The scraper element and/or being longitudinally extended for roller pressing are especially arranged essentially parallel to etch media in its Free Surface
The principal component of flowing in the region in face it is directed toward.The scraper element and/or roller pressing is avoided to negatively affect, especially with this
It hinders the surface stream.
The scraper element and/or roller pressing can also perpendicular to the flowing of etch media principal component be directed toward or
Say perpendicular to semiconductor substrate conveying direction be directed toward.The scraper element and/or roller pressing are especially used as using
In reduction or particularly for inhibiting the exchange between region of the reaction medium on abutting against scraper element and/or roller pressing
Device.Point of the region of the top of semiconductor substrate relative to the region of the lower section of semiconductor substrate can be especially improved with this
Every.
Mechanical organ for removing bubble removing from the surface of semiconductor substrate can be especially roller, especially with smooth
Tubular peripheral surface roller.
Mechanical organ, especially scraper element and/or roller pressing for removing bubble from the surface of semiconductor substrate
Especially position is fixedly placed in slot.
Other side according to the invention, the dress for removing bubble at least partly from the surface of semiconductor substrate
Setting can have for generating the device of vibration, especially shake table (also referred to as shaking platform).Slot for accommodating etch media
It may be particularly provided on this shake table.
Other side according to the invention, the dress for removing bubble at least partly from the back side of semiconductor substrate
It sets including ultrasonic unit.Details are with reference to explanation above.
Other side according to the invention, the dress for removing bubble at least partly from the back side of semiconductor substrate
Set including for heating the semiconductor substrate the back side and/or for heat the back side of the semiconductor substrate and etching be situated between
The heating device of the etch media in region between the Free Surface of matter.
Can especially be arranged by the heating device in technology groove in the positive region of semiconductor substrate and
The different temperature of processing medium in the region at the back side of semiconductor substrate.It can be controlled and handled by the influence to temperature
Technique dynamics when semiconductor substrate.Can also be realized with this facilitates asymmetric to handle in other words.
Other side according to the invention, the dress for removing bubble at least partly from the back side of semiconductor substrate
It sets including the device for one or more additive to be controllably added to etch media.The chemical addition agent especially can be with
It is added to etch media by the scraper element and/or roller pressing.The chemical addition agent may be implemented with this partly to lead
Have than the higher concentration in the positive region of the semiconductor substrate in the region at the back side of body substrate.
Other side according to the invention is equipped with one or more component for being arranged and/or influencing medium
The device of concentration in the region at the back side of adjacent semiconductor substrate and/or in the positive region of adjacent semiconductor substrate
Part.It can realize the asymmetry processing of semiconductor substrate in a particularly simple way with this.It especially may be implemented, medium is really
Concentration of the fixed component in the positive region of semiconductor substrate is different from the concentration in the region at the back side of semiconductor substrate.
The concentration can especially differ at least 5%, especially at least 10%, especially at least 20%, especially at least 30%, especially at least
50%.The concentration can especially differ until 100%, especially until 200%, especially until 500%, especially until
1000%.
The different concentration of one or more component of medium especially can be by by adding set, such as adding tube
Component realization is suitably added in road or addition mouth.
The different concentration of one or more component of medium for example can be by anti-on upper side and bottom side
It should generate.The reaction consumes reactant and forms product.By separation, the group of medium is set on upper side and bottom side
The different concentration divided.
Other side according to the invention, the equipment include for semiconductor substrate conveying to be filled by the conveying of slot
It sets, there is the conveying device at least one supporting member, the supporting member to arrange as described below, i.e. semiconductor substrate
Etch media is completely immersed in when conveying passes through slot.Details are with reference to explanation above.
The technical problem to be solved in the present invention also resides in, the method for being modified to manufacture solar cell.The technology is asked
Topic handles semiconductor substrate by method as described above and solves.Then by contact structures, especially doping and contraction structure with
And electric insulation layer is placed in semiconductor substrate on the front and back.
The back side of semiconductor substrate can also be passivated by electric insulation layer.
The method is in particular for so-called PERC (the passivation emitter and back side battery)-solar cell (English of manufacture
Language：Passivated Emitter Rear Cell).
Anti-reflection coating can be arranged in the front of semiconductor substrate.Positive albedo can be further decreased with this.
This leads to the improved efficiency of solar cell.
Description of the drawings
The details and advantage of the present invention in the explanation of embodiment by with reference to the accompanying drawings to obtaining.In attached drawing：
Fig. 1 shows the schematic diagram of the construction of the equipment for handling semiconductor substrate,
Fig. 2 shows the albedo of the front and back according to the processed semiconductor substrate of this method and wavelength are associated
Chart,
Fig. 3 shows the schematic top plan view of the Alternative designs of the equipment according to Fig. 1,
Fig. 4 shows the partial schematic diagram of the alternate embodiment of the equipment for handling semiconductor substrate.
Specific implementation mode
Hereinafter illustrate the equipment 1 for being chemically treated the semiconductor substrate that form is wafer 2 with reference first to Fig. 1.
The especially polysilicon handle wafer of wafer 2.
Equipment 1 includes the technology groove 3 for accommodating etch media 4.
The especially acid etch media of etch media 4, especially acid.Etch media 4 is especially present in liquid form
In technology groove 3.
Etch media 4 can with 20% nitric acid, 15% hydrofluoric acid and 0.0005% silver nitrate.Etch media exists
In the temperature range that equipment 1 is especially maintained at when running from 10 DEG C to 45 DEG C.
The technology groove 3 is configured to overflow launder.It at least has overflow ducts 5 on a side.
Technology groove 3 has at least one vertically adjustable overflow element 6.The overflow element 6 constitutes blocking
Object.Equipment 1 can also have multiple obstacles, the obstacle especially on the different sides of technology groove 3.
Equipment 1 further includes the conveying device 7 with supporting member.In Variant Design scheme shown in Fig. 1, supporting member
It is configured to conveying roller 10.The conveying roller 10 is respectively provided with one or more along the pivot center for being parallel to conveying roller
, short, particularly up to 1cm long bearing surface relative to wafer 2.The bearing of the wafer 2 on the conveying roller 10
Face is constituted preferably substantially dottedly.The bearing surface especially has highest 1cm2, particularly up to 1mm2Area.
Conveying device 7 is used to convey wafer 2 in transporting flat 9.
Conveying roller 10 can be supported rotationally.
Overflow ducts 5 are connected via return line 11 with storage tank 12.
Storage tank 12 is connected by feedway 13 with technology groove 3.Feedway 13 especially includes pump 14, especially circulating pump.
Feedway 13 especially constitutes the device for making the etch media 4 in technology groove 3 generate flowing.
The etch media 4 in technology groove 3 can be especially set to generate surface stream 15 by overflow element 6.According in Fig. 1
Shown in alternative, overflow element 6 be transversely to the conveying direction 8 ground arrangement.Preferably, overflow element 6 is parallel to conveying direction 8
It is directed toward on ground.Surface stream 15 can especially be transversely to the conveying direction 8 ground direction.
The vertical view of the corresponding Alternative designs of equipment 1 is schematically shown in figure 3.
In order to which 2 introducing technology slot 3 of wafer, equipment 1 can have the gatherer 16 only schematically shown in Fig. 1.
In order to which wafer 2 is taken out from technology groove 3, equipment 1 can have the withdrawing device only schematically shown in Fig. 1
17。
Equipment 1 further includes pinch roller 18.The pinch roller 18 may be constructed a part for conveying device 7.Pinch roll
Son is especially vertically arranged relative to conveying roller 10 with having spacing.What pinch roller was preferably horizontally oriented.
The pinch roller 18 is especially it is so structured that squeezing roller and having smooth, tubular peripheral surface.It clamps
Roller 18 plays scraper element when wafer 2 is conveyed along conveying direction 8, scraper element be used for by bubble from wafer 2 to
The back side 19 of upper direction removes.
Pinch roller can also have clamping ring, clamping ring cause and the contact surface of the reduction of wafer 2, especially substantially point
The contact of shape.
Pinch roller especially constitutes the component of the device for removing bubble at least partly from the surface of wafer 2.
Wafer 2 especially orients in technology groove 3 in the horizontal direction.Transporting flat 9 constitutes horizontal plane.
Illustrate the details of the method for being chemically treated wafer 2 below.
First, etch media 4 is prepared in technology groove 3.Then wafer 2 is introduced technology groove, wherein the front of wafer 2
20 and the back side 19 all fully immerse etch media 4.
Wafer 2 down immerses etch media 4 with its front 20.Immersion depth is, for example, in the range from 2mm to 10mm
It is interior.
Etch media 4 leads to the asymmetric texturing on the surface of wafer 2.Etch media 4 especially leads to the front of wafer 2
20 texturing.It also results in the less texturing at the back side 19 of wafer 2.This is hereinafter also referred to as " polishing ".It is brilliant
The texturing in the front 20 of circle 2 and the polishing at the back side 19 of wafer 2 carry out in unique, common processing step.The two is outstanding
It is carried out at the same time.The method especially double-side technology.
When handling wafer 2 by etch media 4, the bubble that is constituted on the surface of wafer 2 is from the back side of wafer 2 19
It removes at least partly.It is especially configured to squeeze the pinch roller 18 of roller for removing bubble from the back side of wafer 2 19.?
Individual scraper element can be arranged.
The removal of bubble can also be facilitated by generating surface stream 15.The flowing of etch media 4 is especially in etch media
Free Surface region in have than in the region of transporting flat 9, especially in the region in the front 20 of wafer 2 more strongly
Horizontal component.
The especially so-called tandem method of the method.
It is unexpected that leading to the processing of wafer 2 with the textured wafer of asymmetric 2 by the equipment 1.
The texturing of wafer 2 can be especially characterized by the albedo at the front 20 of wafer 2 back side 19 in other words.It is literary on the implementation
After the method, the albedo at the back side 19 of wafer 2 than front 20 albedo greatly at least 2%, especially at least 5%,
Especially at least 8%.
The reflectance R at the back side 19 of wafer 2RIn particular at least 28%, especially at least 30%, especially 33%.Reflectance is answered
It is especially appreciated that as through spectrophotometer measurement (in the case of diffusing reflection and direct reflected light), the vertical irradiation wafer 2 the case where
Albedo average value in lower 400nm to the wave-length coverage between 1100nm.Alternative to this is that reflectance can also
Be wafer 2 each surface determining wavelength, for example wavelength be 400nm, 450nm or 500nm electromagnetic radiation vertical irradiation feelings
Albedo under condition.After the method literary on the implementation, the reflectance R in the front 20 of wafer 2VIn particular about highest
27%, particularly up to 23%, particularly up to 20%.
After texturing step, the albedo in the front 20 of wafer 2 can also be by laying anti-reflection coating into one
Step reduces.The efficiency of the solar cell manufactured by the wafer 2 can be further promoted with this.By what is processed according to the present invention
Wafer 2 especially manufactures so-called PERC solar cells.Insulating layer and contact are also set on the back side of wafer 2 19 thus
Structure.The principle of PERC batteries is in " The Passivated Emitter and Rear Cell (PERC):From
conception to mass production(Solar Energy Materials&Solar Cells143(2015)190–
197) it is described in detail in ".
The albedo R at the back side 19 and front 20 of wafer 2R、RVShow in fig. 2 with the associated example chart of wavelength X
Go out.
The other details and Alternative designs of equipment 1 and the method for handling wafer 2 are stressed below.It is described
Details substantially arbitrarily can reciprocally and with the details of the method as described above in other words of equipment 1 described above be combined.
The method according to the invention especially can easily be implemented.It can cancel to the front 20 of wafer 2 and the back side 19 not
Same processing method.Different processing step or not especially need not be used for the front 20 and the back side 19 for handling wafer 2
Same etch media.
Conveying speed be 0.5m/min between 2.5m/min, especially 2.0m/min to the range between 2.5m/min.Slot
Length is 2.00m to 3.00 meters, especially 2.4m to 2.6 meters.Processing time is less than 2min, particular less than 1min.
It especially can be in a unique technology groove 3, especially in a unique processing step by the equipment 1
Wafer 2 of the manufacture with asymmetric texture.
The wafer especially can be the wafer for not performing etching step also on it herein.
By the present invention it is found that by by by etch media 4 to being formed by bubble at least portion during the processing of wafer 2
Divide ground unilateral removal, asymmetric texturing can be facilitated.Especially bubble is removed from the back side 19 in the direction of wafer 2.With
This facilitates reacting for etch media 4 and the back side 19 of wafer 2.Herein realize whole face uniformly corrode stripping and thus realize crystalline substance
The polishing at the back side 19 of circle 2.
It can be facilitated from the back side of wafer 2 19 by different devices and remove bubble removing.Especially can by machinery and/or
Hydromechanical and/or calorifics and/or chemical device in other words facilitate by method.It can individually use in the device 1
The device.The device can also arbitrarily be combined with each other.
In order to which the conveying of wafer 2, by technology groove 3, wafer 2 can also be placed on supporting member.Pass through technique in conveying
When slot 3, wafer 2 is fixed especially with respect to delivery element holding position.Wafer 2 can be especially directed through together with delivery element
Slot 3.
Preferably, delivery element have water conservancy diversion device, especially deflector, particularly for wafer 2 conveying pass through etching
Flowing blind area is generated on front 20 when medium 4 under the direction of wafer 2.
Other aspects of the present invention and Alternative designs are stressed referring to Fig. 4.
In general, the present invention relates to the processing of the asymmetric of two sides 19,20 of wafer 2.For this purpose, wafer 2 is complete
Immerse the processing medium in technology groove 3.Here, the region 4 in the region above wafer 2, especially above transporting flat 92
In and the region 4 below transporting flat1In different process conditions, especially different temperature T can be set1、T2And/or it is situated between
The different concentration Cs of one or more component in matter1、C2.Wafer 2 is in this as constituting separating layer, especially conveying
The discrete device of substantially impermeable separating layer between the region of 9 top of plane and the region below transporting flat.
In the fringe region of wafer 2, the region 4 below transporting flat 91With the region 4 above transporting flat2It
Between can react the exchange of medium.In order to be further reduced, especially prevent region 4 above transporting flat2In reaction
The exchange of medium, roller pressing 18 and/or may be used as hydrodynamics in scraper element not shown in the figure or diversion member
The discrete device of formula.
It should be noted that：The width in the region must be as small as possible, to reinforce asymmetric effect.This is in coverage
It can be guaranteed in the case of high and/or conveying speed fast (reducing the time that can carry out Medium Exchange with this).Above
Have determined that coverage, the conveying speed 0.5m/min between 2.5m/min, especially 2.0m/min is between 2.5m/min
Range in.
Wafer 2 is especially formed in the region of the top of transporting flat 9 and mechanical between the region below transporting flat
Barrier layer.Between described two regions, the exchange of the component of reaction medium, especially reaction medium is very limited.Accordingly
Exchange especially farthest, especially can fully inhibit.This can be facilitated by suitably influencing the device of flowing.
Being for different reaction conditions, volume of the technology groove 3 below transporting flat 9 is contributed to be significantly greater than to convey and put down
The volume of reaction medium in 9 top technology groove 3 of face.
In addition, the substantially homogeneous compositional of reaction medium may be implemented in the region below transporting flat 9.Thus may be used
With regulation, it is sufficiently mixed reaction medium in the region.It can also be arranged for recycling and/or for exchange reaction medium
Circulator.Two can especially be arranged in the region above transporting flat 9 and in the region below transporting flat 9 to separate
, for recycle and/or for exchange reaction medium circuit.
It can also be by influencing, especially controlling in the region above transporting flat 9 and/or below transporting flat 9
The temperature of reaction medium in region facilitates different reaction condition.It can directly or indirectly heat thus or cold
But reaction medium.
Such as it can realize the influence to temperature and/or other response parameters by irradiation and/or medium supply.
It can especially be realized by one or more corresponding control device, the reaction on the front 20 of wafer 2 is situated between
The temperature of matter and at least 2 DEG C, especially at least 5 DEG C, especially at least 10 DEG C of the temperature difference on the back side of wafer 2 19.The temperature difference
It is less than 20 DEG C in principle.The corresponding temperature difference can also be arranged in the case of no active control based on reaction enthalpy.
Correspondingly, may be implemented medium one or more related component at least 5%, especially at least 10%, especially extremely
Few 20% concentration difference.
Region 4 above transporting flat 92In the concentration c of correlated response object is especially set2With the temperature T of reaction medium2。
Region 4 below transporting flat 91In correspondingly be concentration c1With temperature T1。
In addition, different concentration c1≠c2It is also result caused by technique in carrying out：By reaction, particularly by quarter
Etching technique consumes reactant, forms product.
Heat is correspondingly generated in exothermic reaction.
Here, wafer constitutes separating layer, Medium Exchange cannot pass through separating layer progress.
Region 4 above transporting flat 92In, the concentration c especially in the region above wafer 22With temperature T2Depend on
In the immersion depth of the wafer.This highly can be changeably arranged, to realize desired process results.
In addition, the region 4 above transporting flat 92In reaction medium component and/or the temperature of reaction medium need not
It is uniform.Region in region especially between two adjacent wafers 2 and/or at the back side 19 for abutting directly against wafer 2
In will appear the deviation of concentration and/or temperature.This can be attributed to the exchange of reaction medium in the middle region and/or in wafer
Ongoing technique on 2 surface.
As described above, the extension distance of the transitional region between two adjacent wafers 2 can pass through conveying roller 18
And/or the suitable construction of alternative diversion member, and/or the spacing by adjacent wafer and/or the conveying by wafer
Speed and reduce, especially eliminate.
According to advantageous Alternative designs, arrangement of the conveying roller 10 in slot 3 is variable.Conveying roller 10 is especially
It can vertically, i.e. be shifted perpendicular to 9 ground of transporting flat.It especially can be with the transporting flat 9 in shifting chute 3 with this.With this
The immersion depth that wafer 2 immerses reaction medium can especially be changed.
The selection of immersion depth particularly depend on spacing between the viscosity of reaction medium, adjacent wafer 2, wafer ruler
Very little, reaction speed, reactant concentration, catalyst concn and production concentration and generated with this caused gas and heat production or this
One or more in parameters a bit.
The region 4 of the following above and in transporting flat 9 can be passed through1、42In different temperature T1、T2Realize wafer 2
Asymmetric processing.The temperature difference active can be reached or at least assist realizing.It can also be based on reaction enthalpy and the temperature difference is set.
It can realize or facilitate asymmetric by different irradiations, the irradiation in the especially front 20 and the back side 19 of wafer 2
Formula is processed.
Can also by the lower section of transporting flat 9 in other words top region 41、42Middle different concentration c1、c2It realizes
Asymmetric processing.This can be actively by the region 4 in the lower section of transporting flat 91And/or in the top of transporting flat 9
Region 42In suitably input reactant, catalyst, product, medium or one or more of which are realized.
Different concentration can also passively pass through reactant, catalyst, product or one or more of which
Dilution or enrichment are realized.
Can also by the lower section of transporting flat 9 in other words top region 41、42In reaction medium it is different viscous
Degree realizes asymmetric processing.This can be actively by the media implementation of input liquid, gas or solid form.This also may be used
Passively to realize or facilitate by the reaction product of generation liquid, either gas form.
Claims (18)
1. method of the one kind for being chemically treated semiconductor substrate (2) comprising following step：
1.1. the semiconductor substrate (2) with positive (20) and the back side (19) is prepared,
1.2. it prepares for carrying out textured equipment (1) to the semiconductor substrate (2), which has for accommodating etching
The slot (3) of medium (4),
1.3. the etch media (4) in the slot (3) is prepared,
1.4. the semiconductor substrate (2) is introduced the slot (3),
1.4.1. wherein, the front (20) and the back side (19) of the semiconductor substrate (2) are all temporarily, at least completely immersed in etching
Medium (4),
1.5. the semiconductor substrate (2) is handled by the etch media (4) so that the back side of the semiconductor substrate (2)
(19) reflectance (R havingR) than the semiconductor substrate (2) front (20) reflectance (RV) big at least 2%.
2. according to the method for claim 1, which is characterized in that the texturing in the front (20) of the semiconductor substrate (2)
Polishing with the back side (19) of the semiconductor substrate (2) is carried out at the same time.
3. according to the method described in one of the claims, which is characterized in that use acid to be used as the etch media (4),
In, the etch media (4) especially has metal ion.
4. according to the method described in one of the claims, which is characterized in that described in being handled by the etch media (4)
The bubble formed during semiconductor substrate (2) is removed from the back side (19) of the semiconductor substrate (2) at least partly.
5. according to the method for claim 4, which is characterized in that the removal of bubble is by the method for machinery and/or by stream
The method of mechanics and/or the method by calorifics and/or the method by chemistry carry out.
6. according to the method described in claim 4 or 5, which is characterized in that in order to remove bubble removing, it is specified that scraping method and/or
So that slot (3) in etch media (4) generate surface stream and/or heat the semiconductor substrate (2) the back side (19) and/or to
Etch media (4) adds chemical addition agent.
7. according to the method described in one of the claims, which is characterized in that the semiconductor substrate (2) base during processing
This is flatly oriented in slot (3).
8. according to the method described in one of the claims, which is characterized in that the semiconductor substrate (2) is borrowed during processing
Conveying device (7) conveying is helped to pass through the slot (3).
9. according to the method for claim 8, which is characterized in that the semiconductor substrate (2) passes through the slot (3) in conveying
When fixed relative to the delivery element holding position of the conveying device (7).
10. equipment (1) of the one kind for being chemically treated semiconductor substrate (2) comprising：
10.1 slot (3) for accommodating etch media (4),
10.2 for removing bubble from the surface (19) for the semiconductor substrate (2) being arranged in the slot (3) at least partly
Device.
11. equipment (1) according to claim 10, which is characterized in that for by bubble from being arranged in the slot (3)
The device that the surface (19) of semiconductor substrate (2) removes at least partly has for making the etch media in the slot (3)
(4) device of flowing is generated.
12. equipment (1) according to claim 11, which is characterized in that for making etch media (4) generate the device of flowing
It is configured to so that the etch media (4) has in the region of its Free Surface than between vertical relative to Free Surface
Every the horizontal flow velocity of bigger in the region of the transporting flat (9) of arrangement.
13. according to the equipment (1) described in one of claim 10 to 12, which is characterized in that for bubble is described from being arranged in
The device that the surface (19) of semiconductor substrate (2) in slot (3) removes at least partly has one or more mechanical organ.
14. according to the equipment (1) described in one of claim 10 to 13, which is characterized in that the equipment is equipped for half
Conductor substrate (2) conveys the conveying device (7) by the slot, and the conveying device (7) has at least one supporting member
(10), the supporting member is arranged to so that the semiconductor substrate (2) is described by being completely immersed in when slot (3) in conveying
Etch media (4).
15. method of the one kind for asymmetric processing semiconductor substrate (2) comprising following step：
15.1. the semiconductor substrate (2) with positive (20) and the back side (19) is prepared,
15.2. the equipment (1) for carrying out asymmetric processing to the semiconductor substrate (2) is prepared, wherein the equipment (1)
With the slot (3) for accommodating reaction medium,
15.3. the reaction medium in the slot (3) is prepared,
15.4. the semiconductor substrate (2) is introduced the slot (3), wherein the front (20) of the semiconductor substrate (2) and
The back side (19) is all temporarily, at least completely immersed in reaction medium,
15.5. the reaction medium in slot (3) is influenced so that the region (4 above the semiconductor substrate (2)2) be in and described half
The region (4 of the lower section of conductor substrate (2)1) in different process conditions.
16. according to the method for claim 15, which is characterized in that be arranged one or more for influence partly led described
Region (4 above body substrate (2)2) in and/or the region (4 in the lower section of the semiconductor substrate (2)1) in reaction medium
Temperature device.
17. according to the method described in claim 15 or 16, which is characterized in that be arranged one or more for influence described
Region (4 above semiconductor substrate (2)2) in and/or the region (4 in the lower section of the semiconductor substrate (2)1) in, be used for
Handle the device of the concentration of one or more component of the medium of the semiconductor substrate (2).
18. a kind of method for manufacturing solar cell comprising following step：
18.1. the semiconductor substrate (2) with positive (20) and the back side (19) is prepared,
18.2. the semiconductor substrate (2) is handled with according to the method described in one of claim 1 to 9 or 15 to 17,
18.3. contact structures are set on the back side (19) of the semiconductor substrate (2).
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102017206455.2 | 2017-04-13 | ||
| DE102017206455.2A DE102017206455A1 (en) | 2017-04-13 | 2017-04-13 | Method and apparatus for chemical processing of a semiconductor substrate |
| DE102017215482 | 2017-09-04 | ||
| DE102017215482.9 | 2017-09-04 |
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| Publication Number | Publication Date |
|---|---|
| CN108735595A true CN108735595A (en) | 2018-11-02 |
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| CN201711100490.2A Pending CN108735595A (en) | 2017-04-13 | 2017-11-07 | Method and apparatus for being chemically treated semiconductor substrate |
| CN201721476130.8U Active CN208433367U (en) | 2017-04-13 | 2017-11-07 | Equipment for being chemically treated semiconductor substrate |
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| WO (1) | WO2018189130A2 (en) |
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| CN112877741A (en) * | 2021-01-13 | 2021-06-01 | 硅密芯镀(海宁)半导体技术有限公司 | Bubble removing method and wafer electroplating equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102005062527A1 (en) * | 2005-12-16 | 2007-06-21 | Gebr. Schmid Gmbh & Co. | Substrate surface treatment device for production of solar cell, has suction unit provided for suction of fluid process medium from environment of conveying unit and arranged under transport plane in vertical direction |
| DE102011056495A1 (en) | 2011-12-15 | 2013-06-20 | Rena Gmbh | Method for one-sided smooth etching of a silicon substrate |
| DE102014110222B4 (en) | 2014-07-21 | 2016-06-23 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Method and device for structuring the top and bottom of a semiconductor substrate |
| DE102015205437A1 (en) * | 2015-03-25 | 2016-09-29 | Rct Solutions Gmbh | Apparatus and method for the chemical treatment of a semiconductor substrate |
| DE102015113589A1 (en) * | 2015-08-17 | 2017-02-23 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Method and device for processing a HNO3-containing liquid process agent |
-
2017
- 2017-11-07 CN CN201711100490.2A patent/CN108735595A/en active Pending
- 2017-11-07 CN CN201721476130.8U patent/CN208433367U/en active Active
-
2018
- 2018-04-10 WO PCT/EP2018/059069 patent/WO2018189130A2/en active Application Filing
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112877741A (en) * | 2021-01-13 | 2021-06-01 | 硅密芯镀(海宁)半导体技术有限公司 | Bubble removing method and wafer electroplating equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2018189130A3 (en) | 2018-12-06 |
| WO2018189130A2 (en) | 2018-10-18 |
| CN208433367U (en) | 2019-01-25 |
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