CN108710141B - Baseband chip sensitivity test method and device - Google Patents

Baseband chip sensitivity test method and device Download PDF

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CN108710141B
CN108710141B CN201810247253.7A CN201810247253A CN108710141B CN 108710141 B CN108710141 B CN 108710141B CN 201810247253 A CN201810247253 A CN 201810247253A CN 108710141 B CN108710141 B CN 108710141B
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baseband chip
sensitivity
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CN108710141A (en
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孙倩
刘静
窦路
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China Waterborne Transport Research Institute
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China Waterborne Transport Research Institute
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/23Testing, monitoring, correcting or calibrating of receiver elements
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)

Abstract

The invention provides a base band chip sensitivity test method and a device, wherein the method comprises the following steps: under the corresponding test conditions and N test scenes of the sensitivity test, outputting test signals to the baseband chip to be tested according to a test signal power output rule, wherein the test signal power output rule comprises a test signal power initial value and a power stepping value corresponding to a replacement test scene, and receiving positioning information output by the baseband chip to be tested in a preset test time under each test scene; after the testing of all the testing scenes is completed, the sensitivity of the baseband chip to be tested is determined according to the positioning information corresponding to the N testing scenes, wherein the sensitivity is the minimum testing signal power in the testing signal power corresponding to the positioning information meeting the positioning accuracy requirement in the positioning information corresponding to the N testing scenes. Therefore, the capture sensitivity and the tracking sensitivity of the baseband chip under different environments can be tested, and a basis is provided for the selection of the baseband chip in practical application.

Description

Baseband chip sensitivity test method and device
Technical Field
The invention relates to the technical field of electronics, in particular to a baseband chip sensitivity test method and device.
Background
Because of the special nature of the navigation environment, the navigation device on board the ship has higher requirements on reliability, shock resistance, moisture resistance, high temperature resistance, light direct resistance and the like than the navigation device under the common environment, so that the navigation device on board the ship needs to be subjected to uniform and strict detection test procedures, adopts international uniform measurement standards and achieves the required test result, and can be installed on the ship.
The main component of the shipborne navigation equipment is a baseband chip, and the positioning accuracy of the baseband chip can be changed due to the change of the external environment. In the practical application process, the positioning accuracy of the baseband chip in different environments is required to meet certain requirements, the change of the offshore environment (temperature, humidity, electromagnetic interference and the like in four seasons) is large, the baseband chip is required to reach the required positioning accuracy in different environments, and the capturing sensitivity and the tracking sensitivity of the baseband chip are different in different positioning accuracy, so that the baseband chip is required to be subjected to sensitivity test before being used, and the sensitivity test comprises capturing sensitivity test and tracking sensitivity test.
However, there is no effective solution for how to perform the baseband chip sensitivity test.
Disclosure of Invention
The invention provides a method and a device for testing the sensitivity of a baseband chip, which can test the capture sensitivity and tracking sensitivity of the baseband chip in different environments and provide a basis for the selection of the baseband chip in practical application.
A first aspect of the present invention provides a baseband chip sensitivity test method, where a baseband chip to be tested is disposed on a test board, the method including:
under the corresponding test conditions and N test scenes of the sensitivity test, outputting test signals to the baseband chip to be tested according to a test signal power output rule, wherein the test signal power output rule comprises a test signal power initial value and a power stepping value corresponding to a replacement test scene, N test scenes correspond to N test signal powers, and N is a positive integer;
receiving positioning information output by the baseband chip to be tested in a preset test time under each test scene;
after all the test scenes are tested, determining the sensitivity of the baseband chip to be tested according to the positioning information corresponding to the N test scenes, wherein the sensitivity is the minimum test signal power in the test signal power corresponding to the positioning information meeting the positioning accuracy requirement in the positioning information corresponding to the N test scenes.
Optionally, the sensitivity test is a capture sensitivity test, and the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track at least 9 Beidou II BD-2 satellites, the accuracy degree PDOP of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites; or alternatively, the process may be performed,
the baseband chip to be detected can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites.
Optionally, the initial value of the power of the test signal is-145 dBm, the step value of the power is 1dB, the preset test time is 5 minutes, and the positioning accuracy requirement is: the positioning information is less than 60 meters 30 times in succession.
Optionally, the sensitivity test is a tracking sensitivity test, and the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track at least 9 BD-2 satellites, PDOP of the position of the baseband chip to be detected tracked by the satellite is less than or equal to 4, and the test signal is a frequency point signal corresponding to the BD-2 satellites.
Optionally, the test signal power output rule further includes: the test signal power value and the output time are used for enabling the baseband chip to be tested to stably output;
the initial value of the power of the test signal is-143 dBm, the step value of the power is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession.
Optionally, the sensitivity test is a tracking sensitivity test, and the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the position of the baseband chip to be detected tracked by the satellite is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites.
Optionally, the test signal power output rule further includes: the test signal power value and the output time are used for enabling the baseband chip to be tested to stably output;
the initial value of the power of the test signal is-150 dBm, the step value of the power is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession.
A second aspect of the present invention provides a baseband chip sensitivity test apparatus, in which a baseband chip to be tested is disposed on a test board, the apparatus comprising:
the signal output module is used for outputting test signals to the baseband chip to be tested according to a test signal power output rule under the test conditions corresponding to the sensitivity test and N test scenes, wherein the test signal power output rule comprises a test signal power initial value, a test signal power end value and a power stepping value corresponding to the replacement test scene, the N test scenes correspond to N test signal powers, and N is a positive integer;
the receiving module is used for receiving positioning information output by the baseband chip to be tested in a preset test time under each test scene;
the determining module is used for determining the sensitivity of the baseband chip to be tested according to the positioning information corresponding to the N test scenes after the test of all the test scenes is completed, wherein the sensitivity is the minimum test signal power in the test signal power corresponding to the positioning information meeting the positioning accuracy requirement in the positioning information corresponding to the N test scenes.
Optionally, the sensitivity test is a capture sensitivity test, and the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track at least 9 Beidou II BD-2 satellites, the accuracy degree PDOP of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites; or alternatively, the process may be performed,
the baseband chip to be detected can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites.
Optionally, the initial value of the power of the test signal is-145 dBm, the step value of the power is 1dB, the preset test time is 5 minutes, and the positioning accuracy requirement is: the positioning information is less than 60 meters 30 times in succession.
Optionally, the sensitivity test is a tracking sensitivity test, and the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track at least 9 BD-2 satellites, PDOP of the position of the baseband chip to be detected tracked by the satellite is less than or equal to 4, and the test signal is a frequency point signal corresponding to the BD-2 satellites.
Optionally, the test signal power output rule further includes: the test signal power value and the output time are used for enabling the baseband chip to be tested to stably output;
the initial value of the power of the test signal is-143 dBm, the step value of the power is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession.
Optionally, the sensitivity test is a tracking sensitivity test, and the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the position of the baseband chip to be detected tracked by the satellite is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites.
Optionally, the test signal power output rule further includes: the test signal power value and the output time are used for enabling the baseband chip to be tested to stably output;
the initial value of the power of the test signal is-150 dBm, the step value of the power is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession.
A third aspect of the present invention provides a baseband chip sensitivity test apparatus, comprising: at least one processor and memory;
the memory stores computer-executable instructions;
the at least one processor executes the computer-executable instructions stored by the memory to cause the baseband chip sensitivity test apparatus to perform the baseband chip sensitivity test method described above.
A fourth aspect of the present invention provides a computer-readable storage medium having stored thereon computer-executable instructions that, when executed by a processor, implement the above-described baseband chip sensitivity test method.
The invention provides a method and a device for testing the sensitivity of a baseband chip, which are characterized in that under the testing conditions corresponding to the sensitivity test and N testing scenes, test signals are output to the baseband chip to be tested according to the power output rule of the test signals, positioning information output by the baseband chip to be tested in preset testing time under each testing scene is received, finally the sensitivity of the baseband chip to be tested is determined according to the positioning information corresponding to the N testing scenes, and the sensitivity is the minimum test signal power in the test signal power corresponding to the positioning information meeting the positioning accuracy requirement in the positioning information corresponding to the N testing scenes. Therefore, the capture sensitivity and the tracking sensitivity of the baseband chip under different environments can be tested, and a basis is provided for the selection of the baseband chip in practical application.
Drawings
FIG. 1 is a schematic flow chart of a method for testing the sensitivity of a baseband chip;
FIG. 2 is a schematic block diagram of a baseband chip sensitivity test apparatus coupled to a device under test;
FIG. 3 is a schematic diagram of a baseband chip sensitivity test device according to the present invention;
fig. 4 is a schematic structural diagram of a baseband chip sensitivity testing device provided by the invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions in the embodiments of the present invention will be clearly and completely described in the following in conjunction with the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The baseband chip sensitivity test method provided by the invention can be used for testing Beidou compatible navigation type dual-mode baseband chips and also can be used for testing single-mode baseband chips of Beidou I and Beidou II global satellite navigation systems, wherein the sensitivity test comprises a capture sensitivity test and a tracking sensitivity test.
First, some terms in the embodiments of the present invention are explained below to facilitate understanding by those skilled in the art.
1. The capture sensitivity refers to the minimum output signal power when the positioning information output by the baseband chip to be tested meets the positioning accuracy requirement under the cold start condition in the specified test time, and the minimum receiving signal level is also called the minimum receiving signal level of the equipment where the baseband chip to be tested is located. The cold start refers to that the baseband chip to be detected is powered on for the first time under the condition that information such as effective ephemeris, almanac, approximate position and time is not available.
2. Tracking sensitivity refers to the minimum output signal power of the baseband chip to be detected, which can keep stable output after capturing signals and positioning information meets the positioning accuracy requirement, and the minimum receiving signal level of the equipment where the baseband chip to be detected is located.
FIG. 1 is a schematic flow chart of a method for testing the sensitivity of a baseband chip; the main implementation body of the method flow shown in fig. 1 may be a baseband chip sensitivity testing device, and the baseband chip sensitivity testing device may be implemented by any software and/or hardware. As shown in fig. 1, the baseband chip sensitivity test method provided in this embodiment may include:
s101, under the test conditions corresponding to the sensitivity test and N test scenes, outputting test signals to the baseband chip to be tested according to a test signal power output rule, wherein the test signal power output rule comprises a test signal power initial value and a power stepping value corresponding to a replacement test scene, the N test scenes correspond to N test signal powers, and N is a positive integer.
Specifically, during testing, the baseband chip to be tested needs to have a matched bottom plate, the bottom plate is arranged on the test board, the bottom plate can be fixedly arranged on the test board so as to prevent the bottom plate from moving in the running process of the ship, the test board can be a circuit board, for example, the test board is an OEM board, and the bottom plate is provided with the baseband chip to be tested and does not contain other auxiliary navigation devices or low-noise devices and the like.
Specifically, the baseband chip to be tested is arranged on a test board, the test board is arranged in the tested equipment,
fig. 2 is a schematic block diagram of a connection between a baseband chip sensitivity test device and a device under test, where the connection between the baseband chip sensitivity test device and the device under test in this embodiment is shown in fig. 2, and the baseband chip sensitivity test device outputs a test signal to the device under test, and optionally, may output a radio frequency signal through a Radio Frequency (RF) interface on a test board, and the device under test outputs positioning information to the baseband chip sensitivity test device.
S102, receiving positioning information output by the baseband chip to be tested in a preset test time under each test scene.
And S103, after the testing of all the testing scenes is completed, determining the sensitivity of the baseband chip to be tested according to the positioning information corresponding to the N testing scenes, wherein the sensitivity is the minimum testing signal power in the testing signal power corresponding to the positioning information meeting the positioning accuracy requirement in the positioning information corresponding to the N testing scenes.
Firstly, in the testing process, the baseband chip sensitivity testing device in the embodiment firstly simulates and generates N testing scenes, wherein N is a preset value, and different testing scenes such as temperature, humidity, electromagnetic interference and the like are different. Next, the baseband chip sensitivity test device in this embodiment sets test conditions, and optionally, if the sensitivity test is a capture sensitivity test, the test conditions include: 1) The satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode; 2) The maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3 The method comprises the steps of carrying out a first treatment on the surface of the 3) In a single mode (BD) mode, the baseband chip to be detected can track at least 9 Beidou No. two (BD-2) satellites, the precision intensity (PDOP) of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal (namely a B1 frequency point I branch signal) corresponding to the BD-2 satellite; or in a dual mode, such as BD+Global positioning System (Global positioning system, GPS) mode, the baseband chip to be tested can track at least 6 BD-2 satellites and 6 GPS satellites, the PDOP of the baseband chip to be tested tracking satellite positions is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites.
When the capture sensitivity is tested, as an implementation mode, the initial value of the power of the test signal is 145dBm, the power stepping value is 1dB, the preset test time is 5 minutes, and the positioning precision requirement is as follows: the positioning information is less than 60 meters 30 times in succession. When the initial value of the test signal power is-145 dBm and the power stepping value is 1dB, for example, in a first test scene, the test signal is output according to the test signal power of-145 dBm, the positioning result of the baseband chip to be tested output within 5 minutes is received, after the test is finished for 5 minutes, the second test scene is replaced, the test signal power is reset, the step is 1dB, the test signal is output according to the test signal power of-144 dBm, the positioning result of the baseband chip to be tested output within 5 minutes is received, and the steps are repeated until N test scenes, such as N is 10, and the test signal power set in the last test scene is-136 dBm.
Under the above test conditions, in S103, after all the test scenes are tested, the minimum test signal power among the test signal powers corresponding to the N test scenes, which satisfies the continuous 30 times less than 60 meters of the positioning information, is determined according to the positioning information corresponding to the N test scenes, and the minimum test signal power is the capture sensitivity.
Alternatively, if the sensitivity test is a tracking sensitivity test, in a single mode (BD) mode, the test conditions include: 1) The satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode; 2) The maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3 The method comprises the steps of carrying out a first treatment on the surface of the 3) The baseband chip to be tested can track at least 9 Beidou No. two (BD-2) satellites, the precision intensity (PDOP) of the position of the satellite tracked by the baseband chip to be tested is less than or equal to 4, and the test signal is a frequency point signal (namely a B1 frequency point I branch signal) corresponding to the BD-2 satellites.
In the tracking sensitivity test under the above test conditions, as an implementation manner, the test signal power output rule further includes: the method comprises the steps of enabling a test signal power value and output time of a baseband chip to be tested to be stably output, for example, enabling the test signal power value of the baseband chip to be tested to be-127 dBm, enabling the output time to be 5 minutes, firstly setting the test signal power to be-127 dBm when starting testing, outputting the test signal power according to the signal power of-127 dBm for 5 minutes, and then testing according to a test signal power initial value and a power stepping value corresponding to a replacement test scene, wherein the test signal power initial value is-143 dBm, the power stepping value is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession. If the initial value of the test signal power is-143 dBm and the power stepping value is-1 dB, for example, in the first test scene, outputting the test signal according to the test signal power of-143 dBm, receiving the positioning result of the baseband chip to be tested output within 2 minutes, after the test is finished for 2 minutes, replacing the second test scene, resetting the test signal power, stepping by 1dB, outputting the test signal according to the test signal power of-144 dBm, receiving the positioning result of the baseband chip to be tested output within 2 minutes, repeating the steps until N test scenes are tested, if N is 15, and setting the test signal power in the last test scene to be-157 dBm.
Under the above test conditions, in S103, after all the test scenes are tested, the minimum test signal power among the test signal powers corresponding to the N test scenes, which satisfies the positioning information 30 times less than 100 meters continuously, is determined according to the positioning information corresponding to the N test scenes, and the minimum test signal power is the tracking sensitivity.
Alternatively, if the sensitivity test is a tracking sensitivity test, in a dual mode (BD) mode, such as bd+gps mode, the test conditions include: 1) The satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode; 2) The maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3 The method comprises the steps of carrying out a first treatment on the surface of the 3) The baseband chip to be tested can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the baseband chip to be tested tracking satellite positions is less than or equal to 5, and the test signals are frequency point signals (namely B1 frequency point I branch signals) corresponding to the BD-2 satellites.
In the tracking sensitivity test under the above test conditions, as an implementation manner, the test signal power output rule further includes: the method comprises the steps of enabling a test signal power value and output time of a baseband chip to be tested to be stably output, for example, enabling the test signal power value of the baseband chip to be tested to be-127 dBm, enabling the output time to be 5 minutes, firstly setting the test signal power to be-127 dBm when starting testing, outputting the test signal power according to the signal power of-127 dBm for 5 minutes, and then testing according to a test signal power initial value and a power stepping value corresponding to a replacement test scene, wherein the test signal power initial value is-150 dBm, the power stepping value is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession. If the initial value of the test signal power is-150 dBm and the power stepping value is-1 dB, for example, in the first test scene, outputting the test signal according to the test signal power of-150 dBm, receiving the positioning result of the baseband chip to be tested output within 2 minutes, after the test is finished for 2 minutes, replacing the second test scene, resetting the test signal power, stepping by-1 dB, outputting the test signal according to the test signal power of-151 dBm, receiving the positioning result of the baseband chip to be tested output within 2 minutes, repeating the steps until N test scenes are tested, if N is 10, and setting the test signal power in the last test scene to be-160 dBm.
Under the above test conditions, in S103, after all the test scenes are tested, the minimum test signal power among the test signal powers corresponding to the N test scenes, which satisfies the positioning information 30 times less than 100 meters continuously, is determined according to the positioning information corresponding to the N test scenes, and the minimum test signal power is the tracking sensitivity.
After setting corresponding test conditions according to the capture sensitivity or tracking sensitivity test, the baseband chip sensitivity test device in the embodiment outputs test signals to the baseband chip to be tested according to the test signal power output rule under different test scenes, and outputs positioning information in real time after the baseband chip receives the test signals.
According to the baseband chip sensitivity test method provided by the embodiment, test signals are output to the baseband chip to be tested according to the test signal power output rule under the test conditions corresponding to the sensitivity test and N test scenes, positioning information output by the baseband chip to be tested in a preset test time under each test scene is received, and finally the sensitivity of the baseband chip to be tested is determined according to the positioning information corresponding to the N test scenes, wherein the sensitivity is the minimum test signal power in the test signal power corresponding to the positioning information meeting the positioning accuracy requirement in the positioning information corresponding to the N test scenes. Therefore, the capture sensitivity and the tracking sensitivity of the baseband chip under different environments can be tested, and a basis is provided for the selection of the baseband chip in practical application.
It should be noted that, in the embodiment shown in fig. 1, after N test scenes are generated by the baseband chip sensitivity test device in a simulation manner, test conditions (including a single mode and a dual mode) corresponding to the capture sensitivity may be set first, the capture sensitivity is tested, then test conditions (including a single mode and a dual mode) corresponding to the tracking sensitivity are set, the tracking sensitivity is tested, and finally the capture sensitivity and the tracking sensitivity are obtained, so that a basis is provided for selecting the baseband chip in practical application.
Fig. 3 is a schematic structural diagram of a baseband chip sensitivity testing device provided by the present invention, as shown in fig. 3, the baseband chip sensitivity testing device includes: the signal output module 11, the receiving module 12 determines the module 13, wherein:
the signal output module 11 is configured to output a test signal to the baseband chip to be tested according to a test signal power output rule under a test condition corresponding to the sensitivity test and N test scenarios, where the test signal power output rule includes a test signal power initial value, a test signal power end value, and a power step value corresponding to a replacement test scenario, and the N test scenarios correspond to N test signal powers, where N is a positive integer.
The receiving module 12 is configured to receive positioning information output by the baseband chip to be tested in a preset test time under each test scenario.
The determining module 13 is configured to determine, after testing of all the test scenarios is completed, sensitivity of the baseband chip to be tested according to positioning information corresponding to the N test scenarios, where the sensitivity is a minimum test signal power among test signal powers corresponding to positioning information meeting positioning accuracy requirements among positioning information corresponding to the N test scenarios.
In this embodiment, optionally, if the sensitivity test is a capture sensitivity test, the test conditions include: 1) The satellite orbit, satellite clock error, ionosphere time delay and troposphere time delay are set to be time-freeChanging an error mode; 2) The maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3 The method comprises the steps of carrying out a first treatment on the surface of the 3) In a single mode (BD) mode, the baseband chip to be detected can track at least 9 Beidou No. two (BD-2) satellites, the precision intensity (PDOP) of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal (namely a B1 frequency point I branch signal) corresponding to the BD-2 satellite; or in a dual mode, such as BD+Global positioning System (Global positioning system, GPS) mode, the baseband chip to be tested can track at least 6 BD-2 satellites and 6 GPS satellites, the PDOP of the baseband chip to be tested tracking satellite positions is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites.
When the capture sensitivity is tested, as an implementation mode, the initial value of the power of the test signal is 145dBm, the power stepping value is 1dB, the preset test time is 5 minutes, and the positioning precision requirement is as follows: the positioning information is less than 60 meters 30 times in succession.
Alternatively, if the sensitivity test is a tracking sensitivity test, in a single mode (BD) mode, the test conditions include: 1) The satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode; 2) The maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3 The method comprises the steps of carrying out a first treatment on the surface of the 3) The baseband chip to be tested can track at least 9 Beidou No. two (BD-2) satellites, the precision intensity (PDOP) of the position of the satellite tracked by the baseband chip to be tested is less than or equal to 4, and the test signal is a frequency point signal (namely a B1 frequency point I branch signal) corresponding to the BD-2 satellites.
In the tracking sensitivity test under the above test conditions, as an implementation manner, the test signal power output rule further includes: the method comprises the steps of enabling a test signal power value and output time of a baseband chip to be tested to be stably output, for example, enabling the test signal power value of the baseband chip to be tested to be-127 dBm, enabling the output time to be 5 minutes, firstly setting the test signal power to be-127 dBm when starting testing, outputting the test signal power according to the signal power of-127 dBm for 5 minutes, and then testing according to a test signal power initial value and a power stepping value corresponding to a replacement test scene, wherein the test signal power initial value is-143 dBm, the power stepping value is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession.
Alternatively, if the sensitivity test is a tracking sensitivity test, in a dual mode (BD) mode, such as bd+gps mode, the test conditions include: 1) The satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode; 2) The maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3 The method comprises the steps of carrying out a first treatment on the surface of the 3) The baseband chip to be tested can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the baseband chip to be tested tracking satellite positions is less than or equal to 5, and the test signals are frequency point signals (namely B1 frequency point I branch signals) corresponding to the BD-2 satellites.
In the tracking sensitivity test under the above test conditions, as an implementation manner, the test signal power output rule further includes: the method comprises the steps of enabling a test signal power value and output time of a baseband chip to be tested to be stably output, for example, enabling the test signal power value of the baseband chip to be tested to be-127 dBm, enabling the output time to be 5 minutes, firstly setting the test signal power to be-127 dBm when starting testing, outputting the test signal power according to the signal power of-127 dBm for 5 minutes, and then testing according to a test signal power initial value and a power stepping value corresponding to a replacement test scene, wherein the test signal power initial value is-150 dBm, the power stepping value is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession.
The baseband chip sensitivity test device provided in this embodiment is similar to the principle implemented by the above baseband chip sensitivity test method, and will not be described here again.
The baseband chip sensitivity testing device provided by the embodiment can test the capture sensitivity and the tracking sensitivity of the baseband chip under different environments, and provides a basis for the selection of the baseband chip in practical application.
Fig. 4 is a schematic structural diagram of a baseband chip sensitivity testing device provided by the present invention, where the baseband chip sensitivity testing device may be, for example, a terminal device, such as a smart phone, a tablet computer, a computer, etc. As shown in fig. 4, the baseband chip sensitivity test apparatus 200 includes: a memory 201 and at least one processor 202.
Memory 201 for storing program instructions.
The processor 202 is configured to implement the baseband chip sensitivity test method in this embodiment when the program instructions are executed, and the specific implementation principle can be referred to the above embodiment, which is not described herein again.
The baseband chip sensitivity test apparatus may further include an input/output interface 203. The input/output interface 203 may include a separate output interface and input interface, or may be an integrated interface that integrates input and output. The output interface is used for outputting data, the input interface is used for acquiring input data, the output data is the generic name output in the method embodiment, and the input data is the generic name input in the method embodiment.
The present invention also provides a readable storage medium having stored therein an execution instruction, which when executed by at least one processor of the baseband chip sensitivity test apparatus, when executed by the processor, implements the baseband chip sensitivity test method in the above embodiment.
The present invention also provides a program product comprising execution instructions stored in a readable storage medium. The at least one processor of the baseband chip sensitivity test apparatus may read the execution instructions from the readable storage medium, and execution of the execution instructions by the at least one processor causes the baseband chip sensitivity test apparatus to implement the baseband chip sensitivity test method provided in the various embodiments described above.
In the several embodiments provided by the present invention, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of elements is merely a logical functional division, and there may be additional divisions of actual implementation, e.g., multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in hardware plus software functional units.
The integrated units implemented in the form of software functional units described above may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium, and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (english: processor) to perform some of the steps of the methods according to the embodiments of the invention. And the aforementioned storage medium includes: u disk, mobile hard disk, read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk, etc.
In the above embodiments of the network device or the terminal device, it should be understood that the processor may be a central processing unit (in english: central Processing Unit, abbreviated as CPU), or may be other general purpose processors, digital signal processors (in english: digital Signal Processor, abbreviated as DSP), application specific integrated circuits (in english: application Specific Integrated Circuit, abbreviated as ASIC), or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the present application may be embodied directly in a hardware processor or in a combination of hardware and software modules within a processor.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims (4)

1. The method for testing the sensitivity of the baseband chip is characterized in that the baseband chip to be tested is arranged on a test board, and the baseband chip to be tested is a Beidou compatible navigation type dual-mode baseband chip, and the method comprises the following steps:
under the corresponding test conditions and N test scenes of the sensitivity test, outputting test signals to the baseband chip to be tested according to a test signal power output rule, wherein the test signal power output rule comprises a test signal power initial value and a power stepping value corresponding to a replacement test scene, N test scenes correspond to N test signal powers, and N is a positive integer; the parameters corresponding to the test scene comprise at least one of the following: when the sensitivity test is a tracking sensitivity test, the test signal power output rule further comprises a test signal power value and output time for enabling the baseband chip to be tested to stably output;
receiving positioning information output by the baseband chip to be tested in a preset test time under each test scene;
after all the test scenes are tested, determining the sensitivity of the baseband chip to be tested according to the positioning information corresponding to the N test scenes, wherein the sensitivity is the minimum test signal power in the test signal power corresponding to the positioning information meeting the positioning accuracy requirement in the positioning information corresponding to the N test scenes;
when the sensitivity test is a capture sensitivity test, the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track at least 9 Beidou II BD-2 satellites, the accuracy degree PDOP of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites; or alternatively, the process may be performed,
the baseband chip to be detected can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites;
the initial value of the power of the test signal is-145 dBm, the step value of the power is 1dB, the preset test time is 5 minutes, and the positioning precision requirement is as follows: the positioning information is continuously smaller than 60 meters for 30 times;
when the sensitivity test is a tracking sensitivity test, in the single-mode BD mode, the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track at least 9 BD-2 satellites, PDOP of the position of the baseband chip to be detected tracked by the satellite is less than or equal to 4, and the test signal is a frequency point signal corresponding to the BD-2 satellites;
the test signal power output rule further comprises: the test signal power value and the output time are used for enabling the baseband chip to be tested to stably output;
the initial value of the power of the test signal is-143 dBm, the step value of the power is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is continuously smaller than 100 meters for 30 times;
when the sensitivity test is a tracking sensitivity test, in the dual-mode BD mode, the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the position of the baseband chip to be detected tracked by the satellite is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites;
the initial value of the power of the test signal is-150 dBm, the step value of the power is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession.
2. The utility model provides a baseband chip sensitivity testing arrangement, its characterized in that, the baseband chip that awaits measuring sets up on the test board, the baseband chip that awaits measuring is the compatible navigation formula bimodulus baseband chip of big dipper, the device includes:
the signal output module is used for outputting test signals to the baseband chip to be tested according to a test signal power output rule under the test conditions corresponding to the sensitivity test and N test scenes, wherein the test signal power output rule comprises a test signal power initial value, a test signal power end value and a power stepping value corresponding to the replacement test scene, the N test scenes correspond to N test signal powers, and N is a positive integer; the parameters corresponding to the test scene comprise at least one of the following: when the sensitivity test is a tracking sensitivity test, the test signal power output rule further comprises a test signal power value and output time for enabling the baseband chip to be tested to stably output;
the receiving module is used for receiving positioning information output by the baseband chip to be tested in a preset test time under each test scene;
the determining module is used for determining the sensitivity of the baseband chip to be tested according to the positioning information corresponding to the N test scenes after the test of all the test scenes is completed, wherein the sensitivity is the minimum test signal power in the test signal power corresponding to the positioning information meeting the positioning accuracy requirement in the positioning information corresponding to the N test scenes;
when the sensitivity test is a capture sensitivity test, the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track at least 9 Beidou II BD-2 satellites, the accuracy degree PDOP of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites; or alternatively, the process may be performed,
the baseband chip to be detected can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the position of the satellite tracked by the baseband chip to be detected is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites;
the initial value of the power of the test signal is-145 dBm, the step value of the power is 1dB, the preset test time is 5 minutes, and the positioning precision requirement is as follows: the positioning information is continuously smaller than 60 meters for 30 times;
when the sensitivity test is a tracking sensitivity test, in the single-mode BD mode, the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track at least 9 BD-2 satellites, PDOP of the position of the baseband chip to be detected tracked by the satellite is less than or equal to 4, and the test signal is a frequency point signal corresponding to the BD-2 satellites;
the test signal power output rule further comprises: the test signal power value and the output time are used for enabling the baseband chip to be tested to stably output;
the initial value of the power of the test signal is-143 dBm, the step value of the power is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is continuously smaller than 100 meters for 30 times;
when the sensitivity test is a tracking sensitivity test, in the dual-mode BD mode, the test conditions include:
the satellite orbit, the satellite clock error, the ionosphere time delay and the troposphere time delay are set to be in a time-varying error-free mode;
the maximum speed of the ship where the test board is positioned is less than or equal to 3m/s, and the maximum acceleration is less than or equal to 0.05m/s 2 The maximum rate of change of acceleration is less than or equal to 0.005m/s 3
The baseband chip to be detected can track 6 BD-2 satellites and 6 GPS satellites, PDOP of the position of the baseband chip to be detected tracked by the satellite is less than or equal to 5, and the test signal is a frequency point signal corresponding to the BD-2 satellites;
the initial value of the power of the test signal is-150 dBm, the step value of the power is-1 dB, the preset test time is 2 minutes, and the positioning precision requirement is as follows: the positioning information is less than 100 meters 30 times in succession.
3. A baseband chip sensitivity test device, comprising: at least one processor and memory;
the memory stores computer-executable instructions;
the at least one processor executing computer-executable instructions stored in the memory causes a baseband chip sensitivity test apparatus to perform the method of claim 1.
4. A computer readable storage medium having stored thereon computer executable instructions which, when executed by a processor, implement the method of claim 1.
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