CN108701676A - The sub-assembly of the shielding line for the upper wiring layer being electrically coupled with the shielding line with lower part wiring layer - Google Patents

The sub-assembly of the shielding line for the upper wiring layer being electrically coupled with the shielding line with lower part wiring layer Download PDF

Info

Publication number
CN108701676A
CN108701676A CN201780013788.1A CN201780013788A CN108701676A CN 108701676 A CN108701676 A CN 108701676A CN 201780013788 A CN201780013788 A CN 201780013788A CN 108701676 A CN108701676 A CN 108701676A
Authority
CN
China
Prior art keywords
wiring
shielding line
layer
line
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201780013788.1A
Other languages
Chinese (zh)
Other versions
CN108701676B (en
Inventor
佐藤诚
铃木亮太
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US15/155,334 external-priority patent/US9754872B1/en
Priority claimed from US15/456,254 external-priority patent/US10304771B2/en
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of CN108701676A publication Critical patent/CN108701676A/en
Application granted granted Critical
Publication of CN108701676B publication Critical patent/CN108701676B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5225—Shielding layers formed together with wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout

Abstract

Some embodiments include a kind of sub-assembly with the first wiring layer, and first wiring layer has multiple first shielding lines and the first signal wire.First shielding line and first signal wire have the first segment extended along a first direction and extend along the first direction and from the second segment of the first segment lateral shift.The sub-assembly includes the second wiring layer, and second wiring layer is under first wiring layer and has multiple secondary shielding lines and second signal line.The secondary shielding line and the second signal line have the third section extended along the first direction and along first direction extensions and from the 4th section of the third section lateral shift.Below the first segment that described 4th section of the secondary shielding line extends to first shielding line, and it is electrically coupled to by perpendicular interconnection the first segment of first shielding line.

Description

The shielding line for the upper wiring layer being electrically coupled with the shielding line with lower part wiring layer Sub-assembly
Technical field
The sub-assembly of the shielding line for the upper wiring layer being electrically coupled with the shielding line with lower part wiring layer.
Background technology
Integrated circuit may include that multiple-level stack connects up.The layer may include the signal wire being alternately arranged with shielding line.It can profit Mitigate the crosstalk between adjacent signals line with shielding line.Displaying includes the exemplary configuration of three stacking wiring layers in Fig. 1.Tool For body, the first wiring layer M1, the second wiring layer M2 and third wiring layer M3 of configuration displaying;Wherein M3 is above M2, and M2 Above M1.Although showing three wiring layers, it should be appreciated that and/or can on illustrated layer under illustrated layer There are other wiring layers.In addition, although illustrated wiring layer is labeled as M1 to M3, but if there are other wiring layers, then institute Presentation layer may actually be M2 to M4;M3 to M6;Deng this depends on the number of wiring layer below illustrated wiring layer.
Each in illustrated layer includes the signal wire for being alternatingly arranged with shielding line.It may want to the shielding in a layer Line on one layer and under other layers of shielding line be electrically connected.For example, it may be desired to shielding line in layer M2 with Shielding line in layer M1 and the shielding line electrical connection in layer M3, can so mitigate the coupled noise between vertical stacks lamination.
Since line of the line in layer M1 in layer M2 continues, the company of the shielding line of layer M2 and the shielding line of layer M1 It is relatively straight to connect.However, since the wiring in layer M2 is parallel to the wiring in layer M3, and shielding line relative to layer M3 in layer M2 Staggeredly, therefore the connection of the shielding line of layer M2 and the shielding line of layer M3 is problematic.Therefore, the shielding line of layer M2 is with layer M3's It is not vertically superposed between shielding line.
It will be coupled between the shielding line for it is expected to develop the stack layer that can be illustrated in Figure 1 the type for layer M2 and M3 Framework.
Description of the drawings
Fig. 1 is the schematic three-dimensional views that the prior art connects up layer arrangement.
Fig. 2 to 2C is the schematic diagram that the example embodiments of wiring layer are arranged.Fig. 2 is vertical view.Fig. 2A to 2C is difference Along the schematic cross section of line 2A-2A, 2B-2B and 2C-2C in Fig. 2.
Fig. 3 is the enlarged view in the region " 3 " of Fig. 2.
Fig. 4 and 4A is the schematic diagram that the example embodiments of wiring layer are arranged.Fig. 4 is vertical view.Fig. 4 A are along Fig. 4's The schematic cross-sectional view of line 4A-4A.
Fig. 5 is the exploded view of the example embodiments sub-assembly of wiring layer.In the view of fig. 5, three layers are stacked.
Fig. 6 to 8 is the schematic plan of individual layers of Fig. 5.
Fig. 9 is the schematic plan of the exemplary grid for the interconnection shielding line for showing three layers containing Fig. 5.
Figure 10 is the decomposition view of another example embodiments sub-assembly of wiring layer.In the view of Figure 10, three are stacked A layer.
Figure 11 to 13 is the schematic plan of individual layers of Figure 10.
Figure 14 is the schematic plan of the exemplary grid for the interconnection shielding line for showing three layers containing Figure 10.
Figure 15 A are the schematic plan across the sub-assembly of the wiring layer of substrate, and Figure 15 B are the expansion area of Figure 15 A The view in domain is to illustrate alternating signal line AC and shielding line.In the vertical view of Figure 15 A, the wiring layer of three Fig. 5 is stacked, wherein scheming The part shown in 5 is in the region " Fig. 5 " of Figure 15 A.
Figure 16 A are the schematic plan across the exemplary placement of the circuit of substrate.Figure 16 B are the expansion area of Figure 16 A The view in domain shows redundancy (or virtual) structure to illustrate alternate signal wire and shielding line.
Figure 17 is the schematic plan of the exemplary placement of the circuit from two stacking wiring layers.
Alternating signals and shield wiring of the Figure 18 for the view of the extended area of Figure 17 to illustrate in stacking wiring layer, and open up Show redundancy (or virtual) structure.
Figure 19 shows the schematic plan of comparative example circuit arrangement.
Figure 20 shows the schematic plan of more a pair of of example circuit arrangement.
Figure 21 is the exploded view of the sub-assembly of one exemplary wiring layer in the circuit arrangement for can be used for Figure 20.Scheming In 21 view, three wiring layers are stacked.
Figure 22 to 24 is the schematic plan of individual wiring layers of Figure 21.
Figure 25 is the line 25-25 that is shown in Figure 23 and 24, and showing across the wiring layer M2 and M3 of Figure 23 and 24 Meaning property cross-sectional side view.
Figure 26 is the view of the extended area of Figure 23 and 24, and displaying is stacked on the cloth of Figure 24 above the wiring layer of Figure 23 Line layer.Region in Figure 26 is indicated by the dash line " Figure 26 " in Figure 23 and 24.
Figure 27 A to 27C are the amplification diagrammatic top view in the region of the M2 wiring layers for the Figure 23 for showing exemplary alternative configuration.
Figure 28 is the exploded view of the sub-assembly of one exemplary wiring layer in the circuit arrangement for can be used for Figure 20.Scheming In 28 view, three layers are stacked.
Figure 29 to 31 is the schematic plan of individual layers of Figure 28.
Figure 32 A to C are line 32A-32A, 32B-32B and 32C-32C along Figure 30 and 31, and across the cloth of Figure 30 and 31 The cross-sectional schematic side view of line layer M2 and M3.
Figure 33 and 34 is the amplification diagrammatic top in the region of the wiring layer M3 for the Figure 31 for showing exemplary alternative configuration.
Figure 35 and 36 is the amplification diagrammatic top in the region of the wiring layer M2 for the Figure 30 for showing exemplary alternative configuration.
Specific implementation mode
Some embodiments are configured to have the framework of offset area comprising the signal wire in wherein wiring layer with shielding line. These offset areas may make can between the shielding line and the shielding line of lower part wiring layer of upper wiring layer generation it is vertical weight It is folded, though the shielding line operation in the two wiring layers is substantially each other, and even if under in the configuration similar to the configuration of Fig. 1 Shielding line in portion's wiring layer interlocks relative to the shielding line in upper wiring layer.
Example embodiments are described with reference to figs. 2 to 36.
With reference to figs. 2 to 2C, illustrate the region of integrated assemblies 510.Sub-assembly 510 includes a pair of of vertical stacking wiring layer M2 And M3.Layer M2 is shown with dash line to indicate this layer below layer M3 in the vertical view of Fig. 2.
Layer M3 includes shielding line 512 and the signal wire 514 close to shielding line.It line 512 and 514 can indicate in wiring layer M3 The a large amount of multiple shielding lines and signal wire formed with alternate relation.
Layer M2 includes shielding line 516 and the signal wire 518 close to shielding line.It line 516 and 518 can indicate in wiring layer M2 The a large amount of multiple shielding lines and signal wire formed with alternate relation.
In some embodiments, wiring layer M3 can be referred to as the first wiring layer, and wiring layer M2 can be called The second wiring layer below first wiring layer.Shielding line 512 and signal wire 514 in first wiring layer can be referred to as the first screen Line and the first signal wire are covered, and this can be indicated across the first wiring layer to be alternately arranged multiple first shielding lines and first to be formed Signal wire.Similarly, the shielding line 516 of the second wiring layer and signal wire 518 are called secondary shielding line and second signal line, And this can be indicated across the second wiring layer to be alternately arranged the multiple secondary shielding lines to be formed and second signal line.
First shielding line 512 has first segment 520 and the second segment 522 from first segment lateral shift.First segment 520 and It is connected to each other by chained segment 524 for two section 522.Chained segment 524 can be arranged into one end and the second segment of connection first segment 520 522 one end.First segment 520 can be to be extended from one end of chained segment 524.Second segment 522 can be the other end phase of chained segment 524 First segment 520 is relatively extended.Similarly, the first signal wire 514 has first segment 526, from first segment lateral shift Second segment 528, and make first segment 526 and the chained segment 530 interconnected amongst one another of second segment 528.Chained segment 530 can be arranged to connect One end of one end and second segment 528 of first segment 526.First segment 526 can be extended from one end of chained segment 530.Second segment 528 can It is relatively extended with respect to first segment 526 from the other end of chained segment 530.
Secondary shielding line and second signal line in second wiring layer M2 have and similar section of the section of the first wiring layer M3. However, being explained to simplify, the section of secondary shielding line and second signal line will be called third section and the 4th section, by its with The first segment and second segment of first shielding line 512 and the first signal wire 514 distinguish.Therefore, secondary shielding line 516 has third Section 532 and from the 4th section 534 of third section lateral shift.Third section 532 and the 4th section 534 are connected to each other by chained segment 536. Chained segment 536 can be arranged into one end of connection third section 532 and the 4th section 534 one end.Third section 532 can be from chained segment 536 one end elongation.It can relatively be extended relative to third section 532 for the other end of chained segment 536 for 4th section 534.Similarly, First signal wire 518 has third section 538, from the 4th section 540 of first segment lateral shift, and makes third section 538 and the 4th section 540 chained segments 542 interconnected amongst one another.Chained segment 542 can be arranged to 538 one end of connection third section and the one of the 4th section 540 End.Third section 538 can be extended from one end of chained segment 542.4th section 540 can be from the opposite third section of the other end of chained segment 542 538 relatively extend.In some embodiments, the chained segment 524 and 530 in the first wiring layer M3 can be referred to as the first link Section, and the chained segment 536 and 542 in the second wiring layer M2 can be referred to as the second chained segment so that can will be in various wirings layer Chained segment be distinguished from each other out.
It is provided about axle system in the vertical view of Fig. 2.Axle system shows first axle 503 and the second axis 505, second axis Relative to the orthogonal extension of the first axle.First and second section 520,522,526 and 528 is mainly along corresponding to axis 503 One direction extends, and chained segment 524 and 530 is mainly along the second direction extension corresponding to axis 505.Section is through instruction " main " edge Direction indicated by extends as waveform or non-straight in other ways even if section to indicate, the entire route of section is also along institute Indicate direction.In some embodiments, Duan Kewei is substantially straight, and wherein term " substantially straight " means that section is making and surveying It is straight in the reasonable tolerances of amount.
Third section and the 4th section 532,534,538 and 540 also mainly along the first direction extension corresponding to axis 503, and In illustrated embodiment, chained segment 536 and 542 extends mainly along the second axis 505.
In shown embodiment, chained segment 524 is substantially normal to the first segment 520 and second segment 522 of shielding line 512 Extend, chained segment 530 is substantially normal to the first segment 526 of signal wire 514 and second segment 528 extends, and chained segment 536 is substantially Be orthogonal to secondary shielding line 516 third section 532 and the 4th section of 534 extension, and chained segment 542 is substantially normal to second signal The section 538 and 540 of line 518 extends.Term " substantially orthogonal to " means that chained segment is making and measuring in reasonable tolerances just Other indicated sections are met to extend.In other embodiments, one or two of chained segment can be different from relative to thus The angle that the principal direction of the section of chained segment interconnection is orthogonal extends.
The advantages of framework of Fig. 2 is the offset (that is, bending) that is provided in signal wire and shielding line so that coming from upper wiring The region of the shielding line of layer M3 can be vertically be overlapped with the region of the shielding line of lower part wiring layer M2.Specifically, top cloth The shielding line 512 of line layer is vertically overlapped the region of the shielding line 516 of lower part wiring layer in illustrated overlapping region 544;Its 520 lower section of first segment that illustrated 4th section 534 of middle secondary shielding line 516 extends to the first shielding line 512.
Perpendicular interconnection 546 is arranged in overlapping region 544, and shielding line 516 and 512 is electrically coupled to one another.Perpendicular interconnection 546 are illustrated in the vertical view of Fig. 2 with dash line (dotted line) to indicate that interconnection is located at 512 lower section of line.Perpendicular interconnection can hang down substantially Directly extend, wherein term " substantially vertical " means to be interconnected in vertical in the reasonable tolerances of making and measurement.
Illustrated embodiment shows two perpendicular interconnections in overlapping region 544.In other embodiments, in overlapping region It is interior that single interconnection can be only provided, or more than two interconnection can be provided in overlapping region.In addition, although interconnection 546 is along Fig. 2's What vertical view was square, but in other embodiments, interconnection can have other shapes, including such as rectangle, circle, ellipse Deng.
The replacement of the sub-assembly 510 of Fig. 2 to 2C is described as follows.The first shielding line 512 in upper wiring layer can be considered With the first part 548 that upwardly extends of first party in axis 503, extend in second direction (for example, direction of axis 505) Second part 550, and the Part III 552 that extends in a first direction.Second part 550 is by first part 548 and third Part 552 interconnects.The first signal wire 514 in upper wiring layer has Part IV the 554, the 5th close to the first shielding line Part 556 and Part VI 558.Four, the 5th and Part VI (554,556 and 558) respectively with third, second and first Divide (552,550 and 548) substantially parallel.Term " substantially parallel " means to put down in the reasonable tolerances for making and measuring Row.
Continue the replacement description to sub-assembly 510, the secondary shielding line 516 in the wiring layer of lower part includes Part VII 560 And Part VIII 562;Wherein Part VII 560 and the Part III 552 of the first shielding line 512 is substantially aligned vertically, the 8th Points 562 and the Part IV 554 of the first signal wire 514 be substantially aligned vertically.Secondary shielding line 516 also includes Part IX 564. Part IX interconnects Part VII 560 and Part VIII 562.Part III of the Part VII 560 from the first shielding line 512 552 lower sections continuously extend to 558 lower section of Part VI of the first signal wire 514;Wherein Part VII 560 and the first shielding line 512 Part III 552 is substantially vertically aligned.
It continues to the description of the replacement of sub-assembly 510, overlapping region 544 extends through the of the first shielding line 512 The Part VII 560 of three parts 552 and secondary shielding line 516, and perpendicular interconnection 546 is by Part III 552 and Part VII 560 Electrical connection.
The enlarged view in the region " 3 " of the sub-assembly 510 of Fig. 3 display diagrams 2, and will be for describing some in this sub-assembly Size relationship.
Shielding line 512 can be considered as representing individual first shielding lines of multiple shielding lines in upper wiring layer, and believe Number line 514 can be considered as individual first signal wires for representing multiple signal wires in upper wiring floor.Similarly, secondary shielding Line 516 can be considered as representing individual secondary shielding lines of multiple secondary shielding lines in the wiring layer of lower part, and second signal line 518 can be considered as the individual second signal lines for representing multiple second signal lines in the wiring layer of lower part.
First signal wire 514 indicates the signal wire in upper wiring layer close to the first shielding line 512, wherein term " close to " There is no other signals line (that is, signal wire 514 is that upper wiring layer is interior near shielding line 512 between 514 and shielding line 512 Signal wire).
First shielding line 512 has the first shielding line first segment 520, the first shielding line second segment 522, and between first Chained segment 524 between section 520 and second segment 522.Chained segment 524 can be referred to as the first shielding line chained segment.
Signal wire 514 is comprising the first signal wire first segment 526, the first signal wire second segment 528 and between first segment 526 Chained segment 530 between second segment 528.Chained segment 530 can be referred to as the first signal wire chained segment.
First shielding line chained segment 524 from the first signal wire chained segment 530 along axis 503 first direction offset first away from From D1。
Secondary shielding line 516 includes the third section 532 below the region of the first signal wire first segment 526.Second screen Covering line 516 also has the 4th section 534, extends to below the region of signal wire second segment 528, and this also extends into the first shielding Below the region of line first segment 520.Third section 532 is connect by secondary shielding line chained segment 536 with the 4th section 534.
Perpendicular interconnection 546 extends between the 4th section 534 of the first shielding line first segment 520 and secondary shielding line, by One shielding line 512 is electrically coupled to one another with secondary shielding line 516 (that is, by the shielding line 512 of upper wiring layer and lower part wiring layer Shielding line 516 is electrically coupled).
Secondary shielding line chained segment 536 from the first signal wire chained segment 530 along axis 503 first direction offset second away from From D2。
Second distance D2Than the first distance D1Greatly, and in some embodiments can it be at least two times of the first distance.
Fig. 3 also shows that the first shielding line 512 and the first signal wire 514 are spaced the third distance interval corresponding to spacing D3, and show the 4th distance D of adjacent corners interval of shielding line 512 and signal wire 5144, the 4th distance is along corresponding to axis 507 direction extends.The direction of axis 507 can be about 45 ° in some embodiments in the centre in the direction of axis 503 and 505 (that is, centre between axis 503 and 505).
In some embodiments, D4Displacement can be considered being equal to D3Displacement combines D1Displacement.
In some embodiments, illustrated chained segment (for example, 524,530 and 536) can be considered along various shielding lines And signal wire defines step or bridge path.
The wiring layer M2 of Fig. 2 and 3 can be above another wiring layer similar to the layer M1 of Fig. 1.Fig. 4 and 4A are illustrated in Fig. 2 And the region of the sub-assembly 510 illustrated in 3 below region, and the specific third wiring layer being illustrated in below the second wiring layer M2 M1 (in order to simplify attached drawing, layer M3 is not shown in Fig. 4 and 4A).The illustrated region of the wiring layer M2 of Fig. 4 has between one To the secondary shielding line 516 between the second line 518.
Wiring layer M1 is included in the signal wire 566 between a pair of of shielding line 568.Signal wire and screen in third wiring layer M1 It covers line to can be referred to as third signal wire and third shielding line, so as to by itself and the secondary shielding line and in the second wiring layer M2 Binary signal line distinguishes, and by its in the first wiring layer M3 (Fig. 2) the first shielding line and the first signal wire distinguish.Institute Illustrating in embodiment, the shielding line and signal wire in wiring layer M1 extend mainly along the direction of axis 505, or in other words, base Be orthogonal in sheet secondary shielding line 516 third section 532 and the 4th section 534 extension.
Third shielding line 568 by perpendicular interconnection 570 be electrically coupled to secondary shielding line 516 third section 532 and the 4th section 534 (or alternatively, are considered being electrically coupled to the Part VII 560 and Part VIII of secondary shielding line by perpendicular interconnection 570 562).In some embodiments, perpendicular interconnection 546 by the shielding line in the first wiring layer M3 (that is, for being connected to the second wiring The interconnection of shielding line in layer M2) it can be referred to as first group of interconnection, and interconnect 570 and can be referred to as second group of interconnection so as to will Interconnection 570 is distinguished with interconnection 546.Interconnection 546 and 570 be shown as in the vertical view of Fig. 4 square and it is round so as to Clearly vision differentiation is provided between interconnection 546 and 570.In practical operation, interconnection 46 and 70 can be mutually the same shape, Or can be different shapes;And can be any suitable shape, including such as square, rectangle, circle, ellipse.Vertically Interconnection 570 is illustrated in the vertical view of Fig. 4 with dash line (dotted line) to indicate that interconnection 570 is located at 516 lower section of line, and interconnects 546 With dash line view specification to indicate that it is that the position of interconnection 546 illustrated in this view (depends on the specific of interconnection 546 Framework and whether be across the cross section of interconnection 546 for the selected position of view of Fig. 4, interconnection is 546 in the view of figure 4 Can be visible or invisible).
The further explanations of Fig. 5 to 8 include the sub-assembly 510 of wiring layer M1, M2 and M3.Fig. 5 is the cloth that displaying is stacked on one another The exploded view of line layer;And Fig. 6 to 8 individually shows each in individual wiring layer M1, M2 and M3.Wiring in layer M3 is through exhibition It is shown as slightly thicker than the wiring in layer M2 and M1.In fact, depending on application, the wiring in layer M1 to M3 can all identical thickness Degree or some wirings can have different-thickness relative to other wirings.
The sub-assembly 510 of Fig. 5 to 8 can be believed to comprise join domain 572, include interconnection 546, and more specifically capsule Include the position of the part of the shielding line 512 of layer M3 vertically part of the shielding line 516 of overlapping layer M2.Shielding in layer M2 and M3 The link area of line and signal wire is in join domain 572 (these link areas as described by reference chart 2 above, and alternative Ground is referred to as being bent region, bridge areas as there etc.).
Join domain can be believed to comprise the first boundary 571 and the second boundary 573.First shielding area 574 is along axis 505 Direction extend outwardly from join domain 572, and secondary shielding region 576 from join domain 572 along axis direction 503 to extension It stretches.The weight vertical with the shielding line 516 of layer M2 in the first shielding area 574 and secondary shielding region 576 of signal wire 514 of layer M3 It is folded;And the shielding line 512 of layer M3 and the signal wire 518 of the layer M2 in first and second shielding area are vertically superposed.
In the embodiment of Fig. 5 to 8, all shielding lines in wiring layer M3, M2 and M1 are electrically connected that (voltage Vss can with Vss For any suitable voltage, and can be ground connection or negative supply voltage in some embodiments).From wiring layer M3, M2 and M1 Various shielding lines can form the three-dimensional grid 578 of type demonstrated in Figure 9 together, and wherein this grid has consistent electricity everywhere Pressure.Specifically, the grid of Fig. 9 includes the secondary shielding line of the first shielding line 512 of upper wiring layer M3, intermediate wiring layer M2 The third shielding line 568 of 516 and lower part wiring layer M1.Shielding line 512,516 and 568 is with the line explanation of different rugosity, therefore It can be distinguished from each other in the figure of Fig. 9.In practical operation, shielding line can all with thickness substantially identical to one another (or In some embodiments, if shielding line is suitable for specific application, some shielding lines can have different from other shielding lines Thickness).The region that shielding line from layer M3 is connect with the shielding line from layer M2 is shown as overlapping region 544, and this will It (is illustrated in Fig. 5 to 8 including perpendicular interconnection 546, but is not shown in Fig. 9).
The one side of the embodiment of Fig. 9 is each in the first shielding line 512 of top wiring layer M3 from intermediate cloth Line layer M2 is directly connected to a pair of of secondary shielding line 516;And on the contrary, each in the secondary shielding line 516 of intermediate wiring layer It is directly connected to a pair of first shielding line 512 from top wiring layer.Shielding line 512 and 516 includes bridge region described above Domain (that is, link area) 524 and 536.
Fig. 9 shows in the first shielding line 512 that label is and the two of 512b is with by itself and its in the first shielding line Its shielding line distinguishes, and shows in secondary shielding line 516 that label is and the two of 516b is with by itself and secondary shielding line In other shielding lines distinguish.First shielding line 512a extends mainly along the first direction corresponding to axis 503, and along phase Two first paths 580 and 582 being laterally offset from each other are extended.Similarly, secondary shielding line 516b is mainly along axis 503 First direction extend, and extend along two the second paths 590 and 592 deviating laterally relative to each other.In addition to the first via Diameter 580 and 582 have overlapping region 544 except, the first shielding line 512a mainly from 516 lateral shift of secondary shielding line, wherein First part of shielding line 512a and partly overlapping for secondary shielding line 516a and 516b.The part of first shielding line 512a and The partly overlapping specific overlapping of two shielding line 516a and 516b is marked as 584 and 586.
It is worth noting that, the path 580 of shielding line 512a is Chong Die with secondary shielding line 516a, and same first shielding line The path 582 of 512a is overlapped from different secondary shielding line 516b.In a similar way, secondary shielding line 516b and two differences The first shielding line 512a and 512b connection.Perpendicular interconnection 546 (not shown in Fig. 9) setting is in the overlapping region 544 with by the One shielding line 512 links together with secondary shielding line 516.
The shielding line 568 of bottom wiring layers M1 can pass through 570 (Fig. 9 of vertical contact above with reference to type described in Fig. 4 In for displaying) be connected to the shielding line 516 of intermediate wiring layer M2.
The intertexture interconnection piece between the first wiring layer, the second wiring layer and third wiring layer in grid 578 makes it possible to The voltage being consistent in spreading all over all shielding lines to tangle in this grid.This can mitigate or prevent above the present invention's The problem of described in " background technology " part.
Fig. 5 illustrates embodiment to 9, wherein all shielding lines, which are maintained at shared voltage, (is illustrated as Vss, but in other realities It applies in example, can be the shared voltage in addition to Vss).In some embodiments, shielding line can be relative to each other maintained at not It is segmented between the group of voltage.For example, in some embodiments, some shielding lines are positively retained at Vss, and other shielding lines are protected It holds in Vdd.Some of shielding lines are described with reference to figure 10 to 14 to be electrically connected with Vss and reality that other shielding lines are electrically connected with Vdd Example property embodiment.
Wiring layer M1, M2 and M3 of sub-assembly 10 illustrate in Figure 10 to 13.Figure 10 is the wiring layer that displaying is stacked on one another Exploded view;And Figure 11 to 13 individually shows each in individual wiring layer M1, M2 and M3.
The general framework of Figure 10 to 13 is similar to above with respect to framework described in Fig. 5 to 8, in addition to introducing additional complexity Property is so that the shielding line in various layer M1 to M3 may include some shielding lines and other shielding lines being electrically connected with Vdd and Vss Except electrical connection.
Various shielding lines from wiring layer M3, M2 and M1 can form a pair of similar to grid demonstrated in Figure 9 together Three-dimensional grid.One in these grids is electrically connected with Vss, another is electrically connected with Vdd.Figure 14 displayings are electrically connected with Vss Three dimensional network 88, and similar net (not shown) will be electrically connected with Vdd.
Sub-assembly discussed herein above can be incorporated into the integrated circuit by semiconductor substrate (not shown) support of underliing.Lining Bottom can be substantially made of monocrystalline silicon or be made of monocrystalline silicon for example including monocrystalline silicon.Term " semiconductor substrate " refers to including Any construction of semi-conducting material, including but not limited to bulk semiconductor material, such as semiconductor wafer is (individually or including other The sub-assembly of material) and semiconductor material layer (individually or sub-assembly including other materials).Term " substrate " refers to any Support structure, including but not limited to semiconductor substrate as described above.
In some embodiments, the present invention includes and reduces the shielding line of upper wiring layer (for example, M3) being coupled to lower part The framework of the distance between the interconnection of shielding line of wiring layer (for example, M2), this enables through-hole bypass spacing to reduce.It is given Signal wire in through-hole bypass spacing can be coupled with shared bus.Therefore, reducing through-hole bypass spacing can cause and each bus The quantity of associated signal wire is reduced, and the resistance of crossover signal line and associated bus therefore can be caused to reduce.
Figure 15 A and 15B displayings include the sub-assembly 510 of the arrangement of Fig. 5, but are illustrated with alternative about Fig. 5.Sub-assembly 510 are shown in Figure 15 A with vertical view, and the line of wherein wiring layer is heavily compressed.The extended area of top wiring layer M3 is being schemed It is shown with cross-sectional side view to help reader to understand the vertical view of Figure 15 A in 15B.The approximate location of the illustrated part of Fig. 5 It is schematically illustrated as corresponding to the region labeled as " Fig. 5 " in Figure 15 A.Join domain 572 is schematically illustrated to have Across the line of the vertical view of Figure 15 A.
The persistent goal of semiconductor fabrication is to increase current densities (that is, increasing integrated level).The framework of Fig. 5,15A and 15B The problem of be along the shielding line for shielding line to be coupled to other wiring layers (for example, the wiring shown in Fig. 5 and 7 Layer M2 shielding line 516) interconnection (the 546 of Fig. 5) between given wiring layer individual shielding lines (for example, institute in Fig. 5 and 6 The shielding line 512 of the wiring layer M3 of displaying) there may be relatively large distances.This problem is in the vertical view of Figure 15 A with instruction interconnection Between spacing (that is, through-hole bypass spacing) 320 explanation of arrow.Arrow 320 is open to indicate the vertical view in Figure 15 A It can't see complete access bypass spacing in figure.
Signal wire is (for example, (displaying of signal wire 518 of signal wire 514 (displaying is in figure 6), wiring layer M2 of wiring layer M3 Coupled in the figure 7) etc.) with associated bus (that is, power path), and the number of signal wire couple with individual bus can with lead to It is related that hole bypasses spacing.
As current densities increase, the demand to shielding line may increase (for example, along the increased voltage of shielding line and/ Or along the increased electric current of shielding line).In addition, the increase of signal line densities may lead to the resistance along signal wire and associated bus Increase.Therefore, it would be desirable to develop new framework, reduce the shielding that the shielding line of a wiring layer is coupled to another wiring layer The distance between interconnection of line, and reduce the resistance along signal wire and associated bus.
In some embodiments, one or more are provided in shielding line/signaling line circuit of wiring layer (for example, M2 and M3) Redundancy (virtual) channel, so as to reduce through-hole bypass spacing.In these embodiments, by signal wire/shielding line electricity One or more redundancy (virtual) channels are provided in road, bus can be considered being arranged between subgroup.For example, the quantity of bus can It is expressed as " n ", and bus can be arranged to " m " a subgroup;Each wherein in " m " a subgroup has " k " a signal Line.In some embodiments, compared with wherein bus is not merged into the framework in subgroup, the through-hole on shielding line bypasses spacing Can be 1/m.
As indicated above, term " virtual " can be used for describing redundant channel, this term indicates redundant channel and includes screen Cover/other channels of signal wire are different.In some cases, label is " virtual " does not have for identifying other than being used as spacer The structure (that is, being not used as wiring or the component of integrated circuit) of other functions.In the present circumstance, situation is usually really not so. On the contrary, " virtual " structure may include circuit (for example, shielding line), and label " virtual " may be used to indicate the structure in wiring layer (for example, shielding line) is with different configurations and/or uses other similar structures on the wiring layer with more conventional configuration.
Virtually (that is, redundancy) structure can be configured as " channel ", or can correspond to other suitable structures and region.
Example calculation instruction single group (that is, only one subgroup) relative to the configuration with 288 signal lines causes 40.95 ohm of worst resistance value, two subgroups cause worst resistance value to be 21.85 ohm, and eight subgroups cause worst Resistance value is 12.23 ohm, and 16 subgroups cause worst resistance value to be 6.73 ohm.Therefore, the signal between subgroup The arrangement of line can lead to substantial improvements (specifically, the reduction of resistance).Calculated resistance value is provided to help reader to understand The present invention, and it is not used in limitation following claims;Unless be expressly recited in the claims these values degree (if there is If).
Sub-assembly 10 of Figure 16 A and the 16B displaying similar to the sub-assembly 510 of Figure 15 A and 15B.This sub-assembly may include one Wiring layer M1, M2 and the M3 (being similar to those of Fig. 5) of a stacking on top of the other.Figure 16 A displaying top wiring layers M3's The vertical view (vertical view for being similar to Figure 15 A) that line is heavily compressed, and Figure 16 B show top wiring layer with cross-sectional side view The extended area of M3.The wiring layer M3 of Figure 16 B includes shielding line 12 and signal wire 14, shielding line 512 similar to Figure 15 B and Signal wire 514.In addition, the wiring layer M3 of Figure 16 A and 16B include redundancy (virtual) channel 15, by the shielding line of wiring layer M3/ Signal wire is separated into subgroup 16a and 16b.
Join domain 18a is associated with subgroup 16a, and join domain 18b is associated with subgroup 16b;And these connect Region 18a/18b is met to be schematically illustrated with the line of the vertical view across Figure 16 A.Join domain 18a/18b is similar to the company of Figure 15 A Connect region 372.However, join domain 18a/18b reduces relative to 372 spacing of join domain of Figure 15 A, this is reduced by through-hole Road spacing.Specifically, arrow 21 is provided in Figure 16 A bypass spacing to schematically illustrate through-hole.With the sub-assembly 510 of Figure 15 A Through-hole bypass spacing 320 compare, this through-hole bypass spacing 21 is substantially reduced (and can reduce about one in some embodiments Half).Compared with the sub-assembly 510 of Figure 15 A, the reduction of through-hole bypass spacing is significantly reduced the sub-assembly 10 along Figure 16 A The resistance of signal wire and associated bus.
The alternative view of Figure 17 and the sub-assembly 10 of 18 definition graphs 16;Wherein the view of Figure 18 is the extended area of Figure 17.
The displayings of Figure 17 and 18 are covered in the wiring layer M3 on wiring layer M2;And displaying is analogous respectively to above with reference to Fig. 5 institutes The interconnection 546 of description and 570 interconnection 20 and 22.Specifically, the shielding line of 20 vertical connection wiring layer M2 of interconnection and wiring Layer M3 shielding line, and interconnect 22 vertically the shielding line of the shielding line of connecting wiring layer M2 and wiring layer M1 (in Figure 17 and 18 In do not show).Interconnection 20 and 22 is respectively indicated as square feature and circular feature so that interconnection 20 can easily with say Interconnection 22 in bright distinguishes, but in other applications, and interconnection 20 and 22 can have other shapes;And can be mutually the same shape Shape, or different shape relative to each other.
Wiring layer M2 and M3 are shown with dash line view and solid line view so that it can be in Figure 17 and 18 each other respectively It distinguishes.
Figure 18 displayings across providing a pair of of line (line 1 and line 2) on sub-assembly 10, wherein M2 at the position of each line and Described in table of the state (configuration) of material in M3 wiring layers below the figure of sub-assembly 10.Signal wire is expressed as " Sig ", and Shielding line is expressed as " Vss ".Selection term Vss be because shielding line and the Vss of wiring layer M3, M2 and M1 electrically connect as it is common (it should be understood that voltage Vss can be any suitable voltage, and can be ground connection or negative supply voltage in some embodiments).One In a little embodiments, shielding line can be coupled with the voltage in addition to Vss.
The table displaying redundant channel 15 of Figure 18 is different from the other positions of wiring layer M2/M3 along the position of line 1.It is specific next Say, the space below the signal wire of redundant channel 15 including wiring layer M3, and include wiring layer M2 shielding line above space. On the contrary, redundant channel 15 has configuration identical with the other positions of wiring layer M2/M3 at online 2 position, and simply Include the Vss lines of the M3 on the signal wire of M2, and the M3 above the Vss of M2 signal wire.Although term " space " is used In description along the position of line 1, it should be appreciated that the position for being designated as " space " may include insulating materials (for example, silicon nitride, two Silica etc.).
Figure 19 by sub-assembly 510 (being described above with reference to Figure 15 A) and the exemplary set components 10 of other embodiments, 10a and 10b is compared.Sub-assembly 10 is similar to above with reference to sub-assembly described in Figure 16 A.Sub-assembly 10a and 10b are incorporated to additionally Redundant channel 15 to form additional subgroup whereby.Specifically, sub-assembly 10 has two subgroups 16a and 16b;Sub-assembly 10a has four subgroups 16a, 16b, 16c and 16d;Sub-assembly 10b have eight subgroup 16a, 16b, 16c, 16d, 16e, 16f, 16g and 16h.Example resistance in subgroup on signal wire and associated bus is estimated to be about for sub-assembly 300 40.95 ohm;It it is 21.85 ohm for sub-assembly 10;It it is 12.23 ohm for sub-assembly 10a;And it is for sub-assembly 10b 6.73 ohm.Therefore, the subgroup that signal wire is arranged in sub-assembly 10,10a and 10b can be led into substantial improvement (tool For body, reduce the resistance of crossover signal line and associated bus).
The vertical view for a pair of of exemplary set the component 10c and 10d that Figure 20 displayings can use in some embodiments.Sub-assembly There is 10c join domain 18a and 18b, the join domain to be mirrored into relative to the first plane 5 across the centre of sub-assembly, And also relative to across the centre of sub-assembly and being orthogonal to the second plane 7 of the first plane 5 and be mirrored into.Join domain 18b is through exhibition It is shown as that there is the line thicker than join domain 18a so that join domain 18a and 18b can be distinguished from each other.Region A is in sub-assembly 10c In be identified, and this region is discussed in more detail below with reference to Figure 21 to 27.
Sub-assembly 10d has join domain 18a and 18b, is mirrored into relative to the plane 5 across the centre of sub-assembly. Region B and B'It is identified in sub-assembly 10d, and these regions are discussed in more detail below with regard to Figure 28 to 36.
Figure 21 to 24 illustrates sub-assembly 10c, and shows wiring layer M1, M2 and M3.Figure 21 is the wiring that displaying is stacked on one another The exploded view of layer;And Figure 22 to 24 individually shows each in individual wiring layer M1, M2 and M3.
With reference to figure 22, wiring layer M1 includes and 32 alternate signal wire 30 of shielding line.Signal wire and shielding line pass through insulation Material 34 is separated from each other.Shielding line 32 is shown as being supplied with (that is, coupling) identified fixed voltage for Vss, but for There should be any suitable voltage.
Signal wire 30 and shielding line 32 may include any suitable electrically conductive composition, for example, various metals (for example, titanium, Tungsten, cobalt, nickel, platinum etc.), contain metal composites (for example, metal silicide, metal nitride, metal carbides etc.) and/or conduction One or more in the semi-conducting material (for example, germanium etc. of the silicon of conductiving doping, conductiving doping) of doping.Signal wire 30 and shielding The conductive material of line 32 can be homogeneous, or may include two kinds or be more than two kinds of discrete compositions.The conductive material of shielding line 32 Can be identical as the conductive material of signal wire 30, or can be different from the conductive material of signal wire.
Insulating materials 34 may include any suitable compositionss, and may include in some embodiments substantially by silica And one or both of silicon nitride composition, or be made of one or both of silica and silicon nitride.Insulating materials 34 It can be homogeneous, or may include two or more two discrete compositions.
Interconnection 22 (only label is some of) is shown along shielding line 32, and wherein these interconnection 22 are used for vertical connection cloth The shielding line 32 of line layer M1 and the shielding line 42 of wiring layer M2 (as shown in Figure 23).
With reference to figure 23, wiring layer M2 includes and 42 alternate signal wire 40 of shielding line.Signal wire and shielding line pass through insulation Material 34 is separated from each other.Shielding line 42 is shown as coupling the identified fixed voltage for Vss, but can couple any suitable Voltage.
Signal wire 40 and shielding line 42 may include any suitable electrically conductive composition, for example, various metals (for example, titanium, Tungsten, cobalt, nickel, platinum etc.), contain metal composites (for example, metal silicide, metal nitride, metal carbides etc.) and/or conduction One or more in the semi-conducting material (for example, germanium etc. of the silicon of conductiving doping, conductiving doping) of doping.Signal wire 40 and shielding The conductive material of line 42 can be homogeneous, or may include two or more two discrete compositions.The conductive material of shielding line 42 Can be identical as the conductive material of signal wire 40, or can be different from the conductive material of signal wire.In addition, the line 40/42 of layer M2 can be Or can be different from one or two in the line 30/32 of layer M1 with one or two identical compositions in the line 30/32 of layer M1 Composition.
Interconnection 22 (only label is some of) is shown along shielding line 42, and wherein these interconnection 22 are used for vertical connection cloth The shielding line 42 of line layer M2 and the shielding line 32 of wiring layer M1 (as shown in Figure 22).Interconnection 20 (only label is some of) warp Displaying is along shielding line 42, wherein these shieldings of interconnection 20 for the shielding line 42 and wiring layer M3 of vertical connection wiring layer M2 Line 12 (as shown in Figure 24).Interconnect 20 it is shown at pairing arrangement (that is, two interconnection 20 be located at wiring layer M2 shielding lines In 42 each position being connect with the shielding line 12 of wiring layer M3).In other embodiments, only individually interconnection 20 can be located at these At least some of position;And in some embodiments, more than two interconnection 20 can be located at least some of these positions.
With reference to figure 24, wiring layer M3 includes and 12 alternate signal wire 14 of shielding line.Signal wire and shielding line pass through insulation Material 34 is separated from each other.Shielding line 12 is shown as coupling the identified fixed voltage for Vss, but can couple any suitable Voltage.
Signal wire 14 and shielding line 12 may include any suitable electrically conductive composition, for example, various metals (for example, titanium, Tungsten, cobalt, nickel, platinum etc.), contain metal composites (for example, metal silicide, metal nitride, metal carbides etc.) and/or conduction One or more in the semi-conducting material (for example, germanium etc. of the silicon of conductiving doping, conductiving doping) of doping.Signal wire 14 and shielding The conductive material of line 12 can be homogeneous, or may include two or more two discrete compositions.The conductive material of shielding line 12 Can be identical as the conductive material of signal wire 14, or can be different from the conductive material of signal wire.In addition, the line 12/14 of wiring layer M3 Can be with one or more identical compositions in the line 30/32 and 40/42 of wiring layer M1 and M2, or can be with wiring layer M1 and One or more different compositions in the line 30/32 of M2 and 40/42.
Interconnection 20 (only label is some of) is shown as along shielding line 12, wherein interconnecting 20 by wiring layer using these The shielding line 12 of M3 and 42 vertical connection of shielding line of wiring layer M2 (as shown in Figure 23).Overlay area 18a and 18b is scheming It is schematically indicated in 23 and 24, and this corresponds to interconnection 20 by the shielding line 42 of the shielding line 12 of wiring layer M3 and wiring layer M2 Region connected vertically.
Wiring layer M2 and M3 about Figure 23 and 24 schematically illustrate region A, and this region includes redundancy (virtual) area Domain (for example, channel).One in the shielding line 42 of Figure 23 is identified with label 42a to distinguish this shielding line and other shielding lines It opens, and the redundant area of wiring layer M2 includes the widening structure 45 along shielding line 42a.A use in the shielding line 12 of Figure 24 Mark 12a marks to distinguish this shielding line and other shielding lines, and the redundant area of wiring layer M3 includes along shielding line The widening structure 17 of 12a.
In some embodiments, the wiring layer M2 and M3 of Figure 23 and 24 can be known respectively as lower-layer wiring layer and upper-layer wirings Layer;And it can be believed to comprise the first shown wiring tracks, the second wiring tracks, third wiring tracks and the 4th wiring tracks (label is track, the second track, third track and the 4th track in Figure 23 and 24).The first cloth of upper wiring layer M3 Trajectory, the second wiring tracks, third wiring tracks and the 4th wiring tracks directly cover the first wiring of lower part wiring layer M2 Track, the second wiring tracks, third wiring tracks and the 4th wiring tracks, and in redundant area (that is, redundant channel).
First wiring tracks, the second wiring tracks, third wiring tracks and the 4th wiring tracks along x-axis in a first direction It is upper to extend (part that wherein x-axis is shown as the adjacent sub-assembly 10c along Figure 23 and 24), and extend parallel to each other (or At least substantially parallel to each other, wherein term " substantially parallel " means parallel in the reasonable tolerance for making and measuring).First Wiring tracks press from both sides the second wiring tracks in-between with third wiring tracks;And second wiring tracks and the 4th wiring tracks will Third wiring tracks press from both sides in-between.
In some embodiments, it is believed that lower-layer wiring layer M2 includes the first wiring corresponding with the wiring of shielding line 42a. First wiring can be considered to have the first part 50 extended along the second wiring tracks, extend along the first wiring tracks the Two parts 52, and the Part III 54 along the extension of third wiring tracks.First part 50 can be believed to comprise the first side 51 And the second side 53 opposite with the first side.Second part 52 can be considered from first part 50 by the first offset area 56 Side 51 deviates, and Part III 54 can be considered deviating from the second side 53 by the second offset area 58.Implement showing In example, first part 50, second part 52 and Part III 54 extend along the x-axis direction.Second part 52 along y-axis by prolonging The protrusion 55 and 57 stretched is deviated from the second wiring tracks.Part III 54 passes through the protrusion 59 and 61 from second that extends along y-axis Wiring tracks deviate.First part 50, second part 52 and Part III 54 can be considered in (direction of x-axis) along a first direction Extend;And protrusion 55,57,59 and 61 can be considered extending along second direction (direction of y-axis).In shown embodiment, Second direction is orthogonal with first direction.In other embodiments, first and second direction can intersect each other without orthogonal.
It is believed that upper-layer wirings layer M3 includes the second wiring (that is, wiring of shielding line 12a).Second wiring 12a passes through mutual Even 20a and 20b be connected to the first wiring 42a (wherein interconnect 20a and 20b and other interconnection be 20 identical, but be labeled as 20a and 20b so that it can be separately labeled with other interconnection).In some embodiments, the second wiring 12a can be believed to comprise along the The Part IV 60 that three wiring tracks extend, and include the Part V 62 extended along the second wiring tracks.First wiring 42a The Part III 54 of (Figure 23) is electrically coupled to the Part IV 60 of the second wiring 12a (Figure 24), the first wiring by interconnecting 20a The first part 50 of 42a (Figure 23) is electrically coupled by interconnecting the Part V 62 of 20b and the second wiring 12a (Figure 24).Figure 26 exhibitions The covering of the extended area of diagram 23 and 24;And show the overlapping and first part 50 of Part III 54 and Part IV 60 It is overlapping with Part V 62.
Figure 25 shows the cross section of the line 25-25 along Figure 23 and 24, and displaying extends through the interconnection of insulating materials 34 20a/20b is the shielding line 12a of upper-layer wirings layer M3 and the shielding line 42a of lower-layer wiring layer M2 to be electrically coupled.Although illustrated Embodiment shows two contact plugs corresponding to interconnection 20a/20b, but in other embodiments, can be slotting there is only individually contacting Head, and in other embodiments, more than two contact plug may be present.
In some embodiments, the first wiring 42a of lower-layer wiring layer M2 can be believed to comprise as described above first Part 50, second part 52 and Part III 54;And be further contemplated that include corresponding to protrusion 57 Part IV (wherein this Part IV couples first part 50 with second part 52), and (wherein this Part V will corresponding to protrusion 59 for Part V First part 50 couples with Part III 54).In these embodiments, the second wiring 12a of upper-layer wirings layer M3 can be considered Include the part 60 as the Part VI extended along third wiring tracks, and as extending along the second wiring tracks The part 62 of Part VII.Second wiring 12a further includes the Part VIII 64 extended along the 4th wiring tracks, prolongs along y-axis The Part IX 66 stretched and couple Part VI 60 with Part VII 62, and along y-axis extend and by Part VI 60 with The Part X 68 that Part VIII 64 couples.The contact plug 20a of Figure 23 and 24 can be considered penetrating corresponding to insulating materials 34 Insulating layer, and by first wiring 42a Part III 54 with second connect up 12a Part VI 60 couple;And similarly, it connects Touching plug 20b can be considered penetrating insulating layer corresponding to insulating materials 34 and by the first part 50 of the first wiring 42a and the The Part VII 62 of two wiring 12a couples.
In some embodiments, it is believed that lower-layer wiring layer M2 further comprises connecting up what 42a disconnections were electrically connected with first Third connects up 40a (that is, one in signal wire);It has along the tenth part 70 of third wiring tracks, along the 4th 12nd part 72 of wiring tracks, and extend along y-axis and couple the tenth part 70 with the 12nd part 72 the Ten three parts 71.
In some embodiments, upper-layer wirings layer M3 can be considered further comprising being electrically connected with the first wiring 12a disconnections The 4th wiring 14a (that is, one in signal wire);It has the 14th part 80 along the second wiring tracks, along the 15th part 82 of one wiring tracks, and coupled with the 15th part 82 along y-axis extension and by the 14th part 80 16th part 83.
In some embodiments, the shielding line 12a of upper-layer wirings layer M3 can be referred to as the first shielding line, and another shielding Line 12b can be referred to as secondary shielding line.Secondary shielding line 12b have along the first wiring tracks extend and with lower-layer wiring layer The vertically superposed part 90 of the second part 52 of the shielding line 42a of M2.The part 90 of shielding line 12b is by labeled as the mutual of 20c Even (be illustrated in Figure 23 and 24, and also show that in fig. 26) couples with the part 52 of shielding line 42a.
In some embodiments, the first part 50 of the shielding line 42a in wiring layer M2, second part 52 and Part III The protrusion 55,57,59 and 61 of 54 and shielding line 42a can be believed to comprise 45 (such as Figure 23 of widening structure along shielding line 42a It is middle to be shown).Figure 27 A to C illustrate some example embodiments of this widening structure 45.The widening structure of Figure 27 A display diagrams 23 45.This with protrusion 59 (it is can be referred in some embodiments as the Part IV of shielding line 42a), the protrusion with it is prominent It plays the identical side of 55 (it is can be referred in some embodiments as Part V) to upwardly extend, but completely not relative to protrusion 55 It is aligned (that is, along x-axis displacement).Also there is protrusion 61, protrusion side identical with protrusion 57 to upwardly extend for this, but relative to Protrusion 57 is misaligned (that is, offset) completely.On the contrary, Figure 27 B show widening structure 45a, the region with protrusion 55 and protrusion 59 regional alignment, and the configuration in the region of protrusion 57 and the regional alignment of protrusion 61.
The embodiment of Figure 27 A and 27B are maintained at the shield of the insulation between the second part 52 of shielding line 42a and Part III 54 Region 102.In some embodiments, each insulating regions 102 can be believed to comprise first gap region 104, correspond to screen The first offset area 101 between the first part 50 of line 42a and the second part 52 of shielding line 42a is covered, and includes the second sky Gap region 106 corresponds to the second offset area 103 between first part 50 and Part III 54.Region 104 and 106 quilts Referred to as " gap " region does not include conductive material with indicating area.It should be understood that these regions may be empty or possible and non-empty 's;And for example, in some embodiments, void area 104 and 106 may include insulating materials, such as silica and silicon nitride One or two of.
Insulating regions 102 in widening structure (45/45a) are optional, and can be replaced with conductive material.For example, Figure 27 C Show widening structure 45b, the conductive material with wherein shielding line 42a fills the first offset area 101 and second and deviates area The configuration (that is, configuration that the first offset area 101 and the second offset area 103 are constructed from a material that be electrically conducting completely) in domain 103.
In some embodiments, the Part VI 60 of the shielding line 12a in wiring layer M3, Part VII 62, Part VIII 64, Part IX 66 and Part X 68 can be believed to comprise the widening structure 17 of Figure 24.Part IX 66 and Part X 68 Including the corresponding portion being aligned along y-axis, and include the part being aligned not along y-axis.In some embodiments, entire 9th Divide 66 can be aligned with entire Part X 68 along y-axis;And in some embodiments, entire Part IX 66 can along y-axis with Entire 68 misalignment of Part X (that is, can be relative to Part X along x-axis displacement).
In the embodiment of Figure 24 shown, the conductive material of shielding line 12a extends completely across widening structure 17. In other embodiments, it may be provided in widening structure 17 similar to the insulating regions in the region 102 of Figure 27 A and 27B.
Figure 28 to 31 illustrates sub-assembly 10d (previously described in fig. 20), and shows wiring layer M1, M2 and M3.Figure 28 is Show the exploded view for the wiring layer being stacked on one another;And Figure 29 to 31 individually show it is each in individual wiring layer M1, M2 and M3 It is a.
With reference to figure 29, wiring layer M1 includes and 32 alternate signal wire 30 of shielding line.Signal wire and shielding line pass through insulation Material 34 is separated from each other.Shielding line 32 is shown as coupling the identified fixed voltage for Vss, but can couple any suitable Voltage.
Interconnection 22 (only label is some of) is shown along shielding line 32, and wherein these interconnection 22 are used for vertical connection cloth The shielding line 32 of line layer M1 and the shielding line 42 of wiring layer M2 (as shown in Figure 30).
With reference to figure 30, wiring layer M2 includes and 42 alternate signal wire 40 of shielding line.Signal wire and shielding line pass through insulation Material 34 is separated from each other.Shielding line 42 is shown as coupling the identified fixed voltage for Vss, but can couple any suitable Voltage.
Interconnection 22 (only label is some of) is shown along shielding line 42, and wherein these interconnection 22 are used for vertical connection cloth The shielding line 42 of line layer M2 and the shielding line 32 of wiring layer M1 (as shown in Figure 29).Interconnection 20 (only label is some of) warp Displaying is along shielding line 42, wherein these shieldings of interconnection 20 for the shielding line 42 and wiring layer M3 of vertical connection wiring layer M2 Line 12 (is shown) as in Fig. 31.Interconnect 20 it is shown at pairing arrangement (that is, two interconnection 20 be located at wiring layer M2 shielding lines In 42 each position being connect with the shielding line 12 of wiring layer M3).In other embodiments, only individually interconnection 20 can be located at these At least some of position;And in some embodiments, more than two interconnection 20 can be located at least some of these positions.
With reference to figure 31, wiring layer M3 includes and 12 alternate signal wire 14 of shielding line.Signal wire and shielding line pass through insulation Material 34 is separated from each other.Shielding line 12 is shown as coupling the identified fixed voltage for Vss, but can couple any suitable Voltage.
Interconnection 20 (only label is some of) is shown along shielding line 12, and wherein these interconnection 20 are used for vertical connection cloth The shielding line 12 of line layer M3 and the shielding line 42 of wiring layer M2 (as shown in Figure 30).Overlay area 18a and 18b in Figure 30 and It is schematically indicated in 31, and this is vertical with the shielding line 42 of wiring layer M2 by the shielding line 12 of wiring layer M3 corresponding to interconnection 20 The region of connection.
Wiring layer M2 and M3 about Figure 30 and 31 schematically illustrate region B and B', and these regions include that redundancy is (empty It is quasi-) region (for example, channel).Specifically, one in the shielding line 42 in Figure 30 is to mark 42a marks to distinguish this shielding Line and other shielding lines.The redundant area of wiring layer M2 includes the widening structure 125 along the shielding line 42a in the B of region, and is wrapped Containing along region B'In shielding line 42a widening structure 127.One in the shielding line 12 of Figure 31 with label 12a marks with This shielding line and other shielding lines are distinguished, and the redundant area of wiring layer M3 is separately included along region B and B'In shielding line The widening structure 131 and 133 of 12a.
In some embodiments, the wiring layer M2 and M3 of Figure 30 and 31 can be known respectively as lower-layer wiring layer and upper-layer wirings Layer;And it can be believed to comprise the first shown wiring tracks, the second wiring tracks, third wiring tracks and the 4th wiring tracks (in Figure 30 and 31 label be and the 4th track).The first wiring tracks of upper wiring layer M3, second Wiring tracks, third wiring tracks and the 4th wiring tracks directly cover the first wiring tracks of lower part wiring layer M2, the second cloth Trajectory, third wiring tracks and the 4th wiring tracks.
First wiring tracks, the second wiring tracks, third wiring tracks and the 4th wiring tracks along x-axis in a first direction Upper extension, and extend parallel to each other (or at least substantially parallel to each other).First wiring tracks and third wiring tracks are by the Two wiring tracks press from both sides in-between;And second wiring tracks and the 4th wiring tracks third wiring tracks are pressed from both sides in-between.
In some embodiments, it is believed that lower-layer wiring layer M2 includes the first wiring corresponding with the wiring of shielding line 42a. First wiring can be considered to have with those similar parts 50,52 described in the embodiment above for Figure 21 to 24 and 54.Specifically, the first wiring 42a has first part 50 (and leap the region B and B&apos extended along the second wiring tracks;Two Person extends), second part 52 is along the first wiring tracks (and in region B'It is interior) extend, and Part III 54 is connected up along third Track extends (and in the B of region).First part 50 can be believed to comprise the first side 51 and the second side 53 opposite with the first side. Second part 52 can be considered deviating from the first side 51 of first part 50 by the first offset area 56, and Part III 54 can It is considered deviating from the second side 53 by the second offset area 58.In shown embodiment, first part 50, second part 52 And Part III 54 extends along the x-axis direction.Second part 52 connects up rail by the protrusion 55 and 57 extended along y-axis from second Road deviates.Part III 54 is deviated by the protrusion 59 and 61 extended along y-axis from the second wiring tracks.
Upper-layer wirings layer M3 can be believed to comprise the second wiring of the wiring corresponding to shielding line 12a.Second wiring 12a connects It is connected to the first wiring 42a, and can be considered to have similar to Part IV described in the embodiment above for Figure 21 to 24 60.Part IV 60 extends along third wiring tracks, and be electrically coupled to the first wiring 42a (Figure 18) by interconnecting 20a the Three parts 54.
Figure 32 A show the cross section of the line 32A-32A along Figure 30 and 31, and displaying extends through the mutual of insulating materials 34 Even 20a is the shielding line 12a of upper-layer wirings layer M3 and the shielding line 42a of lower-layer wiring layer M2 to be electrically coupled.
Upper-layer wirings layer M3 (Figure 31) includes third wiring 12b, and the third wiring has the reality similar to Figure 21 to 24 Apply the Part V 62 of the part 62 of example.The Part V 62 that third connects up 12b extends along the first wiring tracks, and by mutual Even the second part 52 of 20b and lower-layer wiring layer M2 (Figure 30) are electrically coupled.It is illustrated in Figure 32 B along the cross section of line 32B-32B In, and the coupling that this displaying Part V 62 and second part 52 pass through interconnection 20b.
In some embodiments, the first wiring 42a of lower-layer wiring layer M2 can be believed to comprise first part 50, second Divide 52 and Part III 54.Upper-layer wirings layer M3 can be believed to comprise wiring 12b as the second wiring, and include as third cloth The wiring 12a of line.Second wiring 12b includes Part IV 62 along the first wiring tracks, and third wiring 12a include along The Part V 60 that third wiring tracks extend.At least one contact plug 20b penetrates insulation material layer 34, by the first wiring The second part 52 of 42a is connect with the Part IV 62 of the second wiring 12b;And at least one contact plug 20a penetrates insulation material The bed of material 34, the Part V 60 that the Part III 54 of the first wiring 42a is connected up to 12a with third are connect.Implement showing In example, third connects up 12a, and there is Part VI 64, the Part VI to extend along the second wiring tracks, and by interconnecting 20c It is electrically coupled with the first part 50 of lower-layer wiring 42a (Figure 30).It is illustrated in Figure 32 C along the cross section of line 32C-32C, and this Show the coupling of Part VI 64 and first part 50 by interconnection 20c.
In some embodiments, the third wiring 12a of upper-layer wirings layer M3 can be considered further comprising along the 4th cloth The Part VII 66 that trajectory extends.5th and Part VI (60 and 64) be offset from one another by the first offset area 200, and Five and Part VII (60 and 66) be offset from one another by the second offset area 202.First offset area 200 and the second offset area 202 may include void area, be shown as in Fig. 31.Alternatively, first and second offset area 200 and 202 shielding line can be used The conductive material filling (that is, can include this conductive material completely) of 12a, as Figure 33 and 34 is shown.In some embodiments, scheme It 31 region 64 and 66 can be respectively referred to as District 7 domain and Section Eight domain;It is respectively along the second wiring tracks and the 4th cloth Trajectory extends.
In some embodiments, the first wiring 42a of lower-layer wiring layer M2 can be considered further comprising extending along y-axis To extend by first part 50 and second part 52 Part IX coupled to each other (corresponding to protrusion 55 or 57), and along y-axis With the Part X (corresponding to protrusion 59 or 61) that first part 50 and Part III 54 are connected to each other.
In some embodiments, first and second part (50 and 52) of the first wiring 42a can be considered inclined by third It moves region 204 to be offset from one another, and first and the Part III (50 and 44) of the first wiring 42a can be considered being offset from one another the 4th partially Move region 206.Third offset area 204 and the 4th offset area 206 may include void area, as shown in Figure 30.It substitutes Ground, third offset area 204 and the 4th offset area 206 can be filled with the conductive material of shielding line 42a (that is, can include completely This conductive material), as Figure 35 and 36 is shown.
Sub-assembly discussed herein above can be used in electronic system.These electronic systems can be used in such as memory module, In device driver, power module, communication modem, processor module and special module, and it may include multilayer, multi-chip Module.Electronic system can be any one of broad range of system, for example, camera, wireless device, display, chipset, Set-top box, game, illumination, vehicle, clock, TV, mobile phone, personal computer, automobile, industrial control system, aircraft etc..
The specific direction of various embodiments in attached drawing is for illustration purposes only, and in some applications, and embodiment can phase Shown direction is rotated.Description provided herein and following claims, which are related to having between various features, is retouched Any structure for the relationship stated, no matter structure is rotated on the specific direction of figure, or relative to this direction.
In order to simplify schema, unless otherwise directed, otherwise the appended cross-sectional view illustrated is only shown in the plane of cross section Feature, and do not show the subsequent material of the plane of cross section.
When structure is called above in another structure "upper" or " opposite ", can directly in a further structurally, or Also intermediate structure may be present.On the contrary, when structure is called " directly existing " or " facedown " another structure, there is no centres Structure.When structure is called " connection " or when " coupled " to another structure, may be coupled directly to or be coupled to other structures, Or intermediate structure may be present.On the contrary, " when being directly connected " or " directly coupled " to another structure, being not present when structure is called Intermediate structure.
Some embodiments include the sub-assembly (for example, 510) with the first wiring layer (for example, M3), wherein with alternating Multiple first shielding lines (for example, 512) of arrangement and the first signal wire (for example, 514).First shielding line and the first signal wire tool Have first segment (for example, 520,526) that (for example, direction of axis 503) along a first direction extend, extend along a first direction and From the second segment (for example, 522,528) of first segment lateral shift, and the first chained segment that first and second section is connected to each other (for example, 524,530).Sub-assembly is included in the second wiring layer (for example, M2) below the first wiring layer, and has and be alternately arranged Multiple secondary shielding lines (for example, 516) and second signal line (for example, 518).Secondary shielding line and second signal line have edge It the third section (for example, 532,538) of first direction extension, extend along a first direction and from the 4th of third section lateral shift the Section (for example, 534,540), and the second chained segment (for example, 536,542) that third and the 4th section are interconnected.Secondary shielding line The 4th section of first segment for extending to the first shielding line below, and the first shielding line is electrically coupled to by perpendicular interconnection (546) First segment.
Some embodiments include to have to include multiple first shielding lines (for example, 512) being alternately arranged and the first signal wire The sub-assembly (for example, 510) of first wiring layer (for example, M3) of (for example, 514).Sub-assembly has below the first wiring layer The second wiring layer (for example, M2), and it includes the multiple secondary shielding lines (for example, 516) being alternately arranged and second signal lines (for example, 518).One in first shielding line has the first part extended on (for example, direction of axis 503) in a first direction (for example, 548), the second part (for example, 550) extended in second direction (for example, direction of axis 505) and in a first direction The Part III (for example, 552) of upper extension.Second part keeps first part interconnected amongst one another with Part III.In first signal wire One close to one in first shielding line.One in first signal wire has the four, the 5th And Part VI (for example, 554,556,558), respectively in first shielding line one third, second and First part is substantially parallel.One in secondary shielding line includes the 7th and Part VIII (for example, 560,562), difference It is substantially perpendicularly aligned under the Part III of the first shielding line and the Part IV of the first signal wire and with it.It is vertical mutual Even one Part III in first shielding is electrically connected to the institute in the secondary shielding line by (for example, 546) State one Part VII.
Some embodiments include to have multiple first shielding lines (for example, 512) and the first signal wire including being alternately arranged The sub-assembly (for example, 510) of first wiring layer (for example, M3) of (for example, 514).Sub-assembly has below the first wiring layer The second wiring layer (for example, M2), and it includes the multiple secondary shielding lines (for example, 516) being alternately arranged and second signal lines (for example, 518).Reticular structure (for example, 578) includes the first shielding line being electrically coupled with secondary shielding line.The of reticular structure Each in one shielding line extends mainly along first direction (for example, direction of axis 503), and along laterally relative to each other Two first paths (for example, 580,582) of offset extend.Each in the secondary shielding line of reticular structure is mainly along One direction extends, and extends along two the second paths deviated laterally relative to each other (for example, 590,592).Reticular structure The first shielding line mainly from the secondary shielding line lateral shift of reticular structure, in addition to each first in the first shielding line Each in path is with overlapping region (for example, 544), wherein the vertically superposed secondary shielding line in the part of the first shielding line Part.Perpendicular interconnection (for example, 546) is connect in the overlapping region, by the first shielding line with secondary shielding line.Individual One in the first path of one shielding line has overlapping region, and the overlapping region is in the first via with individual first shielding lines Above another different secondary shielding line in diameter.
Some embodiments be included in substrate above have the first wiring tracks, the second wiring tracks, third wiring tracks and The sub-assembly of 4th wiring tracks.First wiring tracks, the second wiring tracks, third wiring tracks and the 4th wiring tracks are One side upwardly extends.First wiring tracks press from both sides the second wiring tracks in-between with third wiring tracks;And second connects up rail Road and the 4th wiring tracks press from both sides third wiring tracks in-between.Lower-layer wiring layer includes the first wiring, and the first wiring has The first part extended along the second wiring tracks, the second part extended along the first wiring tracks, and along third cloth The Part III that trajectory extends.Second part deviates the first offset area, and Part III along the first side of first part The second offset area is deviated along the second side of first part.First side is opposite with the second side.Upper-layer wirings layer includes the second cloth Line, second wiring are electrically connected to the first wiring and with the Part IV extended along third wiring tracks.First wiring Part III and second wiring Part IV be electrically coupled.
Some embodiments be included in substrate above have the first wiring tracks, the second wiring tracks, third wiring tracks and The sub-assembly of 4th wiring tracks.First wiring tracks, the second wiring tracks, third wiring tracks and the 4th wiring tracks are One side upwardly extends and is substantially parallel to each other.Second wiring tracks are clipped in its it by the first wiring tracks and third wiring tracks Between;And second wiring tracks and the 4th wiring tracks third wiring tracks are pressed from both sides in-between.Lower-layer wiring layer includes the first cloth Line.First wiring includes the first part extended along the second wiring tracks, is extended along the first wiring tracks second part, It is upwardly extended along the Part III of third wiring tracks extension, with the second party that first direction intersects to couple first part And the Part IV of second part, and extend in a second direction to connect the Part V of first part and Part III.On Layer wiring layer includes the second wiring for being electrically connected to the first wiring.Second wiring includes the 6 extended along third wiring tracks Partly, along the Part VII of the second wiring tracks extension, the Part VIII extended along the 4th wiring tracks, in second direction Upper extension is to couple the Part IX of Part VI and Part VII, and extends in a second direction to couple the Part VI And the Part X of Part VIII.
Some embodiments be included in substrate above have the first wiring tracks, the second wiring tracks, third wiring tracks and The sub-assembly of 4th wiring tracks.First wiring tracks, the second wiring tracks, third wiring tracks and the 4th wiring tracks are One side upwardly extends and is substantially parallel to each other.Second wiring tracks are clipped in its it by the first wiring tracks and third wiring tracks Between;And second wiring tracks and the 4th wiring tracks third wiring tracks are pressed from both sides in-between.Lower-layer wiring layer includes the first cloth Line.First wiring includes the first part extended along the second wiring tracks, the second part extended along the first wiring tracks, And the Part III extended along third wiring tracks.Upper-layer wirings layer includes second and third for being electrically connected to the first wiring Wiring.Second wiring includes the Part IV extended along the first wiring tracks, and third wiring includes connecting up rail along third The Part V that road extends.Insulating layer is between lower-layer wiring layer and upper-layer wirings layer.At least one contact plug penetrates absolutely Edge layer is to couple the second part of the first wiring and the Part IV of the second wiring.At least one contact plug penetrate insulating layer with The Part III of the first wiring of coupling and the Part V of third wiring.

Claims (22)

1. a kind of sub-assembly comprising:
First wiring layer comprising multiple first shielding lines being alternately arranged and the first signal wire;First shielding line and institute Each stated in the first signal wire has the first segment extended along a first direction, extends along the first direction and from institute The second segment of first segment lateral shift is stated, and makes the first segment and the second segment the first chained segment interconnected amongst one another;
Second wiring layer under first wiring layer and includes the multiple secondary shielding lines being alternately arranged and second signal Line;Each in the secondary shielding line and the second signal line have the third section extended along the first direction, Extend along the first direction and from the 4th section of the third section lateral shift, and makes the third section and 4th section described Second chained segment interconnected amongst one another;And
Below the first segment that described 4th section of the secondary shielding line extends to the first shielding line, and pass through perpendicular interconnection It is electrically coupled to the first segment of first shielding line.
2. sub-assembly according to claim 1, wherein first chained segment is substantially normal to the first segment and institute State second segment extension.
3. sub-assembly according to claim 2, wherein first chained segment extends along second direction, and wherein second Chained segment extends also along the second direction.
4. sub-assembly according to claim 1, wherein:
Individual first shielding lines have individual first shielding line first segments and individual first shielding line second segments;
Individual first signal wires close to individual first shielding lines have individual first signal wire first segments and individual first Signal wire second segment;
First chained segment includes to keep individual first shielding line first segments and individual first shielding line second segments mutual Individual first shielding line chained segments even, and include to make individual first signal wire first segments and individual first signal wires Individual first signal wire chained segments of second segment interconnection;
Individual first shielding line chained segments are along the first direction from the individual first signal wires link field offsets the One distance;
Individual secondary shielding lines have individual secondary shielding line thirds below the region of individual first signal wire first segments Section, and there is below the region of the first shielding line first segment and extend to the area of individual first signal wire second segments The 4th section of individual secondary shielding lines below domain, and in individual secondary shielding line third sections and individual secondary shielding lines There are individual second chained segments between 4th section;
The 4th section of individual secondary shielding lines are electrically coupled to individual first shieldings by the individual in the perpendicular interconnection Line first segment;
Individual second chained segments link field offset second distance along the first direction from individual first signal wires; And
The second distance is more than first distance.
5. sub-assembly according to claim 4, wherein the second distance is at least twice of first distance.
6. sub-assembly according to claim 1, wherein:
First shielding line is all electrically connected with Vss;And
The secondary shielding line is all electrically connected with Vss.
7. sub-assembly according to claim 1, wherein:
First shielding line includes some lines being electrically connected with Vdd and some lines being electrically connected with Vss;And
The secondary shielding line includes some lines being electrically connected with Vdd and some lines being electrically connected with Vss.
8. sub-assembly according to claim 1 wherein the perpendicular interconnection is first group of perpendicular interconnection, and includes:
Third wiring layer under second wiring layer and includes the multiple third shielding lines being alternately arranged and third signal Line;The third shielding line and the third signal wire are substantially normal to the third section and the 4th section of extension;And
The third shielding line is electrically coupled to the third section of the secondary shielding line and described by second group of perpendicular interconnection 4th section.
9. a kind of sub-assembly comprising:
First wiring layer comprising multiple first shielding lines being alternately arranged and the first signal wire;
Second wiring layer below first wiring layer and includes the multiple secondary shielding lines being alternately arranged and second signal Line;
Reticular structure comprising first shielding line being electrically coupled with the secondary shielding line;The reticular structure it is described Each in first shielding line extends mainly along first direction, and along two first via deviated laterally relative to each other Diameter extends;Each in the secondary shielding line of the reticular structure extends mainly along the first direction and along phase Two the second paths being laterally offset from each other are extended;
First shielding line of the reticular structure mainly from the secondary shielding line lateral shift of the reticular structure, removes It hangs down each part with first shielding line in the first path of each in first shielding line Directly it is overlapped the region of the part of the secondary shielding line;Perpendicular interconnection in the overlapping region with by first shielding line with The secondary shielding line connection;And
One in the first path of individual first shielding lines has an overlapping region, and the overlapping region is with described individual first Above another different secondary shielding line in the first path of shielding line.
10. sub-assembly according to claim 9, wherein each in first shielding line includes by described two the The first bridge areas as there that one path is connected to each other.
11. sub-assembly according to claim 10, wherein first bridge areas as there is along being substantially normal to described The second direction in one direction extends.
12. sub-assembly according to claim 10, wherein each in the secondary shielding line includes will be described two The second bridge areas as there that second path is connected to each other.
13. sub-assembly according to claim 12, wherein first bridge region and second bridge region are along basic On be orthogonal to the first direction second direction extend.
14. sub-assembly according to claim 9 comprising under second wiring layer and include multiple third shieldings The third wiring layer of line;The third shielding line extends mainly along the second direction for being substantially normal to the first direction; And the wherein described perpendicular interconnection corresponds to first group of perpendicular interconnection, and the third shielding line passes through second group of perpendicular interconnection thermocouple Close the secondary shielding line.
15. a kind of sub-assembly comprising:
First wiring tracks, the second wiring tracks, third wiring tracks and the 4th wiring tracks, on substrate side, wherein institute State the first wiring tracks, second wiring tracks, the third wiring tracks and the 4th wiring tracks in a first direction It is upper to extend and be substantially parallel to each other, wherein first wiring tracks and the third wiring tracks connect up rail by described second Road presss from both sides in-between, and the third wiring tracks are clipped in it by wherein described second wiring tracks and the 4th wiring tracks Between;
Lower-layer wiring layer comprising the first wiring, wherein first wiring includes extending along second wiring tracks First part, the second part extended along first wiring tracks, the third portion extended along the third wiring tracks Divide, upwardly extended in the second party intersected with the first direction to couple the 4th of the first part and the second part the Part, and extend in this second direction to couple the Part V of the first part and the Part III;And
Upper-layer wirings layer comprising be electrically connected to it is described first wiring second wiring, wherein it is described second wiring include along Part VI that the third wiring tracks extend, the Part VII extended along second wiring tracks, along described the The Part VIII of four wiring tracks extension extends along the second direction to couple the Part VI and the Part VII Part IX, and along the second direction extend to couple the Part X of the Part VI and the Part VIII.
16. sub-assembly according to claim 15 further comprises in the lower-layer wiring layer and the upper-layer wirings Insulating layer between layer, and penetrate what the insulating layer was connected up with the first part and second that couple first wiring At least one contact plug of the Part VII.
17. sub-assembly according to claim 15 further comprises in the lower-layer wiring layer and the upper-layer wirings Insulating layer between layer, and penetrate what the insulating layer was connected up with the Part III and second that couple first wiring At least one contact plug of the Part VI.
18. sub-assembly according to claim 15, wherein the Part IV and the Part V are included in described the Straight corresponding portion is directed on two directions, and the Part IX and the Part X include in this second direction It is directed at straight corresponding portion.
19. sub-assembly according to claim 15, wherein the Part IV is in this second direction with the described 5th Part misalignment, and the Part IX in this second direction with the Part X misalignment.
20. sub-assembly according to claim 15, wherein each confession in first wiring and second wiring There should be fixed voltage.
21. sub-assembly according to claim 15, wherein the lower-layer wiring layer further comprises and first wiring The third wiring of electrical connection is disconnected, wherein third wiring includes the 11st extended along the third wiring tracks The 12nd part divided, extended along the 4th wiring tracks, and extend in this second direction to couple the described tenth Tenth three parts of a part of and described 12nd part.
22. sub-assembly according to claim 15, wherein the upper-layer wirings layer further comprises and second wiring The 4th wiring of electrical connection is disconnected, wherein the 4th wiring includes the 14th extended along second wiring tracks The 15th part divided, extended along first wiring tracks, and extend in this second direction to couple the described tenth 16th part of four parts and the 15th part.
CN201780013788.1A 2016-05-16 2017-03-29 Assembly of shielded wires having an upper wiring layer electrically coupled with shielded wires of a lower wiring layer Active CN108701676B (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US15/155,334 2016-05-16
US15/155,334 US9754872B1 (en) 2016-05-16 2016-05-16 Assemblies having shield lines of an upper wiring level electrically coupled with shield lines of a lower wiring level
US15/456,254 2017-03-10
US15/456,254 US10304771B2 (en) 2017-03-10 2017-03-10 Assemblies having shield lines of an upper wiring layer electrically coupled with shield lines of a lower wiring layer
PCT/US2017/024835 WO2017200639A1 (en) 2016-05-16 2017-03-29 Assemblies having shield lines of an upper wiring level electrically coupled with shield lines of a lower wiring level

Publications (2)

Publication Number Publication Date
CN108701676A true CN108701676A (en) 2018-10-23
CN108701676B CN108701676B (en) 2021-07-23

Family

ID=60325529

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780013788.1A Active CN108701676B (en) 2016-05-16 2017-03-29 Assembly of shielded wires having an upper wiring layer electrically coupled with shielded wires of a lower wiring layer

Country Status (3)

Country Link
KR (1) KR102105785B1 (en)
CN (1) CN108701676B (en)
WO (1) WO2017200639A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110110659A (en) * 2019-05-07 2019-08-09 京东方科技集团股份有限公司 Array substrate and display device
CN111293117A (en) * 2018-12-07 2020-06-16 美光科技公司 Integrated assembly including redundant routing lines, and integrated circuit level having openings extending therethrough

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020092334A2 (en) * 2018-10-29 2020-05-07 Cellink Corporation Flexible hybrid interconnect circuits

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289037A (en) * 1991-05-15 1994-02-22 Siemens Aktiengesellschaft Conductor track configuration for very large-scale integrated circuits
US20020088977A1 (en) * 2001-01-03 2002-07-11 Toru Mori Stacked capacitor and method of forming the same as well as semiconductor device using the same and circuit board using the same
US6510545B1 (en) * 2000-01-19 2003-01-21 Sun Microsystems, Inc. Automated shielding algorithm for dynamic circuits
US20050168618A1 (en) * 2004-02-02 2005-08-04 Canon Kabushiki Kaisha Solid state image pick-up device and image pick-up system
US20080079161A1 (en) * 2006-09-29 2008-04-03 Hynix Semiconductor Inc. Metal layer structure of semiconductor device
US20080083967A1 (en) * 2006-10-05 2008-04-10 Toshifumi Nakatani Capacitor integrated in semiconductor device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4278338B2 (en) * 2002-04-01 2009-06-10 株式会社ルネサステクノロジ Semiconductor memory device
US6734472B2 (en) * 2002-04-25 2004-05-11 Synplicity, Inc. Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device
US7943436B2 (en) * 2002-07-29 2011-05-17 Synopsys, Inc. Integrated circuit devices and methods and apparatuses for designing integrated circuit devices
KR100642643B1 (en) * 2005-03-18 2006-11-10 삼성전자주식회사 Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits
US7348667B2 (en) * 2005-03-22 2008-03-25 International Business Machines Corporation System and method for noise reduction in multi-layer ceramic packages
JP2008112974A (en) * 2006-10-05 2008-05-15 Matsushita Electric Ind Co Ltd Semiconductor capacitive element

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289037A (en) * 1991-05-15 1994-02-22 Siemens Aktiengesellschaft Conductor track configuration for very large-scale integrated circuits
US6510545B1 (en) * 2000-01-19 2003-01-21 Sun Microsystems, Inc. Automated shielding algorithm for dynamic circuits
US20020088977A1 (en) * 2001-01-03 2002-07-11 Toru Mori Stacked capacitor and method of forming the same as well as semiconductor device using the same and circuit board using the same
US20050168618A1 (en) * 2004-02-02 2005-08-04 Canon Kabushiki Kaisha Solid state image pick-up device and image pick-up system
US20080079161A1 (en) * 2006-09-29 2008-04-03 Hynix Semiconductor Inc. Metal layer structure of semiconductor device
US20080083967A1 (en) * 2006-10-05 2008-04-10 Toshifumi Nakatani Capacitor integrated in semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111293117A (en) * 2018-12-07 2020-06-16 美光科技公司 Integrated assembly including redundant routing lines, and integrated circuit level having openings extending therethrough
CN110110659A (en) * 2019-05-07 2019-08-09 京东方科技集团股份有限公司 Array substrate and display device

Also Published As

Publication number Publication date
KR20180101725A (en) 2018-09-13
WO2017200639A1 (en) 2017-11-23
KR102105785B1 (en) 2020-06-29
CN108701676B (en) 2021-07-23

Similar Documents

Publication Publication Date Title
US7872852B2 (en) Conductive structure having capacitor
US7038296B2 (en) Electrical component structure
CN100562993C (en) Semiconductor grain and encapsulating structure
US9570375B2 (en) Semiconductor device having silicon interposer on which semiconductor chip is mounted
CN108701676A (en) The sub-assembly of the shielding line for the upper wiring layer being electrically coupled with the shielding line with lower part wiring layer
CN1951161B (en) Shared via decoupling for area arrays components
CN103715183B (en) Semiconductor devices
JP6730960B2 (en) Wiring board
CN101788875A (en) Capacitive touch control panel device
JPS59172250A (en) Universal array
CN102956634A (en) Integrated circuit chip
CN1203546C (en) High density design for organic chip carrier
CN104681540B (en) The layout of integrated circuit
CN101202267A (en) Method and structure supplying electric connection for IC die
CN107544697A (en) Embedded (in cell) touch-control display panel
CN100499106C (en) Semiconductor device
US10304771B2 (en) Assemblies having shield lines of an upper wiring layer electrically coupled with shield lines of a lower wiring layer
CN100525578C (en) Method for increasing a routing density for a circuit board and such a circuit board
KR20040087876A (en) Techniques for reducing the number of layers in a multilayer signal routing device
JPH077320B2 (en) Wiring board stack configuration Multi-processor computer
US10573592B2 (en) Assemblies having shield lines of an upper wiring level electrically coupled with shield lines of a lower wiring level
JP4791819B2 (en) Standard cell and cell library using it
KR100773097B1 (en) Semiconductor devcie having pads
JP2013258271A (en) Semiconductor device
KR20180069629A (en) Semiconductor device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant