CN108696959B - Driver of light emitting diode - Google Patents

Abstract

The invention discloses a driver of a light emitting diode, which is used for driving a light emitting element and comprises a rectifying circuit, a current driving circuit and a protection circuit. The rectifying circuit comprises a rectifying diode for receiving an alternating current input power supply and converting the alternating current input power supply into a direct current power supply, and the direct current power supply comprises a direct current and a direct current voltage. The current driving circuit comprises a certain current unit, wherein the rectifying circuit, the current driving circuit and the light-emitting element are connected in series, and the current driving circuit is used for limiting the magnitude of direct current to drive the light-emitting element. The protection circuit comprises a protection unit, wherein the protection circuit is connected across the current driving circuit and the light-emitting element, and when the direct-current voltage is greater than a certain value, the direct-current flows to the protection circuit; the rectifier diode, the constant current unit and the protection unit share one substrate.

Description

Driver of light emitting diode

Technical Field

The present invention relates to a driver of a light emitting diode, and more particularly, to a driver of a light emitting diode having a protection unit.

Background

In recent years, light-emitting diodes (light-emitting diodes) have been gradually replacing cathode-ray tubes or tungsten filaments as light sources for backlights or illumination systems because of their good electrical-to-optical conversion efficiency and smaller product volume. However, because of the voltage-current characteristics of the leds (about 3 v, dc drive), the ac input power of the commercial power cannot directly drive the leds, but needs a power converter to convert the ac input power into a proper dc power.

Lighting power usage often occupies a significant portion of the mains power supply. For power converters for lighting, it is therefore necessary, by law, to provide a good power factor (power factor between 0 and 1), in addition to a very low conversion loss. The closer the power factor of an electronic device is to 1, the closer the electronic device is to the resistive load.

Fig. 1 shows a conventional lighting system 10, which includes a bridge rectifier 12, a power factor corrector (power factor corrector)14, an LED driving circuit 16, and an LED 18. The pfc 14 may be a boost (boost) circuit and the LED driver circuit 16 may be a buck converter (buck converter). However, the switching power converter such as the boost circuit or the buck circuit requires not only a bulky and expensive inductance element, but also a large number of electronic components for the whole system architecture. Therefore, the lighting system using the switching power converter has high production cost and is not competitive in the market.

Disclosure of Invention

The embodiment discloses a driver, which is used for driving a light-emitting element and comprises a rectifying circuit and a current driving circuit. The rectifying circuit comprises a rectifying diode electrically connected to an alternating current input power supply and used for generating a direct current power supply and spanning between a direct current power supply line and a grounding line. The current driving circuit comprises a certain current source. The constant current source and the light-emitting element are connected in series between a direct current power line and a grounding line. The constant current source can provide a constant current to drive the light-emitting element. The rectifier diode and the constant current source are formed on a single semiconductor chip together.

The embodiment discloses a driver for driving a light emitting device, which comprises a rectifying circuit, a current driving circuit and a protection circuit. The rectifier circuit comprises a rectifier diode for receiving an alternating current input power supply and converting the alternating current input power supply into a direct current power supply, the rectifier circuit is connected with the light-emitting element in series, and the direct current power supply is used for providing a direct current and a direct current voltage. The current driving circuit comprises a certain current unit, wherein the rectifying circuit, the current driving circuit and the light-emitting element are connected in series, and the current driving circuit is used for limiting the magnitude of direct current to drive the light-emitting element. The protection circuit comprises a protection unit, wherein the protection circuit is connected across the current driving circuit and the light-emitting element and is connected with the rectifying circuit in series, and when the direct-current voltage is greater than a certain value, the direct-current flows to the protection circuit; the rectifier diode, the constant current unit and the protection unit are formed on a semiconductor chip together.

Drawings

FIG. 1 is a schematic diagram of a prior art illumination system;

fig. 2 is a schematic diagram of an LED driver according to an embodiment of the present application;

FIG. 3 is a schematic of three voltage waveforms;

FIG. 4A is a diagram illustrating a metal layer pattern on a semiconductor chip;

FIG. 4B is a schematic diagram of an integrated circuit after the semiconductor chip of FIG. 4A is packaged;

fig. 5 is a cross-sectional view of the hemt T1 of fig. 4A along line ST-ST;

FIG. 6 is a cross-sectional view of diode DVF3 along line SD-SD in FIG. 4A;

FIG. 7 is a schematic view of an illumination system according to an embodiment of the present application;

FIG. 8 is a schematic diagram of an LED driver according to another embodiment of the present application;

FIG. 9A is a schematic diagram of a pattern of a metal layer on another semiconductor chip;

FIG. 9B is a schematic diagram of an integrated circuit after packaging the semiconductor chip of FIG. 9A;

FIG. 10 is a schematic view of an illumination system according to another embodiment of the present application;

FIG. 11 is a circuit diagram of an LED in parallel with an additional zener capacitor;

FIG. 12 is a schematic diagram of a pattern of a metal layer on another semiconductor chip;

FIG. 13 is a cross-sectional view of the die of FIG. 4A with diode DVF3 taken along line SD-SD according to another embodiment;

FIG. 14 is a flow chart that may be used to fabricate the diode of FIG. 13;

FIG. 15 shows an embodiment of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and a high electron mobility field effect transistor I_DSTo V_DSA schematic of the relationship;

FIG. 16 is a schematic diagram of an LED driver according to another embodiment of the present application;

FIG. 17 illustrates a pattern of a metal layer on a semiconductor chip according to one embodiment of the present application;

FIG. 18 is a schematic diagram of an integrated circuit after packaging the semiconductor chip of FIG. 17;

FIG. 19 is a schematic diagram of an illumination system implemented using the integrated circuit of FIG. 18;

FIG. 20 is a schematic diagram of a circuit design of an LED driver according to an embodiment of the present application;

FIG. 21 is a schematic diagram of an LED driver having a plurality of LEDs according to yet another embodiment of the present application;

fig. 22 is a cross-sectional view of a diode chip according to an embodiment of the present application;

FIG. 23 is a schematic diagram of an LED driver according to another embodiment of the present application;

FIG. 24 is a schematic diagram of a bridge rectifier;

FIG. 25 illustrates a semiconductor chip that can implement the bridge rectifier of FIG. 24;

FIGS. 26A, 26B, and 26C are cross-sectional chip views of the semiconductor chip 808 taken along lines CSV1-CSV1, CSV2-CSV2, and CSV3-CSV 3;

FIG. 27 is a schematic diagram of another bridge rectifier;

FIG. 28 illustrates a semiconductor chip that can implement the bridge rectifier of FIG. 27;

fig. 29A is a schematic diagram of an enhancement mode hemt ME and a depletion mode hemt MD on a semiconductor chip;

Fig. 29B is a schematic view of the electrical connection between the high electron mobility field effect transistors MD and ME in fig. 29A;

FIG. 30 is a cross-sectional view of the chip of FIG. 29A taken along line CSV4-CSV 4;

FIG. 31 is a diagram of an LED driver according to an embodiment of the present application;

FIG. 32 is a graph showing the voltage waveform of the AC input power source of FIG. 31 and a current waveform flowing through the bridge rectifier 844;

FIG. 33 is a schematic diagram of an LED driver with a thermistor having a positive temperature coefficient;

FIG. 34 is a schematic diagram of an LED driver with a thermistor having negative temperature coefficient;

FIG. 35 is a schematic diagram of another LED driver with a thermistor;

fig. 36A is a schematic diagram of an LED driver according to an embodiment of the present application;

fig. 36B is a schematic diagram of an LED driver according to another embodiment of the present application;

FIG. 37 is a voltage-current relationship diagram of a high electron mobility field effect transistor;

fig. 38 is a top view of an LED driver according to another embodiment of the present application;

FIG. 39 is a cross-sectional view of the Schottky diode, the high electron mobility field effect transistor and the protection unit shown in FIG. 38.

Description of the symbols

10 lighting system 12 bridge rectifier

14 power factor corrector 16LED drive circuit

18. 18B, 18R LED 19 voltage-stabilizing capacitor

60. 60a, 60b, 60c LED driver 62 bridge rectifier

63 protection circuit 64 valley-fill circuit

66 current drive circuit 67 dashed line

72. 74, 76 Voltage waveform 80 semiconductor chip

90a semiconductor stack 91, 92 substrate

94 buffer layer 95, 95a mesa region

96 channel layer 98 high valence band gap layer

100 cap layer 102 metal layer

102a, 102b, 102c, 102d, 102e metal sheet

102'a, 102' b, 102'c, 102'd, 102'e, 102' f sheet metal

103. 103a, 103b, 103c insulating layer 104 metal layer

104a, 104' a, 104b, 104c, 104d, 104e, 104f, 104g, 104h

105 sheath 120 diode symbol

130 integrated circuits 140, 142, 144, 146, 148

150. 152 curve 170 adjustment region

200 lighting system 300LED driver

302 current drive circuit 330 lighting system

500LED driver 502 bridge rectifier

504 current drive circuits 518, 5181, 5182, 5183LED

5201. 5202, 5203, 5204LED segment 550 semiconductor chip

552 integrated circuit 560 lighting system

600LED driver 700LED driver

800 LED driver 802 bidirectional thyristor dimmer

806 bridge rectifier 808 semiconductor chip

810 bridge rectifier 812 semiconductor chip

840 LED driver 848 LED

850 resistance 852 schottky diode

900LED driver 902, 906 thermistor

910 LED driver a contact

A_clampAnode A of the protection unit_sbd1～sbd4Anode of Schottky diode

AC-source AC input power AC + and AC input pin

AC1, AC2 AC power line ARM1, ARM2 upper ARM

Upper and lower arm C joint of ART and ARB

C_clampCathode C of protection unit_sbd1～sbd4Cathode of Schottky diode

C1, C2, CF capacitor CC1, CC2, CC3 and CC4 current switches

DB1, DB2, DB3, DB4 rectifier diodes DVF1, DVF2, DVF3 diodes

D end point D_clampProtection unit

D_hemt1、D_hemt2Drain D1, D2 driving pin

E contact and F contact

GD、GE、G_hemt1、G_hemt2Gate GND grounding wire

GG gate region I_cSaturation current

I_DSDrain-source current I_DC-INDirect Current (DC)

IC1, IC2 segmented circuit L contact

L_bLength of p-type barrier layer

ME, MD HEMT N junction

P_bp-type barrier layer

PF1 and PF2 correction pin

S end point S_hemt1、S_hemt2Source electrode

S1, S2 driving pin

SBD1, SBD2, SBD3 and SBD4 Schottky diode

Region of SS saturation

TD1, TD2, TSG junction

T_bThickness of p-type barrier layer

T1, T2, T3, T4, T5, T6, T7, T8 high electron mobility field effect transistors

TP1, TP2, TP3 period

V_AC-INAC voltage V_DC-INDirect voltage

V_DSDrain-source voltage V_kneeVoltage at tangent point

V_PEAKVoltage peak value VCC high voltage pin

VDD DC power line VSS low voltage pin

Detailed Description

In the present specification, the same reference signs generally refer to the same or similar elements having the same or similar structures, functions, and principles, unless otherwise indicated, and will be apparent to those skilled in the art from the teachings herein. For the sake of brevity, elements having the same reference numerals will not be repeated.

In one embodiment of the present application, the entire LED lighting system has a compact circuit design, and the main components include only an integrated circuit packaged with a single semiconductor chip (chip), two capacitors, and an LED as a light source. The LED lighting system in embodiments may not require the connection of additional inductive elements. Therefore, the circuit cost of the LED lighting system will be considerably low. In addition, the LED lighting system in the embodiments also provides a fairly good power factor that can meet the requirements of most specifications.

Fig. 2 shows an LED driver 60 according to an embodiment of the present application, which can be used to drive the LED 18. The LED 18 may be a high voltage LED, formed of a plurality of micro LEDs (micro LEDs) connected in series. For example, in one embodiment, each micro-LED has a forward voltage of about 3.4 volts, and LED 18 is formed by connecting 10 micro-LEDs in series with an equivalent forward voltage V_ef-led(forward voltage) about 50V.

The LED driver 60 has substantially three parts. The first part connected to an alternating current input power source (AC-source) is a bridge rectifier 62. The second part is a valley-fill circuit 64, which is a power factor corrector, and can improve the power factor of the entire LED driver 60. The third portion has two High Electron Mobility Transistors (HEMTs) T1 and T2 as the current driving circuit 66. The hemts T1 and T2 may be used as constant current sources respectively or as a constant current source providing a larger current value after being connected in parallel. Taking the high electron mobility field effect transistor T1 as an example, when the drain-to-source voltage (V) is applied _DS) When sufficiently large, the drain-to-source current (I)_DS) I.e. the current flowing from drain to source, will be approximately constant, hardly following V_DSAnd, in turn, the hemt T1 provides substantially constant current for driving the LEDs 18.

The bridge rectifier 62 includes four rectifier diodes DB1-DB 4. As will be explained below, the four rectifier diodes may all be SchottkyDiodes (Schottky Barrier Diode; SBD). The bridge rectifier 62 rectifies the ac input power to generate dc power across the dc power line VDD and the ground line GND. Wherein the AC input power supply comprises AC voltage V_AC-INAnd the DC power supply includes a DC current I_DC-INAnd a DC voltage V_DC-IN. For example, the ac input power source may be a general 110V or 220V ac mains.

The valley fill circuit 64 is electrically connected between the DC power supply line VDD and the ground line GND, and includes three diodes DVF1-DVF3 and capacitors C1 and C2. The diodes DVF1-DVF3 are reversely connected in series between the DC power supply line VDD and the ground line GND. In this embodiment, the capacitance values of the capacitors C1 and C2 are approximately equal, but the application is not limited thereto. Theoretically, the capacitor voltages VC1 and VC2 of the capacitors C1 and C2 can be charged to about the voltage peak V of the DC voltage VDC-IN _PEAKHalf (0.5 XV)_PEAK). When the AC voltage V is_AC-INIs less than 0.5 XV_PEAKThe capacitors C1 and C2 can discharge the dc power line VDD and the ground line GND. The valley fill circuit 64 can make the DC voltage V as long as the capacitors C1 and C2 are large enough_DC-INIs approximately equal to 0.5V_PEAKSupply a sufficient DC voltage V_DC-INCausing the LED 18 to continue emitting light.

The hemts T1 and T2 are depletion mode transistors, meaning that their threshold Voltages (VTH) are negative. Each hemt has a gate and two channel electrodes, which are commonly referred to as source and drain. The gate and source of each of the hemts T1 and T2 are shorted with each other. Taking the high electron mobility field effect transistor T1 as an example, when the drain-to-source voltage (V) is applied_DS) When sufficiently large, the drain-to-source current (I)_DS) I.e. the current flowing from drain to source, will be approximately constant, almost equal to V_DSIs irrelevant. Therefore, regardless of whether the HEMT T1 or T2 is used as a constant current source, it can provide a constant current to drive the LE D18, the luminous intensity of the LED 18 is kept constant, and the problem of flicker is avoided. In fig. 2, the hemt T1 drives the LED 18, and both of them are connected in series between the dc power line VDD and the ground line GND as a load (load). Fig. 2 connects hemt T2 with LED 18 by dashed line 67, which shows that hemt T2 may optionally be used in conjunction with hemt T1 to drive LED 18, as will be described in more detail later.

FIG. 3 shows the AC voltage V of the AC input power supply_AC-INTime-varying voltage waveform 72, DC voltage V of the DC power supply without the valley-fill circuit 64_DC-INTime-varying voltage waveform 74 and DC voltage V of the DC power supply with valley-fill circuit 64_DC-INA time varying voltage waveform 76. For example, an AC input voltage V_AC-INIs 220VAC, is a sine wave, as shown in fig. 3. The voltage waveform 74 is represented as a virtual result without the valley-fill circuit 64. Without the valley-fill circuit 64, the bridge rectifier 62 would provide simple full-wave rectification, and would therefore turn the negative portion of the voltage waveform 72 positive, as shown by the voltage waveform 74. Valley fill circuit 64 fills in the valleys of voltage waveform 74 or causes the valleys of voltage waveform 74 to be no longer as deep as shown in voltage waveform 76. For ease of description, the following description will sometimes use voltage waveform 74 to explain the timing of the occurrence of an event. For example, when the voltage waveform 74 reaches the peak, it represents the voltage waveform 72 (AC input voltage V) _AC-IN) When the wave reaches the peak or the valley.

Period TP1 begins when voltage waveform 74 is equal to or greater than voltage waveform 76 until voltage waveform 74 rises over time until peak value V_PEAKAnd (6) ending. In time period TP1, the power generated by LED 18 will come directly from the AC input power source, so the DC voltage V_DC-INVoltage waveform 76 is equal to voltage waveform 74. At this time, once the DC voltage V_DC-INThe capacitors C1 and C2 will be charged by the ac input power source more than the sum of the capacitor voltages VC1 and VC 2. When the voltage waveform 74 reaches the peak value V_PEAKAt this time, the capacitor voltages VC1 and VC2 are both about 0.5V_PEAK。

Time period TP2 begins from voltage waveform 74 by reaching peak value V_PEAKInitially until the voltage waveform 74 drops to half-peak (1/2V)_PEAK) Until now. In period TP2, voltage waveform 74 begins to fall over time and the power emitted by LED 18 will come directly from the ac input power source, so voltage waveform 76 is equal to voltage waveform 74. Since the capacitors C1 and C2 are not charged or discharged, the capacitor voltages VC1 and VC2 are both maintained at 0.5V_PEAK。

The period TP3 is below 0.5V from the voltage waveform 74_PEAKAnd then begins approximately when the trough of voltage waveform 74 occurs. In period TP3, the capacitor C1 discharges through the diode DVF3 to power the hemt T1 and the LED 18. Similarly, the capacitor C2 discharges through the diode DVF1, which also powers the hemt T1 and the LED 18. The capacitor voltages VC1 and VC2 decrease with time at a rate that depends on the capacitance values of the capacitors C1 and C2. Period TP3 ends when voltage waveform 74 bounces from the trough and is higher than capacitor voltage VC1 or VC 2. Followed by another period TP 1. As shown in the voltage waveform 76 of FIG. 3, the DC power supply may provide sufficient DC voltage V as long as the capacitors C1 and C2 are large enough _DC-INCausing the LED 18 to continue emitting light.

As long as the capacitors C1 and C2 are large enough, the power factor achieved by the valley fill circuit 64 can meet the power factor requirements of most countries.

In one embodiment, rectifying diodes DB1-DB4, diodes DVF1-DVF3, and high electron mobility field effect transistors T1 and T2 of FIG. 2 are all formed together on a single semiconductor chip. Fig. 4A shows a metal layer 104 pattern on a semiconductor chip 80, and indicates the relative positions of the diode and the hemt of fig. 2 on the semiconductor chip 80. The semiconductor chip 80 may be a single crystal microwave integrated circuit (MMIC) using GaN-based (GaN-based) as a conductive channel material. In fig. 4A, the device structure of each diode is similar, and is a schottky diode, and the device structures of the hemts T1 and T2 are similar. Fig. 5 shows a cross-sectional view of the hemt T1 of fig. 4A along line ST-ST; fig. 6 shows a cross-sectional view of the chip of diode DVF3 along line SD-SD in fig. 4A. Other diode and hemt device configurations can be analogized in the figures.

In the example of fig. 5, the buffer layer 94 on the silicon substrate 92 may be carbon (C-doped) intrinsic (inrinsic) GaN. The channel layer 96 may be intrinsic (inrinsic) GaN with a high-bandgap (high-bandgap) layer 98 formed thereon, which may be intrinsic AlGaN. The cap layer 100 may be intrinsic GaN. The cap layer 100, the high valence band gap layer 98 and the channel layer 96 are patterned into a mesa region 95 (mesa). A two-dimensional electron cloud (2D-electron gas) may be formed in the channel layer 96 adjacent to the quantum well (quantum well) of the high valence band gap layer 98 as a conductive channel. The material of the patterned metal layer 102 may be titanium, aluminum, or a laminate of these two materials. In fig. 5, the metal layer 102 forms two metal strips (metal strips)102a and 102b above the mesa region 95, and two ohmic contacts (ohmic contacts) are formed with the mesa region 95, respectively, so that the metal strips 102a and 102b respectively serve as a source and a drain of the hemt T1. The material of the metal layer 104 may be titanium, gold, or a laminate of these two materials. For example, the metal layer 104 has a nickel (Ni) layer, a copper (Cu) layer and a platinum (Pt) layer from bottom to top, wherein the platinum layer can increase adhesion (adhesion) between the passivation layers 105 formed later, thereby preventing peeling problem during the pad fabrication process. In other embodiments, the metal layer 104 may also be a stack of nickel (Ni), gold (Au), and platinum (Pt) layers, or a stack of nickel (Ni), gold (Au), and titanium (Ti) layers. In fig. 5, the patterned metal layer 104 forms metal sheets 104a, 104b, and 104 c. The metal plate 104b contacts the center of the mesa region 95 to form a schottky contact (schottky contact) as the gate of the hemt T1. 104a and 104c in fig. 5 contact the respective contacts 102a and 102b, providing electrical connection of the source and drain of the hemt T1 to other electronic devices. Referring to fig. 5 and fig. 4A, it can be seen that the gate (metal plate 104b) of the hemt T1 is shorted to the metal plate 104A through the metal layer 104 and also shorted to the source of the hemt T1. The right part of fig. 5 shows an equivalent circuit diagram of the hemt T1. Over the metal layer 104, there is a passivation layer 105, which may be silicon oxynitride (SiON). The passivation layer 105 is patterned to form bonding pads (bonding pads) required for packaging. For example, in fig. 5, the uncovered portion of the left passivation layer 105 can be bonded to bonding wires (bonding wires) of the low voltage pin VSS (to be explained later); the uncovered portion of the right passivation layer 105 can be soldered to the bonding wires of the driving pin D1 (explained later).

For the sake of brevity, the same or similar parts of fig. 6 as fig. 5 will not be described again. In fig. 6, metal layer 102 forms two metal sheets 102c, 102d over mesa region 95, and patterned metal layer 104 forms metal sheets 104d, 104e, and 104 f. Similar to fig. 5, the metal sheet 104e may be used as a gate of a high electron mobility field effect transistor. Although the metal sheet 102d may serve as a source of a high electron mobility field effect transistor, the metal layer 104 is not contacted to the metal sheet 102 d. In another embodiment, the metal sheet 102d may be omitted and not formed. A metal plate 104f contacts a portion of the upper surface and a sidewall of the mesa region 95 forming another schottky contact that may function as a schottky diode with its cathode equivalently shorted to the source of the hemt of fig. 6. Please refer to fig. 6 and fig. 4A simultaneously. Metal plate 104e, through metal layer 104, is shorted to metal plate 104f, which is the anode of the schottky diode. The right part of fig. 6 shows the equivalent circuit connection diagram of the left half, which is equivalent in circuit behavior to a diode. The right portion of FIG. 6 also shows a special diode symbol 120 to represent the equivalent circuit of FIG. 6. Diode symbol 120 is also used in FIG. 2 to indicate rectifier diodes DB1-DB4 and diodes DVF1-DVF3, each of which is a diode formed by a combination of a high electron mobility field effect transistor and a Schottky diode.

Fig. 4B shows an integrated circuit 130 after packaging the semiconductor chip 80, which has only 8 pins (pins): a high voltage pin VCC, calibration pins PF1 and PF2, a low voltage pin VSS, AC input pins AC + and AC-, and driving pins D1 and D2. Referring to fig. 4A, each pin is also shown electrically shorted to metal pads formed by patterning metal layer 104 by wire bonding (bonding wire), which also provides interconnection of corresponding input or output terminals of the electronic components in semiconductor chip 80. For example, the driving pin D1 is electrically connected to the drain of the hemt T1, and the calibration pin PF1 is electrically connected to the cathode of the diode DVF 3.

Fig. 7 illustrates an illumination system 200 implemented in accordance with the present application. The integrated circuit 130 is mounted on a printed circuit board 202. Through the metal wires on the printed circuit 202, the capacitor C1 is electrically connected between the high voltage pin VCC and the calibration pin PF1, the capacitor C2 is electrically connected between the low voltage pin VSS and the calibration pin PF2, the LED 18 is electrically connected between the high voltage pin VCC and the driving pin D1, and the AC input pins AC + and AC-are electrically connected to the AC input power (AC voltage V) _AC-IN). As can be understood from the foregoing description, the lighting system 200 of fig. 7 is simple, and only uses 4 electronic components (two capacitors C1 and C2, the integrated circuit 130, and the LED 18) to realize the LED driver 60 of fig. 2. Without expensive and bulky inductive components, the cost of the lighting system 200 is reduced and the overall product volume can be reduced.

In fig. 7, the driving pin D2 of the integrated circuit 130 (electrically connected to the drain of the hemt T2) is capable of viewing the ac voltage V_AC-INAnd, instead, whether to electrically connect to the LED 18. In other words, the integrated circuit 130 can selectively use a single hemt (T1) or two hemts (T1 and T2) in parallel to drive the LEDs 18 to emit light. For example, assuming that the hemts T1 in the ic 130 are the same size as the T2 devices, each may provide about the same 1u unit constant current. When the lighting system 200 of FIG. 7 is used with an AC input power of 110VAC, an LED with a forward voltage (forward voltage) of 50V may be selected as the LED 18, and the driving pins D1 and D2 are connected together to the LED 18, the LED 18The power consumed is about 2 ux 50(═ 100 u). When the lighting system 200 of fig. 7 is applied to an ac input power of 220VAC, an LED with a forward voltage of 100V may be used as the LED 18, and the driving pin D1 is connected to the LED 18 alone, and the driving pin D2 is kept floating and connected to the LED 18, so that the power consumed by the LED 18 at this time is about 1u × 100 (100 u). Thus, although the AC voltage V of the AC input power source _AC-INIn contrast, as long as LEDs with different forward voltages are selected, the power consumed by the LEDs 18 can be about the same (both about 100u), and the brightness of the illumination produced by the illumination system 200 will be about the same. In other words, the integrated circuit 130 is applicable not only to 220VAC AC input power, but also to 110VAC AC input power. This is very convenient for the manufacturer of the lighting system 200, and can save the parts inventory management cost of the lighting system 200.

In fig. 2, the current driving circuit 66 is connected between the LED 18 and the ground line GND, but the present application is not limited thereto. Fig. 8 illustrates another LED driver 300 implemented in accordance with the present application for driving the LEDs 18. In fig. 8, the current driving circuit 302 has hemts T3 and T4, hemts T3 and T4 have drains electrically connected to the dc power line VDD together, and the LED 18 is electrically connected between the ground line GND and the current driving circuit 302. Fig. 9A shows a pattern of metal layer 140 on a semiconductor chip 310, and indicates the relative positions of the diode and the hemt in fig. 8. Fig. 5 may also represent a cross-sectional view of the hemt T3 of fig. 9A along line ST-ST; FIG. 6 may also represent a cross-sectional chip view of diode DVF3 along line SD-SD in FIG. 9A. Fig. 9B shows an integrated circuit 320 after packaging the semiconductor chip 310, which has only 8 pins (pins): a high voltage pin VCC, calibration pins PF1 and PF2, a low voltage pin VSS, AC input pins AC + and AC-, and driving pins S1 and S2. Fig. 10 shows another lighting system 330 implemented in accordance with the present application, which implements the LED driver 300 of fig. 8. Referring to fig. 8, 9A, 9B and 10, the principles, operations and advantages thereof can be understood by referring to fig. 2, 4A, 4B and 7 and the related descriptions, and for the sake of brevity, the description thereof will not be repeated.

As in the embodiment of fig. 11, an additional regulation capacitor 19 may be connected in parallel with the LED 18. The voltage stabilizing capacitor 19 can reduce the variation of the voltage VLED across the LED 18, even increase the duty cycle or the light emitting time of the LED 18 in a period of the ac input power, and reduce the possibility of flickering (flickering) of the LED 18.

The pattern in fig. 4A is merely an example, and the present application is not limited thereto. Fig. 12 shows a pattern of a metal layer 104 on another semiconductor chip. FIG. 12 is substantially similar to FIG. 4A, and portions that are the same or similar to one another will not be discussed again for the sake of brevity. In fig. 4A, a gate located at the middle of each diode is connected to its anode (e.g., metal plate 104f in fig. 6) only through an upper ARM1 of a patterned metal layer 104; a gate at the middle of each hemt is also connected to its source (e.g., metal plate 104a in fig. 5) through an upper ARM2 of a patterned metal layer 104. However, in fig. 12, like the exemplified gate region GG, the gate electrode at the middle position of each diode is connected to the anode electrode thereof through the upper and lower arms ART and ARB of the patterned metal layer 104; a gate in the middle of each hemt is also connected to its source through the upper and lower arms of the patterned metal layer 104. Compared with the design of fig. 4A, the upper and lower arm structures of the diode in fig. 12 are relatively symmetrical in manufacturing, and are less prone to be compressed by the structure between the upper and lower arms during the manufacturing processes such as development, exposure, epitaxy, etching, etc., the widths (of the upper and lower arms) are relatively consistent, and the structure is less prone to be damaged or deformed; in the structure of fig. 4A, since there is only one arm, the width of the whole arm is easily inconsistent when other parts are manufactured, and this situation also easily causes a large current or a large voltage to be accumulated to cause breakdown. Therefore, the upper and lower arm structures in fig. 12 are relatively consistent in width of the whole structure and are not easily deformed by other structures, so that the structure in fig. 12 has high breakdown voltage endurance.

The cross-sectional views in fig. 5 and 6 are not intended to limit the scope of the present application. For example, fig. 13 shows a cross-sectional view of the chip of diode DVF3 of fig. 4A along line SD-SD according to another embodiment. Fig. 13 and 6, for the sake of brevity, identical or similar parts to each other will not be described again. In contrast to fig. 6, the metal sheet 104e in fig. 13 is sandwiched with an insulating layer 103, which is made of silicon oxide, for example. The presence of the insulating layer 103 may also enhance the breakdown voltage withstand capability of the diode.

Fig. 14 shows a flow chart for fabricating the diode of fig. 13. Step 140 begins by forming a mesa region. For example, the channel layer 96, the valence band gap layer 98, and the cap layer 100 are formed on the buffer layer 94. The three layers are then patterned by inductively coupled plasma etching or the like to complete the mesa region 95. Step 142 forms ohmic contacts. For example, titanium/aluminum/titanium/gold is deposited as the metal layer 102, and then the metal layer 102 is patterned to form metal pieces 102a, 102b, etc. Step 144 forms an insulating layer 103. For example, a silicon dioxide layer is deposited and then patterned, and the remaining silicon dioxide layer becomes the insulating layer 103. Step 146 forms schottky contacts and patterning. For example, step 146 may be performed by sequentially depositing ni/au/pt as the metal layer 104, and then patterning the metal layer 104 to form metal sheets 104a, 104b, 104c, etc. Ohmic contact is made between the metal layer 104 and the metal layer 102, but schottky contact is made between the metal layer 104 and the mesa region 95. Step 148 forms the passivation layer 105 and patterns it to form pad openings. Of course, the flowchart of fig. 14 is also applicable to the fabrication of the high electron mobility field effect transistor of fig. 12. The flowchart of fig. 14 may also be used to fabricate the diode and the hemt of fig. 4A by appropriate adjustment, for example, omitting step 144, or adding other fabrication processes.

Although the hemts T1 and T2 in fig. 2 and 5 may be considered constant current sources, they may not be perfect current sources. Drain-source current (I) of the high electron mobility field effect transistors T1 and T2_DS) In the saturation region, the voltage may still follow the drain-source voltage (V)_DS) And are somewhat related. FIG. 15 shows a metal oxide semiconductorIn a bulk field effect transistor (MOSFET) and a high electron mobility field effect transistor, I_DSTo V_DSAnd (4) relationship. Curves 150 and 152 are for a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and a high electron mobility field effect transistor (hemt) based on silicon, respectively. From the curve 150, it can be found that in the MOSFET, I_DSAnd V_DSAre all approximately positively correlated, i.e. V_DSThe larger, I_DSThe larger. But the high electron mobility field effect transistors are different. From the curve 152, it can be found that in the high electron mobility field effect transistor, when V is_DSWhen it exceeds a specific value, I_DSThe relationship with this is changed from positive to negative. The specific value can be set by the parameters of the manufacturing process. This characteristic of high electron mobility field effect transistors is particularly advantageous when V is _DSSudden surge in high voltage, I, due to unstable mains voltage_DSThe power consumption of the high electron mobility field effect transistor may be reduced, thereby preventing the high electron mobility field effect transistor from being burnt.

In the previous embodiments, the LED driver has a valley fill circuit, but the present application is not limited thereto. Fig. 16 shows another LED driver 500 for driving an LED 518 comprising a plurality of LED segments 5201, 5202, 5203 connected in series. There is no valley fill circuit in the LED driver 500. The bridge rectifier 502 and the current driving circuit 504 of the LED driver 500 may be integrated together on a semiconductor chip and packaged as an integrated circuit. Fig. 17 shows a metal layer 104 pattern on a semiconductor die 550, and indicates the relative positions of the diode and the hemt of fig. 16 on the semiconductor die 550. The semiconductor chip 550 integrates the bridge rectifier 502 and the current driving circuit 504 in the LED driver 500. Fig. 18 shows an integrated circuit 552 after semiconductor die 550 is packaged. Fig. 19 shows a lighting system 560 that implements the LED driver 500 using the integrated circuit 552 of fig. 18. Fig. 16-19 may be understood by the foregoing teachings and their details are not discussed herein. From fig. 19, it can be seen that the entire lighting system 560 employs a very small number of electronic components (a capacitor CF, integrated circuit 552, and LED 518). The cost of the lighting system 560 will be reduced and the overall product will be more compact.

Fig. 16 and 19 are not intended to limit the application of the integrated circuit 552. Fig. 20 illustrates an LED driver 600, which can be used to illustrate another application of an integrated circuit including a bridge rectifier 502 and a current driving circuit 504. In fig. 20, HMETs T1 and T2 in the current driving circuit 504 are selectively used to drive the LED 518, which includes a plurality of LED segments 5201, 5202, 5203. The LED driver 600 further has a segment circuit IC1 and an IC2, which can be based on the DC voltage V_DC-INBecomes a short circuit or an open circuit. For example, when the DC voltage V is_DC-INWhen the forward voltage is slightly higher than that of the LED segment 5203, both the segmented circuit IC1 and IC2 are short-circuit circuits, so that the LED segment 5203 emits light, while the LED segments 5201, 5202 do not emit light; when the DC voltage V is_DC-INWhen the sum of the forward voltages of LED segments 5202 and 5203 is increased beyond, segment IC1 is a short circuit and segment IC2 is an open circuit, so LED segments 5202 and 5203 emit light and LED segment 5201 does not emit light; when the DC voltage V is_DC-INWhen the sum of the forward voltages of LED segments 5201, 5202 and 5203 is increased, segmented circuit IC1 becomes an open circuit, so that LED segments 5201, 5202 and 5203 all emit light. The electro-optic conversion efficiency of the LED driver 600 is better, and the power factor and the total harmonic distortion can be well controlled.

An integrated circuit according to the present application is not limited to integrating a bridge rectifier with a current driving circuit. The previously described integrated circuits 130 and 552 are provided as examples only. For example, an integrated circuit implemented according to the present application may incorporate diodes or hemts in addition to the bridge rectifier and current driver circuit, which may be used in the segmented circuits IC1 and IC2 of fig. 20.

The integrated circuits implemented in this application are not limited to depletion mode high electron mobility field effect transistors. In some embodiments, the integrated circuit includes an enhancement-mode high electron mobility field effect transistor (hemt), the on-current of which can be controlled by providing an appropriate gate voltage to vary the intensity of light emitted by the driven LED segment. For example, in fig. 20, while the activated LED segments 5201, 5202 and 5203 are adjusted by the segment circuits IC1 and IC2, the gate voltage of the enhancement mode high electron mobility field effect transistor can be adjusted to change the current input to the LED segments 5201, 5202 and 5203 by the high electron mobility field effect transistor, thereby changing the light intensity emitted by the LED segments 5201, 5202 and 5203.

Although the previously disclosed LED drivers or lighting systems are each configured to drive a single LED 518, the present application is not so limited. In some embodiments, there may be two or more LEDs, driven separately at different currents. Fig. 21 illustrates an LED driver 700 in which high electron mobility field effect transistors T1 and T2 in the current driving circuit 504 drive LEDs 18R and 18B, respectively. For example, the driving current provided by hemt T1 is smaller than the driving current provided by hemt T2, and LED 18R is substantially a red LED, and LED 18B is substantially a blue LED.

The diodes in fig. 6 and 13 are formed on a single mesa region 95, respectively, but the present application is not limited thereto. Fig. 22 shows a cross-sectional view of a diode chip in another embodiment. The same or similar parts in fig. 22 as those in fig. 6 and 13 will not be described again for the sake of brevity. In fig. 22, there are two land areas 95 and 95 a. The metal sheet 102e forms an ohmic contact on the mesa region 95 a; the metal sheet 102d forms another ohmic contact on the mesa region 95. The metal sheets 102d and 102e are electrically connected to each other by short-circuiting via the metal sheet 104 g. The metal plate 104f serves as an anode of the diode, and the metal plate 104d serves as a cathode of the diode. The structure in fig. 22 can enhance the breakdown voltage withstand capability of the diode.

The current driving circuits 66, 302, and 504 are all used to drive Light Emitting Diodes (LEDs) as taught previously, but the present application is not limited thereto. Fig. 23 shows an LED driver 800 according to another embodiment of the present application, which is similar to fig. 16 and the same from each other, and can be understood by referring to the previous description, and for the sake of brevity, no description is given. Unlike the LED driver 500 of fig. 16, the LED driver 800 of fig. 23 has a bidirectional thyristor dimmer (TRIAC dimmer)802, and the hemt T1 of the current driving circuit 804 is directly connected between the dc power line VDD and the ground line GND without driving any LEDs. When a triac dimmer is turned off and is approximately open, a certain amount of holding current is required to prevent malfunction. In fig. 23, the hemt T1 may provide the required sustain current for the triac dimmer 802. In design, the hemt T2 may provide a relatively large current to make the LED 518 emit light; the hemt T1 can provide a relatively small current required for the triac dimmer 802 to maintain the current when the LEDs 518 are not emitting light.

The diodes in the previous embodiment are represented by the diode symbol 120 in fig. 6, which is a diode formed by combining a high electron mobility field effect transistor and a schottky diode. The present application is not so limited. The diodes in all the embodiments can be replaced by other diodes in whole or in part. For example, FIG. 24 shows a bridge rectifier 806 constructed with four Schottky diodes SBD1, SBD2, SBD3, SBD 4.

Fig. 25 illustrates a metal layer 104 and mesa region 95 pattern on a semiconductor die 808, which may implement the bridge rectifier 806 of fig. 24. FIGS. 26A, 26B, and 26C show cross-sectional chip views of the semiconductor chip 808 along lines CSV1-CSV1, CSV2-CSV2, and CSV3-CSV 3. For example, the schottky diode SBD1 in fig. 24 is connected between the AC power line AC1 and the ground line GND. Fig. 25 and 26A show an hemt having a multi-finger structure. The gate terminal of the high electron mobility field effect transistor serves as the anode of the schottky diode SBD1, and the channel terminal of the high electron mobility field effect transistor serves as the cathode of the schottky diode SBD 1. Equivalently, schottky diode SBD1 is formed by a number of small schottky diodes connected in parallel. The multi-finger high electron mobility field effect transistor can provide larger driving current in a limited chip area.

In the previous embodiment, each diode may also be implemented with several diodes in series, as exemplified in fig. 27. Fig. 27 shows another bridge rectifier 810. For example, there are two serially connected schottky diodes between the AC power line AC1 and the ground line GND of the bridge rectifier 810. Fig. 28 illustrates a metal layer 104 and a mesa region 95 pattern on a semiconductor chip 812, which may implement the bridge rectifier 810 of fig. 27. FIGS. 26A, 26B, and 26C may also be used to show cross-sectional views of the semiconductor chip 812 along lines CSV1-CSV1, CSV2-CSV2, and CSV3-CSV 3.

As described above, the semiconductor chip of the embodiments of the present application is not limited to the depletion mode hemt and the schottky diode, but may also include an enhancement mode (E-mode) hemt. Fig. 29A shows the pattern of metal layer 104 and mesa region 95 of an enhancement mode hemt ME and a depletion mode hemt MD on a semiconductor chip. Fig. 29B shows the electrical connection between the high electron mobility field effect transistors MD and ME in fig. 29A. FIG. 30 shows a cross-sectional view of the chip of FIG. 29A taken along line CSV4-CSV 4. As shown in fig. 30, the left half is an enhancement mode hemt ME, wherein an insulating layer 103 is sandwiched between a metal sheet 104h as the gate GE and the cap layer 100. The cap layer 100 and the high valence band gap layer 98 form a tuning region 170 under the metal sheet 104 h. For example, the tuning region 170 may be formed by locally implanting fluorine ions into the cap layer 100 and the high valence band gap layer 98. Compared to the depletion mode hemt MD in the left half of fig. 22, the enhancement mode hemt ME in the left half of fig. 30 has an extra adjustment region 170 and an extra insulating layer 103, both of which can be used to adjust or increase the threshold voltage vt (threshold voltage) of a hemt.

As shown in fig. 29A, 29B and 30, the gate GD of the depletion mode hemt MD is shorted to the terminal S of the enhancement mode hemt ME by the electrical connection of the metal layer 104.

In the circuit of fig. 29B, when the hemt ME is turned off (open), the hemt ME and the hemt MD can bear the voltage spread from the terminal D to the terminal S, so that the voltage withstand capability can be considerably improved. When the hemt ME is turned on (conducting), the hemt MD may act as a constant current source limiting the maximum amount of current between the terminal D and the terminal S.

The enhancement mode hemts of fig. 29A and 29B may also be used as active switches in a semiconductor chip. Fig. 31 shows a circuit design of an LED driver 840 having enhancement mode hemts and depletion mode hemts according to an embodiment of the present application. In addition to the schottky diodes and resistors, the LED driver 840 further includes current switches CC1, CC2, CC3, and depletion mode hemt T8 electrically connected to each other as shown in fig. 31. On a semiconductor chip, the current switches CC1, CC2, and CC3 may be implemented in the element structures of fig. 29A and fig. 30. In one embodiment, the current switches CC1, CC2, CC3 and the depletion mode hemt T8 can conduct the maximum currents, I1, I2, I3 and I4 respectively, and I1< I2< I3< I4. Each of the current switches CC1, CC2, and CC3 has a control terminal (i.e., the gate terminal of an enhancement mode hemt) commonly connected to schottky diode 852 through a corresponding resistor, which has another terminal connected to ground GND.

Fig. 32 shows the voltage waveform of the ac input power source of fig. 31 and a current waveform through the bridge rectifier 844. As the voltage across the dc power supply line VDD and the ground line GND increases from 0V, all of the current switches CC1, CC2, and CC3 are turned on. At this time, only LED segment 5201 emits light, LED segments 5202, 5203 and 5204 do not emit light, and the driving current flowing through LED segment 5201 is limited by current switch CC1 to a maximum current value of I1. As the voltage across the dc power supply line VDD and the ground line GND continues to increase, the current switch CC1 is turned off and the LED section 5202 adds light, at which time the driving current through the LED sections 5201 and 5202 is limited by the current switch CC2 to a maximum current value I2. When the voltage across the dc power line VDD and the ground line GND continues to increase, the current switch CC2 is turned off and the LED segment 5203 emits light, and at this time, the driving current flowing through the LED segments 5201, 5202 and 5203 is limited by the current switch CC3 to the maximum current value I3. When the voltage across the dc power line VDD and the ground line GND exceeds a certain level, the current switches CC1, CC2, and CC3 are all turned off, and all of the LED segments 5201, 5202, 5203, 5204 emit light. At this time, the driving current flowing through the LED segments 5201, 5202, 5203, 5204 is limited to the maximum current value I4 by the depletion mode high electron mobility field effect transistor T8. When the voltage across the dc power line VDD and the ground line GND gradually decreases from the highest point, the current switches CC3, CC2, and CC1 are turned on gradually. As can be seen from fig. 32, the LED driver 840 of fig. 31 not only has a good power factor (power factor), but also has a relatively low Total Harmonic Distortion (THD).

In fig. 31, each of the current switches CC3, CC2 and CC1 has two reverse-connected schottky diodes connected between a control terminal and a high voltage terminal of each current switch. In another embodiment, the schottky diodes (6 in total in fig. 31) can be omitted to reduce the cost.

A schottky diode 852 connected between resistor 850 and ground GND may be used to limit the maximum voltage at the control terminals of current switches CC3, CC2, and CC 1. When a surge high voltage is present on the dc power line VDD, the schottky diode 852 can prevent an enhancement mode hemt from being damaged due to an excessive gate voltage.

In the LED driver 840 of fig. 31, all the schottky diodes and the hemts may be integrated into a single-crystal microwave integrated circuit with GaN-based channel material. For example, the schottky diode can be implemented by using the device structure shown in fig. 6 or fig. 26A, and the enhancement mode hemt and the depletion mode hemt can be implemented by using the device structures shown in the left half and the right half of fig. 30, respectively. In other words, the LED driver 840 may be implemented with a single-chip microwave ic, a plurality of resistors, an LED 848, and a Printed Circuit Board (PCB), which is very inexpensive.

As the ambient temperature increases, the brightness of an LED driven by a constant current may decrease. In order to compensate for the brightness decay caused by high temperature, in some embodiments of the present application, a thermistor with positive or negative temperature coefficient can be used to adjust the driving current to the LED.

Fig. 33 shows an LED driver 900 having a thermistor with positive temperature coefficient, wherein two terminals of the thermistor 902 are respectively connected to a gate terminal and a channel terminal of an enhancement mode hemt ME1 in a current switch CC 4. The depletion mode hemt T5 acts as a current source to provide approximately constant current through the ptc thermistor 902, and the enhancement mode hemt ME1 operates in the linear region. As the ambient temperature increases, the resistance of thermistor 902 increases, and therefore the voltage on the control gate of current switch CC4 also becomes higher, increasing the current through LED 518. Thus, the amount of light emitted by the LED 518 is not changed with temperature.

Fig. 34 shows an LED driver 906 having a thermistor with negative temperature coefficient, in which the depletion mode hemt T6 can act as a constant current source providing a constant current determined by the source voltage. As the ambient temperature increases, the resistance of the thermistor 906 decreases, and therefore, the source voltage of the depletion mode hemt T6 becomes lower, and the gate-to-source voltage of the depletion mode hemt T6 increases, thereby increasing the current flowing through the LED 518. Thus, the amount of light emitted by the LED 518 is not changed with temperature.

The LED driver implemented according to the present application is not limited to having only one LED or only one thermistor. Fig. 35 shows an LED driver 910 having LEDs 5181, 5182, and 5183. Similar to the teaching of FIG. 33, the drive current through LED 5181, controlled by thermistor 902, increases with increasing temperature. Similar to the teaching of FIG. 34, the drive current through LED 5182, controlled by thermistor 906, increases with increasing temperature. The driving current flowing through the LED 5183 is controlled by the depletion mode hemt T7 and is substantially invariant with temperature. In one embodiment, LED 5183 is a blue LED and LED 5181 or 5182 is a red LED.

FIG. 36A shows an LED driver 60a for driving a light emitting device, such as the LED 18 of FIG. 2, which is formed by connecting a plurality of LEDs 18 in series, according to an embodiment of the present invention, wherein the equivalent forward voltage V of the LED 18 is the equivalent forward voltage V_ef-ledMay be between 50V and 140V according to actual requirements. Similar to the LED driver 60 of fig. 2, the LED driver 60a of the present embodiment also includes three parts, the first part is a bridge rectifier 62 electrically connected to the LED 18 and the AC-source; the second part is a protection circuit 63 connected across the bridge rectifier 62 and the LED 18; the third part is a current driving circuit 66 connected between the LED 18 and the bridge rectifier 62, which includes two high electron mobility field effect transistors T1, T2. The bridge rectifier 62 is used as a rectifying circuit for converting an alternating current input power (AC-source) into a direct current power (DC-source). The DC power supply includes a DC current I _DC-INAnd a DC voltage V_DC-INTo the LED 18. The high electron mobility field effect transistors T1, T2 are used for limiting the direct current I_DC-INTo provide substantially a current to drive the LED 18. The protection circuit 63 includes a protection unit D_clampThe protection circuit 63 is connected across the current driving circuit 66 and the LED18 and is connected in series with the rectifying circuit (bridge rectifier 62) when the DC voltage V is applied_DC-INWhen it is greater than a certain value, the direct current I_DC-INTo the protection circuit 63. The present embodiment differs from the previous embodiments in that: the present embodiment focuses on the protection of the device, so the protection circuit 63 is used to replace the valley-fill circuit 64 in the previous embodiment. However, this application does notFor example, in other embodiments, the LED driver may include both the protection circuit and the valley-fill circuit. Referring to fig. 36B, fig. 36B shows an LED driver 60B according to another embodiment of the present application, the LED driver 60B substantially includes four parts, the first part is a bridge rectifier 62 electrically connected to the LED18 and an AC input power source AC-source; the second part is a protection circuit 63 connected across the bridge rectifier 62 and the LED 18; the third part is a current drive circuit 66 connected across the LED18 and the bridge rectifier 62; the fourth part is a valley fill circuit 64. Briefly, compared to the LED driver 60a, the LED driver 60b further includes a valley-fill circuit 64 connected in parallel to the protection circuit 63 and the current driving circuit 66, respectively.

In the LED driver 60a of fig. 36A, the bridge rectifier 62 is connected to the AC input power source AC-source through a junction N, L, and the bridge rectifier 62 is also connected in series with the LED 18 through a junction C, A. The bridge rectifier 62 includes four rectifier diodes DB1-DB4, which are used to convert the AC input power AC-source into DC power, wherein the voltage waveforms of the AC input power (AC-source) and the DC power (DC-source) are shown in FIG. 3 with reference to the voltage waveforms 72 and 74, respectively. The DC power supply can provide DC current I_DC-INAnd a DC voltage V_DC-INTo the LED 18. The AC input power AC-source may be, for example, a typical 110V AC mains or a 220V AC mains.

Referring to FIG. 36A, the current driving circuit 66 is connected in series with the LED 18, and the current driving circuit 66 limits the DC current I_DC-INTo substantially provide a certain current to the LED 18. The hemts T1 and T2 in the current driving circuit 66 may be depletion mode transistors as described above, meaning their threshold voltages (V)_TH) Are all negative and each has a gate and source and drain. In the present embodiment, the gate and the source of each of the high electron mobility field effect transistors T1 and T2 are connected. In addition, as described above (please refer to the seventh paragraph of the present detailed description), the hemts T1 and T2 may also be used as a constant current source or as a current source in parallel to provide a larger current The constant current source, shown in fig. 36A, is similar to fig. 2, but also connects hemt T2 with LED 18 by dashed line 67, thereby indicating hemt T2 may selectively drive LED 18 in conjunction with hemt T1. To further understand the characteristics of the hemt, taking the hemt T1 as an example, please refer to fig. 37, and fig. 37 is a voltage-current relationship diagram of the hemt T1. As can be seen from FIG. 37, the drain-source voltage V of the high electron mobility field effect transistor T1_DSGreater than the cut-in voltage V of the high electron mobility field effect transistor T1_knee(knee voltage), at which time the HEMT T1 operates in the saturation region SS, the drain-source current I of the HEMT T1_DSIs approximately a constant I_CCommonly referred to as saturation current. Wherein the drain-source voltage V of the high electron mobility field effect transistor T1_DSIs approximately equal to the DC voltage V_DC-INMinus the equivalent forward voltage V of the LED 18_ef-led(in this embodiment, set to 50V), and then subtract the voltage V of a single rectifying diode_DBi(about 1.5V), where i ═ 1,2,3,4, i.e., V_DS＝V_DC-IN-V_ef-led-V_DBi。

The protection circuit 63 is connected across the current drive circuit 66 and the LED 18, and is connected in reverse to the rectifying circuit (bridge rectifier 62). The protection circuit 63 includes a protection unit D _clampIt is mainly used to protect the current driving circuit 66, i.e. protect the high electron mobility field effect transistors T1, T2. Taking the hemt T1 as an example, the protection cell D is selected for the purpose of effectively protecting the hemt T1_clampIts reverse conducting voltage V_clampWill be less than the breakdown voltage V of the high electron mobility field effect transistor T1_break. For example, when the breakdown voltage V of the high electron mobility field effect transistor T1_break600V, a reverse conducting voltage V can be selected_clamp560V protection cell D_clamp. In this embodiment, the protection unit D_clampE.g. clamping diodes, as protection sheetsElement D_clampIs characterized by its reverse conducting voltage V_clampThe voltage is much higher than the forward conduction voltage (about several volts), and the protection unit D is turned on in the reverse direction_clampThe resistance of (2) is extremely small. When a surge occurs, a DC voltage V is generated_DC-INOverride protection unit D_clampReverse conducting voltage V_clamp(V_DC-IN>V_clamp) Time, protection unit D_clampConducting, at this time, most of the DC current I is generated due to the extremely small resistance of reverse conduction_DC-INWill flow to the protection unit D_clampAdditionally, the protection unit D selected in this embodiment _clampReverse conducting voltage V of_clampLess than the breakdown voltage V of the high electron mobility field effect transistor T1_breakTherefore, the high electron mobility field effect transistors T1, T2 can be effectively prevented from being affected by the DC voltage V_DC-INExcessive drain-source voltage V_DSOver its breakdown voltage V_breakAnd a short circuit condition occurs. In addition, the protection unit D of the present embodiment_clampReverse conducting voltage V_clampWill be higher than the equivalent forward voltage V of the LED 18_ef-ledHigh, generally without surge, DC voltage V_DC-INWill be smaller than the protection unit D_clampReverse conducting voltage V_clampAt this time, the protection unit D_clampNon-conducting, direct current I_DC-INWill flow towards the LED 18 without affecting the operation of the LED 18.

To briefly explain the operation principle of the LED driver 60a, the following operation principle is for the case of driving the LED 18 only by using the hemt T1, i.e. the dashed line 67 does not connect the hemt T2 and the LED 18, and the hemt T1 is not connected in parallel with the hemt T2. As described above, at a DC voltage V_DC-INSmaller than the protection unit D_clampReverse conducting voltage V_clampIn the case of (2), a protection unit D_clampAnd is not conductive. After the bridge rectifier 62 converts the AC input power AC-source to DC power, the DC power provides DC current I _DC-INAnd a DC voltage V_DC-INTo the LED 18. Due to the electrical connection between the LED 18 and the high electron mobility field effect transistor T1, a DC current I flowing to the LED 18_DC-INThe size of the fet is limited by the hemt T1. Is switched on below the LED 18 (DC voltage V)_DC-INGreater than the equivalent forward voltage V_ef-led) And the drain-source voltage V of the high electron mobility field effect transistor T1_DSGreater than the cut-in voltage V of the high electron mobility field effect transistor T1_kneeThe case of (knee voltage) will be discussed. In the above case, since the high electron mobility field effect transistor T1 operates in the saturation region SS (as shown in fig. 37), the drain-source current I thereof_DSIs approximately a constant I_C(referred to as saturation current). The drain-source current I can be known according to the Keschiff's current law_DSWill be equal to the dc current I flowing through the LED 18_DC-INSize (Ic ═ I)_DC-IN) Therefore, the high electron mobility field effect transistor T1 can be used as a constant current source to limit the DC current I_DC-INTo provide a constant current to drive the LED 18, so that the light emitting intensity of the LED 18 is maintained constant. The above-mentioned situation is illustrated by actual values, and in the present embodiment, the voltage V of a single rectifying diode_DBiEquivalent forward voltage V of about 1.5V, LED 18 _ef-ledBreakdown voltage V of about 50V, high electron mobility field effect transistor T1_breakAnd a cut-in voltage V_kneeAbout 600V and 5V, respectively, and the saturation current Ic is about 110 mA. The above description of the value of the hemt T1 still obeys the curve characteristic of fig. 37, and the above value is only an implementation aspect and is not intended to limit the present invention. When the DC voltage V is_DC-INWhen the voltage is between 60V and 110V, the drain-source voltage V_DSThe size of (A) is about 8V-55V (V)_DS＝V_1st-V_ef-led-V_DBi) Greater than the cut-in voltage V_knee. At this time, the drain-source voltage V of the high electron mobility field effect transistor T1_DSIn the saturation region SS (between 5V and 700V), the direct current I can be limited_DC-INThus providing the LED 18 with a constant current Ic of 110 mA. On the other hand, when a surge occurs, if the surge corresponds to the DC voltageV_DC-INGreater than the protection unit D_clampReverse conducting voltage V_clamp560V, then protection unit D_clampConducting, the majority of the current flows to the protection unit D_clampTo protect the hemt T1 and prevent the hemt T1 from short circuit.

In order to simplify the manufacturing process of the LED driver 60a, in an embodiment of the present application, the rectifier diodes DB1-DB4, the high electron mobility field effect transistors T1, T2 and the protection unit D in fig. 36A _clampAnd may also be formed together on a substrate 91. Fig. 38 shows a top view of the LED driver 60 c. In fig. 38, the LED driver 60c includes a bridge rectifier 62, a protection circuit 63, and a current driving circuit 66. In the present embodiment, the current driving circuit includes two high electron mobility field effect transistors T1 and T2, and the protection circuit 63 includes a protection unit D_clamp. Wherein, the bridge rectifier 62, two high electron mobility field effect transistors T1, T2 and the protection unit D_clampThe substrate 91 is shared. In other words, the LED driver 60c is a monolithic structure (monolithic structure), and the units of the LED driver 60c are formed by a single semiconductor chip through different manufacturing processes. Bridge rectifier 62, two high electron mobility field effect transistors T1, T2, and protection unit D_clampThe electrical connection method is the same as that shown in fig. 36A, and please refer to fig. 36A and the foregoing description. In the present embodiment, the four rectifying diodes of the bridge rectifier 62 are formed by four multi-finger schottky diodes SBD1, SBD2, SBD3, SBD4 and are arrayed on the substrate 91, the two high electron mobility field effect transistors T1 and T2 are multi-finger high electron mobility field effect transistors, and the protection unit D is a protection unit D _clampSuch as a clamping diode in a multi-finger configuration. The bridge rectifier 62 is electrically connected to an ac input power source (not shown) via the contact N, L, and is connected across the ac input power source and a light emitting device (not shown). Equivalently, the schottky diodes SBD1, SBD2, SBD3, and SBD4 in the bridge rectifier 62 are each formed by connecting a plurality of small schottky diodes in parallel. Multi-finger hemts may be used in limited chip area,providing a larger drive current. In one embodiment, each of the schottky diodes SBD1, SBD2, SBD3, SBD4 may also be formed by a plurality of diodes connected in series as shown in fig. 27. In another embodiment, the hemts T1 and T2 are not limited to depletion modes, one of which may be enhancement mode (E-mode) and the other is depletion mode, and the detailed description thereof refers to fig. 29A, 29B and 30. In another embodiment, the hemt T1/T2 of the LED driver 60c can be further connected to a thermistor, and the detailed description thereof refers to the description of fig. 33 to fig. 35, which is not repeated herein.

Please refer to fig. 38 and fig. 39 simultaneously. FIG. 39 shows the Schottky diode SBD1, high electron mobility field effect transistor T1 and protection cell D of FIG. 38 _clampSchematic structural section of (1). As shown in fig. 38, the LED driver 60c includes a bridge rectifier 62 composed of four arrays of schottky diodes SBD1, SBD2, SBD3 and SBD4, two high electron mobility field effect transistors T1 and T2, and a protection unit D_clampAnd a plurality of contacts A, C, E, F, N, L, TD1, TD2, TSG. Wherein the anode A_sbd1～sbd4And cathode C_sbd1～sbd4Formed on Schottky diodes SBD1, SBD2, SBD3, SBD4, respectively; drain electrode D_hemt1、D_hemt2Grid G_hemt1、G_hemt2Source electrode S_hemt1、S_hemt2Formed on the high electron mobility field effect transistors T1, T2, respectively; anode A_clampAnd cathode C_clampAre respectively formed on the protection units D_clampThe above. Schottky diodes SBD1, SBD2, SBD3, SBD4, high electron mobility field effect transistors T1, T2 and protection cell D_clampFormed on the substrate 91 in conjunction with a plurality of contacts A, C, E, F, N, L, TD1, TD2, TSG. In the present embodiment, since the schottky diodes SBD1, SBD2, SBD3, and SBD4 have the same structure, and the high electron mobility field effect transistors T1 and T2 have the same structure, for simplicity of description, the schottky diode SBD1 and the high electron mobility field effect transistor T1 are respectively used as an example in fig. 39, and fig. 39 is a schematic diagram for structural description, and is not an actual structural size or layout. As shown in FIG. 39, a Schottky diode SBD1 comprises a stacked semiconductor layer 90a on a substrate 91, and insulating layers 103a, 103b and an anode A on the stacked semiconductor layer 90a_sbd1And cathode C_sbd1Wherein the anode A_sbd1And cathode C_sbd1Are connected to the contacts A, N, respectively; the high electron mobility field effect transistor T1 on the substrate 91 includes a semiconductor stack 90a, and insulating layers 103a, 103b and a source S on the semiconductor stack 90a_hemt1And a drain electrode D_hemt1Grid G_hemt1Wherein the source S_hemt1And gate G_hemt1Will be connected to the contact TSG and the drain D_hemt1Will connect with contact TD 1; protective unit D on substrate 91_clampComprising a semiconductor stack 90a, and insulating layers 103a, 103b and an anode A on the semiconductor stack 90a_clampAnd cathode C_clampWherein the anode A_clampAnd cathode C_clampAre connected to the contacts E, F, respectively.

The schottky diode SBD1, the high electron mobility field effect transistor T1 and the protection unit D of the present embodiment_clampThe common substrate 91 is provided with the same semiconductor stack 90a, so that the Schottky diode SBD1, the high electron mobility field effect transistor T1 and the protection unit D of the present embodiment are fabricated_clampIn this case, the three semiconductor stacks 90a may be simultaneously formed, and the three semiconductor stacks 90a may be formed on the same substrate 91, thereby simplifying the manufacturing process. In the present embodiment, before forming the semiconductor stack 90a of the present embodiment, a substrate 91 is provided, and the thickness of the substrate 91 is about 175 to 1500 μm. The material of the substrate 91 itself may include a semiconductor material, an oxide material, and/or a metal material. The semiconductor material may include, for example, silicon (Si), silicon carbide (SiC), gallium nitride (GaN), gallium arsenide (GaAs), aluminum nitride (AlN), or the like; the above-mentioned oxide material may include, for example, sapphire (sapphire); the metal material may include copper (Cu) and molybdenum (Mo), for example. In addition, when distinguished by conductivity, the base 91 itself may be a conductive substrate including a silicon (Si) substrate, a gallium nitride (GaN) substrate, a gallium arsenide (GaAs) substrate, or the like, or an insulating substrate, The insulating substrate includes a sapphire (sapphire) substrate, an Silicon On Insulator (SOI) substrate, an aluminum nitride (AlN) substrate, and the like. In addition, the base 91 may be selectively doped with a material to change its conductivity to form a conductive substrate or a non-conductive substrate, and in the case of a silicon (Si) substrate, it may be doped with boron (B), arsenic (As), or phosphorus (P) to make it conductive.

After providing the substrate 91, the semiconductor stack 90a is formed over the substrate 91. The semiconductor stack 90a includes a buffer layer 94, a channel layer 96, a high-valence band gap layer 98 and a cap layer 100, and the layers of the semiconductor stack 90a may be epitaxially formed on the substrate 91. In addition, before forming the buffer layer 94, a nucleation layer (not shown) may be optionally formed on the substrate 91, wherein the thickness of the nucleation layer is about 20nm to 200nm, and the epitaxial quality of the buffer layer 94 and the channel layer 96, the valence band gap layer 98 and the cap layer 100 formed thereon is better. The nucleation layer is, for example, a iii-v semiconductor material, including aluminum nitride (AlN), gallium nitride (GaN), or aluminum gallium nitride (AlGaN). The semiconductor stack 90a may be epitaxially grown on the substrate 91 by a method including, but not limited to, metal-organic chemical vapor deposition (MOCVD) or molecular-beam epitaxy (MBE), but the present application is not limited to the epitaxial method, i.e., the substrate 91 is not limited to the growth substrate. In other embodiments, the semiconductor stack 90a may be epitaxially grown on another growth substrate, and then the semiconductor stack 90a is bonded to the substrate 91, wherein the substrate 91 comprises a metal, a dielectric material, an insulating material, or a composite material. Bonding means include gluing, welding, hot pressing, and the like. Alternatively, the semiconductor stack 90a epitaxially formed on a growth substrate is directly bonded to the substrate 91 in an aligned manner, and then the growth substrate is completely or partially removed, so that the semiconductor stack 90a is located on the substrate 91. Alternatively, the semiconductor stack 90a is epitaxially grown on another growth substrate, the growth substrate is thinned, and the thinned growth substrate, the semiconductor stack 90a thereon, and the substrate 91 are bonded to form the semiconductor stack 90a on the composite substrate formed by the thinned growth substrate and the substrate 91.

After the nucleation layer is formed, a buffer layer 94 is formed thereon, and the buffer layer 94 may be intrinsic GaN doped with carbon (C-doped) as previously described. The buffer layer 94 is used to make the channel layer 96 and the high valence band gap layer 98 formed thereon have better epitaxial quality, and the thickness thereof is about 1 μm to 10 μm. The buffer layer 94 may be a single layer or a plurality of layers, and when the buffer layer 94 is a plurality of layers, it may include a superlattice layer (superlattice layer) or a plurality of layers with different materials. The material of the single or multiple buffer layers 94 may include iii-v semiconductor materials, such as aluminum nitride (AlN), gallium nitride (GaN), or aluminum gallium nitride (AlGaN), and may be doped with other elements, such as carbon or iron, wherein the doping concentration may be graded or fixed in the growth direction. In addition, when the buffer layer 94 is a superlattice stack, it may be composed of two epitaxial layers stacked alternately with different materials, such as group iii-v semiconductor materials, for example, aluminum nitride (AlN) and aluminum gallium nitride (AlGaN), wherein the sum of the aluminum nitride layer and the gallium nitride layer is about 2nm to 30nm, and the overall thickness is about 1 μm to 5 μm.

After the buffer layer 94 is formed, the channel layer 96 and the high valence band gap layer 98 are epitaxially formed on the buffer layer 94. The channel layer 96 has a thickness of 50-300 nm, is formed on the buffer layer 94, and has a first energy gap. The high valence band gap layer 98 has a thickness in the range of 20 to 50nm, is formed on the channel layer 96, and has a second energy gap higher than the first energy gap, and the lattice constant of the high valence band gap layer 98 is smaller than that of the channel layer 96. In the present embodiment, the channel layer 96 includes indium gallium nitride (In) _xGa_(1-x)N)，0≤x<1, the material of the high valence band gap layer 98 is aluminum gallium nitride (Al)_yGa_(1-y)N), y is between 0.1 and 0.3, the channel layer 96 and the high valence band gap layer 98 may be intrinsic semiconductors; in other embodiments, the material of the high valence band gap layer 98 may be aluminum indium gallium nitride (Al)_wIn_zGa_(1-z)N)，0<w<1，0≤z<1. As previously described, a two-dimensional electron cloud may be formed within the channel layer 96 adjacent to the junction of the channel layer 96 and the high valence band gap layer 98 as a conductive channel. In detail, twoThe formation of the electron cloud is due to the bending of the energy band due to the spontaneous polarization (piezoelectric polarization) of the high valence band gap layer 98 and the piezoelectric polarization (piezoelectric polarization) formed by the lattice constant mismatch between the channel layer 96 and the high valence band gap layer 98, so that a part of the energy band is located below the fermi level, and a two-dimensional electron cloud is formed at the junction between the channel layer 96 and the high valence band gap layer 98.

After forming the high valence band gap layer 98 on the channel layer 96, the buffer layer 94, the channel layer 96, the high valence band gap layer 98, and the cap layer 100 may be patterned by inductively coupled plasma etching, for example, to complete the mesa region 95, as shown in step 140 of fig. 14. Since before this step, the Schottky diode SBD1, the semiconductor stack 90a of the high electron mobility field effect transistor T1 and the protection unit D are formed _clampThe semiconductor stack 90a of (a) is connected to each other via the semiconductor stack 90a of the schottky diode SBD1, the semiconductor stack 90a of the hemt T1 and the protection cell D_clampThe semiconductor stacks 90a can be separated from each other, thereby achieving the purpose of electrical insulation between the semiconductor stacks 90 a. However, the present application is not limited thereto, and the forming timing and the forming manner of the mesa region 95 may be adjusted according to the requirement of the manufacturing process, for example, in other embodiments, when the buffer layer 94 is a high resistance layer, the buffer layer 94 does not need to be completely etched when the mesa region 95 is formed, and the purpose of electrically insulating the semiconductor stacks 90a can be achieved by only etching the channel layer 96, the high-valence band gap layer 98, and the cap layer 100 on the buffer layer 94. In other words, in the above case, the buffer layer 94 may be completely or partially retained, the schottky diode SBD1, the hemt T1 and the protection cell D_clampIn the case of the common buffer layer 94, the semiconductor stacks 90a can still be electrically isolated from each other.

In the present embodiment, in order to make the DC voltage V constant_DC-INSmaller than the protection unit D_clampReverse conducting voltage V_clampIn the case of (2), protection unit D _clampNon-conductive, and further forming after forming the high valence band gap layer 98 on the channel layer 96Forming a p-type barrier layer Pb in the protection unit D_clampThe two-dimensional electron cloud under the p-type barrier layer Pb in the channel layer 96 is completely depleted in the high valence band gap layer 98, thereby achieving the above-mentioned DC voltage V_DC-INSmaller than the protection unit D_clampReverse conducting voltage V_clampIn the case of (2), protection unit D_clampThe purpose of non-conduction. This embodiment is a pair protection unit D_clampThe high valence band gap layer 98 is doped to form a p-type barrier layer Pb, for example. When the p-type barrier layer Pb is formed in the high valence band gap layer 98, the p-type barrier layer Pb changes the position of the fermi level, so that the fermi level at the position of the p-type barrier layer Pb moves away from the conduction band toward the valence band, and once the fermi level at the position of the p-type barrier layer Pb is located below the conduction band, the two-dimensional electron cloud below the p-type barrier layer Pb in the channel layer 96 is completely depleted. In general, the doping concentration of the p-type barrier layer Pb is positively correlated with the carrier concentration, and the carrier concentration and the thickness of the p-type barrier layer Pb are respectively negatively correlated with the concentration of the two-dimensional electron cloud, and in the case where the p-type barrier layer Pb is formed on the high valence band gap layer 98 layer, the higher the carrier concentration of the p-type barrier layer Pb layer is or the thicker the thickness Tb of the p-type barrier layer Pb layer is, the more the fermi level at the position of the p-type barrier layer Pb moves in the valence band direction, and the lower the concentration of the two-dimensional electron cloud therebelow is. In this embodiment, the fermi level of the p-type barrier layer Pb is located below the conduction band and does not overlap with the conduction band by making the thickness Tb of the p-type barrier layer Pb greater than or equal to the thickness of the high valence band gap layer 98, so that the two-dimensional electron cloud below the p-type barrier layer Pb is completely depleted, or the conduction band of the p-type barrier layer Pb is not overlapped with the fermi level by increasing the carrier concentration of the p-type barrier layer Pb, so that the two-dimensional electron cloud below the p-type barrier layer Pb is completely depleted. In other words, the carrier concentration and thickness Tb of the p-type barrier layer Pb affect the polarity of the p-type barrier layer Pb, and further change the energy band position of the p-type barrier layer Pb, so that the distance between the fermi level and the valence band is changed, and thus the two-dimensional electron cloud concentration below the p-type barrier layer Pb is also changed.

Further, a p-type barrier layer PbThe carrier concentration and the length Lb also affect the depletion width between the p-type barrier layer Pb and the channel layer 96. Due to the protection unit D_clampReverse conducting voltage V of_clampThe magnitude of the reverse conducting voltage V can be influenced by the concentration of the two-dimensional electron cloud and the width of a depletion region between the p-type barrier layer Pb and the channel layer 96, so that the reverse conducting voltage V can be changed by adjusting the carrier concentration, the length Lb and the thickness Tb of the p-type barrier layer Pb_clampThe size of (2). In detail, the protection unit D_clampReverse conducting voltage V_clampIs inversely related to the carrier concentration of the p-type barrier layer Pb and positively related to the length Lb of the p-type barrier layer Pb, the lower the carrier concentration or the longer the length Lb is, the protection unit D_clampThe wider the depletion region, so that the reverse conducting voltage V is_clampThe higher the depletion region mentioned here means a region near the junction of the p-type barrier layer Pb and the channel layer 96 where there are no movable carriers. The protection unit D is protected by properly adjusting the carrier concentration of the p-type barrier layer Pb and the length Lb of the p-type barrier layer Pb_clampReverse conducting voltage V_clampCan satisfy the condition of less than the breakdown voltage V of the high electron mobility field effect transistor T1_breakThe requirements of (a). In summary, since the p-type barrier layer Pb of the present embodiment can change the concentration of two-dimensional electron cloud thereunder, the protection unit D can also be adjusted _clampReverse conducting voltage V of_clampTherefore, the protective unit D can be achieved by properly adjusting the carrier concentration and the length Lb of the p-type barrier layer Pb_clampThe reverse turn-on voltage Vclamp is less than the breakdown voltage V of the high electron mobility field effect transistor T1_breakAnd when the DC voltage V is_DC-INSmaller than the protection unit D_clampReverse conducting voltage V_clampIn the case of (2), protection unit D_clampThe purpose of non-conduction. The present application is not limited to the above method, and the above purpose can be achieved by other methods, for example, in other embodiments, the p-type barrier layer Pb can be additionally formed on the protection unit D_clampWhen the p-type barrier layer Pb is formed on the high valence band gap layer 98, the p-type barrier layer Pb changes the position of the Fermi level such that the p-type barrier layer Pb is located above the high valence band gap layer 98The fermi level at the location moves away from the conduction band in the direction of the valence band, and once the fermi level at the location of the p-type barrier layer Pb is below the conduction band, the two-dimensional electron cloud below it in the channel layer 96 is completely depleted. In general, the doping concentration of the p-type barrier layer Pb is positively correlated to the carrier concentration, and the carrier concentration of the p-type barrier layer Pb affects the two-dimensional electron cloud concentration. Specifically, when the p-type barrier layer Pb is formed on the high valence band gap layer 98, the thickness of the p-type barrier layer Pb is relatively independent of the concentration of the two-dimensional electron cloud, and the two-dimensional electron cloud under the p-type barrier layer Pb and in the channel layer 96 is completely depleted mainly by adjusting the carrier concentration of the p-type barrier layer Pb, and the energy protection unit D is changed by adjusting the carrier concentration, the thickness Tb, and the length Lb of the p-type barrier layer Pb _clampReverse conducting voltage V of_clampThe principle of the above-mentioned size is described above, and will not be described herein again.

After the platform region 95 is completed, referring to the method of step 144 in fig. 14, the insulation layer 103a is grown on the high valence band gap layer 98 of the schottky diode SBD1, the high valence band gap layer 98 of the hemt T1, and the protection unit D by epitaxial growth or sputtering and a patterning process_clampThe insulating layer 103a may be epitaxially grown on the high valence band gap layer 98 by, for example, metal-organic chemical vapor deposition (MOCVD) or molecular-beam epitaxy (MBE). In the present embodiment, the insulating layer 103a substantially covers the surface of the high valence band gap layer 98, which functions to improve the surface leakage current and protect the surface of the high valence band gap layer 98. The insulating layer 103a may be an insulating material or a high-resistance material, including a nitride insulating material, such as silicon nitride (SiN)_x) Oxide insulating materials, e.g. silicon dioxide (SiO)₂) Or p-type iii-v semiconductors such as p-type gallium nitride layers (p-GaN).

However, the present application is not limited to the above, and other materials with the same characteristics may be substituted for the above materials, and the position of the insulating layer 103a is not limited to the disclosure of the present application.

After the insulating layer 103a is formed, the schottky diode SBD1, the hemt T1 and the protection cell D are formed in the same process (step 142 of fig. 14)_clampA metal layer (not shown) is deposited over the insulating layer 103b and patterned to form a plurality of metal sheets 102 ' a, 102 ' b, 102 ' c, 102'd, 102 ' e. In this embodiment, ohmic contact between the plurality of metal sheets 102 'a, 102' b, 102 'c, 102'd, 102 'e, 102' f and the high valence band gap layer 98 may be formed by selecting an appropriate metal layer material (e.g., titanium/aluminum/titanium/gold) and/or by a fabrication process (e.g., thermal annealing). Wherein the metal sheets 102 'a, 102' b are used as anodes A of the Schottky diodes SBD1_sbd1And cathode C_sbd1(ii) a The metal pieces 102 'c, 102'd are used as the source S of the high electron mobility field effect transistor T1_hemt1And a drain electrode D_hemt1(ii) a The metal sheets 102 'e, 102' f are used as protection units D_clampAnode A of_clampAnd cathode C_clamp. At a plurality of electrodes A_sbd1、C_sbd1、S_hemt1、D_hemt1、A_clamp、C_clampAfter fabrication, referring to step 146 of fig. 14, a metal layer (not shown) is deposited over the hemt T1 and patterned to form a metal sheet 104' a. In this embodiment, a Schottky contact between the metal plate 104' a and the high valence band gap layer 98 may be formed by selecting an appropriate metal layer material (e.g., Ni/Au/Pt). Wherein the metal sheet 104' a is used as the gate G of the high electron mobility field effect transistor T1 _hemt1。

On the formation of the gate G_hemt1Thereafter, an insulating layer 103b may be further formed to cover the high-valence band gap layer 98, so as to prevent the high-valence band gap layer 98 from being degraded by moisture to cause an electrical influence. In the present embodiment, please refer to the previous description of the insulating layer 103a for the material of the insulating layer 103b, which is not repeated herein. In order to facilitate electrical connection between the electrodes and the outside, after the insulating layer 103b is formed, a plurality of contacts C, and C shown in fig. 38 may be formed on the substrate 91,N, L, A, TD1, TD2, TSG, E, F. Wherein the junction C, N, L, A is used to connect with the anode A of the Schottky diodes SBD1, SBD2, SBD3 and SBD4_sbd1～sbd4And cathode C_sbd1～sbd4Connecting (please refer to the following detailed connection method); the contacts TD1 and TD2 are respectively used for connecting with the drains D of the high electron mobility field effect transistors T1 and T2_hemt1、D_hemt2Connecting; contact TSG and source S of high electron mobility field effect transistor T1_hemt1And gate G_hemt1And a source S of the high electron mobility field effect transistor T2_hemt2And gate G_hemt2Connecting; the contact E and the contact F are respectively connected with the protection unit D_clampAnode A of_clampAnd cathode C_clampAnd (4) connecting. In FIG. 39, only the Schottky diode SBD1, the high electron mobility field effect transistor T1 and the protection cell D are listed _clampThe relevant contacts A, N, TD1, TSG, E, F. Wherein, the contact A and the contact N are respectively the anode A of the Schottky diode SBD1_sbd1And cathode C_sbd1Connecting; contact TSG and source S of high electron mobility field effect transistor T1_hemt1And gate G_hemt1Connected to the drain D of the high electron mobility field effect transistor T1 at a junction TD1_hemt1Connecting; the contact E and the contact F are respectively connected with the protection unit D_clampAnode A of_clampAnd cathode C_clampAnd (4) connecting. The structures and formation manners of the schottky diodes SBD2, SBD3, SBD4 and hemt T2 are the same as those of the schottky diodes SBD1 and hemt T1, and reference is made to the above description of the schottky diodes SBD1 and hemt T1, which is not repeated herein.

In the present application, to achieve the electrical connection of FIG. 36A, contact A is connected to the anode A of Schottky diode SBD1 except that it is connected to the anode A of Schottky diode SBD1 as shown in FIG. 38_sbd1In addition, the anode A of the Schottky diode SBD2 is connected_sbd2(ii) a Contact N except for cathode C connected to Schottky diode SBD1_sbd1In addition, the anode A of the Schottky diode SBD4 is connected_sbd4(ii) a The junction L is connected with the anode A of the Schottky diode SBD3_sbd3And cathode C of Schottky diode SBD2 _sbd2(ii) a Contact C is connected with cathode C of Schottky diode SBD3_sbd3And cathode C of Schottky diode SBD4_sbd4(ii) a The contact TSG is connected to the source S of the high electron mobility field effect transistor T1_hemt1And gate G_hemt1In addition, it also cooperates with the source S of the high electron mobility field effect transistor T2_hemt2And gate G_hemt2Connecting; contact TD1 and drain D of high electron mobility field effect transistor T1_hemt1Connecting; contact TD2 and drain D of high electron mobility field effect transistor T2_hemt2Connecting; the contact E and the contact F are connected to the protection unit D respectively as described above_clampAnode A of_clampAnd cathode C_clampAnd (4) connecting.

After the contacts A, C, E, F, L, N, TD1, TD2, TSG are formed, an insulating layer 103c may be selectively formed on the side surface of the mesa region 95 and the surfaces of the contacts A, C, E, F, L, N, TD1, TD2, TSG to prevent the device from being degraded by moisture, and to expose a portion of the surfaces of the contacts A, C, E, F, L, N, TD1, TD2, TSG for electrical connection. After the above-described insulating layer is completed, the LED driver 60c of the present application is completed. In actual operation, please refer to fig. 36A and fig. 38, one end of the AC input power source AC-source is electrically connected to the node L of the bridge rectifier 62, and the other end of the AC input power source AC-source is electrically connected to the node N of the bridge rectifier 62; one end of the LED 18 is electrically connected to the contact TD1 and the contact TD2 of the current drive circuit 66, and the other end of the LED 18 is electrically connected to the contact C of the bridge rectifier 62; electrically connecting a contact TSG of the current drive circuit 66 to a contact A of the bridge rectifier 62; connecting a contact E of the protection circuit 63 with a contact A of the bridge rectifier 62; the contact F of the protection circuit 63 is connected to the contact C of the bridge rectifier 62.

In summary, the LED driver according to an embodiment of the present application includes a valley fill circuit, which can maintain the minimum voltage of the dc power supply at half of the peak voltage value, so as to provide enough voltage to make the light emitting device continuously emit light. The LED driver according to another embodiment of the present application includes a protection unit, which can prevent the breakdown of the hemt of the current driving circuit in the LED driver due to the glitch, thereby achieving the effect of protecting the light emitting device. In another embodiment of the present application, the LED driver includes a valley fill circuit and a protection unit, so as to achieve the effect of providing sufficient voltage to make the light emitting element continuously emit light and protect the light emitting element. The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in the claims of the present invention should be covered by the present invention.

Claims (9)

1. A driver for driving a light emitting device includes:

the rectifier circuit comprises a rectifier diode and a rectifier diode, wherein the rectifier diode is used for receiving an alternating current input power supply and converting the alternating current input power supply into a direct current power supply, and the direct current power supply comprises a direct current and a direct current voltage;

the current driving circuit comprises a constant current unit, wherein the rectifying circuit, the current driving circuit and the light-emitting element are connected in series, and the current driving circuit is used for limiting the magnitude of the direct current to drive the light-emitting element; and

The protection circuit comprises a protection unit, wherein the protection circuit is connected across the current driving circuit and the light-emitting element, and when the direct current voltage is greater than a certain value, the direct current flows to the protection circuit;

wherein, the rectifier diode, the constant current unit and the protection unit share a substrate;

the rectifier diode, the constant current unit and the protection unit respectively comprise semiconductor laminated layers, and the structures and the constituent materials of the semiconductor laminated layers are the same.

2. The driver of claim 1, wherein the semiconductor stacks are epitaxially formed on the substrate.

3. The driver of claim 2, wherein the semiconductor stacks respectively comprise a buffer layer on the substrate, a channel layer on the buffer layer, and a high valence band gap layer on the channel layer.

4. The driver of claim 3, wherein the protection unit further comprises a p-type barrier layer over the channel layer.

5. The driver of claim 4, wherein the p-type barrier layer has a thickness greater than the high valence band gap layer.

6. A driver as claimed in claim 3, wherein the protection unit is a clamping diode.

7. The driver as claimed in claim 1, wherein the constant current unit, the protection unit or the rectifying diode is a multi-finger high electron mobility field effect transistor.

8. The driver as claimed in claim 1, wherein the number of the rectifying diodes is plural, and the number of the constant current units is plural.

9. The driver of claim 8, wherein the plurality of rectifying diode arrays are arranged.

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