CN108665850B - Drive substrate and display panel - Google Patents
Drive substrate and display panel Download PDFInfo
- Publication number
- CN108665850B CN108665850B CN201810451384.7A CN201810451384A CN108665850B CN 108665850 B CN108665850 B CN 108665850B CN 201810451384 A CN201810451384 A CN 201810451384A CN 108665850 B CN108665850 B CN 108665850B
- Authority
- CN
- China
- Prior art keywords
- layer
- display area
- substrate
- disposed
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 125
- 238000001514 detection method Methods 0.000 claims abstract description 75
- 239000010409 thin film Substances 0.000 claims description 14
- 230000001788 irregular Effects 0.000 claims description 10
- 239000003990 capacitor Substances 0.000 abstract description 15
- 238000000034 method Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 230000001934 delay Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The application provides a drive substrate and a display panel, the drive substrate comprises a substrate, a detection circuit layer, a first insulating layer and at least one signal line. The detection circuit layer is arranged in the non-display area and arranged around the display area. The first insulating layer is located in the special-shaped non-display area and the special-shaped display area and arranged between the substrate and the detection circuit layer. The signal line is used for driving a plurality of first pixel driving units arranged in the special-shaped display area. At least one signal line is arranged between the substrate and the first insulating layer, and the at least one signal line extends from the special-shaped non-display area to the special-shaped display area, so that the detection circuit layer and the at least one signal line form at least one compensation capacitor. The compensation capacitor can increase the load of the signal line, so that the display area of the screen body tends to be consistent.
Description
Technical Field
The present invention relates to the field of display, and in particular, to a driving substrate and a display panel.
Background
With the continuous development of the mobile phone industry, the screen body of the full-screen mobile phone has the advantages of large screen occupation ratio and narrow frame, the visual effect of a viewer is greatly improved, and the full-screen mobile phone is widely concerned by people.
In the manufacturing process of the full-face screen, a special-shaped display area is usually formed on a screen body by special-shaped designs such as a slot and the like. The number of pixels at the groove is less than that of the pixels in the normal display area. Therefore, the load of the pixel driving signal in the special-shaped display area is greatly different from the capacitance load of the pixel driving signal in the normal display area, so that the delay of the pixel scanning and other driving signals is different. Due to different delays of driving signals such as pixel scanning of the screen body, the brightness of a special-shaped display area and the brightness of a normal display area of the screen body are different, and normal use is affected.
Disclosure of Invention
Therefore, it is necessary to provide a driving substrate and a display panel that solve the above-mentioned problem, in order to solve the problem of the difference between the luminance of the special-shaped display area and the luminance of the normal display area of the conventional mobile phone.
A drive substrate, comprising:
the display device comprises a substrate and a display unit, wherein the substrate comprises a display area and a non-display area, the non-display area is arranged around the display area, the non-display area comprises a special-shaped non-display area, the display area comprises a special-shaped display area, and the special-shaped non-display area and the special-shaped display area are arranged adjacently;
the detection circuit layer is arranged in the non-display area and arranged around the display area;
the first insulating layer is positioned in the special-shaped non-display area and the special-shaped display area and is arranged between the substrate and the detection circuit layer;
at least one signal line for driving a plurality of first pixel driving units disposed in the specially shaped display region, the at least one signal line disposed between the substrate and the first insulating layer, the at least one signal line extending from the specially shaped non-display region to the specially shaped display region such that the detection circuit layer and the at least one signal line form at least one compensation capacitor.
In one embodiment, further comprising:
the first wiring layer is positioned in the special-shaped display area and the special-shaped non-display area and is arranged on the surface, away from the substrate, of the first insulating layer, and the projection of the detection circuit layer and the first wiring layer on the substrate is at least partially overlapped in the special-shaped non-display area;
and the second insulating layer is positioned in the special-shaped display area and the special-shaped non-display area, is arranged on the surface of the first wiring layer far away from the substrate, and is arranged between the detection circuit layer and the first wiring layer.
In one embodiment, in the special-shaped non-display area, the vertical distance between the first routing layer and the projection superposition part of the detection circuit layer on the substrate is smaller than the vertical distance between the first routing layer and the projection superposition part of the detection circuit layer on the substrate.
In one embodiment, the display device further comprises a second wiring layer disposed in the special-shaped display area, the second wiring layer is disposed on the same layer as the detection circuit layer, and is disposed on a surface of the second insulating layer away from the substrate.
In one embodiment, the first pixel driving unit includes a thin film transistor disposed between the first insulating layer and the substrate, and the thin film transistor includes a gate layer integrally formed with the signal line on a same layer.
In one embodiment, the thin film transistor further includes an active layer disposed between the substrate and the gate layer, and a third insulating layer disposed between the active layer and the gate layer.
In one embodiment, the display device further includes at least one gate driving unit disposed on the substrate and located in the special-shaped non-display region, the gate driving unit is disposed between the detection circuit layer and the special-shaped display region in a plane where the substrate is located, and one of the gate driving units is electrically connected to the pixel driving unit row through one of the signal lines.
In one embodiment, the display device further comprises at least one capacitance electrode layer, the capacitance electrode layer is located in the irregular non-display area, the capacitance electrode layer is arranged between the gate driving unit and the irregular display area in a plane where the irregular non-display area is located, the capacitance electrode layer is arranged on one side, away from the substrate, of the first insulating layer, and a projection of the capacitance electrode layer on the substrate and a projection of the signal line on the substrate at least partially coincide.
In one embodiment, the capacitance electrode layer and the detection circuit layer are disposed in the same layer.
A display panel, the display area further comprising a normal display area, comprising:
the drive substrate comprises a plurality of second pixel drive units arranged on the substrate and positioned on the substrate
A display area;
the plurality of first pixel units are electrically connected with the plurality of first pixel driving units in a one-to-one correspondence manner;
and the plurality of second pixel units are electrically connected with the plurality of second pixel driving units in a one-to-one correspondence manner.
In the driving substrate provided in this embodiment, the first insulating layer is disposed between the substrate and the detection circuit layer. At least one signal line is disposed between the substrate and the first insulating layer. The signal line, the first insulating layer and the detection circuit layer are sequentially arranged so that the detection circuit layer and the at least one signal line form at least one compensation capacitor. The electrical compensation capacitance may increase a capacitive load of the signal line. After the capacitance load of the signal lines is increased, the capacitance load of each signal line in the special-shaped display area and the capacitance load of each signal line in the normal display area tend to be the same, and further the surface brightness of the screen body tends to be consistent. The cost can be saved and the production efficiency can be improved by utilizing the existing detection circuit layer and the signal line to form the capacitive load.
Drawings
Fig. 1 is a schematic view of a driving substrate according to an embodiment of the present disclosure;
FIG. 2 is a cross-sectional view of a non-display area A-A according to an embodiment of the present disclosure;
FIG. 3 is a cross-sectional view of a non-display area B-B in accordance with an embodiment of the present disclosure;
fig. 4 is a partially enlarged view of a special-shaped non-display area provided in an embodiment of the present application.
Description of reference numerals:
drive substrate 10
Special-shaped display area 110
Non-display area 200
Special-shaped non-display area 210
Pixel drive unit row 330
First pixel driving unit 331
Second pixel driving unit 332
First insulating layer 410
Second insulating layer 420
Third insulating layer 430
Detailed Description
Referring to fig. 1 to 3, an embodiment of the present application provides a driving substrate 10. The driving substrate 10 includes a base 130, a detection circuit layer 310, and at least one signal line 320. The substrate 130 includes a display area 100 and a non-display area 200. The non-display area 200 is disposed around the display area 100. The non-display area 200 includes a shaped non-display area 210. The display area 100 comprises a shaped display area 110. The shaped non-display area 210 is disposed adjacent to the shaped display area 110.
The first insulating layer 410 is positioned in the shaped non-display region 210 and the shaped display region 110. The first insulating layer 410 is disposed between the substrate 130 and the detection circuit layer 310. The detection circuit layer 310 is disposed in the non-display area 200. The detection circuit layer 310 is disposed around the display area 100. The signal line 320 is disposed between the substrate 130 and the first insulating layer 410. That is, the first insulating layer 410 is disposed between the signal line 320 and the detection circuit layer 310. The at least one signal line 320 extends from the shaped non-display area 210 to the shaped display area 110. So that the detection circuit layer 310 and the at least one signal line 320 form at least one compensation capacitance. That is, in the special-shaped non-display area 210, the surface of the signal line 320 facing away from the substrate 130 and the surface of the detection circuit layer 310 facing the substrate 130 are oppositely arranged to form the compensation capacitor.
The signal line 320 is used for driving a plurality of first pixel driving units 331 disposed in the special-shaped display area 110. The profiled display area 10 further comprises at least one row 330 of pixel driving units. The pixel driving unit row 330 includes a plurality of first pixel driving units 331. The pixel driving unit row 330 is disposed on the substrate 130 and located in the special-shaped display area 110. One of the signal lines 320 is electrically connected to a plurality of first pixel driving units 331 in one of the pixel driving unit rows 330.
The signal line 320 has a certain width, that is, a projection of the signal line 320 on the substrate 130 has a certain area. The surface of the signal line 320 facing away from the substrate 130 is the surface of the signal line 320 facing the detection circuit layer 310. The surface of the detection circuit layer 310 facing the substrate 130 and the surface of the signal line 320 facing away from the substrate 130 form the compensation capacitor.
The driving substrate 10 may be used for an O L ED display screen, the irregular non-display area 210 and the irregular display area 110 may be provided with a slot or a circular arc, etc. due to the slot or circular arc structure, the number of the first pixel driving units 331 in the driving substrate 10 is different from the number of the second pixel driving units 332 in the normal display area 120. a plurality of signal lines 320 are generally disposed on the driving substrate 10. each signal line 320 drives a plurality of pixel driving units. in the normal display area 120, the number of the pixel driving units driven by each signal line 320 is generally the same as that in the normal display area 120. since the irregular display area 110 is different from that of the normal display area 120, in the irregular display area 110, the number of the first pixel driving units 331 driven by each signal line 320 is different from that of the second pixel driving units 332 driven by each signal line 320 in the normal display area 120. the number of the first pixel driving units 331 driven by each signal line 320 in the irregular display area 110 is generally smaller than that of the signal lines 320 in the normal display area 120. the irregular display area 320 may be understood as a load line 320.
The special-shaped non-display area 210 may be provided with a driving circuit, a power circuit, and the like. The shaped non-display area 210 may be disposed around the shaped display area 110. The shaped non-display area 210 may be disposed according to the shape of the shaped display area 110. When the special-shaped display area 110 is directly adjacent to the normal display area 120, the special-shaped non-display area 210 only surrounds the edge of the special-shaped display area 110 which is not adjacent to the normal display area 120.
The arrangement of the first pixel driving unit 331 may be determined according to the shape of the shaped display area 110. The plurality of first pixel driving units 331 may be driven through at least one of the signal lines 320. The signal line 320 may connect the plurality of first pixel driving units 331 in series to constitute the pixel driving unit row 330. The signal line 320 may have a curved line or a polygonal line structure. The arrangement of the first pixel driving unit 331 may be set according to the shape of the special-shaped display area 110. The detection circuit layer 310 may be formed on the surface of the substrate 130 by deposition. The detection circuit layer 310 may be used to detect cracks in the screen body. It is understood that the detection circuit layer 310 may be formed on a layer of the upper surface of the substrate 130 by the same patterning process. The detection circuit layer 310 has a certain area.
In one embodiment, the plane of the detection circuit layer 310 and the surface of the signal line 320 facing away from the substrate 130 are relatively parallel. The surface of the detection circuit layer 310 facing the substrate 130 is opposite to the surface of the signal line 320 facing away from the substrate 130 to form a capacitive structure, and the capacitive structure has a capacitive load. In the special-shaped display area 110, since the number of the first pixel driving units 331 connected to each of the scan lines is different, the capacitive load to be compensated for by each of the scan lines is also different. By varying the surface area of the signal line 320 facing away from the substrate 130 and the surface area of the detection circuit layer 310 facing towards the substrate 130, the size of the capacitive structure can be varied.
Referring back to fig. 3, in one embodiment, there may be a plurality of scan lines arranged in parallel. The scan lines and the detection circuit layer 310 form a plurality of compensation capacitors. Each of the compensating capacitive loads may be varied and capacitive compensation may be performed for different ones of the scan lines. Therefore, it can be understood that the signal line 320 may be formed by patterning a metal layer deposited on the surface of the substrate 130. The first insulating layer 410 may be patterned to obtain structures with different functions.
In the embodiment of the present application, the first insulating layer 410 is disposed between the substrate 130 and the detection circuit layer 310. At least one signal line 320 is disposed between the substrate 130 and the first insulating layer 410. The signal line 320, the first insulating layer 410, and the detection circuit layer 310 are sequentially disposed such that the detection circuit layer 310 and the at least one signal line 320 form at least one compensation capacitor. That is, the surface of the signal line 320 facing away from the substrate 130 and the surface of the detection circuit layer 310 facing the substrate 130 are oppositely disposed, so that the signal line 320, the first insulating layer 410 and the detection circuit layer 310 constitute a compensation capacitor. The compensation capacitance may increase the capacitive load of the signal line 320. After the capacitance load of the signal lines 320 is increased, the capacitance load of each signal line 320 in the special-shaped display area 110 and the capacitance load of each signal line 320 in the normal display area 120 tend to be the same, so that the surface brightness of the screen tends to be consistent. The existing capacitance load formed by the detection circuit layer 310 and the signal line 320 can save cost and improve production efficiency.
Referring to fig. 2 again, in one embodiment, the first pixel driving unit 331 includes a thin film transistor 340. The thin film transistor 340 is disposed between the first insulating layer 410 and the substrate 130. The thin film transistor 340 is disposed on the surface of the substrate 130. The thin film transistor 340 includes an active layer 341 and a gate layer 342. The active layer 341 is disposed between the substrate 130 and the gate layer 342. The gate layer 342 may be integrally formed with the signal line 320 in the same layer. The gate layer 342 and the signal line 320 may be formed by patterning the same metal layer deposited on the surface of the substrate 130. The gate layer 342 and the signal line 320 may have a continuously extending structure, thereby improving the production efficiency.
In one embodiment, the signal lines 320 are scan lines. The gate layer 342 may be made of a metal material. The active layer 341 may form a source electrode, a drain electrode, and a channel of the thin film transistor.
In one embodiment, the driving substrate 10 further includes a first routing layer 350 and a second insulating layer 420. The first wiring layer 350 is disposed on the shaped display area 110 and the shaped non-display area 210, and is disposed on a surface of the first insulating layer 410 away from the substrate 130.
The second insulating layer 420 is positioned in the shaped display area 110 and the shaped non-display area 210. The second insulating layer 420 is further disposed on the surface of the first routing layer 350 away from the substrate 130, and between the detection circuit layer 310 and the first routing layer 350. In the shaped non-display area 210, the projection of the detection circuit layer 310 and the first routing layer 350 on the substrate 130 at least partially coincide. The detection circuit layer 310 and the first routing layer 350 may constitute a capacitive structure. That is, in the shaped non-display area 210, the surface of the first routing layer 350 facing away from the substrate 130 is opposite to the surface of the detection circuit layer 310 facing toward the substrate 130 to form the capacitor structure.
The surface of the first routing layer 350 facing away from the substrate 130 and the surface of the detection circuit layer 310 facing toward the substrate 130 are disposed opposite to each other, so that the first routing layer 350, the second insulation layer 420 and the detection circuit layer 310 sequentially form a capacitor structure. In one embodiment, the surface of the first routing layer 350 facing away from the substrate 130 is disposed parallel to the surface of the detection circuit layer 310 facing toward the substrate 130.
The first routing layer 350 may be made of a metal material. The first routing layer 350 may form a capacitive structure with the gate layer 342 to further increase the capacitive load of the scan lines.
In one embodiment, the plane of the first routing layer 350, the detection circuit layer 310 and the signal line 320 may be three parallel planes arranged at intervals. The first routing layer 350, the detection circuit layer 310 and the scan lines thus have a common projected area on the substrate 130. The first routing layer 350 and the signal line 320 may also have opposite areas. The first routing layer 350 and the signal line 320 may constitute a capacitive structure to further increase the capacitive load of the signal line 320.
In one embodiment, in the special-shaped non-display area 210, a vertical distance between the first routing layer 350 and a projected overlapping portion of the detection circuit layer 310 on the substrate 130 is smaller than a vertical distance between the first routing layer 350 and a projected overlapping portion of the detection circuit layer 310 on the substrate 130. That is, the thickness of the portion of the second insulating layer 420 located between the first routing layer 350 and the detection circuit layer 310 is smaller than the thickness of the other portions of the second insulating layer 420 in the shaped display area 110 and the shaped non-display area (210). The thickness of the second insulating layer 420 is made thinner by a mask process in the process of fabricating the second insulating layer 420. The vertical distance between the first routing layer 350 and the projection superposition part of the detection circuit layer 310 on the substrate 130 is smaller than the vertical distance between the first routing layer 350 and the projection superposition part of the detection circuit layer 310 on the substrate 130, so that the capacitance load formed by the detection circuit layer 310 and the first routing layer 350 can be further increased, the process is simple, and the working efficiency can be improved.
In one embodiment, the driving substrate 10 further includes a second routing layer 360. The second routing layer 360 is disposed in the special-shaped display area 110. The second routing layer 360 is disposed on the same layer as the detection circuit layer 310. The second insulating layer 420 is disposed between the second routing layer 360 and the first routing layer 350. The second routing layer 360 is insulated from the detection circuit layer 310. That is, there is no electrical conduction between the second routing layer 360 and the detection circuit layer 310, so as to prevent the detection circuit layer 310 from being interfered. The second routing layer 360 may be provided with a power signal circuit. The second insulating layer 420 is disposed between the second routing layer 360 and the first routing layer 350 to prevent the second routing layer 360 and the first routing layer 350 from being short-circuited.
In one embodiment, the driving substrate 10 further includes a third insulating layer 430. The third insulating layer 430 is disposed between the active layer 341 and the gate layer 342. The third insulating layer 430 may prevent the active layer 341 and the gate layer 342 from contacting each other.
Referring to fig. 4, in one embodiment, the display device further includes at least one gate driving unit 500. The gate driving unit 500 is disposed on the substrate 130 and located in the non-display area 210. In the plane of the substrate 130, the gate driving unit 500 is disposed between the detection circuit layer 310 and the special-shaped display area 110. One of the gate driving units 500 is electrically connected to the pixel driving unit row 330 through one of the signal lines 320. The gate driving unit 500 may output a scan signal to the signal line 320. The thin film transistor 340 can be driven to be turned on and off by the scan signal. The gate driving unit 500 may have a multi-layer structure. And the multi-layer structure of the gate driving unit 500 may be formed together with the respective layer structures in the first pixel driving unit 331 in the process of forming the first pixel driving unit 331, and form different functional structures through a patterning process.
Referring to fig. 2 again, in an embodiment, the driving substrate 10 further includes at least one capacitor electrode layer 510. The capacitor electrode layer 510 is located in the non-display area 210. In the plane of the non-display area 210, the capacitor electrode layer 510 is disposed between the gate driving unit 500 and the non-display area 110. The capacitance electrode layer 510 is disposed on a side of the first insulating layer 410 away from the substrate 130, and a projection of the capacitance electrode layer 510 on the substrate 130 and a projection of the signal line 320 on the substrate 130 at least partially overlap. The projection of the capacitance electrode layer 510 on the substrate 130 and the projection of the signal line 320 on the substrate 130 are at least partially overlapped, so that the capacitance electrode layer 510 and the substrate 130 form a capacitance structure.
In one embodiment, the projection of the capacitive electrode layer 510 on the substrate 130 covers the projection of the signal line 320. Therefore, the surface of the capacitance electrode layer 510 facing the substrate 130 and the surface of the signal line 320 facing away from the substrate 130 are oppositely arranged to form a capacitance structure. Thereby increasing the capacitive load of the signal line 320.
In one embodiment, the capacitance electrode layer 510 may be formed on the same layer as the detection circuit layer 310. The capacitance electrode layer 510 may be separated from the detection circuit layer 310 by an insulating material to avoid affecting the normal use of the detection circuit layer 310. The capacitance electrode layer 510 may be disposed opposite to at least one of the signal lines 320. According to the different loads required to be added to each signal line 320, the relative areas of the capacitance electrode layer 510 and the signal line 320 can be different, so that the load of each signal line 320 can be freely adjusted, and the method is convenient and flexible.
The embodiment of the application also provides a display panel. The display panel includes the driving substrate 10. The driving substrate 10 includes a plurality of second pixel driving units 332. The second pixel driving unit 332 is disposed on the substrate 130. The second pixel driving unit 332 is located in the display area 100. The display panel further includes a plurality of first pixel units and a plurality of second pixel units. The first pixel driving units 331 are electrically connected to the first pixel units in a one-to-one correspondence. The second pixel driving units 332 are electrically connected to the second pixel units in a one-to-one correspondence. A surface of the first pixel driving unit 331 may form the first pixel unit. A surface of the second pixel driving unit 332 may form the second pixel unit. By adjusting the capacitive load of the first pixel driving unit 331, the capacitive load of the scan line of the special-shaped display area 110 and the capacitive load of the scan line of the normal display area 120 can be made to be approximately the same. Therefore, the light intensity of the special-shaped display area 110 and the normal display area 120 of the display panel tends to be consistent, and the appearance can be improved.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (9)
1. A drive substrate, comprising:
a substrate (130), the substrate (130) comprising a display area (100) and a non-display area (200), the non-display area (200) being disposed around the display area (100), the non-display area (200) comprising a shaped non-display area (210), the display area (100) comprising a shaped display area (110), the shaped non-display area (210) and the shaped display area (110) being disposed adjacent to each other;
a detection circuit layer (310) disposed in the non-display region (200) and surrounding the display region (100);
a first insulating layer (410) positioned between the substrate (130) and the detection circuit layer (310), the first insulating layer being positioned between the shaped non-display region (210) and the shaped display region (110);
at least one signal line (320) for driving a plurality of first pixel driving units (331) disposed in the shaped display region (110), the at least one signal line (320) being disposed between the substrate (130) and the first insulating layer (410), the at least one signal line (320) extending from the shaped non-display region (210) toward the shaped display region (110) such that the detection circuit layer (310) and the at least one signal line (320) form at least one compensation capacitance;
a first routing layer (350) located in the specially-shaped display area (110) and the specially-shaped non-display area (210), and arranged on the surface of the first insulating layer (410) far away from the substrate (130), wherein in the specially-shaped non-display area (210), the projection of the detection circuit layer (310) and the first routing layer (350) on the substrate (130) at least partially coincide;
in the special-shaped non-display area (210), the vertical distance between the first routing layer (350) and the projection superposition part of the detection circuit layer (310) on the substrate (130) is smaller than the vertical distance between the first routing layer (350) and the projection superposition part of the detection circuit layer (310) on the substrate (130).
2. The drive substrate of claim 1, further comprising:
and the second insulating layer (420) is positioned in the special-shaped display area (110) and the special-shaped non-display area (210), is arranged on the surface of the first routing layer (350) far away from the substrate (130), and is arranged between the detection circuit layer (310) and the first routing layer (350).
3. The driving substrate of claim 2, further comprising a second wiring layer (360) disposed on the irregular display area (110), wherein the second wiring layer (360) is disposed on the same layer as the detection circuit layer (310) and on a surface of the second insulating layer (420) away from the substrate (130).
4. The driving substrate of claim 1, wherein the first pixel driving unit (331) comprises a thin film transistor (340), the thin film transistor (340) is disposed between the first insulating layer (410) and the substrate (130), the thin film transistor (340) comprises a gate layer (342), and the gate layer (342) and the signal line (320) are integrally formed in a same layer.
5. The driving substrate according to claim 4, wherein the thin film transistor (340) further comprises an active layer (341), the active layer (341) is disposed between the substrate (130) and the gate layer (342), and a third insulating layer (430) is disposed between the active layer (341) and the gate layer (342).
6. The driving substrate of claim 1, further comprising at least one gate driving unit (500) disposed on the substrate (130) and located in the non-display area (210), wherein the gate driving unit (500) is disposed between the detection circuit layer (310) and the non-display area (110) in a plane of the substrate (130), and wherein one of the gate driving units (500) is electrically connected to the pixel driving unit row (330) through one of the signal lines (320).
7. The driving substrate of claim 6, further comprising at least one capacitive electrode layer (510) disposed in the non-display area (210) and located in a plane where the non-display area (210) is located, wherein the capacitive electrode layer (510) is disposed between the gate driving unit (500) and the non-display area (110), the capacitive electrode layer (510) is disposed on a side of the first insulating layer (410) away from the substrate (130), and a projection of the capacitive electrode layer (510) on the substrate (130) and a projection of the signal line (320) on the substrate (130) at least partially coincide.
8. The driving substrate according to claim 7, wherein the capacitive electrode layer (510) is disposed in the same layer as the detection circuit layer (310).
9. A display panel, comprising:
the driving substrate as claimed in any of claims 1-8, comprising a plurality of second pixel driving units (332) arranged at said base (130) in said display area (100);
the plurality of first pixel units are electrically connected with the plurality of first pixel driving units (331) in a one-to-one correspondence manner;
and the plurality of second pixel units are electrically connected with the plurality of second pixel driving units (332) in a one-to-one correspondence mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810451384.7A CN108665850B (en) | 2018-05-11 | 2018-05-11 | Drive substrate and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810451384.7A CN108665850B (en) | 2018-05-11 | 2018-05-11 | Drive substrate and display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108665850A CN108665850A (en) | 2018-10-16 |
| CN108665850B true CN108665850B (en) | 2020-07-24 |
Family
ID=63779179
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810451384.7A Active CN108665850B (en) | 2018-05-11 | 2018-05-11 | Drive substrate and display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108665850B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109686243A (en) * | 2019-01-31 | 2019-04-26 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
| CN109767718B (en) * | 2019-03-29 | 2022-03-01 | 昆山国显光电有限公司 | Driving back plate and display device |
| JP7436515B2 (en) * | 2020-02-27 | 2024-02-21 | 京東方科技集團股▲ふん▼有限公司 | Display substrate and its manufacturing method, wiring load compensation method |
| CN113380869B (en) * | 2021-06-09 | 2022-10-04 | 昆山国显光电有限公司 | Display panel and display device |
| CN113421905B (en) * | 2021-06-22 | 2022-10-21 | 昆山国显光电有限公司 | Display panel and display device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09160015A (en) * | 1995-12-08 | 1997-06-20 | Casio Comput Co Ltd | Liquid crystal display element |
| CN105976744A (en) * | 2016-06-24 | 2016-09-28 | 上海与德科技有限公司 | Screen module, electronic equipment and screen module micro-crack detection method |
| CN106547127A (en) * | 2017-01-16 | 2017-03-29 | 上海天马微电子有限公司 | Array substrate, liquid crystal display panel and display device |
| CN107221536A (en) * | 2017-05-25 | 2017-09-29 | 上海天马微电子有限公司 | Array substrate, special-shaped display and display device |
| CN107785399A (en) * | 2017-10-26 | 2018-03-09 | 武汉天马微电子有限公司 | Display panel and display device |
-
2018
- 2018-05-11 CN CN201810451384.7A patent/CN108665850B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09160015A (en) * | 1995-12-08 | 1997-06-20 | Casio Comput Co Ltd | Liquid crystal display element |
| CN105976744A (en) * | 2016-06-24 | 2016-09-28 | 上海与德科技有限公司 | Screen module, electronic equipment and screen module micro-crack detection method |
| CN106547127A (en) * | 2017-01-16 | 2017-03-29 | 上海天马微电子有限公司 | Array substrate, liquid crystal display panel and display device |
| CN107221536A (en) * | 2017-05-25 | 2017-09-29 | 上海天马微电子有限公司 | Array substrate, special-shaped display and display device |
| CN107785399A (en) * | 2017-10-26 | 2018-03-09 | 武汉天马微电子有限公司 | Display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108665850A (en) | 2018-10-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108665850B (en) | Drive substrate and display panel | |
| CN108010947B (en) | Organic light-emitting display panel and organic light-emitting display device | |
| US11882749B2 (en) | Display substrate, display panel, and display device with power line below data line | |
| US10817095B2 (en) | Electronic device, touch display panel and touch display substrate | |
| US10644038B2 (en) | Array substrate, display panel, and display device thereof | |
| CN108630735B (en) | Drive substrate and display panel | |
| CN107797321B (en) | Array substrate, liquid crystal display panel and liquid crystal display device | |
| CN110515247A (en) | Display panel and display device | |
| US20220320146A1 (en) | Display panel, manufacturing method thereof, and display device | |
| US10303297B2 (en) | Touch display panel and driving method therefor, and display device | |
| CN109728049B (en) | Display panel and display device | |
| CN109449167B (en) | Display panel and display device | |
| CN106200162B (en) | A kind of array substrate, display panel and display device | |
| CN108717245B (en) | Display panel and display device | |
| CN104965622A (en) | Array substrate and display panel | |
| CN105093607A (en) | Array substrate, touch display panel and touch display device | |
| US20230236691A1 (en) | Touch display substrate and display device | |
| US11864432B2 (en) | Display substrate, display panel and display apparatus | |
| TWI471640B (en) | A display apparatus | |
| US20200043871A1 (en) | Array substrate and method for producing the same | |
| WO2014153838A1 (en) | Array substrate and manufacturing method therefor, and liquid crystal panel | |
| CN111708237B (en) | Array substrate, display panel and display device | |
| EP3242191A1 (en) | Substrate of touch display screen and manufacturing method therefor, touch screen and display device | |
| CN110491905A (en) | The manufacturing method of display panel, display device and display panel | |
| CN105280648B (en) | Array substrate and preparation method thereof, display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |