CN108663070B

CN108663070B - Digital sensor system

Info

Publication number: CN108663070B
Application number: CN201810259850.1A
Authority: CN
Inventors: M·莫茨; C·伯德纳; T·克兰兹; W·谢尔
Original assignee: Infineon Technologies AG
Current assignee: Infineon Technologies AG
Priority date: 2017-03-27
Filing date: 2018-03-27
Publication date: 2021-06-29
Anticipated expiration: 2038-03-27
Also published as: DE102018204681B4; CN108663070A; DE102018204681A1

Abstract

The present disclosure relates to digital sensor systems. The system may include a digital sensor system including a sensor element and a digital interface. The digital interface may provide the wake-up signal based on the sensing action being performed by the sensor element after the predefined event is detected by the digital sensor system. The system may include a microcontroller to receive a wake-up signal provided by the digital interface and to wake-up from a sleep mode based on receiving the wake-up signal provided by the digital interface.

Description

Digital sensor system

Cross-referencing

This application is a continuation-in-part application of U.S. patent application No.14/926,602 (now U.S. patent No.9,606,603), filed 10/29/2015, which claims priority to german patent application No.102014222651.1, filed 11/6/2014 in accordance with 35u.s.c. § 119, which is incorporated herein by reference in its entirety.

Technical Field

Embodiments of the present invention relate to the field of sensors, and more particularly to the field of digital sensor systems.

Background

Sensors are used in a variety of fields, some of which require low power sensors. The sensor may be used as a detector for user interaction, e.g. for detecting the opening/closing of a mobile phone/tablet computer, for control in a vehicle, for a joystick etc. The sensor may also be used as a tamper-proof detector, for example in the field of electro-metering (e-metrology) and the like. The sensors may also be used in position and motion detectors, for example in household appliances like washing machines and the like.

Several solutions may use contactless magnetic solutions due to their durability. The requirements in the above mentioned field may relate to the use of single-dimensional sensors (1D sensors) as well as the use of multi-dimensional sensors (2D sensors or 3D sensors). In magnetic solutions, single or multi-dimensional sensors can be implemented using hall sensors. Conventionally, such sensors provide only limited functionality, for example only a single switching function. However, additional features are now required to be provided by the sensor and providing only a single switching function is not sufficient. For example, linear sensing is desirable to cope with inaccuracies in the sensor system settings, such as inaccuracies in the magnetic settings. Such inaccuracies may result, for example, from the use of low cost components used in the sensor system. This inaccuracy is handled by: a microcontroller is used and a specific function is implemented, for example a function of measuring a certain signal behavior (e.g. 50Hz hum) of the magnetic background field in the electrometer, instead of just detecting the presence or absence of a field with a certain intensity. Under the same characterization, the sensor system can achieve a multiplicity in order to achieve a higher safety level or diagnostic coverage in safety-critical applications, such as for example functional safety requirements for motor vehicles.

Disclosure of Invention

Embodiments of the present invention provide a digital sensor system comprising a sensor element, an analog-to-digital converter coupled to the sensor element, and a wake-up circuit configured to activate the sensor element and the analog-to-digital converter in response to a predefined event.

Drawings

For a more complete understanding of the present invention and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

FIG. 1 shows a block diagram of an exemplary analog sensor system implementing a low cost and low power switching solution;

FIG. 2 shows a schematic block diagram of a digital sensor system according to an embodiment of the invention;

FIG. 3 illustrates one embodiment of a digital sensor system in accordance with the present invention in which the wake-up circuit includes a low frequency, low power oscillator that provides a low frequency clock signal to the counter;

FIG. 4 shows a further embodiment of the digital sensor system of the present invention similar to the embodiment of FIG. 3, wherein the wake-up circuit outputs a trigger or activation signal via the interface;

FIG. 5 illustrates another embodiment of the digital sensor system of the present invention wherein the microcontroller does not have an oscillator associated therewith;

FIG. 6 shows a further embodiment of a digital sensor system according to the present invention operating in a digital data mode and a switch mode;

FIG. 7 illustrates one embodiment of a digital sensor system of the present invention using multiple sensors and providing multi-dimensional switching (logical combination of decisions) and one-dimensional PWM output and one-dimensional linear output via a single output;

FIG. 8 shows a multi-dimensional digital sensor system based on the sensor system of FIG. 3;

FIG. 9 shows yet another embodiment, according to which the digital sensor system of the present invention comprises an on-chip digital signal processor;

FIG. 10 illustrates one embodiment of a low power control and digital comparator concept for switching and PWM operation without unnecessary hardware overhead;

FIG. 11 shows an exemplary implementation of an analog/digital converter as may be used in accordance with embodiments of the present invention;

FIG. 12 shows a simplified block diagram of an integrated circuit die for implementing a digital sensor system according to an embodiment;

fig. 13 shows an embodiment of an application circuit for the inventive digital sensor system, wherein fig. 13(a) shows an embodiment in which the sensor chip and the microcontroller receive different supply voltages, and fig. 13(b) shows an embodiment in which the sensor chip and the microcontroller receive different supply voltages;

FIG. 14 shows a further embodiment of an inventive digital sensor system implementing a 3D sensor chip;

FIG. 15 shows an embodiment of an application circuit that may be used for the IC sensor chip as described in FIG. 14, where FIG. 15(a) shows an implementation using six pins and FIG. 15(b) shows an implementation using eight pins;

FIG. 16 illustrates a transition scheme in the "low power mode" of the sensor IC described with respect to FIG. 14;

FIG. 17 illustrates a switching scheme when the IC sensor shown in FIG. 14 is operated in a fast mode;

FIG. 18 illustrates a conversion scheme triggered after a transmission from a master controller that allows the master to control a sampling point in time;

FIG. 19 illustrates one embodiment of an event detector circuit that may be implemented in the wake-up circuit of FIG. 2;

FIG. 20 illustrates one embodiment of an area optimized comparator circuit for a fixed limit value that may be used in the circuit of FIG. 19; and

fig. 21 illustrates the behavior of the circuit of fig. 19 using the area optimized comparator circuit of fig. 20.

Detailed Description

Embodiments of the present invention are discussed in detail below, however, it should be appreciated that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention. In the following description of the embodiments, the same or similar elements having the same function have the same reference numerals associated therewith, and the description of such elements will not be repeated for each embodiment.

The invention will be described with respect to embodiments in the context of a magnetic sensor (e.g. a hall sensor), however the invention may also be applied to other sensors, such as mechanical sensors (e.g. MEMS pressure sensors, accelerometers and actuators), or environmental sensors (e.g. temperature sensors, humidity sensors, etc.).

FIG. 1 is a block diagram of an exemplary analog sensor system implementing a low cost and low power switching solution. The sensor system may include a hall sensor element 100 that outputs a sensor signal on line 102 that is representative of the magnetic field strength in response to a magnetic field. The analog sensor signal is applied to an analog comparator/latch circuit 104 that compares the sensor signal received via line 102 with a reference value. The result of the comparison is latched in the comparator/latch circuit 104, and the output signal of the comparator/latch circuit 104 is output to the output driver 108 via the line 106. The output driver 108 provides an output signal of the sensor system provided on an output line 110. The sensor system shown in fig. 1 also includes an oscillator circuit 112, e.g., a low cost and low power oscillator circuit, which provides a clock signal on line 114 to a counter 116, the counter 116 provides a count signal via line 118 to a bias enable circuit 120, which in turn provides an enable signal on line 122 to the comparator/latch circuit 104 for controlling its operation. The driver circuit 108 may further comprise a DfT block 124(DfT ═ design for testing) which provides the possibility of testing one or more elements of the sensor system which may be formed in a common chip, for example during production of the chip, as indicated by line 126.

The sensor system described with respect to fig. 1 is implemented in the analog domain. During operation, the sensor system senses the magnetic field, compares the magnetic field strength to the switching point by means of the comparator/latch circuit 104, and switches the output at the end of each operating phase. The bias enable circuit 120 provides current for operating the hall sensor element 100 (see dashed line 123 in fig. 1) and other active elements, such as the comparator/latch circuit 104. The driver 108 may be implemented as an open drain (open drain) output transistor that receives the output signal from the output latch in the comparator/latch circuit 104.

The sensor system of fig. 1 is implemented in the analog domain using sensor elements and analog comparators. Such analog methods are typically scaled as "linear" functions and do not allow the advantages of newer techniques, such as the use of digital methods that scale as "power-of-two exponentiation" functions. Furthermore, the analog compensation principles that can be used are less deterministic, since they rely on the inaccuracy of the simulation. Moreover, analog-based dfts are more cost-innovative than digital-based dfts. A further disadvantage of analog implementations is that it is not possible to provide a mixed switching/linear function. Furthermore, analog solutions use continuous operation (no duty cycle operation) when implemented for performance, e.g., to provide a digital output) Several ADC designs. Furthermore, analog approaches implement different functions in separate blocks, and such modular concepts have increased power requirements and do not provide a power efficient implementation of more complex functions. A further disadvantage is that the simulation method is not very area efficient, i.e. the footprint is high, e.g. it is at 4mm²-6mm²In the range of (1). Furthermore, ultra low power applications are not of interest.

Accordingly, there is a need for an improved and more efficient sensor system, which is, for example, more area efficient and more energy efficient, and which may provide more functionality.

The invention provides a digital sensor system comprising a sensor element, an analog-to-digital converter coupled to the sensor element, and a wake-up circuit configured to activate the sensor element and the analog-to-digital converter in response to a predefined event.

According to an embodiment, the predefined events comprise at least one event selected from the group of: a predefined time, the lapse of a predefined time interval, a signal from a further sensor element having a predefined value, a reset signal and a diagnostic signal.

According to an embodiment, the digital sensor system further comprises a digital signal processor coupled to the analog-to-digital converter.

According to an embodiment, the digital sensor system is configured to: the digital signal processor is activated in response to activation of the sensor element and the analog-to-digital converter, or in response to a predefined event, in case the digital signal generated by the analog-to-digital converter meets a predefined criterion.

According to an embodiment, the predefined criteria is set at the time of manufacturing or initializing the digital sensor system, and wherein the predefined criteria is fixed or variable in response to a setting signal during operation.

According to an embodiment, the digital signal processor is configured to: the predefined criteria are modified in response to the digital signal generated by the analog-to-digital converter to obtain new predefined criteria, and the current predefined criteria are replaced by the new predefined criteria.

According to an embodiment, the digital signal processor is configured to: determining whether the digital signal generated by the analog-to-digital converter is within a predefined range, determining the presence of a potential disturbance or fault if the digital signal generated by the analog-to-digital converter is outside the predefined range, and causing a predefined event and/or a change in a predefined criterion, such that the wake-up circuit activates the sensor element and the analog-to-digital converter more frequently, or such that the sensor element and the analog-to-digital converter are continuously operated for a predefined period of time.

According to an embodiment, the digital sensor system further comprises a memory coupled to the analog-to-digital converter, wherein the memory is configured to store the predefined criteria.

According to an embodiment, the digital signal processor is configured to be in a sleep mode when not activated.

According to an embodiment, the digital signal processor is configured to: the wake-up circuit is provided with a signal indicative of a predefined event while in the sleep mode and remains in the sleep mode or returns to the sleep mode until activated.

According to an embodiment, a digital signal processor includes a digital comparator coupled to an analog-to-digital converter and a signal processing circuit coupled to the digital comparator.

According to an embodiment, a digital sensor system includes a first oscillator configured to generate a first clock signal including at least a predefined event.

According to an embodiment, the digital sensor system comprises a second oscillator configured to be activated by the first clock signal and to generate a second clock signal for operating the analog-to-digital converter, the second clock signal having a higher clock frequency than the first clock signal, wherein the second oscillator is configured to be deactivated (deactivated) when processing of the sensor signal from the sensor element by the analog-to-digital converter is completed.

According to an embodiment, the digital signal processor is configured to be activated by the first clock signal and to generate a second clock signal for operating the analog-to-digital converter, the second clock signal having a higher clock frequency than the first clock signal.

According to an embodiment, at least the sensor element, the analog-to-digital converter and the wake-up circuit are formed as an integrated circuit chip comprising a circuit board on or in which the sensor element, the analog-to-digital converter and the wake-up circuit are formed, and one or more external contacts coupled to the sensor element, the analog-to-digital converter and the wake-up circuit.

According to an embodiment, the integrated circuit chip further comprises at least a part of a digital signal processor.

According to an embodiment, the integrated circuit chip further comprises an interface for coupling with an external digital signal processor.

According to an embodiment, the digital sensor system comprises a controller, wherein the controller is configured to cause the wake-up circuit to be activated or deactivated, wherein the digital sensor system is configured to: when the wake-up circuit is deactivated, it operates continuously or intermittently in response to an external trigger signal.

According to an embodiment, the sensor elements comprise one or more magnetic sensors, such as xMR sensors, hall sensors or spin current hall sensors, or sensors that measure physical quantities such as voltage, temperature, current for trimming or diagnostic purposes.

According to an embodiment, the wake-up circuit is configured to output a wake-up signal. In embodiments that refer to a switching function, the switching output signal may also be used as a wake-up signal.

According to an embodiment, the wake-up signal may comprise a pulse or a pulse code.

Embodiments of the present invention are advantageous in that they provide new digital sensor systems that are much smaller than known sensor systems, such as the analog sensor system described above (see fig. 1), which has, for example, 4mm²-6mm²Area consumption) while embodiments allow much smaller implementations in 0.35 μm low cost technologies, e.g., with about 0.6mm²The maximum target size of. Embodiments of the present invention provide solutions in the field of sensors that allow low power settings focusing on the combination of switching and linear functions in one design, resource sharingMeter, cost-effective implementation, thus covering the broader goals of emerging applications, focus on better scaling digital functions, and embodiments of the present invention introduce the concept of providing digital microcontroller inputs and digital value functions (linear sensor data). In addition, embodiments are advantageous because they provide for efficient implementations without the need for overhead for production testing, and design blocks for high resource sharing of product features for cost estimation. For example, the above-described properties of a digital sensor system allow for the use of redundant sensors also for functional safety design without adding much or significant cost to the overall system.

FIG. 2 shows a schematic block diagram of a digital sensor system according to an embodiment of the invention. The digital sensor system comprises a hall sensor element 200. According to other embodiments, other sensors may be used, such as other kinds of magnetic sensors (e.g. xMR sensors), or sensors sensing other physical properties. The sensor signal provided by the hall sensor element 200 is output via line 202 to an analog-to-digital converter (ADC)204, which converts the analog sensor signal to a digital representation of the sensor signal, which is output via line 206 to an interface circuit 208 to provide a digital signal at an output 210 of the digital sensor system.

The digital sensor system includes a wake-up circuit 212 coupled to the sensor element 200 and the ADC 204 via

lines

214 and 216, respectively. The wake-up circuit 212 is provided to supply wake-up

signals

214, 216 for activating the hall sensor element 200 and the ADC 204 in response to a predefined event. The wake-up circuit 212 may, for example, provide a clock signal to the ADC 204 and cause a current to be provided to the hall sensor element 200 to allow measurement of the magnetic field.

The predetermined event that causes the wake-up circuit 212 to provide the

signals

214, 216 may be, for example, one or more of: a predetermined or predefined time, the passage of a predefined time interval, a signal from a further sensor element (the sensor element being internal or external to the digital sensor system of fig. 2), an external reset signal or an external diagnostic signal. Additionally, for multi-dimensional sensors (e.g., 2D or 3D magnetic field sensors), the sensor 200 may be replicated and a multiplexed or parallel ADC 204 and interface 208 may be used, which may be controlled by the wake-up circuit 212. The wake-up circuit may also be parameterized using its own interface (not shown in fig. 2) or one of the interfaces 208. The following examples illustrate some of the possible combinations.

According to an embodiment, the digital sensor system is formed as an integrated circuit chip or die 218 that includes a circuit board (e.g., a suitable substrate) and one or more pads or pins for defining external contacts. In fig. 2, output 210 schematically represents one of such pads/pins. The hall sensor element, the ADC converter and the wake-up circuit are implemented as integrated circuits in/on a circuit board, and the entire structure may be packaged.

Fig. 3 shows an embodiment of a digital sensor system according to the invention, wherein the wake-up circuit 212 comprises a first oscillator 220, which may be a low-power oscillator operating at a low frequency and providing a low-frequency clock signal on an output line 222 to a counter circuit 224. The output signal from the counter circuit 224 is provided via line 226 to an ADC flip-flop/configuration circuit 228, the ADC flip-flop/configuration circuit 228 providing a configuration signal on line 230 for operating a second oscillator 232, the second oscillator 232 providing a second clock signal on line 216 having a higher frequency than the first clock signal. The clock signal may be used to operate the ADC 204. In addition, an external microcontroller 234 is shown which is coupled to the digital sensor chip 218 via the output 210 and which has a third oscillator 236 associated therewith. The external microcontroller 234 may include a microprocessor.

The sensor system may also include a DfT ("design for test") circuit 238 coupled to the interface 208 and to the ADC trigger/configuration circuit 228 and the ADC 204 via

lines

240 and 242, respectively. DfT circuit 238 allows for testing of chip 218, for example, during production. Testing may include analog and/or digital testing of the functionality of the elements of sensor chip 218 during production or in the field for diagnostic purposes.

In the embodiment of fig. 3, the digital sensor system comprises a first oscillator 220 providing a wake-up function, e.g. any rising edge of a clock signal provided by the first (slow) oscillator 220 may be counted by a counter 224 and after a predefined counter value has been reached, a trigger signal is output on line 226, which via a circuit 228 causes a wake-up of a second oscillator 232 for performing the sensing action. The sensing action may comprise a single measurement or multiple measurements, e.g. over a predefined interval or time period. Multiple measurements within an interval may be made periodically. The sensing action may include conversion of one or more measurements from the sensor element using the ADC. Additional measurement signal processing circuitry may be provided to allow identification of thresholds, to determine an average of the sensor signal, or to allow fine tuning of the sensor output signal. After the sensing action is completed, the second oscillator 232 may be turned off again, and the external microcontroller or digital signal processing unit 234 may be activated (e.g., awakened from a sleep mode) using the third oscillator 236.

According to an embodiment, the wake-up of the external microcontroller 234 may be triggered depending on the result of the sensing action performed by the ADC, e.g. depending on the value of the signal output by the sensor system on line 206, such that only signals considered to represent the desired measurement value are further processed in the microcontroller 234. Data transfer to the microcontroller 234 may be via an interface. According to an embodiment, the microcontroller 234 may be turned off/deactivated after completing processing of the received signal.

In some implementations, the wake-up of the microcontroller 234 can be triggered by a wake-up signal provided at the output of the sensor chip 218, such as by a digital signal provided at the output 210. In some implementations, the wake-up signal may include a single pulse or a composite pulse (e.g., a pulse having multiple levels, a series of single pulses having one or more levels, etc.). Here, if the microcontroller 234 has access to information describing the wake-up signal format (e.g., the pulse length of a single pulse, the format of a composite pulse, etc.), the microcontroller 234 may identify the received signal as a wake-up signal (e.g., when the format of the received signal matches the wake-up signal format) and/or distinguish the wake-up signal from signals that originate, for example, from an electromagnetic compatibility (EMC) event that caused the signal to be provided at the output 210.

In some implementations, such as when the wake-up signal is a single pulse, the wake-up signal can be a so-called "interrupt signal" that causes the microcontroller 234 to poll (poll) the digital sensor system (e.g., the wake-up circuit 212) to determine information associated with the wake-up event (e.g., information identifying a threshold that triggered the wake-up event).

In some implementations, such as when the wake-up signal is a composite pulse, the composite pulse can be used to send information to the microcontroller 234, which can eliminate the need for the microcontroller 234 to poll the digital sensor system after wake-up. In this case, the load and/or latency on the bus (e.g., the amount of time to react to an event) may be reduced. In some implementations, the information included in the wake-up signal may include, for example, a coded identifier that includes information associated with the event (e.g., information identifying which threshold level is crossed in which direction), information associated with the sensor value, and so forth.

In contrast to sensor-slave interfaces (e.g., Serial Peripheral Interface (SPI)), some sensor interfaces may allow the sensor chip 218 to act as a master on a bus associated with the sensor chip 218 and the microcontroller 234. Examples of such protocols include short pulse width modulation coding (SPC), peripheral sensor interface 5(PSI5), Universal Asynchronous Receiver Transmitter (UART), and the like. In some implementations, any interface and protocol that allows the same communication line to be used in a bi-directional manner (e.g., so that components of the sensor chip 218 can take over communication with the microcontroller 234) may be used in one or more of the implementations described herein.

In some implementations, the microcontroller 234 can be connected to multiple digital sensor systems (e.g., multiple sensor chips 218 each including a sensor 200, a single sensor chip 218 including multiple sensors 200, etc.), each of which can individually provide information to the microcontroller 234. In some implementations, the microcontroller 234 can distinguish the information provided by each digital sensor based on, for example, an identification code included in the transmission of sensor data. In some implementations, the microcontroller 234 can trigger the digital sensor system alone to perform the sensing action (i.e., the microcontroller 234 can act as a master).

With the microcontroller 234 in the sleep mode, the microcontroller 234 may not individually trigger multiple digital sensor systems, but may individually configure the wake-up of the respective sensor 200 in order to cause the sensing action to be performed. In such a case, the microcontroller 234 acts as a slave on the bus, and the digital sensor that detects the wake-up event automatically takes over the bus as the master. In such a scenario, the load and/or latency on the bus may be reduced when the digital sensor system may identify itself by providing information identifying the digital sensor system, for example in the form of pulse encoded information provided to microcontroller 234.

In some implementations, this pulse encoding may be similar to the protocol used on the bus. In some implementations, the digital sensor system can use its interface 208 to provide a wake-up frame that triggers the microcontroller 234 to wake up.

In addition to allowing information associated with the event causing the wake-up to be transmitted to the microcontroller 234, this also eliminates the need for an additional wake-up signal (e.g., the "/INT" signal) to be sent to the microcontroller 234.

Thus, in addition to the information described above for a single digital sensor system (e.g., including a single sensor 200), other information may be provided, such as information identifying the digital sensor system that detected the wake-up event, a coded wake-up signal similar to conventional sensor protocols, and so forth.

Although fig. 3 shows the microcontroller 234 and the third oscillator 236 as external elements, according to an embodiment, the microcontroller 234 may also be implemented on the sensor chip 218 as a further integrated element of the sensor chip or sensor die 218 for providing "on-chip" data processing of the digital representation of the measurement values provided by the ADC circuit 204.

Fig. 4 shows a further embodiment of the digital sensor system of the present invention similar to the embodiment of fig. 3. The structure is slightly different in that the wake-up circuit 212 includes a first oscillator 220 and a counter 224, and outputs a trigger or activation signal via the interface 208. Unlike in fig. 3, the trigger signal is output from the chip 218 via a pad/pin 244 of the die 218 to an external processing unit 246, the external processing unit 246 including the second oscillator 232 and the microcontroller 234. External processing circuitry 246 is coupled to clock pad/pin 247 of die 218 to provide an activation signal on line 216 to ADC 204 via digital interface 208. The sensor system of fig. 4 functions substantially the same as the sensor system of fig. 3 in that the first oscillator 220 and the counter 224 provide a wake-up function, which, unlike in fig. 3, wakes up/activates the external microcontroller 234. The external processing circuit 246 includes an external clock for performing the sensing actions mentioned above. External processing circuitry 246 may control sensor die 218 by providing control signals via external control pins 248, control lines 248a, and digital interface 208. According to an embodiment, control may be bidirectional such that signals may also be output from the sensor die 218 to the external processing circuitry 246. According to an embodiment, the wake-up signal and/or the digital measurement may be output via such a bi-directional interface instead of providing

dedicated pins

210 and 244. The control may cause conversion of one or more measurements from the sensor and/or additional processing of the measurements as described above.

The obtained digital data may be transmitted to the microcontroller 234 during the sensing action or after completion of the sensing action, e.g. in case the measurement result meets one or more predefined criteria. After the microcontroller 234 receives the data, it may be operated independently of the operation of the chip 218, the chip 218 may be deactivated, and when signal processing has been completed, the microcontroller 234 may also be deactivated/turned off again, for example by causing the microcontroller 234 or the external circuit 246 to enter a sleep mode. As in the embodiment of fig. 3, in the embodiment of fig. 4, the external processing unit 246 may also be implemented as an integrated part of the sensor chip 218 according to an embodiment.

The embodiment of fig. 4 is advantageous in that it requires less hardware than the embodiment of fig. 3, however, it may consume slightly more current and also requires additional pads/pins (external contacts), such as the activation signal pin 244 and the clock pin 247.

Fig. 5 shows another embodiment of the digital sensor system of the present invention in which the microcontroller 234 does not have an oscillator associated therewith. The microcontroller 234 is woken up/activated in response to a clock signal provided by the second oscillator 232 to the microcontroller 234 via line 249 and via pad/pin 250 of the die 218. The wake-up circuit 212 has a first oscillator 220 that provides a wake-up function with a counter 224, the counter 224 starting a second oscillator 232. The second oscillator 232 may be used to perform the sensing action mentioned above and at the same time it may be used to wake up the microcontroller 234. According to an embodiment, the second oscillator 232 may be turned off after the microcontroller 234 completes processing of the data, and it may signal the second oscillator 232 via line 249: the oscillator may be turned off again to return to the sleep mode.

Fig. 5 shows the microcontroller 234 as an external element with respect to the sensor die 218, however in other embodiments, the microcontroller 234 may be integrated into the same die as the other elements of the sensor system shown in fig. 5. The embodiment of fig. 5 requires only two oscillators and thus consumes as little current as in the system shown in fig. 3, while requiring additional output contacts or pins (also referred to as "additional clock pins" 250) required for communication between the microcontroller 234 and the second oscillator 232.

Fig. 3 and 5 illustrate an embodiment of a digital sensor system comprising a first oscillator 220 and a second oscillator 232. According to other embodiments, instead of using separate oscillators 220 and 223, one of which is a slow (low clock frequency) low power oscillator and the other of which is a fast oscillator with higher current consumption, other embodiments may use oscillators that can operate in different modes. In the first mode a low frequency clock signal is output and after a predetermined period of time has elapsed, e.g. by means of a counter, the oscillator is then switched into a second mode providing a clock signal having a higher frequency than the first clock signal for operating the ADC for performing the sensing action.

With respect to the oscillator described above, it is noted that the clock signal provided by the oscillator circuit may be a clock signal obtained directly from the oscillator, or it may be a clock signal obtained by multiplying or dividing the output signal from the oscillator according to a predefined multiple or divisor.

In the embodiments described above with respect to fig. 3, 4 and 5, it has been noted that the microcontroller 234 is activated for performing data processing on the digital data signals provided by the sensor chip 218. In the embodiment of fig. 4 and 5, the microcontroller 234 is automatically activated after the wake-up circuit 212 provides a trigger signal on line 226 (see fig. 4) or after the second oscillator 232 has been activated (see fig. 5). In the sensor system of fig. 3, the microcontroller 234 has its own oscillator 236 associated with it, which allows the microcontroller 234 to be operated independently of the operation of the sensor chip 218. According to an embodiment, to reduce the power consumption of the overall system, the microcontroller 234 may be turned on or activated only once the signal that has been processed by the sensor die 218 is within a predefined range, for example once the signal exceeds or falls below a threshold value or is within a predefined window of values. Otherwise, the microcontroller 234 may remain deactivated, e.g., it remains in a sleep mode.

In the above description of embodiments of the digital sensor system, it has been noted that the wake-up function is performed by providing an internal oscillator 220 (see fig. 3 to 5). However, other embodiments of the invention may alternatively or additionally use other (e.g., external) trigger signals to cause the wake-up of the sensors and ADCs of chip 218. For example, the sensor may be activated in response to a signal from another internal (inside the die 218) or external sensor (e.g., a temperature sensor or other sensor that surveys the environment in which the sensor chip 218 is disposed). For example, the system will be activated only if predefined conditions on the environment are met, for which it is determined that measurements requiring the use of a digital sensor system are required. Alternatively or in addition to the external trigger signal, the circuit die 218 may be provided with an activation/deactivation signal from the overall controller. For example, when using circuit die 218 in an automotive environment, the activation/deactivation of the sensor system may be managed by a central control unit (e.g., ECU) of the vehicle. Yet another possibility of an external wake-up or trigger signal may be the provision of a wake-up signal by the microcontroller 234. According to some other embodiments, when diagnostics on the sensor system are desired, the overall controller or microcontroller 234 may trigger the wake-up of the sensor die 218 to see if it reacts, i.e., is functioning, and/or to perform some predefined measurement function, based on which the function of the sensor die 218 may be evaluated.

A further embodiment of a digital sensor system according to the invention will now be described with respect to fig. 6. The embodiment of fig. 6 allows operating the digital sensor system in a digital data mode and a switching mode simultaneously, and the switching mode may be used to wake up an external microcontroller (or alternatively a microcontroller integrated with other sensor elements) which then sets the sensor in a digital output mode or in a PWM mode (PWM-pulse width modulation) to perform more detailed measurements. The detailed measurement may include determining an average of the sensor signal, or a fine adjustment of the sensor output signal. The digital sensor system described subsequently is advantageous because it provides three outputs, namely a switch, a PWM and a digital value. The integrated solution has about the same size and similar performance as the purely analog-based switching solution, however, the purely analog-based switching solution provides only a single function, i.e. a switching function. Thus, the inventive concept of digitizing the sensor system allows for the use of advanced technologies and for a more efficient and versatile design when compared to purely analog solutions. The inventive concept underlying embodiments of the present invention will thus be seen as a combination of a low power oscillator, a counter, a low power ADC, a digital comparator and a low complexity digital interface for forming a general purpose hall sensor with switching, PWM and digital value output functionality in a single design in the size of a chip with hall switches.

The embodiment of fig. 6 shows a digital sensor system further comprising a digital comparator 252 coupled to the ADC 204 and receiving a digital version (i.e., a digital representation) of the sensor signal via line 206. The interface described in the previous embodiments may be implemented as part of the digital comparator 252. The wake-up circuit 212 is similar to the wake-up circuit in fig. 3, however, the oscillator 232 is shown as an optional element. Where provided, the wake-up circuit 212 has the same structure as in fig. 3, however, as mentioned above, the functionality of the first oscillator 220 and the second oscillator 232 may be provided by a single oscillator that is capable of switching between the first slow mode of operation and the second fast mode of operation. In this case, the second oscillator 232 would not be present and the circuit block 228 would be directly connected to the ADC 204. In such a scenario, the clock signal for operating the ADC 204 would be provided directly from the oscillator 220 via line 254. The oscillator 220 will be set to the second mode for providing the higher frequency clock signal to the ADC 204. According to some other embodiments, when using a single oscillator providing a low power oscillator signal with a low clock frequency, e.g. when only the oscillator 220 or a corresponding external clock signal via a clock pin is provided, a "slower" clock signal will be used to control the ADC, which will reduce the current consumption at the cost of a slightly higher processing time.

The digital sensor system may also include a hysteresis threshold setting circuit 260 coupled to the output of the digital comparator 252 via line 262. Additionally, a switch 264 is provided for selectively coupling the output of the counter 224 to a further input of the digital comparator 252 via line 266 or the output of the hysteresis threshold setting circuit 260 to a second input of the digital comparator 252 via line 266. The switch 264 may be controlled by an external selection signal to allow selection between the PWM mode and the switching mode, the signal being received via a further control pin of the die 218, the further control pin being schematically indicated at reference 268.

The digital sensor system according to the embodiment of fig. 6 uses a low power oscillator 220 and a low power counter 224, however, it is noted that according to some other embodiments, the oscillator may be omitted and the clock signal may be provided by an external source via a digital interface formed by an additional clock pin of the chip 218. According to an embodiment, the sensor 200 may be a hall sensor and the ADC 204 may be a SAT (successive approximation tracker) ADC operated by the faster second oscillator 232. Other ADC concepts may also be applied depending on the embodiment.

A digital comparator 252 is provided to compare the ADC result with a constant or with the LP counter value output by the counter 224. When the ADC result is compared to a constant, the sensor system is switched into a switching mode ("on/off output"), and the constant value may be stored in the memory 270. The memory may be part of a circuit 260 as shown in fig. 6. Alternatively, additional sensor elements may be formed in/on the sensor die 218. In this mode, the switch 264 is activated in response to a switching signal at the external contact 268 to allow the output of the circuit 260 to be connected to the second input of the digital comparator 252 to provide a constant value for comparison with the output of the ADC 204. When the ADC result on line 206 is compared to the LP counter value, a PWM function "linear output" is provided, and in this mode, switch 264 is switched so that the output of the counter is connected to the second input of the digital comparator 252.

Alternatively to the digital comparator 252 or in parallel with the digital comparator 252, a low power, low cost, low pin count digital interface, such as i2c, SICI, etc., may also be provided for communicating the ADC data directly to an external microcontroller. Where the digital sensor system includes a DfT block, such an interface may typically already be present and may be reused, also for passing data to an external microcontroller implementing the digital comparator function. In other words, in the embodiment of fig. 6, the digital comparator, which is shown as an integrated part of the sensor system, may also be implemented as an external element in a similar manner as the microcontroller described in relation to fig. 3, 4 and 5.

During operation, the ADC 204 is triggered by a second clock signal, which has a higher frequency than the clock signal used for the wake-up function. The second higher frequency clock signal may be provided by the second oscillator 232 or by the first oscillator 220 in the second mode. Alternatively, the signal may also be provided by an external source (see fig. 4), as described previously. The ADC 204 is triggered with a given duty cycle provided by the low power counter 224 to provide the switching function mentioned above. To perform the PWM function, the ADC is typically triggered with a slope provided by a low power oscillator 220. Alternatively, the ADC may also be triggered by an external signal received from an external microcontroller, as described with respect to fig. 4.

Although the previously described embodiment uses a single sensor, it is noted that more than one sensor may be provided on the integrated circuit chip 218. Multiple sensors may be multiplexed on the ADC input and the digitized signals may be output sequentially via a digital interface. The digitized signals may share a digital comparator and provide results on separate output pins, e.g., one pin for PWM and one pin for switching. Alternatively, the signals may be provided as a logical combination of the comparator results.

Fig. 7 shows an embodiment of the digital sensor system of the present invention using multiple sensors and providing multi-dimensional switching (logical combination of decisions) via a single output, as well as one-dimensional PWM output and one-dimensional linear output. When compared to fig. 6, the embodiment of fig. 7 includes a demux/output latch circuit 272 coupled between the digital comparator 252 and the output 210 of the digital sensor system. Furthermore, a plurality of sensors 200 are provided₁To 200_NThe output of which is selectively coupled to the input of ADC 204 by means of switch 274. The demux/output latch circuit 272 controls both the switch 274 and the circuit 228 via line 276. The provision of the demux/output latch circuit 272 allows measurements from multiple sensors to be performed sequentially. The individual measurements from the respective sensors are the same as described previously. In fig. 7, an external microcontroller 234 and an external third oscillator 236 are also shown, which may also be used according to some other embodimentsIntegrated as part of the sensor chip 216. Although it has been described with respect to fig. 7 that the digital sensor concept described with respect to fig. 6 may be extended to a plurality of sensors in order to provide a multi-dimensional sensor system, it is noted that other embodiments described hereinbefore may also be used to implement a multi-dimensional linear sensor, such as the digital sensor system described with respect to fig. 3.

Another embodiment may use multiple sensors to obtain additional diagnostic information based on physical properties (such as temperature, voltage, or current) within the sensor system. These quantities may reflect the state of the sensor/ADC signal bias, internal supply conditions, on-chip stress effects, or other distortions that may lead to a faulty sensor system.

Fig. 8 shows a multi-dimensional digital sensor system based on the sensor system of fig. 3. When compared to FIG. 3, FIG. 8 includes a plurality of sensors 200₁To 200_NAnd a demux/output latch circuit 272 that controls the switch 274 and the ADC control circuit 238. The switches 274 allow the output of the respective sensor to be selectively connected to the input of the ADC 204. The demux/output latch circuit 272 is connected between the output of the ADC and the input of the interface 208 and provides a plurality of output lines connected to the input of the interface. The circuit 238 also outputs the end of transition signal to the interface via line 278 to deactivate the interface or enter a sleep mode upon completion of the transition to reduce power consumption.

Fig. 9 shows yet another embodiment according to which the digital sensor system of the present invention includes an on-chip digital signal processor 280 connected between the demux/output latch circuit 272 and the interface 208. When compared to the embodiment of fig. 8, a firmware memory 282 is additionally provided, which is operatively coupled to the DSP 280 to provide the necessary firmware information for operating the DSP. Also, when compared to FIG. 8, the end of transition signal 278 is applied to the DSP rather than the interface to indicate to the DSP the end of the transition and the time after which it can return to the deactivated state/sleep mode. The provision of additional digital signal processing circuitry 280 allows the signals generated by the ADC to be further processed before they are output to the microcontroller 234, e.g. the measurement results may be trimmed or some kind of data processing may be applied. Further, application processing may also be performed. Although fig. 9 shows an embodiment using a DSP in a multi-dimensional sensor system, it is noted that according to further embodiments the DSP may also be used in a single-dimensional sensor arrangement, for example by providing the DSP in the embodiment of fig. 3 between the output of the ADC and the input of the interface.

Fig. 10 shows an embodiment of the low power control and digital comparator concept for switching and PWM operation without unnecessary hardware overhead, as it can be used in any of the above-referenced embodiments in which a digital comparator is implemented. The low power counter 224 receives a clock signal from the low power oscillator 220 (not shown in fig. 10) or from an external clock pin of the integrated circuit via line 224. On output line 216, counter 224 outputs a corresponding counter value to the input of digital comparator 252 via selector 264. The selector 264 is controlled by a mode signal applied via pin 268 and provides a counter value on line 216 to the input of the digital comparator to implement a PWM function or, when placed in a switching mode, a switching level input signal dependent on the clocked digital comparator output signal 210 to the input of the comparator 252 to form a switching function with a hysteresis function.

In the illustrated embodiment, four switch levels for two positive and two negative ADC input values may be provided, which are additionally selected by the MSB of the ADC result 206 (i.e., ADC (8)) acting as a sign bit for that value. In another embodiment without a hysteresis function, these multiple levels and comparator output signals may not be needed, and only fixed switching levels may be provided, one for positive ADC values and one for negative ADC values 206 determined by the MSB acting as a sign bit. In further embodiments, only a single level may be detected, and thus only one level may be passed to the digital comparator, and the ADC (8) input may also not be required. In this embodiment, the digital comparator 252 is formed by an adder 284, the adder 284 receiving the ADC result on line 206 at a first input and receiving a signal via a selector 264 at its second input. The smaller area-intensive comparator function is described later with reference to fig. 20, however other digital comparator structures may also be used. The output of adder 284 is connected to a flip-flop 286 that is clocked with a clock signal that may be the low power oscillator clock signal provided on line 254. Alternatively, the flip-flop may be clocked using a second, higher frequency clock signal when a second oscillator or external oscillator signal is provided. The output of flip-flop 286 is output to the output or pin 210 of the sensor die. It should be mentioned that the above principles can also be used in embodiments with more than one ADC signal, according to which the ADC signals can be provided in parallel or sequentially. In such embodiments, the ADC input signal, switching levels, and output signal (e.g., when using three channels for a 3D sensor) may be multiplexed. Still other embodiments may use fewer or more bits for ADC results and switching levels.

In the above embodiments, the ADC 204 is generally described. According to an embodiment, the ADC 204 is implemented using a low power SAT (successive approximation tracker) ADC. However, other concepts for analog/digital conversion may also be applied. Fig. 11 shows an exemplary implementation of an analog/digital converter, as it may be used in accordance with embodiments of the present invention. More specifically, FIG. 11 shows a possible implementation of a low power SAT (successive approximation tracker) ADC as an analog/digital converter for use in the inventive digital sensor system. The ADC shown in fig. 11 is described in detail, for example, in U.S. application 14/319,177, the contents of which are incorporated herein by reference. The ADC of fig. 11 may initially operate using large binary steps that become smaller (approximation mode). Finally, the ADC may enter a tracking mode, where the step is limited to 1 bit. In addition to the implementation described in fig. 11, other known implementations of analog/digital converters may also be used in combination with the inventive concepts described in this application.

FIG. 12 shows a simplified block diagram of an integrated circuit die 218 for implementing a digital sensor system according to one embodiment. The digital sensor system comprises a hall sensor 200 arranged for sensing a magnetic field perpendicular to the surface of the chip assumed to be arranged in the x/y plane, such that in the described embodiment the detection of the magnetic field in the z-direction can be sensed by the sensor 200. The sensor signals are output via line 202 to a multiplexer 203, which is connected to an analog/digital converter 204. The analog/digital converter 204 is connected to the digital comparator 252 via an averaging circuit 290. The output of the digital comparator 252 is supplied to the output pin 210 of the chip 218 via the interface 208 implementing the output driver. The wake-up circuit 212 is formed by a low power oscillator 220 and a cycle counter 224. The output of the loop counter 224 is coupled to a Finite State Machine (FSM)292 via line 216. FSM 292 is coupled to analog to digital converter 204 and averaging circuit 290 and may provide control for these circuits. Sensor chip 218 also includes a second oscillator 232 that provides a clock signal having a higher frequency than the clock signal of oscillator 220 to ADC 204, averaging circuit 290, and also to digital comparator 252 and FSM 292. Based on the clock signal, the just-mentioned digital circuit is operated.

The sensor system chip 218 also includes a zero current power-on reset function and a mode selection function 296 as indicated at reference 294. Mode selection block 296 receives a mode selection signal via interface 298 and line 300 that indicates whether chip 218 is operating with a switch output, digital data output, or PWM output. The interface may be a SICI interface (see, e.g., US2013/0094373A1, the contents of which are incorporated herein by reference). According to other embodiments, another interface according to a digital protocol may be used, such as LIN, SPC, PSI5, I2C. Interface 298 is coupled to the output driver and, as indicated by the double-headed arrow between the output driver and pin 210, I/O contacts are provided so that select signals for interface 298 can also be provided via the pin. The level definition block 302 is connected to the digital comparator 252 for providing a reference value for comparison with the ADC result in a switching configuration. According to an embodiment, circuit block 302 may include a memory unit to store a reference value. The reference value may additionally depend on the last comparator output to form a hysteresis function, such that the level provided to the comparator 252 will change between two predefined levels based on the on-state and off-state of the comparator output to allow a window for avoiding switching due to noise signals, as explained for fig. 10. The required signal lines for the hysteresis function from the comparator 252 to the level definition 302 are not shown in fig. 12. The counter 224 output for the PWM configuration is connected to the digital comparator and, depending on the selected mode of operation, the counter value or constant value is applied to the digital input of the digital comparator. Furthermore, in other embodiments, the comparator 252 may be implemented as a more complex event detector for a given switching level, as will be explained later with reference to fig. 19 to 21.

The circuit chip 218 also includes a bias circuit 304, a reference circuit 306, and a reset circuit 308. Bias and reference circuits are coupled to ADC 204, and reset circuit 308 is coupled to FSM 292. The bias circuit 304 is coupled to the sensor element 200 via a temperature sensor 310. The circuit includes a hall bias circuit 312 for the hall sensor element 200. The FSM 292 for implementing spin operations is also coupled to the hall bias circuit 312. The output of the cycle counter 224 is coupled to the sensor bias 312 and the bias 304 to cause a start up/power down of the system.

Additionally, a diagnostic system incorporating a diagnostic unit 360 may be provided that controls the multiplexer 203 to direct the alternative quantities to the ADC 204. This may be an on-chip temperature measurement, a voltage measurement, or any other quantity to be checked during operation. In this case, the temperature trim for the hall probe 200 additionally delivers a PTAT voltage (PTAT proportional to absolute temperature) to ensure that the sensor operates within its operating temperature condition, and the resistor divider 362 checks that the sensor operates within its operating supply voltage condition.

An integrated circuit chip comprising a digital sensor system as described in relation to fig. 12 allows the sensor to operate in three different modes by appropriate control of the digital comparator 252. In the PWM mode, the comparator compares the actual ADC value with the counter value to form a PWM output. In the switching mode, the comparator 252 compares the actual ADC value with a threshold value that may be set via the interface 298. The threshold may be a fixed value or may be based on the last decision from the comparator to implement the hysteresis function. To allow setting of the threshold based on the last decision, the output of the comparator 252 is also connected to the interface 208, as shown in fig. 12. Interface 298 may also be used to provide external wake-up signals for activating sensors and ADCs and other processing circuitry, such as emergency wake-up in the event of a fault diagnosed by unit 260. In interface mode, the comparator 252 may act as a wake-up, and the ADC 204 may read out directly via the interface.

The function of the circuit of fig. 12 in PWM mode and switching mode will now be described in more detail. In the PWM mode, the output of the cycle counter 224 is connected to the input of the digital comparator, and in this configuration, the integrated circuit 218 has three main functional units with the following building blocks:

a power management section including the PWM finite state machine 292, the low power oscillator 220, the zero current (power on) reset 294, the base bias 304, the bandgap reference 306, the precision reset 308, and the fast oscillator 232.

A sensing portion comprising hall bias 312, hall probe 200 and successive tracking ADC 204 together with a summing register 290 (which is optionally controlled by FSM 292) for averaging of hall spin cycles.

An interface section comprising a digital comparator 252, an open drain interface 208 and a pin 210.

The power management system controls power distribution in the integrated circuit shown in fig. 12 and provides a zero current power-on reset function and a low power oscillator 220 as a clock source. The power management operates based on a loop counter 224 that handles measurement loops and startup behavior. At start-up (via zero current reset), the power management portion activates the

biases

304 and 306, the precision reset detector 308, and the fast oscillator 232, and initializes a first measurement for a first PWM cycle. During operation, the low power oscillator 220 controls the cycle counter 224, which causes activation of the

biases

304, 306, activation of the hall bias 312, activation of the precision reset detector 308 and the fast oscillator 232. It also controls the start of the transition of the hall probe voltage, provided it is above the accurate reset level, and after the ADC measurement it causes the value to be stored for the next PWM cycle, and then it enters a power down mode in which only the low power oscillator 220 is running.

The sensing portion performs measurement of the magnetic field. According to an embodiment, the hall probe 200 is connected to a 9-bit ADC and measurements are performed sequentially with spin and chopping using a dedicated finite state machine 292. The ADC 204 uses a successive approximation tracker mechanism (SAT converter) that includes a DAC and a comparator. Each cycle comprises the following steps:

it starts to compare the hall probe output on line 202 with the intermediate DAC setting (MSB bit setting),

comparator 252 determines whether the hall probe value is below or above the DAC value, which causes the next bit (MSB-1) to be added to or subtracted from the last value, the comparison and addition/subtraction continuing for all bits up to the LSB.

Thereafter, the SAT converter 204 continues the comparison of the LSBs for another eight clock cycles to average the noise of the Hall probe 200,

four cycles are performed while switching the current through the hall probe in all four directions to average out the offset of the hall probe 200. Optionally, the dual spin approach may also be enabled to reduce power consumption for offset accuracy purposes.

Temperature compensation may be performed in the analog domain. Alternatively, the temperature behavior of the sensitivity of the sensor may also be modified to cope with certain magnet types, e.g. by "metal-programming" with a derivative design.

The interface section includes the PWM comparator 252 and the interface 208, which according to an embodiment does not require the fast oscillator 232, which makes its function very power efficient while limiting speed by a small amount due to the use of the low power oscillator 220. Comparator 252 compares the ADC result with a cycle counter 224 driven by low power oscillator 220, which results in a 6-bit PWM output. PWM includes clamping to limit the PWM ratio to 1/64 and 63/64, respectively. The PWM ratio without a magnetic field is about 32/64 and the ratio changes linearly with the applied magnetic field towards the just mentioned clamping limit. With respect to reset, note that a reset event of a precision reset unit operating during an ADC conversion will not reset the ADC value, nor the cycle counter and comparator result, but rather only suppress the ADC conversion. Only a full supply fault detected by the zero current reset block 294 will reset the cycle counter.

When operating the integrated circuit chip of fig. 12 in switch mode, the input to the digital comparator is defined by the value stored in block 302, without using the output signal from counter 224. The main functional units of the integrated circuit in this mode are as follows:

a power management system including the PMU finite state machine 292, the low power oscillator 220, the zero current (power on) reset 294, the basic bias and

bandgap references

304, 306, the fine reset 308, and the fast oscillator 232.

A sensing part comprising hall bias 312, hall probe 200 and successive tracking ADC 204 together with summing register 290 for averaging hall spin cycles, all controlled by FSM 292.

An interface section comprising a digital comparator, a comparison level selection with hysteresis, an open drain interface 208 and a pad 210.

The power management system controls power distribution in the IC 218 and provides a zero current power-on reset function and a low power oscillator 220 as a clock source. The power management system runs on a loop counter 224 that handles measurement loops and startup behavior. At start-up, via a zero current reset, the power management unit activates the

biases

304, 306, the precision reset detector, and the fast oscillator 232. The first measurement and the first comparator decision are also initialized. During operation, the low power oscillator controls the cycle counter 224, which activates the

biases

304, 306, the hall bias 312, the precision reset detector 308, and the fast oscillator 232. In addition, the hall probe voltage is switched, if it is above the accurate reset level, and it causes a switching of the output after the ADC measurement. After which the power down mode is re-entered so that only the low power oscillator 220 is running.

The sensing portion performs measurement of the magnetic field. The hall probe is connected to the ADC 204 and performs measurements using a dedicated finite state machine FSM. In the case of multiple sensors, measurements are performed sequentially, and in both the case of a single sensor and multiple sensors, measurements are performed using spin and chopping using FSM 292. According to an embodiment, the ADC may use the successive approximation tracker mechanism described above with respect to fig. 12, including a DAC and a comparator, and during a cycle, the following steps may be performed:

-comparing the Hall probe output with the intermediate DAC setting,

comparator 252 determines whether the hall probe value is below or above the DAC value, which causes the next bit (MSB-1) to be added to or subtracted from the last value,

the comparison and add/subtract continues for all bits up to LSB.

The SAT converter continues comparison of the LSBs for another eight clock cycles to average the noise of the Hall probe 200, an

Four cycles are performed, switching the current through the hall probe and all four directions simultaneously, to average out the offset of the hall probe 200. Optionally, the dual spin approach may be enabled to reduce power consumption for the purpose of offset accuracy.

Based on the output from the temperature sensor 310, temperature compensation may be performed in the analog domain. Alternatively, the temperature behavior of the sensitivity of the sensor may also be modified to cope with certain magnet types, e.g. by "metal _ programming" with a derivative design.

The interface section is provided with a comparator 252 and an interface 208 which may not require the fast oscillator 232, which makes it very power efficient while slightly reducing the speed due to the limitation of the clock period provided by the low power oscillator 220. Depending on the output state of the digital comparator when the hysteresis function is implemented, the comparator compares the ADC result with a fixed level for the switch. In fig. 12, the output of the comparator is fed back to block 302 via interface 298.

A reset event of a precision reset unit operating during ADC conversion will not reset the ADC value nor the cycle and comparator results, but only suppress the ADC conversion. Only a full supply fault detected by the zero current reset block 294 will reset the cycle counter.

Fig. 13 shows an embodiment of an application circuit for the inventive digital sensor system. In fig. 13, an application circuit for a sensor IC as described in relation to fig. 12 is shown. In fig. 13(a), a sensor chip 218 with sensor element 200 and the previously described additional elements (not shown in fig. 13) is attached to a circuit board or leadframe 314 with

corresponding contacts

316a, 316b, 316 c. In addition to contacts 210 for providing inputs and/or outputs, the integrated circuit sensor chip includes

contacts

211a and 211b, with contact 211a for receiving a supply voltage VDD supplied among the corresponding active elements in the sensor chip (corresponding wiring not shown in fig. 12 for maintaining clarity of the drawing). The contact 211b is used to connect the internal circuitry of the IC sensor chip 218 to ground or to a reference potential (again, to maintain clarity of the drawing, the corresponding wiring used to connect the ground terminal 211b to the corresponding elements inside the IC is not shown). As can be seen from fig. 13(a), the respective

external contacts

210 and 211a and 211b are connected to the respective contacts 316a to 316c by bonding connections 318a to 318 c. In other embodiments, IC chip 218 may be connected to respective terminals 316 a-316 c in a different manner, such as by flip chip bonding or other known methods. The application circuit shown in fig. 13(a) further comprises a power supply 320 and a microcontroller 234. The power supply provides a supply voltage VDD that is applied to the sensor chip 218 via the contact 316a and the contact pad 211 a. The power supply 320 also provides a supply voltage to the microcontroller 234. The input/output pads 210 of the IC chip are connected to the input/output of the microcontroller 234 via bond connections 718a and external contacts 316b, and contacts 316c are coupled to a reference potential, such as ground. In the embodiment of fig. 13(a), the application circuit is provided for all interface options, and the sensor supply is equal to the interface supply.

Fig. 13(b) shows a further embodiment, where the sensor chip 218 and the microcontroller 234 receive different supply voltages VDD _1 and VDD _2 provided by the power supply, which is useful if the supply of the microcontroller 234 needs to be shut off to save power. Where such power savings are desired, the external pull-up resistor R or the internal microcontroller pull-up resistor need to be omitted to avoid current flow through the pull-up resistor when the second supply is lower than the sensor supply. In fig. 13, the integrated circuit 218 provides an open drain output with an internal, active pull-up, which eliminates the need for an external resistor as shown in fig. 13 (a). The internal pull-up also allows the use of a higher voltage on this output pin than a sensor supply using an external pull-up resistor, as shown in fig. 13(b), where current flow in this case can be prevented by providing an internal schottky diode.

The signals between the sensor 218 and the microcontroller 234 as shown in fig. 13(a) and 13(b) may be connected to input pins, input/output pins or special interrupt pins depending on the capabilities of the microcontroller and in case of special wake-up configurations polling or interrupt functions are required for a number of existing microcontroller implementations (including their signals) or microcontrollers on the market and further peripherals are required for this application. Output options may be required to control parameters of the sensor, such as switching levels of wake-up functions or sending diagnostic commands. Alternatively, in other embodiments, the configurations shown in fig. 13(a) and 13(b) including sensor 218, power supply 320, and microcontroller 234 may be fully or partially integrated on a single silicon die in any combination.

With respect to fig. 14, a further embodiment of an inventive digital sensor system implementing a 3D sensor chip is shown. The sensor chip is provided with one lateral and two vertical hall sensors for converting signals from three hall probes and three axes. Additionally, temperature sensing is provided and signals from the respective sensors are provided to the microcontroller. The sensor chip according to the embodiment of fig. 14, when compared with the embodiment of fig. 12, does not include a digital comparator, instead provides a register/fuse block 322, and provides a plurality of I/

O pads

210a and 210d in addition to supply and

ground pads

211a and 211 b. Integrated circuit 218 includes three main functional units, namely:

a power management section including a PMU finite state machine 224, a low power oscillator 220, a zero current (power-on) reset block 294, basic bias and

bandgap references

304, 306, a precision reset 308, and a fast or second oscillator 232.

A sensing portion comprising hall bias 312,

hall probes

200x, 200y and 200z together with a multiplexer represented by "switch" 274, and a successive tracking ADC 204 together with a summing register 290 for averaging hall spin cycles and both controlled by a finite state machine 292.

An interface portion including IIC interface 208, register file/fuse block 322, and I/O pads 210a through 210 d.

The power management system controls power distribution in the integrated circuit 218, provides a zero current power-on reset function and a low power oscillator 220 as a clock source. The power management portion runs on a dedicated finite state machine 224 that handles power modes and startup behavior as follows. At start-up or via IIC soft reset, the power management unit activates the

biases

304, 306, the precision reset detector 308, and the oscillator 232, senses the fuse setting and latches the ADDR pin 210b, entering the power mode set by the fuse. The default setting may be that all

biases

304, 306, 312 and oscillator 332 are turned off. Depending on the selected power mode, power management is performed periodically. When activation is to be performed, the

biases

304, 306, the precision reset detector 308 and oscillator 322, and the hall bias 312 are activated. The three hall probe channel outputs are then sequentially switched with an optional switching of the PTAT voltage (temperature measurement from sensor 310). After the measurement, the power management portion causes the system to enter the low power mode again, for example by returning to a default setting. According to an embodiment, the above mentioned functions of the power management part are performed if the supply voltage is sufficiently high, otherwise the precision reset circuit will hold the state machine until the required level of the supply voltage is reached and thereafter continue its operation. If a reset event occurs in between, the function is also restarted.

The sensing portion performs a measurement of the magnetic field. Hall probe 200_x、200_yAnd 200_zIs coupled to a multiplexer 274, the multiplexer 274 also being coupled to the ADC 204. The measurements for the three channels are performed sequentially using a dedicated Finite State Machine (FSM) 292. According to the embodiment of fig. 14, the ADC may use successive approximation including a DAC and a comparator (see fig. 11)Tracker mechanism (SAT converter). Each cycle may include the following steps:

comparing the Hall probe output with the intermediate DAC setting (MSB bit setting),

-determining by a comparator whether the Hall probe value is below or above the DAC value, which causes the next bit (MSB-1) to be added to or subtracted from the last value,

-continuing the comparison and adding/subtracting for all bits up to LSB,

continuing the comparison of the LSBs with the ASD converter for another eight clock cycles to average the noise of the Hall probe,

this cycle is performed four times while switching the current through the hall probe in all four directions to average out the offset of the hall probe. Temperature measurement is performed in the same manner, however, instead of a hall probe, the first multiplexer input is connected to a PTAT (proportional to absolute temperature) voltage from a bias circuit.

The IIC interface requires two pins, namely the SCL input pin 210c and the DSA input/output pin 210a in an open drain configuration. Further, according to the depicted embodiment, two pins are provided that may be shared with the IIC pin in a particular package, namely the interrupt output pin/INT 210d in an open drain configuration that may be shared with the SCL pin, and the address select input pin ADDR 210b that may also be shared with the SDA pin.

The interface portion does not require the internal oscillator to be active so that it can operate in any power mode of the sensor IC 218. The IIC interface may perform a chip reset initiated by the host device independently of the IIC address used. The measurements from all three axes are stored in separate registers and these registers will read as zeros after a power-up reset or after a soft reset using the IIC interface. There may be an additional temperature value register that also reads zero after power-up or a soft reset. A reset event of a precision reset unit operating during ADC conversion will not reset the stored value, but only suppress ADC conversion. A full supply fault detected only by the zero current reset block will reset the register and initialize a new power up cycle to be performed.

Fig. 15 shows an embodiment of an application circuit that can be used for an IC sensor chip as described in fig. 14. Depending on the package, the IIC bus is shared or not shared with additional address select and interrupt pads. The application specific circuitry is now described with respect to possible packaging variations and in both cases described below the use of interrupt lines is optional, however, it is preferred that such interrupt lines are provided to ensure proper and efficient readout of the sensor data.

In fig. 15, in a similar manner to that in fig. 13, the sensor IC 218 is mounted to a circuit board or lead frame 314, the circuit board or lead frame 314 having six pins (pins 1 to 6) in the embodiment of fig. 15(a), or eight pins (pins 1 to 8) as shown in the embodiment of fig. 15 (b). Respective contact pads of the IC circuit 218 are connected to respective pins by bonding connections or other suitable connections, as depicted in fig. 15. In fig. 15(a), the ADDR and SDA pads (

pads

210a and 210b) are connected to pin number 1 for connection to the microcontroller 234. The interrupt and SCL pads (

pads

210c and 210d) are connected to pin number 6 and are also connected to further inputs of the external microcontroller 234. In fig. 15(b), the SDA pad and ADDR pad may be connected to different pins (pin numbers 7 and 8), and the SCL pad and the interrupt pad may also be connected to different pins (pin numbers 6 and 5). With respect to FIG. 15, note that ADDR may be connected to SDA, VDD, or GND. Additionally, the/INT line may be shared with the open drain/INT outputs of other sensors.

FIG. 16 shows a transition scheme in the "low power mode" of the sensor IC described with respect to FIG. 14. In the low power mode, the interrupt signal/INT is generated by a low power oscillator and a low power counter and triggers the ADC to measure and wake up the external microcontroller.

Fig. 17 shows a switching scheme when the IC sensor shown in fig. 14 is operated in the fast mode. signal/INT is generated at the end of successive ADC samples and wakes up the external microcontroller. This mode may be enabled if the master/microcontroller desires to measure a certain signal with a higher bandwidth after it wakes up.

Fig. 18 shows a conversion scheme triggered after a transmission from the master controller allowing the master to control the sampling time point.

The above description of embodiments of the invention has been made in relation to hall sensors, however, the invention is not limited to such kind of sensors. Other magnetic field sensors, such as xMR sensors or shunt Hall sensors, may also be used. In other embodiments, sensors measuring other properties may be used, for example sensors measuring other physical quantities such as voltage, temperature, current, etc. Combinations of such sensors may also be integrated in the inventive sensor die. In other embodiments, additional sensors may be used for diagnostic or fine tuning purposes of the magnetic sensor. Furthermore, the embodiments described so far use only a single ADC, however instead of using multiplexed analog-to-digital converters for multiple sensors, separate analog-to-digital converters for separate measurement channels or for different groups of measurement channels may also be used. The inventive method can be applied to any kind of sensor system using active sensors, for example sensors that need to be activated to allow them to make measurements.

As mentioned above, the integrated circuit sensor chip may comprise a memory element (e.g. a volatile memory) for receiving values used by the ADC converter or by the digital comparator or by another digital processing device for processing the measurement signals from the probe. For example, the threshold value may be provided by a microcontroller and may be stored by volatile memory (such as registers or RAM) of the IC sensor chip. Alternatively, the IC sensor chip may include a non-volatile memory, such as an EEPROM or flash memory, for maintaining the threshold value. Preferably, the non-volatile memory can be written to many times, so that for example the initial thresholds can be modified or corrected later, for example by overwriting them with new values from the microcontroller.

According to embodiments using hall sensors with two or four-phase spin current systems, it is preferable to digitally compare the threshold value with two or four digital ADC results that are summed or averaged. In embodiments using an xMR sensor or other sensor, an additional digital/analog converter may be used to re-convert the digital measurement signal to the analog domain, and an analog comparator is used to perform the threshold comparison in the analog domain. This allows using the DAC and comparator unit twice, since they are also used for ADC functions, e.g. forming a SAR-ADC from the DAC followed by the comparator and SAR register (see fig. 11).

The thresholds may be superimposed by hysteresis values or by superimposed +/-signals in order to fulfill the desired function, e.g. threshold 1-threshold-hysteresis/2 and threshold 2-threshold + hysteresis/2. Alternatively, two thresholds may be used for each channel to be measured (e.g. for each axis of the magnetic field to be measured), i.e. the lower and upper thresholds may be stored directly. Also, an asymmetric hysteresis or a window comparator with additional hysteresis may be applied.

In order to save space for registers on the IC chip holding the sensor system, it may be preferable to store the threshold values for each channel, but only a single hysteresis value or a single window comparator value, and the final valid threshold value may then be calculated from the absolute or relative overlap of the original threshold value and the hysteresis or window value. The window value may also be applied to the sensor signal direction, e.g. a positive magnetic field signal, or alternatively to positive and negative sensor signals. Fixed or relative hysteresis or window comparator thresholds may be fixedly stored in the sensor, such that only three threshold registers are required for a 3-channel sensor.

According to an embodiment, when using high voltage applications (e.g. applications using 18V or 24V VDD), additional high voltage depletion transistors may be provided for limiting the operating voltage, in particular for digital registers and for low power oscillators. This allows for low power control of high voltage protection.

Further embodiments may also implement watchdog dog functionality in the system.

According to an embodiment, the wake-up circuit output may be a specific pulse or a specific pulse coded wake-up signal. In such an embodiment, in case of a non-operational sensor system, the wake-up signal will not only be a continuous low or high level signal, but instead the wake-up signal has a specific pulse or a specific pulse code, so that for example an external controller can distinguish the wake-up signal from a completely non-operational sensor system outputting only a low or high level signal, e.g. due to a failure of a clock generator.

Hereinafter, an embodiment for implementing the event detector will be described in detail. The event detector may be implemented as part of the ADC trigger/configuration circuit 228 (see fig. 3-9) and may operate based on the counter value from the counter 224. In the case of other events, such as external events, digital signals representing the events may be provided and processed by the event detector. In such a scenario, the wake-up circuit 212 shown in fig. 2 may include an event detector without the need for an oscillator and counter.

Fig. 19 illustrates one embodiment of an event detector circuit 400, which may be implemented in the wake-up circuit 212 (see fig. 2) based on fixed or variable limits 401. The ADC value 404 representing the event may be compared to the given limit 402 by two digital comparators 406. The resulting comparison may be masked 408, which will disable it during further detection. Event store 410 may contain a previous result 412 (e.g., last event l or last event 2), which may be accomplished by delaying the actual comparison result 414 (indicated as new event l and new event 2 in the figure) using a storage element, such as a flip-flop controlled by an enable signal 416, the enable signal having a given ADC update rate or any other rate suitable for a certain application. The old and new events may then be compared by resolver 418 to generate a new wake event 420. Such a circuit 400 may be provided for each ADC channel to be used as an event source.

Fig. 20 illustrates an embodiment of an area optimized comparator circuit for a fixed limit value, which may be used in the circuit 400 of fig. 19. It is based on the detection of a level that is the nth power of two below a positive full scale range 422 (two-power-N) or above a negative full scale range 424 of binary complement binary ADC values. Practical embodiments use 5-bit ADC values M and 3-bit comparison N that provide thresholds of 4LSB below the upper full-scale range (+15) and 4LSB above the lower full-scale range (-16), and in other embodiments the numbers may vary as long as the ADC bit width is greater than the comparison bit width (otherwise the comparison will actually always match, which is no longer useful). The resulting logic 426 includes only logic gates and does not require an adder or subtraction circuit to determine the difference between the ADC value and a given limit.

Fig. 21 illustrates the behavior of the circuit 400 of fig. 19 using the circuit 426 of fig. 20. Fig. 21 illustrates points in time where the ADC values 404 (see fig. 21(a) and 21(b)) cross the limit 428 at which a new event 1 signal 414 (see fig. 21(c)) is generated. Because the last event 1 signal 412 is still different from the new event 1 signal 414 (see fig. 21(c) and 21(d)), a wake-up event signal 420 (see fig. 21(e)) is generated. Following the update rate 235 (see fig. 21(f)), the last event 1 signal 412 will become the new event signal at the next event 430, causing the two signals to be the same, so the wake-up event will be disabled again. Of course, if desired, the wake-up event signal may be further pulse shaped in another embodiment using an available clock source.

Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present application, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, or steps.

Claims

1. A circuit system, comprising:

a digital sensor system, comprising:

a sensor element;

and

a digital interface to:

providing a wake-up signal based on a sensing action being performed by the sensor element after a predefined event is detected by the digital sensor system; and

a microcontroller for:

receiving the wake-up signal provided by the digital interface, an

Waking from a sleep mode based on receiving the wake-up signal provided by the digital interface,

wherein when the wake-up signal is a single pulse, the microcontroller is configured to poll the digital sensor system to determine information associated with a wake-up event, and

wherein when the wake-up signal is a composite pulse, the microcontroller is configured to receive information transmitted using the composite pulse without polling the digital sensor system after wake-up.

2. The circuitry of claim 1, wherein the microcontroller is further configured to:

determining information describing a format of a wake-up signal;

determining that the format of the wake-up signal matches the format of the wake-up signal; and is

Wherein, when waking from the sleep mode, the microcontroller is further configured to:

waking from the sleep mode based on determining that a format of the wake-up signal matches the wake-up signal format.

3. The circuitry of claim 1, wherein the wake-up signal comprises information associated with the predefined event or information associated with a sensor value.

4. The circuitry of claim 1, wherein the digital sensor system functions as a master on a bus associated with the circuitry.

5. The circuitry of claim 1, wherein the microcontroller functions as a slave on a bus associated with the circuitry.

6. The circuitry of claim 1, wherein the digital sensor system and the microcontroller communicate using a short pulse width modulation coding (SPC) protocol, a peripheral sensor interface 5(PSI5) protocol, or a Universal Asynchronous Receiver Transmitter (UART) protocol.

7. The circuitry of claim 1, wherein the microcontroller is further configured to:

returning to the sleep mode after processing a signal associated with the sensing action.

8. The circuitry of claim 7, wherein the sensor element is a first sensor element and the digital interface is a first digital interface, and

wherein the digital sensor system further comprises:

a second sensor element; and

a second digital interface to:

providing a further wake-up signal based on a further sensing action being performed by the second sensor element after a further predefined event is detected by the digital sensor system; and is

Wherein the microcontroller is further configured to:

receiving further wake-up signals provided by said second digital interface, an

Waking from the sleep mode based on receiving the other wake-up signal provided by the second digital interface.

9. The circuitry of claim 1, wherein the wake-up signal comprises information identifying the digital sensor system.

10. A circuit system, comprising:

a sensor element for performing a sensing action based on detecting a predefined event; and

a digital interface for providing a wake-up signal based on the sensing action being performed by the sensor element; and

a microcontroller for:

receiving the wake-up signal provided by the digital interface, an

wherein when the wake-up signal is a single pulse, the microcontroller is configured to poll a digital sensor system associated with the sensor element to determine information associated with a wake-up event, and

11. The circuitry of claim 10, wherein the microcontroller is further configured to:

determining information associated with a wake-up signal format;

12. The circuitry of claim 10, wherein the wake-up signal comprises information associated with the predefined event or information associated with a sensor value.

13. The circuitry defined in claim 10 wherein a digital sensor comprising the sensor element and the digital interface functions as a master on a bus associated with the circuitry and wherein the microcontroller functions as a slave on the bus associated with the circuitry.

14. The circuitry of claim 10, wherein the digital interface and the microcontroller communicate according to a short pulse width modulation coding (SPC) protocol, a peripheral sensor interface 5(PSI5) protocol, or a Universal Asynchronous Receiver Transmitter (UART) protocol.

15. The circuitry of claim 10, wherein the microcontroller is further configured to:

16. The circuitry of claim 15, wherein the sensor element is a first sensor element and the digital interface is a first digital interface, and

wherein the circuitry further comprises:

a second sensor element for performing another sensing action based on detecting another predefined event; and

a second digital interface for providing a further wake-up signal based on a further sensing action performed by the second sensor element; and is

Wherein the microcontroller is further configured to:

receiving a wake-up signal provided by the second digital interface, an

Waking from the sleep mode based on receiving other wake-up signals provided by the digital interface.

17. The circuitry of claim 10, wherein the wake-up signal comprises information identifying a digital sensor system associated with the sensor element.

18. A digital sensor system, comprising:

a sensor element for:

performing a sensing action based on detecting a predefined event; and

a digital interface to:

providing a wake-up signal based on the sensing action being performed by the sensor element,

wherein the wake-up signal causes a microcontroller associated with the digital sensor system to wake-up from a sleep mode, and

wherein the wake-up signal comprises information associated with the predefined event,