CN108646048A

CN108646048A - A kind of speed detector based on FPGA

Info

Publication number: CN108646048A
Application number: CN201810534183.3A
Authority: CN
Inventors: 廖赐洲
Original assignee: Ningbo Dizhou Automation Science & Technology Co Ltd
Current assignee: Ningbo Dizhou Automation Science & Technology Co Ltd
Priority date: 2018-05-29
Filing date: 2018-05-29
Publication date: 2018-10-12

Abstract

The present invention relates to a kind of speed detectors based on FPGA, are realized using fpga chip, wherein enabled module works for starting counter module；Buffer module is used to be arranged the number of teeth of tachometer；Channel selecting buffer module is used to select a channel as calculating rotating speed from multiple input point；Counter module is used to calculate the rotary speed of current object automatically according to the pulse wave of input；The high bit memory module of tachometer is used for the calculated high bit Data of memory counter module；The tachometer low level member memory module is used for memory counter module calculated ground bit Data.The present invention can simulate the function of multiplexer and rotating speed calculator.

Description

A kind of speed detector based on FPGA

Technical field

The present invention relates to Rotating speed measring technical fields, more particularly to a kind of speed detector based on FPGA.

Background technology

8254 counter of generally use collocation multiplexer realizes rotary test speed function in the prior art, is counted using 8254 The rotating speed (RPM) of target object is converted into pulse wave input, when object rotary speed is faster by the function of device by electrical signal When, generated pulse number is more, otherwise sample rate can be slack-off when slowing, and defect is：When object to be calculated Rotary speed, need to accumulate enough pulse numbers, therefore response speed is slower.

Invention content

Technical problem to be solved by the invention is to provide a kind of speed detectors based on FPGA, can simulate more The function of work device and rotating speed calculator.

The technical solution adopted by the present invention to solve the technical problems is：A kind of Rotating speed measring dress based on FPGA is provided It sets, is realized using fpga chip, including following functions module：Buffer module, channel selecting buffer module, counter mould Block, enabled module, the high bit memory module of tachometer and tachometer low level member memory module；The output end of the enabled module with The Enable Pin of counter module is connected, and works for starting the counter module；The output end of the buffer module It is connected with the ends TC of counter module, the number of teeth for tachometer to be arranged；The output end of the channel selecting buffer module with The input terminal of counter module is connected, for selecting a channel as calculating rotating speed from multiple input point；The counting The output end of device module is connected with the high bit memory module of tachometer and tachometer low level member memory module respectively, for according to defeated The pulse wave entered calculates the rotary speed of current object automatically；The high bit memory module of tachometer is used for memory counter The calculated high bit Data of module；The tachometer low level member memory module is used for the calculated status of memory counter module Metadata.

The buffer module is 8 bit buffer modules, for the number of teeth that sets as 1~255.

The channel selecting buffer module is the channel selecting buffer of eight bits, and the part that can be selected is 0~255, Wherein 0~31 is channel selecting, and 32~255 be reserved function parameter at present.

Advantageous effect

Due to the adoption of the above technical solution, compared with prior art, the present invention having the following advantages that and actively imitating Fruit：The present invention simulates the function of multiplexer and rotating speed calculator using FPGA, saves PCB space, is not required to complicated circuit and sets Meter, realization method is simple, and extendibility is more preferable.

Description of the drawings

Fig. 1 is the block diagram of the present invention；

Fig. 2 is the measuring principle figure of the present invention.

Specific implementation mode

Present invention will be further explained below with reference to specific examples.It should be understood that these embodiments are merely to illustrate the present invention Rather than it limits the scope of the invention.In addition, it should also be understood that, after reading the content taught by the present invention, people in the art Member can make various changes or modifications the present invention, and such equivalent forms equally fall within the application the appended claims and limited Range.

Embodiments of the present invention are related to a kind of speed detector based on FPGA, as shown in Figure 1, using fpga chip It realizes, goes out multiple function modules, including following functions module using VERILOG languages：Buffer module, channel selecting are temporary Buffer module, counter module, enabled module, the high bit memory module of tachometer and tachometer low level member memory module；It is described The output end of enabled module is connected with the Enable Pin of counter module, works for starting the counter module；It is described The output end of buffer module is connected with the ends TC of counter module, the number of teeth for tachometer to be arranged；The channel selecting is temporary The output end of buffer module is connected with the input terminal of counter module, for selecting one to turn as calculating from multiple input point The channel of speed；The output end of the counter module stores mould with the high bit memory module of tachometer and tachometer low level member respectively Block is connected, the rotary speed for calculating current object automatically according to the pulse wave of input；The high bit storage of tachometer Module is used for the calculated high bit Data of memory counter module；The tachometer low level member memory module is counted for storing Device module calculated ground bit Data.

The workflow of the present invention is as follows：

The number of teeth of this tachometer must be first set first, and the connotation expressed by the number of teeth is that target object rotates a circle and can generate The pulse wave of how much quantity, such as the number of teeth are 60 teeth, when this object rotates a circle, it will generate 60 pulse waves.

Step 1, upper control unit is by its data write registers module RPM_TC_LATCH.

Buffer module RPM_TC_LATCH is 8 bit buffers, and the number of teeth that can be set is 1~255, because 0 is not to be inconsistent Close the state of actual use.

Step 2 sets the channel selecting of multiplexer.

Channel selecting buffer module RPM1_CH_SEL_U is the channel selecting buffer of eight bits in present embodiment, It can select any of which that can be selected as the channel for calculating rotating speed because being thus eight bit buffers from 32 input points It is 0~255 to select part, wherein 0~31 is channel selecting, 32~255 be at present reserved function parameter, sets this buffer, Complete the setting of multichannel multiplexer.

Step 3, enable start RPM tachometers.

By enabled module PRM1_EN_U, this eight bits buffer sets the change of value parameter,

When the BIT1=0 of enabled module PRM1_EN_U is then expressed as not starting；

When the BIT1=1 of enabled module PRM1_EN_U is then expressed as starting state.

As long as therefore by this bit set being " 1 ", at this time counter module RPM1_U the pulse wave of input will be counted automatically The rotary speed for calculating current object is deposited in data in the buffer of 16 bits.

The measure theory of counter module RPM1_U is as follows：

As shown in Fig. 2, starting timing when first time rising edge, edge is risen until next time.

After calculating this time parameter, you can find out the rotating speed of object.

Such as：The number of teeth is 60 teeth, and every revolution will will produce 60 pulse waves, if the calculated time is assumed to be 1ms,

1ms*60 (number of teeth)=60ms per Rev ... ... ... (the time required to every turn)

By its inverted 1/60ms (rev/sec)

It is converted into a minute rev/min

60s=1min

1/60ms*1000=1000/60s RPM=1000

Dynamic PRM numerical value at present is can be obtained according to this calculation, and calculated data is deposited in into rotating speed It counts in high bit memory module RPM1_HB_DATA and tachometer low level member memory module RPM1_LB_DATA, wherein tachometer High bit memory module RPM1_HB_DATA is for storing the high bit data of tachometer, tachometer low level member memory module RPM1_ LB_DATA is for storing the low bit data of tachometer.When upper control unit this data of reading in need, you can directly by this Data is read, and is applied to relevant control.

Claims

1. a kind of speed detector based on FPGA, which is characterized in that realized using fpga chip, including following functions mould Block：Buffer module, counter module, enables module, the high bit memory module of tachometer and turns channel selecting buffer module Speed meter low level member memory module；The output end of the enabled module is connected with the Enable Pin of counter module, described for starting Counter module works；The output end of the buffer module is connected with the ends TC of counter module, for rotating speed to be arranged The number of teeth of meter；The output end of the channel selecting buffer module is connected with the input terminal of counter module, is used for from multiple defeated A channel as calculating rotating speed is selected in access point；The output end of the counter module is stored with the high bit of tachometer respectively Module is connected with tachometer low level member memory module, the rotation speed for calculating current object automatically according to the pulse wave of input Degree；The high bit memory module of tachometer is used for the calculated high bit Data of memory counter module；The tachometer is low Bit memory module is used for memory counter module calculated ground bit Data.

2. the speed detector according to claim 1 based on FPGA, which is characterized in that the buffer module is 8 Bit buffer module, for the number of teeth that sets as 1~255.

3. the speed detector according to claim 1 based on FPGA, which is characterized in that the channel selecting buffer Module be eight bits channel selecting buffer, the part that can be selected is 0~255, wherein 0~31 be channel selecting, 32~255 It is reserved function parameter at present.