CN108631566B - Circuit for splitting and protecting power input and output - Google Patents
Circuit for splitting and protecting power input and output Download PDFInfo
- Publication number
- CN108631566B CN108631566B CN201710172963.3A CN201710172963A CN108631566B CN 108631566 B CN108631566 B CN 108631566B CN 201710172963 A CN201710172963 A CN 201710172963A CN 108631566 B CN108631566 B CN 108631566B
- Authority
- CN
- China
- Prior art keywords
- nmos tube
- amplifier
- output
- splitting
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000005070 sampling Methods 0.000 claims abstract description 18
- 229930186949 TCA Natural products 0.000 description 5
- 229940123445 Tricyclic antidepressant Drugs 0.000 description 5
- 238000001514 detection method Methods 0.000 description 4
- 230000000007 visual effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
Abstract
The power supply connecting wire is divided into a plurality of bundles to respectively perform current sharing and current limiting control, the circuit comprises a bundle-splitting power supply connector with a plurality of pairs of contacts, the first bundle-splitting power supply wire is connected with the source electrode of a first NMOS tube, the drain electrode of the first NMOS tube is connected with a main power supply end, the source electrode of the first NMOS tube is connected with the source electrode of a second NMOS tube, the channel area of the first NMOS tube is n times that of the second NMOS tube, the drain electrode of the second NMOS tube is a first bundle-splitting current sampling signal node, the second bundle-splitting power supply wire is connected with the source electrode of a fourth NMOS tube, the drain electrode of the fourth NMOS tube is connected with the source electrode of a fifth NMOS tube, the channel area of the fourth NMOS tube is n times that of the fifth NMOS tube, the drain electrode of the fifth NMOS tube is a second bundle-splitting current sampling signal node, and the grid electrodes of the first NMOS tube, the second NMOS tube and the fifth NMOS tube are all connected with a switch control circuit.
Description
Technical Field
The invention relates to a power management and circuit protection technology, in particular to a circuit for carrying out beam splitting protection on power input and output, which is characterized in that a power supply connecting wire is split into a plurality of beams to respectively carry out current sharing and current limiting control, so that the current limiting according to beam splitting current and total current under PLS limit and in a Type-C/USB environment is realized, the higher power is reliably received and paid, and the problems of safety limitation and reliable connection are solved.
Background
The power supply provides power to the electronics in the circuit, but the power supply takes a single path, i.e., one power supply is treated as only one line and contact. The inventors found that only 8A 60V voltage can be delivered under PLS limitation, and that only 8A needs to be output per wire if split to different wires. Likewise, type-C/USB defines 4 pairs of power connection lines, each of which is connected to the power transmitting and receiving terminal corresponding to one contact, providing a connection of total current <5A in the range below 20V. If 5A were concentrated on a pair of contacts, the contacts would burn and eventually sinter due to excessive current. Type-C/USB: the interface standard issued by the USB IF is widely used for computers and mobile phones, the standard specifies the use of 4 pairs of 8 wires as power in Type-C connectors and cables. PLS/UL2054: UL2054 safety standards specify a limited power source that indicates that power supplies exceeding 60V and 8A require higher levels of operation and require more costly hardware. In the prior art, only voltage and current detection and protection circuits aiming at single beams are provided, the power supply connection is not divided into a plurality of beams for detection and protection, beam splitting management cannot be performed, and each lead wire and each pair of contacts cannot be determined to be in the safety range, so that the greater exertion of the power supply transmission capability and the better protection of the lines and the contacts are prevented.
Disclosure of Invention
Aiming at the defects or shortcomings in the prior art, the invention provides a circuit for carrying out beam splitting protection on power input and output, wherein the beam splitting protection is to divide a power supply connecting wire into a plurality of beams to respectively carry out current sharing and current limiting control, so that the aim of reliably giving and receiving higher power according to beam splitting and total current limiting under PLS limitation and in a Type-C/USB environment is fulfilled, and the problems of safety limitation and reliable connection are solved.
The technical scheme of the invention is as follows:
the circuit for splitting protection of power input and output is characterized by comprising a splitting power connector with a plurality of pairs of contacts, wherein the power input side of one pair of contacts is connected with a first splitting power line, the power input side of the other pair of contacts is connected with a second splitting power line, the first splitting power line is connected with the source electrode of a first NMOS tube, the drain electrode of the first NMOS tube is connected with a total power end, the source electrode of the first NMOS tube is connected with the source electrode of a second NMOS tube, the channel area of the first NMOS tube is n times that of the second NMOS tube, the drain electrode of the second NMOS tube is a first splitting current sampling signal node, the second splitting power line is connected with the source electrode of a fourth NMOS tube, the drain electrode of the fourth NMOS tube is connected with the total power end, the source electrode of the fourth NMOS tube is n times that of the fifth NMOS tube, the drain electrode of the fifth NMOS tube is a second splitting current sampling signal node, and the drain electrode of the fourth NMOS tube, the gate electrode of the fifth NMOS tube and the gate electrode of the fifth NMOS tube are connected with the control circuit.
The first beam splitting current sampling signal node is respectively connected with a source electrode of a third PMOS tube and a negative input end of a first amplifier, a positive input end of the first amplifier is connected with a drain electrode of the first NMOS tube, an output end of the first amplifier is connected with a grid electrode of the third PMOS tube, and the drain electrode of the third PMOS tube is filled with 1/n of a first beam splitting current value for sampling.
The second beam splitting current sampling signal node is respectively connected with the source electrode of the sixth PMOS tube and the negative input end of the second amplifier, the positive input end of the second amplifier is connected with the drain electrode of the fourth NMOS tube, the output end of the second amplifier is connected with the grid electrode of the sixth PMOS tube, and the drain electrode of the sixth PMOS tube is filled with 1/n of the second beam splitting current value for sampling.
The drain electrode of the third PMOS tube is respectively connected with the positive input end of the first transconductance amplifier and one end of the first resistor, the other end of the first resistor is connected with the negative input end of the third amplifier, the first transconductance amplifier is provided with a first offset, the negative input end of the first transconductance amplifier is connected with the reference voltage end through the first offset, the output end of the first transconductance amplifier is connected with the reference voltage end through the third resistor, and the positive input end of the third amplifier is connected with the reference voltage end.
The drain electrode of the sixth PMOS tube is respectively connected with the positive input end of the second transconductance amplifier and one end of the second resistor, the other end of the second resistor is connected with the negative input end of the third amplifier, the second transconductance amplifier is provided with a second offset, the negative input end of the second transconductance amplifier is connected with the reference voltage end through the second offset, the output end of the second transconductance amplifier is connected with the reference voltage end through the third resistor, and the positive input end of the third amplifier is connected with the reference voltage end.
The negative input end of the third amplifier is connected with a first output voltage end through a fourth resistor, and the first output voltage end is connected with the output end of the third amplifier.
The output end of the third transconductance amplifier is connected with the positive input end of the third transconductance amplifier, the third transconductance amplifier is provided with a third offset, the negative input end of the third transconductance amplifier is connected with the reference voltage end through the third offset, the output end of the third transconductance amplifier is connected with the reference voltage end through a third resistor, the output end of the third transconductance amplifier is connected with the positive input end of the fourth transconductance amplifier, the negative input end of the fourth transconductance amplifier is connected with the reference voltage end, and the output end of the fourth transconductance amplifier is connected with the second output voltage end.
The invention has the following technical effects: the circuit for beam splitting protection of the power input and output of the invention breaks the power connection into a plurality of beams for detection and protection, thereby obtaining larger transmission capacity and better line and contact protection. The invention is a technical solution which decomposes the power supply path into more than one path for detection and protection and is convenient to realize by using an integrated circuit.
Drawings
Fig. 1 is a schematic circuit diagram of a power input/output beam splitting protection circuit embodying the present invention.
The reference numerals are listed below: a J-beam splitting connector; ia-first split power line or first split current value; ib-a second split power line or a second split current value; QPa-a first split-beam power supply channel control region or a first double MOS transistor; QPb-second split power supply channel control region; sw-switch control circuitry; isum-Total Power line Total Power terminal; QPa 1-first NMOS tube; QPa 2-second NMOS tube; qa-a third PMOS tube; aa-a first amplifier; QPb 1-fourth NMOS tube; QPb 2-fifth NMOS tube; qb-sixth PMOS tube; ab-second amplifier; rai-a first resistor; rbi-a second resistor; rcor-third resistor; rsum-fourth resistance; TCAa-a first transconductance amplifier; TCAb-a second transconductance amplifier; TCAs-third transconductance amplifier; an As-third amplifier; a CA-fourth amplifier; vai-first switching voltage; ea—a first offset or first offset voltage value; eb-a second offset or second offset voltage value; es-a third offset or third offset voltage value; visual-first output voltage or first output voltage terminal; vcor-a second output voltage or second output voltage terminal; vref—reference voltage terminal.
Detailed Description
The invention will be described with reference to the accompanying drawings (fig. 1).
Fig. 1 is a schematic circuit diagram of a power input/output beam splitting protection circuit embodying the present invention. As shown in fig. 1, the circuit for performing beam splitting protection on a power input/output is characterized by comprising a beam splitting power connector J with a plurality of pairs of contacts, wherein the power input side of one pair of contacts is connected with a first beam splitting power line Ia, the power input side of the other pair of contacts is connected with a second beam splitting power line Ib, the first beam splitting power line Ia is connected with the source of a first NMOS tube QPa1, the drain of the first NMOS tube QPa1 is connected with a main power end Isum, the source of the first NMOS tube QPa1 is connected with the source of a second NMOS tube QPa2, the channel area of the first NMOS tube QPa1 is n times that of the second NMOS tube QPa2, the drain of the second NMOS tube QPa2 is a first beam splitting current sampling signal node, the second beam splitting power line Ib is connected with the source of a fourth NMOS tube QPb1, the drain of the fourth NMOS tube QPb1 is connected with the main power end psum, the source of the fourth NMOS tube QPb1 is connected with the source of a fifth NMOS tube QPb2, the channel area of the first NMOS tube QPa2 is n times that of the fifth NMOS tube QPa2 is n times that of the drain of the fifth NMOS tube QPa 2.
The first beam splitting current sampling signal node is respectively connected with a source electrode of a third PMOS tube Qa and a negative input end of a first amplifier Aa, a positive input end (+) of the first amplifier Aa is connected with a drain electrode of a first NMOS tube QPa1, an output end of the first amplifier Aa is connected with a grid electrode of the third PMOS tube Qa, and the drain electrode of the third PMOS tube Aa is filled with 1/n sampling (namely Ia/n) of a first beam splitting current value. The second split current sampling signal node is respectively connected with a source electrode of the sixth PMOS tube Qb and a negative input end of the second amplifier Ab, a positive input end (+) of the second amplifier Ab is connected with a drain electrode of the fourth NMOS tube QPb1, an output end of the second amplifier Ab is connected with a grid electrode of the sixth PMOS tube Qb, and the drain electrode of the sixth PMOS tube Qb is filled with 1/n sampling (i.e. Ib/n) of a second split current value. The drain electrode of the third PMOS tube Qa is respectively connected with the positive input end of the first transconductance amplifier TCAa and one end of the first resistor Rai, the other end of the first resistor Rai is connected with the negative input end of the third amplifier As, the first transconductance amplifier TCAa is provided with a first offset ea, the negative input end of the first transconductance amplifier TCAa is connected with the reference voltage end Vref through the first offset ea, the output end of the first transconductance amplifier TCAa is connected with the reference voltage end Vref through the third resistor Rcor, and the positive input end of the third amplifier As is connected with the reference voltage end Vref. The drain electrode of the sixth PMOS transistor Qb is connected to the positive input end of the second transconductance amplifier TCAb and one end of the second resistor Rbi, the other end of the second resistor Rbi is connected to the negative input end of the third amplifier As, the second transconductance amplifier TCAb has a second offset eb, the negative input end of the second transconductance amplifier TCAb is connected to the reference voltage terminal Vref through the second offset eb, the output end of the second transconductance amplifier TCAb is connected to the reference voltage terminal Vref through the third resistor Rcor, and the positive input end of the third amplifier As is connected to the reference voltage terminal Vref. The negative input end of the third amplifier As is connected with a first output voltage end visual through a fourth resistor Rsum, and the first output voltage end visual is connected with the output end of the third amplifier As. The output end of the third amplifier As is connected with the positive input end of the third transconductance amplifier TCAs, the third transconductance amplifier TCAs is provided with a third offset es, the negative input end of the third transconductance amplifier TCAs is connected with the reference voltage end Vref through the third offset es, the output end of the third transconductance amplifier TCAs is connected with the reference voltage end Vref through a third resistor Rcor, the output end of the third transconductance amplifier TCAs is connected with the positive input end of the fourth amplifier CA, the negative input end of the fourth amplifier CA is connected with the reference voltage end Vref, and the output end of the fourth amplifier CA is connected with the second output voltage end Vcor.
Fig. 1 illustrates the technical solution by taking splitting into 2 bundles as an example. The suffix a and b in the reference numerals of the elements and signals in the figures are used to distinguish between channel a and channel b; s represents the added portion of the current sample signal; c represents the part for load power correction. The 2 MOSFETs in the dashed-line surrounding portion of the figure operate in the same region, and the channel area of QPa1 is n times that of QPa 2. The amplifier Aa controls the current flowing from Qa to make the input voltage uniform, and the current flowing from Qa is 1/n of Ia. This part of the circuit constitutes a 1/n sampling of Ia. The channel b circuit is consistent with channel a, and the sink current of Qb is 1/n of Ib. These 2 currents are converted into voltages Vai and Vbi at resistors Rai and Rbi, respectively; these 2 currents are added by the amplifier As to output a voltage Visum proportional to the total current for use by other circuits. Vai, vbi and visual are fed into transconductance amplifiers with offsets ea, eb and es, respectively, which output current is 0 when the input is less than the bias; when the voltage is larger than the offset, the higher voltage is converted into current output according to a certain gain. All the output currents of the 3 transconductance amplifiers flow into Rcor, and output Vcor is buffered through an amplifier CA; this Vcor is used to require the load to scale down the required power, achieving protection based on the line splitting bearer capability and the total bearer capability.
Only 8A 60V voltage can be delivered under PLS limitation, and if the voltage is decomposed into different wires, only 8A needs to be output per wire. Likewise, type-C/USB defines 4 pairs of power connection lines, each of which is connected to the power transmitting and receiving terminal corresponding to one contact, providing a connection of total current <5A in the range below 20V. If 5A were concentrated on a pair of contacts, the contacts would burn and eventually sinter due to excessive current. The invention can utilize beam splitting inspection and protection to realize beam splitting and total current limiting in a PLS (programmable logic controller) limit and a Type-C/USB (universal serial bus) environment, reliably give and receive higher power, and solve the problems of safety limitation and reliable connection. Splitting: the power supply connection line is divided into a plurality of bundles, and current sharing and current limiting control are respectively carried out. PLS/UL2054: UL2054 safety standard regulations of limited power sources. The standard states that power supplies exceeding 60V and 8A require higher levels of operation and require more costly hardware. Type-C/USB: the interface standard issued by the USB IF is widely used for computers and mobile phones. The standard specifies the use of 4 pairs of 8 wires as power in Type-C connectors and cables.
It is noted that the above description is helpful for a person skilled in the art to understand the present invention, but does not limit the scope of the present invention. Any and all such equivalent substitutions, modifications and/or deletions as may be made without departing from the spirit and scope of the invention.
Claims (7)
1. The circuit for splitting protection of power input and output is characterized by comprising a splitting power connector with a plurality of pairs of contacts, wherein the power input side of one pair of contacts is connected with a first splitting power line, the power input side of the other pair of contacts is connected with a second splitting power line, the first splitting power line is connected with the source electrode of a first NMOS tube, the drain electrode of the first NMOS tube is connected with a total power end, the source electrode of the first NMOS tube is connected with the source electrode of a second NMOS tube, the channel area of the first NMOS tube is n times that of the second NMOS tube, the drain electrode of the second NMOS tube is a first splitting current sampling signal node, the second splitting power line is connected with the source electrode of a fourth NMOS tube, the drain electrode of the fourth NMOS tube is connected with the total power end, the source electrode of the fourth NMOS tube is n times that of the fifth NMOS tube, the drain electrode of the fifth NMOS tube is a second splitting current sampling signal node, and the drain electrode of the fourth NMOS tube, the gate electrode of the fifth NMOS tube and the gate electrode of the fifth NMOS tube are connected with the control circuit.
2. The circuit for beam splitting protection of power input and output according to claim 1, wherein the first beam splitting current sampling signal node is connected to a source electrode of a third PMOS tube and a negative input end of a first amplifier, a positive input end of the first amplifier is connected to a drain electrode of the first NMOS tube, an output end of the first amplifier is connected to a gate electrode of the third PMOS tube, and a drain electrode of the third PMOS tube is filled with 1/n sample of the first beam splitting current value.
3. The circuit for beam splitting protection of power input and output according to claim 1, wherein the second beam splitting current sampling signal node is connected to a source electrode of a sixth PMOS tube and a negative input end of a second amplifier, a positive input end of the second amplifier is connected to a drain electrode of the fourth NMOS tube, an output end of the second amplifier is connected to a gate electrode of the sixth PMOS tube, and the drain electrode of the sixth PMOS tube is filled with 1/n sample of the second beam splitting current value.
4. The circuit for beam splitting protection of power input and output according to claim 2, wherein the drain electrode of the third PMOS tube is connected to the positive input terminal of the first transconductance amplifier and one end of the first resistor, the other end of the first resistor is connected to the negative input terminal of the third amplifier, the first transconductance amplifier has a first offset, the negative input terminal of the first transconductance amplifier is connected to the reference voltage terminal through the first offset, the output terminal of the first transconductance amplifier is connected to the reference voltage terminal through the third resistor, and the positive input terminal of the third amplifier is connected to the reference voltage terminal.
5. The circuit for beam splitting protection of power input and output according to claim 3, wherein the drain electrode of the sixth PMOS tube is connected to the positive input terminal of the second transconductance amplifier and one end of the second resistor, the other end of the second resistor is connected to the negative input terminal of the third amplifier, the second transconductance amplifier has a second offset, the negative input terminal of the second transconductance amplifier is connected to the reference voltage terminal through the second offset, the output terminal of the second transconductance amplifier is connected to the reference voltage terminal through the third resistor, and the positive input terminal of the third amplifier is connected to the reference voltage terminal.
6. The circuit for beam splitting protection of a power input/output of claim 4 or 5, wherein the negative input terminal of the third amplifier is connected to a first output voltage terminal through a fourth resistor, and the first output voltage terminal is connected to the output terminal of the third amplifier.
7. The circuit of claim 6, wherein the output terminal of the third amplifier is connected to the positive input terminal of the third transconductance amplifier, the third transconductance amplifier has a third offset, the negative input terminal of the third transconductance amplifier is connected to the reference voltage terminal through the third offset, the output terminal of the third transconductance amplifier is connected to the reference voltage terminal through a third resistor, the output terminal of the third transconductance amplifier is connected to the positive input terminal of the fourth amplifier, the negative input terminal of the fourth amplifier is connected to the reference voltage terminal, and the output terminal of the fourth amplifier is connected to the second output voltage terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710172963.3A CN108631566B (en) | 2017-03-22 | 2017-03-22 | Circuit for splitting and protecting power input and output |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710172963.3A CN108631566B (en) | 2017-03-22 | 2017-03-22 | Circuit for splitting and protecting power input and output |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108631566A CN108631566A (en) | 2018-10-09 |
| CN108631566B true CN108631566B (en) | 2024-04-16 |
Family
ID=63707012
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710172963.3A Active CN108631566B (en) | 2017-03-22 | 2017-03-22 | Circuit for splitting and protecting power input and output |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108631566B (en) |
Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003284328A (en) * | 2002-03-25 | 2003-10-03 | Fuji Electric Co Ltd | Method for detecting current of dc-dc converter and dc-dc converter using the method |
| CN1682172A (en) * | 2002-07-10 | 2005-10-12 | 爱特梅尔股份有限公司 | Interface for shunt voltage regulator in a contactless smartcard |
| CN2849790Y (en) * | 2004-12-20 | 2006-12-20 | Bcd半导体制造有限公司 | Auxiliary circuit, voltage regulator and circuit apparatus for improving rejection ratio of low frequency power |
| DE202006013862U1 (en) * | 2006-09-11 | 2008-01-17 | Gewiss Deutschland Gmbh | power adapter |
| CN101615049A (en) * | 2008-06-24 | 2009-12-30 | 联发科技股份有限公司 | Reference buffer circuit |
| CN101632215A (en) * | 2007-02-16 | 2010-01-20 | 奥地利西门子公司 | Electronic security for a power supply |
| CN101917811A (en) * | 2010-08-02 | 2010-12-15 | 西安新光明电子科技有限公司 | Anti-noise jamming high-side drive circuit |
| CN201956897U (en) * | 2010-09-19 | 2011-08-31 | 石家庄国耀电子科技有限公司 | Logical link control (LLC) topology circuit output overcurrent constant current protection circuit for switching power supply |
| CN104143818A (en) * | 2014-08-19 | 2014-11-12 | 圣邦微电子（北京）股份有限公司 | Device for preventing current limiting circuit from being adjusted excessively |
| CN104410253A (en) * | 2014-11-28 | 2015-03-11 | 成都措普科技有限公司 | Protective system of energy-saving type blue light LED lamp |
| CN104750160A (en) * | 2013-12-30 | 2015-07-01 | 国民技术股份有限公司 | Output power control circuit of power amplifier |
| CN205377259U (en) * | 2016-02-02 | 2016-07-06 | 山西大同大学 | Novel excess temperature protection circuit |
| CN206602452U (en) * | 2017-03-22 | 2017-10-31 | 圣邦微电子（北京）股份有限公司 | The circuit for being split protection is exported to power input |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103575964B (en) * | 2012-07-19 | 2016-03-23 | 快捷半导体(苏州)有限公司 | A kind of over-current detection circuit of power switch pipe and method |
-
2017
- 2017-03-22 CN CN201710172963.3A patent/CN108631566B/en active Active
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003284328A (en) * | 2002-03-25 | 2003-10-03 | Fuji Electric Co Ltd | Method for detecting current of dc-dc converter and dc-dc converter using the method |
| CN1682172A (en) * | 2002-07-10 | 2005-10-12 | 爱特梅尔股份有限公司 | Interface for shunt voltage regulator in a contactless smartcard |
| CN2849790Y (en) * | 2004-12-20 | 2006-12-20 | Bcd半导体制造有限公司 | Auxiliary circuit, voltage regulator and circuit apparatus for improving rejection ratio of low frequency power |
| DE202006013862U1 (en) * | 2006-09-11 | 2008-01-17 | Gewiss Deutschland Gmbh | power adapter |
| CN101632215A (en) * | 2007-02-16 | 2010-01-20 | 奥地利西门子公司 | Electronic security for a power supply |
| CN101615049A (en) * | 2008-06-24 | 2009-12-30 | 联发科技股份有限公司 | Reference buffer circuit |
| CN101917811A (en) * | 2010-08-02 | 2010-12-15 | 西安新光明电子科技有限公司 | Anti-noise jamming high-side drive circuit |
| CN201956897U (en) * | 2010-09-19 | 2011-08-31 | 石家庄国耀电子科技有限公司 | Logical link control (LLC) topology circuit output overcurrent constant current protection circuit for switching power supply |
| CN104750160A (en) * | 2013-12-30 | 2015-07-01 | 国民技术股份有限公司 | Output power control circuit of power amplifier |
| CN104143818A (en) * | 2014-08-19 | 2014-11-12 | 圣邦微电子（北京）股份有限公司 | Device for preventing current limiting circuit from being adjusted excessively |
| CN104410253A (en) * | 2014-11-28 | 2015-03-11 | 成都措普科技有限公司 | Protective system of energy-saving type blue light LED lamp |
| CN205377259U (en) * | 2016-02-02 | 2016-07-06 | 山西大同大学 | Novel excess temperature protection circuit |
| CN206602452U (en) * | 2017-03-22 | 2017-10-31 | 圣邦微电子（北京）股份有限公司 | The circuit for being split protection is exported to power input |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108631566A (en) | 2018-10-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10153652B2 (en) | Charging system | |
| CN105437981B (en) | A kind of automobile electrion control system | |
| EP1953557B1 (en) | Current detection circuit | |
| CN101924547B (en) | Current sampling device | |
| CN105486912A (en) | High precision rapid over-current detection circuit for low dropout regulator | |
| KR20120021255A (en) | Bidirectional switch and switch circuit using the same | |
| CN108566080A (en) | A kind of started with high voltage and constant current circuit | |
| CN101562323B (en) | Short-circuit protection circuit | |
| EP3553808A3 (en) | Miniature circuit breaker, control method thereof, and control system thereof | |
| EP3576345A1 (en) | Powered device | |
| EP3573209A1 (en) | Control circuit compatible with battery power supply and external power supply | |
| CN108631566B (en) | Circuit for splitting and protecting power input and output | |
| CN206602452U (en) | The circuit for being split protection is exported to power input | |
| CN101153880A (en) | Negative voltage detector | |
| CN102043080B (en) | Current sampling circuit of high-frequency charger | |
| CN102647163B (en) | Variable-gain amplification circuit | |
| CN208461440U (en) | A kind of overcurrent protective switch circuit | |
| CN103346794B (en) | Digital to analog converter | |
| JP2013025696A (en) | Multi-input power supply circuit | |
| US20140320167A1 (en) | Level conversion circuit and level-conversion-function-equipped logic circuit | |
| CN104426124A (en) | Overvoltage protection circuit and lamp with overvoltage protection function | |
| CN209313724U (en) | A kind of voltage conversion circuit and driving device | |
| CN208923811U (en) | Overvoltage crowbar | |
| CN101667728A (en) | Protection circuit for three-wire system current output transmitter | |
| CN110069091A (en) | A kind of high-precision inspection circuit for power MOS source-drain voltage |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |