CN108628726A - CPU state information recording method and device - Google Patents
CPU state information recording method and device Download PDFInfo
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- CN108628726A CN108628726A CN201710174630.4A CN201710174630A CN108628726A CN 108628726 A CN108628726 A CN 108628726A CN 201710174630 A CN201710174630 A CN 201710174630A CN 108628726 A CN108628726 A CN 108628726A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
- G06F9/44521—Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
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Abstract
The present invention proposes that a kind of CPU state recording method and device, this method include：When program goes to preset instructions, storage address is obtained from preset instructions；Wherein, the preset instructions are inserted in the designated position of program, it is used to indicate the status information of CPU in record cuixent program cycle, which is recorded according to storage address independently of in a corresponding storage unit of designated memory space except memory space where program.In order to when program executes, realize the record to CPU state information, the present invention individually marks off a designated memory space from the memory of CPU, the designated memory space is independently of the memory space where program, CPU state information is specially stored with the designated memory space, due to being stored to CPU state information, when breaking down when CPU is run, can according to record before CPU state information analysis failure occur the reason of, convenient for such failure exclusion and avoid.
Description
Technical field
The present invention relates to field of computer technology more particularly to a kind of CPU state information recording method and devices.
Background technology
At present there are many diagnosis schemes of central processing unit (Central Processing Unit, abbreviation CPU), for example,
The operating status in CPU can be detected by house dog, system will be resetted once exception occurs in program pointer.Again
For example, being detected to each section of CPU by writing specific code, system is made by software mode after detection failure
Delay machine.
Existing CPU diagnostic techniques for system safety consideration, when CPU breaks down, directly by system reset or
To avoid system accident occurs for person's delay machine.But it is existing when CPU breaks down directly by system reset or delay machine, will make
The reason of CPU breaks down can not be understood in depth by obtaining operation maintenance personnel, to fundamentally avoid or exclude similar event
Barrier occurs again.
Invention content
The present invention is directed to solve at least some of the technical problems in related technologies.
For this purpose, an object of the present invention is to provide a kind of CPU state information recording method, this method is for realizing right
The record of CPU state information, with solve it is existing when CPU breaks down directly by system reset or delay machine so that O＆M people
Member can not understand the problem of the reason of CPU breaks down in depth.
It is another object of the present invention to propose a kind of CPU state information recording device.
In order to achieve the above objectives, the CPU state information recording method that first aspect present invention embodiment proposes, including：
When program goes to preset instructions, storage address is obtained from the preset instructions；Wherein, the preset instructions
It is inserted in the designated position of described program, is used to indicate the status information of CPU in record cuixent program cycle；
The status information is recorded according to the storage address in the corresponding storage unit of designated memory space；Its
In, except the designated memory space is independently of the memory space where described program.
It is described when program goes to preset instructions as a kind of optionally realization method of first aspect present invention embodiment
When, before obtaining storage address in the preset instructions, further include：
Obtain the scatter-loading file write in advance；Wherein, the scatter-loading file includes the distribution of the CPU memories
Information, wherein the distribution information includes at least the initial address and size of the designated memory space；
The designated memory space is determined from the memory according to the scatter-loading file.
It is described according to the scatter-loading file as a kind of optionally realization method of first aspect present invention embodiment
The designated memory space is determined from the memory, including：
Generation image file is compiled to the scatter-loading file by compiler；
The designated memory space is determined from the memory according to the image file.
As first aspect present invention embodiment a kind of, optionally realization method, the method further include：
Setting the attribute of the designated memory space to can not initializing variable.
As first aspect present invention embodiment a kind of, optionally realization method, the method further include：
Record the CPU in N number of program loop forward using cuixent program cycle as starting point in the designated memory space
Status information.
As first aspect present invention embodiment a kind of, optionally realization method, the method further include：
The value of the N is determined according to the size of the designated memory space.
As first aspect present invention embodiment a kind of, optionally realization method, the method further include：The distribution
Information further includes the initial position and size of the initial address and size of ROM, the initial address of RAM and size and storehouse.
As first aspect present invention embodiment a kind of, optionally realization method, the method further include：According to described
Image file determines the ROM, the RAM and the storehouse from the memory.
As first aspect present invention embodiment a kind of, optionally realization method, the method further include：The distribution
Further include in information：The RAM include described program loading zone and execute area, the loading zone initial address and size with
And the initial address and size for executing area.
It is described when program goes to preset instructions as a kind of optionally realization method of first aspect present invention embodiment
When, storage address is obtained from the preset instructions, including：
Receive the instruction for executing described program；
According to the initial address of the loading zone execution area is loaded into from the described program in the loading zone；
Since the initial address for executing area described program is executed in the execution area；
When going to the preset instructions being inserted into described program, the storage is obtained from the preset instructions
Location.
The CPU state information recording method that first aspect present invention embodiment proposes, by individually being drawn from the memory of CPU
A designated memory space is separated, the designated memory space is independently of the memory space where program, with the designated memory space
Special storage CPU state information, due to being stored to CPU state information, when breaking down when CPU is run, Ke Yigen
According to record before CPU state information analysis failure occur the reason of, convenient for such failure exclusion and avoid.
In order to achieve the above objectives, the CPU state information recording device that second aspect of the present invention embodiment proposes, including：
First acquisition module, for when program goes to preset instructions, storage address to be obtained from the preset instructions；
Wherein, the preset instructions are inserted in the designated position of described program, are used to indicate the state of CPU in record cuixent program cycle
Information；
Logging modle is deposited accordingly for designated memory space to be recorded according to the storage address in the status information
In storage unit；Wherein, except the designated memory space is independently of the memory space where described program.
As second aspect of the present invention embodiment a kind of, optionally realization method, described device further include：
Second acquisition module, for, when program goes to preset instructions, being preset from described in first acquisition module
Before obtaining storage address in instruction, the scatter-loading file write in advance is obtained；Wherein, the scatter-loading file includes institute
State the distribution information of CPU memories, wherein the distribution information includes at least the initial address of the designated memory space and big
It is small；
Determining module, for determining the designated memory space from the memory according to the scatter-loading file.
As a kind of optionally realization method of second aspect of the present invention embodiment, the determining module is specifically used for logical
It crosses compiler and generation image file is compiled to the scatter-loading file, it is true from the memory according to the image file
The fixed designated memory space.
As second aspect of the present invention embodiment a kind of, optionally realization method, described device further include：
Presetting module, for set the attribute of the designated memory space to can not initializing variable.
As a kind of optionally realization method of second aspect of the present invention embodiment, the logging modle is specifically used for
Record the status information of the CPU in N number of program loop in the designated memory space forward using cuixent program cycle as starting point.
As second aspect of the present invention embodiment a kind of, optionally realization method, the logging modle are additionally operable to basis
The size of the designated memory space determines the value of the N.
As a kind of optionally realization method of second aspect of the present invention embodiment, the distribution information further includes ROM's
The initial position and size of initial address and size, the initial address of RAM and size and storehouse.
As second aspect of the present invention embodiment a kind of, optionally realization method, the determining module are additionally operable to basis
The image file determines the ROM, the RAM and the storehouse from the memory.
As a kind of optionally realization method of second aspect of the present invention embodiment, further include in the distribution information：Institute
State the loading zone and execute area, the initial address of the loading zone and size and the execution area that RAM includes described program
Initial address and size.
As a kind of optionally realization method of second aspect of the present invention embodiment, first acquisition module, including：
Receiving unit, for receiving the instruction for executing described program；
Loading unit, for being loaded into institute from the described program in the loading zone according to the initial address of the loading zone
It states and executes area；
Execution unit, for executing described program in the execution area since the initial address for executing area；
Acquiring unit, for when going to the preset instructions being inserted into described program, being obtained from the preset instructions
Take the storage address.
The CPU state information recording device that second aspect of the present invention embodiment proposes, by individually being drawn from the memory of CPU
A designated memory space is separated, the designated memory space is independently of the memory space where program, with the designated memory space
Special storage CPU state information, due to being stored to CPU state information, when breaking down when CPU is run, Ke Yigen
According to record before CPU state information analysis failure occur the reason of, convenient for such failure exclusion and avoid.
The additional aspect of the present invention and advantage will be set forth in part in the description, and will partly become from the following description
Obviously, or practice through the invention is recognized.
Description of the drawings
Above-mentioned and/or additional aspect and advantage of the invention will become from the following description of the accompanying drawings of embodiments
Obviously and it is readily appreciated that, wherein：
Fig. 1 is a kind of flow diagram of CPU state information recording method provided in an embodiment of the present invention；
Fig. 2 is the flow diagram of another CPU state information recording method provided in an embodiment of the present invention；
Fig. 3 is the structural schematic diagram of image file of the embodiment of the present invention；
Fig. 4 is a kind of structural schematic diagram of CPU state information recording device provided in an embodiment of the present invention；
Fig. 5 is the structural schematic diagram of another CPU state information recording device provided in an embodiment of the present invention；
Fig. 6 is a kind of structural schematic diagram of first acquisition module 11 provided in an embodiment of the present invention.
Specific implementation mode
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end
Same or similar label indicates same or similar module or module with the same or similar functions.Below with reference to attached
The embodiment of figure description is exemplary, and is only used for explaining the present invention, and is not considered as limiting the invention.On the contrary, this
The embodiment of invention includes all changes fallen within the scope of the spiritual and intension of attached claims, modification and is equal
Object.
Below with reference to the accompanying drawings the CPU state information recording method and device of the embodiment of the present invention is described.
Fig. 1 is the flow diagram for the CPU state information recording method that the embodiment of the present invention proposes.As shown in Figure 1, should
CPU state information recording method includes the following steps：
S101, when program goes to preset instructions, obtain storage address from the preset instructions.
Wherein, the preset instructions are inserted in the designated position of program, are used to indicate CPU in record cuixent program cycle
Status information.
S102, the status information is recorded according to storage address in the corresponding storage unit of designated memory space.
In order to solve it is existing when CPU breaks down directly by system reset or delay machine, will so that operation maintenance personnel can not
The problem of understanding the reason of CPU breaks down in depth.In the present embodiment, distributed from the memory of CPU in advance one independently of
Memory space except memory space where program, referred to herein as designated memory space, the designated memory space is for being stored in
CPU state information in program loop.
Further, a preset instructions are inserted into the designated position of program, it is current which is used to indicate record
The status information of CPU in program loop.When program goes to preset instructions, it may be determined that it needs to record the status information of CPU,
Storage address is obtained from preset instructions.After getting storage address, so that it may to be believed the state of CPU according to the storage address
Breath, is recorded in the corresponding storage unit of designated memory space, you can be navigated to from designated memory space according to storage address
Then the status information of CPU is written in corresponding storage unit by corresponding storage unit.
For example, since assembler language can access the corresponding storage unit of memory address, it can be in program major cycle
Designated position be inserted into a paragraph assembly code, the status information of CPU in cuixent program cycle is recorded by the assembly code
Designated memory space.Wherein, include in the assembly code CPU status information write-in storage unit storage address.
After program goes to the assembly code, so that it may to read storage address from the assembly code, then directly access specified
The corresponding storage unit of memory space, the status information of CPU is written in storage unit.
CPU state information recording method provided in this embodiment, when program goes to preset instructions, from preset instructions
Obtain storage address；Wherein, the preset instructions are inserted in the designated position of program, are used to indicate in record cuixent program cycle
The status information is recorded according to storage address independently of one except memory space where program the status information of CPU
In the corresponding storage unit of designated memory space.In order to when program executes, realize the record to CPU state information, this
Embodiment individually marks off a designated memory space from the memory of CPU, and the designated memory space is independently of where program
Memory space specially stores CPU state information with the designated memory space, due to being stored to CPU state information, when
When CPU breaks down when running, the reason of being occurred according to the CPU state information analysis failure recorded before, convenient for this
It the exclusion of class failure and avoids.
Fig. 2 is the flow diagram for the CPU state information recording method that the embodiment of the present invention proposes.As shown in Fig. 2, should
CPU state information recording method includes the following steps：
The scatter-loading file that S201, acquisition are edited in advance.
Dispersion load (scatter) file is a text file, and scatter-loading file is like for program execution
One map is the same.When after writing and compile of program of completion, it is necessary to will be run in burning program to entity CPU.
During burning, the storage of program and data is just instructed by scatter-loading file.Scatter-loading file it can be used for describe
Connector generates the information needed when image file.Reduced instruction set computer is specified by writing a scatter-loading file
The connector of (Reduced Instruction Set Computing, referred to as) microprocessor (ARM) is when generating image file
How code, the read-only data of distribution program, readable writeable data, the storage address of the Various types of data such as no initializtion data.
In order to distribute a designated memory space from memory, CPU state information for storage, the present embodiment
In, can scatter-loading file be modified or be write in advance, to realize the distribution to designated memory space.Specifically,
Include the distribution information of CPU memories in scatter-loading file, includes the starting point of designated memory space in the distribution information
Location and size.
S202, designated memory space is determined from memory according to scatter-loading file.
Specifically, after getting the scatter-loading file write, scatter-loading file is compiled by compiler
It translates, generates an image file.Fig. 3 is the structural schematic diagram of image file.Specifically, an image file includes multiple domains
(region), a domain includes multiple deferent segments (output section), each deferent segment (output section) and packet
Section containing multiple input (input section) stores program segment in input section, i.e., specific code and data etc..Input section
In memory block attribute could be provided as read-only (Read Only, abbreviation RO) it is readable writeable (Read/Write, abbreviation RW),
Uninitialized variable (Zero Initialized, abbreviation ZI), can not initialize (No init).
The code of usual program, the attribute of permanent data, the data such as read-only variable can be configured to read-only.Attribute is identical
Data can be held together, priority orders RO>RW>ZI/NOINIT, program can first store attribute in burning
For the data of RO, the data of RW are then stored, finally store the data of data or NOINIT that attribute is ZI.
Further, due to include in the distribution information in scatter-loading file designated memory space initial address
And size completes the division to memory, determines to specify to the image file that can be generated according to scatter-loading file
Memory space.Further, can also set the attribute of designated memory space to can not initializing variable.In the present embodiment,
Setting its attribute to can not initializing variable so that is stored in the data of the designated memory space when system is reset, no
It can be initialized so that and be destroyed.
Further, further include in the distribution information in scatter-loading file ROM initial address and size, RAM rise
The initial position and size of beginning address and size and storehouse.It is possible to further the mirror image generated according to scatter-loading file
File determines ROM, RAM and storehouse from memory.
In the present embodiment, further include in the distribution information in scatter-loading file：Loading zones and execution area of the RAM by program
Composition, the initial address of the loading zone and size and the initial address and size in the execution area.
In the present embodiment, loader and the initial address for executing area may be the same or different, loading zone when different
Redundancy scheme is formed with area is executed, when starting execution program, the instruction for executing program is received first, then according to loading zone
Program in loading zone is loaded by initial address executes area, then executes journey in execution area since the initial address for executing area
Sequence.After distinguishing the loader of program and execution, processing of the area to code is being executed, is not interfering with and stored in load
Source code.
For example, in the scatter-loading file of stm32f207, described below：
The initial address that loading zone is defined in the description of epimere code is 0x08000000, and loading zone size is 0x80000,
Attribute is read-only RO.The initial address that object code startup_stm32f2xx executes area is 0x08000000, executes area's size
For 0x8000, attribute is read-only RO.The initial address of the initial address of loading zone and execution area is overlapped in such case, not
It needs the Code copying of loading zone to execution area, but directly executes, then by readable writeable RW and uninitialized variable ZI
Data be placed on initial address be 0x20000000, size be 0x18000 storage regions in.
For another example in the scatter-loading file of stm32f207, described below：
The initial address that loading zone is defined in the description of epimere code is 0x06000000, and loading zone size is 0x80000,
Attribute is read-only RO.The initial address that object code startup_stm32f2xx executes area is 0x08000000, executes area's size
For 0x8000, attribute is read-only RO.The initial address of the initial address of loading zone and execution area is overlapped in such case, not
It needs the Code copying of loading zone to execution area, but directly executes, then by readable writeable RW and uninitialized variable ZI
Data be placed on initial address be 0x20000000, size be 0x18000 storage regions in.
S203, the instruction for executing program is received.
When needing to execute program, one instruction for being used to indicate execution program can be sent by host computer by user,
After receiving the instruction, startup program simultaneously executes.
S204, execution area is loaded into from the program in loading zone according to the initial address of loading zone.
When further including in the distribution information in scatter-loading file：RAM by program loading zone and execute district's groups at, should plus
When the initial address and size and the initial address and size in the execution area in load area, illustrate that RAM is divided into loading zone and execution
Area.When executing program, the initial address according to loading zone is needed, the program in loading zone is loaded into and executes area, i.e., will be added
The program copy stored in area is carried to go to execute to area is executed.
S205, since the initial address for executing area program is executed in execution area.
After the program of loading zone, which is loaded into, executes area, so that it may according to the initial address for executing area, to start executing
Program is executed in area.It is standby due to executing the program that area executes since RAM is divided into loading zone and executes area in the present embodiment
Part program, so the implementation procedure of program will not have any impact to the original program of loading zone.
S206, when going to the preset instructions being inserted into program, from preset instructions obtain storage address.
Wherein, the preset instructions are inserted in the designated position of described program, are used to indicate in record cuixent program cycle
The status information of CPU.
It can be found in the record of related content in above-described embodiment about the specific introduction of S206, details are not described herein again.
S207, the status information is recorded according to storage address in the corresponding storage unit of designated memory space.
When program goes to preset instructions, it may be determined that need to record the status information of CPU, be obtained from preset instructions
Storage address.After getting storage address, so that it may specified deposit, by the status information of CPU, to be recorded according to the storage address
It stores up in the corresponding storage unit in space, you can to navigate to corresponding storage unit from designated memory space according to storage address,
Then the status information of CPU is written in corresponding storage unit.
In the present embodiment, recorded forward in N number of program loop from cuixent program cycle for starting point in designated memory space
The status information of CPU.It is possible to further determine the value of N according to the size of designated memory space.That is each N
A program loop once covers the data of designated memory space, can be with the status information of the follow-up CPU of cycle index.
The CPU state information recording method provided in the present embodiment, since a finger has been provided separately for CPU state information
Determine memory space, can make when CPU breaks down, even if occurring resetting or delay machine, the independent designated memory space
The status information of CPU before being recorded is not that can lose.
Particularly with the Safety-Critical System high to security requirement such as light rail systems, space flight and aviation system, each time
Safety-Critical System breaks down, and reason may be intricate.The present embodiment can be that Safety-Critical System is carried in CPU levels
For monitoring, therefore the status information that can be stored in CPU program loops several times recently breaks down it in Safety-Critical System
It afterwards, can be by the status information of CPU reads out and analyzed to obtain failure cause several times recently.
For example, if stm32 in the process of running, timing error then can make CPU enter bus error exception pattern.
By checking that the information such as CPU link registers counter can push away the reason of CPU exceptions.The information grasped can be even utilized, it is multiple
Environment when existing CPU exceptions, is tested, and analyzing failure for researcher provides a great convenience.
Fig. 4 is a kind of structural schematic diagram of CPU state information recording device provided in an embodiment of the present invention.As shown in figure 4,
The CPU state information recording device includes：First acquisition module 11 and logging modle 12.
First acquisition module 11, for when program goes to preset instructions, storage to be obtained from the preset instructions
Location；Wherein, the preset instructions are inserted in the designated position of described program, are used to indicate CPU in record cuixent program cycle
Status information.
Logging modle 12, it is corresponding for designated memory space to be recorded according to the storage address in the status information
In storage unit；Wherein, except the designated memory space is independently of the memory space where described program.
In order to solve it is existing when CPU breaks down directly by system reset or delay machine, will so that operation maintenance personnel can not
The problem of understanding the reason of CPU breaks down in depth.In the present embodiment, distributed from the memory of CPU in advance one independently of
Memory space except memory space where program, referred to herein as designated memory space, the designated memory space is for being stored in
CPU state information in program loop.
Further, a preset instructions are inserted into the designated position of program, it is current which is used to indicate record
The status information of CPU in program loop.First acquisition module 11 is when program goes to preset instructions, it may be determined that needs to record
The status information of CPU, obtains storage address from preset instructions.After getting storage address, logging modle 12 can root
According to the storage address by the status information of CPU, it is recorded in the corresponding storage unit of designated memory space, you can with according to storage
Address navigates to corresponding storage unit from designated memory space, and it is single that the status information of CPU is then written to corresponding storage
In member.
For example, since assembler language can access the corresponding storage unit of memory address, it can be in program major cycle
Designated position be inserted into a paragraph assembly code, the status information of CPU in cuixent program cycle is recorded by the assembly code
Designated memory space.Wherein, include in the assembly code CPU status information write-in storage unit storage address.
After program goes to the assembly code, so that it may to read storage address from the assembly code, then directly access specified
The corresponding storage unit of memory space, the status information of CPU is written in storage unit.
CPU state information recording device provided in this embodiment, when program goes to preset instructions, from preset instructions
Obtain storage address；Wherein, the preset instructions are inserted in the designated position of program, are used to indicate in record cuixent program cycle
The status information is recorded according to storage address independently of one except memory space where program the status information of CPU
In the corresponding storage unit of designated memory space.In order to when program executes, realize the record to CPU state information, this
Embodiment individually marks off a designated memory space from the memory of CPU, and the designated memory space is independently of where program
Memory space specially stores CPU state information with the designated memory space, due to being stored to CPU state information, when
When CPU breaks down when running, the reason of being occurred according to the CPU state information analysis failure recorded before, convenient for this
It the exclusion of class failure and avoids.
Fig. 5 is a kind of structural schematic diagram of CPU state information recording device provided in an embodiment of the present invention.In above-mentioned implementation
On the basis of example, as shown in figure 5, the CPU state information recording device further includes：Second acquisition module 13, determining module 14
With presetting module 15.
Second acquisition module 13, in first acquisition module 11 when program goes to preset instructions, from described
Before obtaining storage address in preset instructions, the scatter-loading file write in advance is obtained；Wherein, the scatter-loading file packet
Include the distribution information of the CPU memories, wherein it is described distribution information include at least the designated memory space initial address and
Size；
Determining module 14, for determining the designated memory space from the memory according to the scatter-loading file.
Further, it is determined that module 14, generation is compiled specifically for passing through compiler to the scatter-loading file
Image file determines the designated memory space according to the image file from the memory.
Presetting module 15, for set the attribute of the designated memory space to can not initializing variable.
Further, logging modle 12 are specifically used in the designated memory space using cuixent program cycle as starting point
The status information of the CPU in N number of program loop is recorded forward.
Further, logging modle 12 are additionally operable to determine the value of the N according to the size of the designated memory space.
Further, distribution information further includes initial address and size, the initial address of RAM and size and the heap of ROM
The initial position of stack and size.
Further, it is determined that module 14, is additionally operable to determine the ROM, institute from the memory according to the image file
State RAM and the storehouse.
Further, it distributes in information and further includes：The RAM include described program loading zone and execute area, it is described plus
The initial address and size and the initial address and size for executing area in load area.
Fig. 6 is a kind of structural schematic diagram of first acquisition module 11 provided in an embodiment of the present invention.As shown in fig. 6, this
One acquisition module 11 includes：Receiving unit 111, loading unit 112, execution unit 113 and acquiring unit 114.
Receiving unit 111, for receiving the instruction for executing described program.
Loading unit 112, for being loaded from the described program in the loading zone according to the initial address of the loading zone
To the execution area.
Execution unit 113, for executing described program in the execution area since the initial address for executing area.
Acquiring unit 114, for when going to the preset instructions being inserted into described program, from the preset instructions
Obtain the storage address.
In the present embodiment, since a designated memory space has been provided separately for CPU state information, it can make in CPU
When failure, even if occurring resetting or delay machine, the independent designated memory space recorded before CPU state letter
Breath, is not that can lose.
Particularly with the Safety-Critical System high to security requirement such as light rail systems, space flight and aviation system, each time
Safety-Critical System breaks down, and reason may be intricate.The present embodiment can be that Safety-Critical System is carried in CPU levels
For monitoring, therefore the status information that can be stored in CPU program loops several times recently breaks down it in Safety-Critical System
It afterwards, can be by the status information of CPU reads out and analyzed to obtain failure cause several times recently.
It should be noted that in the description of the present invention, term " first ", " second " etc. are used for description purposes only, without
It can be interpreted as indicating or implying relative importance.In addition, in the description of the present invention, unless otherwise indicated, the meaning of " multiple "
It is two or more.
Any process described otherwise above or method description are construed as in flow chart or herein, and expression includes
It is one or more for realizing specific logical function or process the step of executable instruction code module, segment or portion
Point, and the range of the preferred embodiment of the present invention includes other realization, wherein can not press shown or discuss suitable
Sequence, include according to involved function by it is basic simultaneously in the way of or in the opposite order, to execute function, this should be of the invention
Embodiment person of ordinary skill in the field understood.
It should be appreciated that each section module or combination thereof of the present invention are realized.In the above-described embodiment, Duo Gebu
Software or firmware that rapid or method can in memory and by suitable instruction execution system be executed with storage is realized.Example
Such as, if realized with hardware, in another embodiment, any one of following technology well known in the art can be used
Or their combination is realized：Discrete logic with the logic gates for realizing logic function to data-signal,
Application-specific integrated circuit with suitable combinational logic gate circuit, programmable gate array (PGA), field programmable gate array
(FPGA) etc..
Those skilled in the art are appreciated that realize all or part of step that above-described embodiment method carries
Suddenly it is that relevant hardware can be instructed to complete by program, the program can be stored in a kind of computer-readable storage medium
In matter, which includes the steps that one or a combination set of embodiment of the method when being executed.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing module, it can also
That each unit physically exists alone, can also two or more units be integrated in a module.Above-mentioned integrated mould
The form that hardware had both may be used in block is realized, can also be realized in the form of software function module.The integrated module is such as
Fruit is realized in the form of software function module and when sold or used as an independent product, can also be stored in a computer
In read/write memory medium.
Storage medium mentioned above can be read-only memory, disk or CD etc..
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example
Point is included at least one embodiment or example of the invention.In the present specification, schematic expression of the above terms are not
Centainly refer to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be any
One or more embodiments or example in can be combined in any suitable manner.
Although the embodiments of the present invention has been shown and described above, it is to be understood that above-described embodiment is example
Property, it is not considered as limiting the invention, those skilled in the art within the scope of the invention can be to above-mentioned
Embodiment is changed, changes, replacing and modification.
Claims (20)
1. a kind of CPU state information recording method, which is characterized in that including：
When program goes to preset instructions, storage address is obtained from the preset instructions；Wherein, the preset instructions are inserted into
In the designated position of described program, it is used to indicate the status information of CPU in record cuixent program cycle；
The status information is recorded according to the storage address in the corresponding storage unit of designated memory space；Wherein, institute
Except designated memory space is stated independently of the memory space where described program.
2. according to the method described in claim 1, it is characterized in that, described when program goes to preset instructions, from described pre-
If before obtaining storage address in instruction, further include：
Obtain the scatter-loading file write in advance；Wherein, the scatter-loading file includes the distribution letter of the CPU memories
Breath, wherein the distribution information includes at least the initial address and size of the designated memory space；
The designated memory space is determined from the memory according to the scatter-loading file.
3. according to the method described in claim 2, it is characterized in that, it is described according to the scatter-loading file from the memory
Determine the designated memory space, including：
Generation image file is compiled to the scatter-loading file by compiler；
The designated memory space is determined from the memory according to the image file.
4. according to claim 1-3 any one of them methods, which is characterized in that further include：
Setting the attribute of the designated memory space to can not initializing variable.
5. according to the method described in claim 1, it is characterized in that, further including：
Record the shape of the CPU in N number of program loop forward using cuixent program cycle as starting point in the designated memory space
State information.
6. according to the method described in claim 5, it is characterized in that, further including：
The value of the N is determined according to the size of the designated memory space.
7. according to the method described in claim 3, it is characterized in that, the distribution information further includes the initial address of ROM and big
The initial position and size of small, RAM initial address and size and storehouse.
8. the method according to the description of claim 7 is characterized in that further including：
The ROM, the RAM and the storehouse are determined from the memory according to the image file.
9. according to the method described in claim 8, it is characterized in that, further including in the distribution information：The RAM includes described
The loading zone of program and execute area, the initial address of the loading zone and size and the initial address for executing area and big
It is small.
10. according to the method described in claim 9, it is characterized in that, described when program goes to preset instructions, from described pre-
If storage address is obtained in instruction, including：
Receive the instruction for executing described program；
According to the initial address of the loading zone execution area is loaded into from the described program in the loading zone；
Since the initial address for executing area described program is executed in the execution area；
When going to the preset instructions being inserted into described program, the storage address is obtained from the preset instructions.
11. a kind of CPU state information recording device, which is characterized in that including：
First acquisition module, for when program goes to preset instructions, storage address to be obtained from the preset instructions；Its
In, the preset instructions are inserted in the designated position of described program, are used to indicate the state letter of CPU in record cuixent program cycle
Breath；
Logging modle stores list accordingly for designated memory space to be recorded according to the storage address in the status information
In member；Wherein, except the designated memory space is independently of the memory space where described program.
12. according to the devices described in claim 11, which is characterized in that further include：
Second acquisition module, in first acquisition module when program goes to preset instructions, from the preset instructions
Before middle acquisition storage address, the scatter-loading file write in advance is obtained；Wherein, the scatter-loading file includes described
The distribution information of CPU memories, wherein the distribution information includes at least the initial address and size of the designated memory space；
Determining module, for determining the designated memory space from the memory according to the scatter-loading file.
13. device according to claim 12, which is characterized in that the determining module is specifically used for passing through compiler pair
The scatter-loading file is compiled generation image file, determines described specify from the memory according to the image file
Memory space.
14. according to claim 11-13 any one of them devices, which is characterized in that further include：
Presetting module, for set the attribute of the designated memory space to can not initializing variable.
15. according to the devices described in claim 11, which is characterized in that the logging modle, specifically for being deposited in described specify
Record the status information of the CPU in N number of program loop in storage space forward using cuixent program cycle as starting point.
16. device according to claim 15, which is characterized in that the logging modle is additionally operable to be deposited according to described specify
The size in storage space determines the value of the N.
17. device according to claim 13, which is characterized in that it is described distribution information further include ROM initial address and
The initial position and size of size, the initial address of RAM and size and storehouse.
18. device according to claim 17, which is characterized in that the determining module is additionally operable to according to mirror image text
Part determines the ROM, the RAM and the storehouse from the memory.
19. device according to claim 18, which is characterized in that further include in the distribution information：The RAM includes institute
It states the loading zone of program and executes area, the initial address of the loading zone and size and the initial address for executing area and big
It is small.
20. device according to claim 19, which is characterized in that first acquisition module, including：
Receiving unit, for receiving the instruction for executing described program；
Loading unit, for being loaded into described hold from the described program in the loading zone according to the initial address of the loading zone
Row area；
Execution unit, for executing described program in the execution area since the initial address for executing area；
The acquiring unit, for when going to the preset instructions being inserted into described program, being obtained from the preset instructions
Take the storage address.
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