CN108628389B

CN108628389B - Clock generation device, clock generation method, and image recording device

Info

Publication number: CN108628389B
Application number: CN201810145582.0A
Authority: CN
Inventors: 滨岸俊光
Original assignee: Screen Holdings Co Ltd
Current assignee: Screen Holdings Co Ltd
Priority date: 2017-03-22
Filing date: 2018-02-12
Publication date: 2021-06-22
Anticipated expiration: 2038-02-12
Also published as: JP6824083B2; CN108628389A; JP2018158459A

Abstract

The invention provides a clock generating device and a clock generating method for outputting dot clock with high precision regardless of deviation of input signal, and an image recording device using the clock generating device and the clock generating method. First, a plurality of regions are set based on a continuous pulse signal output from an encoder. The clock count Sys _ count of the reference clock having a higher frequency than the dot clock is counted for each of the plurality of areas. The number of clocks Dot _ count of Dot clocks required to satisfy the resolution is calculated for each of the plurality of areas. The Dot clock is output for each of the plurality of regions based on the clock number of the reference clock for each of the Dot clocks calculated from the clock number Sys _ count and the clock number Dot _ count.

Description

Clock generation device, clock generation method, and image recording device

Technical Field

The present invention relates to a clock generating apparatus and a clock generating method for outputting a dot clock (dot clock), and an image recording apparatus including the clock generating apparatus and the clock generating method.

Background

Conventionally, there is known an image recording apparatus (computer to plate (CTP) apparatus) which records an image on a surface of a printing plate by irradiating a thin plate-like printing plate with laser light. Such an image recording apparatus includes a cylindrical recording drum that holds a printing plate. The image recording apparatus rotates the recording drum around the axial center thereof. Next, the recording head is moved in a direction parallel to the axial center of the drum, and a light beam is irradiated from a light source such as a semiconductor laser (semiconductor laser) included in the recording head to the surface of the printing plate, whereby an image is recorded on the surface of the printing plate.

Patent document 1 discloses an image recording apparatus that records a high-precision image by synchronizing rotation of a recording drum with irradiation of a light beam from a recording head. The image recording apparatus described in patent document 1 includes an encoder (encoder) connected to a rotation shaft of a recording drum. The encoder is a device that generates a pulse signal based on the rotation angle of the recording drum to detect the rotational position of the recording drum. This image recording apparatus multiplies a pulse signal from an encoder by a Phase Lock Loop (PLL) circuit to generate a dot clock for recording an image and a scanning pulse when a recording head is moved in a direction parallel to the axis of a recording drum. Next, the image recording apparatus moves the recording head based on the generated scanning pulse, and irradiates a light beam from the recording head based on the dot clock, thereby recording an image onto the surface of the printing plate.

[ Prior art documents ]

[ patent document ]

[ patent document 1] Japanese patent laid-open No. 2004-299149

Disclosure of Invention

[ problems to be solved by the invention ]

The PLL circuit used in patent document 1 is an analog (analog) circuit. Therefore, when there is a variation in the input signal of the PLL circuit, that is, the pulse signal generated by the encoder, the phase comparison cannot be performed accurately in the PLL circuit, and the output signal of the PLL circuit also varies. The period of the pulse signal output by the encoder is fixed. However, the duty ratio (duty ratio) of the pulse signal output from the encoder may not be fixed (for example, 50% duty ratio). In this case, the dot clock cannot be output from the PLL circuit to the recording head with high accuracy, and the accuracy of the recorded image may be degraded.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a clock generation device and a clock generation method for outputting a dot clock with high accuracy regardless of a deviation of an input signal, and an image recording apparatus using the clock generation device and the clock generation method.

[ means for solving problems ]

In order to solve the problem, a first embodiment of the present application is a clock generation device that outputs a dot clock based on a resolution of a recorded image, including: an area setting unit that sets a plurality of areas based on the continuous pulse signal output from the encoder; a counting unit configured to count a clock count of a reference clock having a higher frequency than the dot clock for each of the plurality of areas; a clock count calculation unit that calculates the number of clocks of the dot clock required to satisfy the resolution for each of the plurality of regions; and an output unit configured to output the dot clock for each of the plurality of areas based on the number of clocks of the reference clock for each of the dot clocks calculated based on the number of clocks counted by the counting unit and the number of clocks calculated by the number-of-clocks calculating unit.

According to the clock generation device of the first embodiment, the region setting unit of the second embodiment of the present application sets one region from the rising timing of the continuous pulse signal to the next rising timing or from the falling timing of the continuous pulse signal to the next falling timing.

A clock generation device according to a first or second embodiment of the present application further includes a region length calculation unit that calculates a region length of each of the plurality of regions, and the clock count calculation unit calculates the clock count of the dot clock based on a multiplication result of the region length and the resolution.

In the clock generation device according to any one of the first to third embodiments, the counting unit of the fourth embodiment counts the number of clocks for each of the plurality of regions in the order in which the regions are set by the region setting unit, and the clock generation device further includes a storage unit that continuously stores the number of clocks in association with the regions every time the counting unit counts the number of clocks, and the output unit outputs the dot clock to the first two regions of the region in which the number of clocks is counted by the counting unit.

According to the clock generating device of any one of the first to fourth embodiments, the encoder of the fifth embodiment of the present application generates the pulse signal based on the rotation angle of the drum of the recording medium holding the recorded image on the outer peripheral surface.

A sixth embodiment of the present application is a clock generation method of outputting a dot clock based on a resolution of a recorded image, including: a) setting a plurality of regions based on a continuous pulse signal output from an encoder; b) counting the number of clocks of a reference clock having a higher frequency than the dot clock for each of the plurality of areas; c) calculating the number of clocks of the dot clock required to satisfy the resolution for each of the plurality of areas; and d) outputting the dot clock for each of the plurality of areas based on the number of clocks of the reference clock for each of the dot clocks calculated from the number of clocks counted in the step b) and the number of clocks calculated in the step c).

A seventh embodiment of the present application is an image recording apparatus that records an image to a recording medium, including: a scanning unit for scanning the recording medium; an image recording unit that records an image on the recording medium scanned by the scanning unit; an encoder that outputs a continuous pulse signal based on a scanning amount of the recording medium by the scanning unit; an area setting unit that sets a plurality of areas based on the continuous pulse signal output from the encoder; a counting unit that counts, for each of the plurality of areas, the number of clocks of a reference clock having a frequency higher than a dot clock based on a resolution of a recorded image; a clock count calculation unit that calculates the number of clocks of the dot clock required to satisfy the resolution for each of the plurality of regions; and an output unit configured to output the dot clock for each of the plurality of areas based on the number of clocks of the reference clock for each of the dot clocks calculated based on the number of clocks counted by the counting unit and the number of clocks calculated by the number-of-clocks calculating unit.

[ Effect of the invention ]

According to the first to seventh embodiments of the present application, the dot clock is output based on the reference clock. Therefore, even if there is a cycle variation or a duty ratio variation in the continuous pulse signal output from the encoder, the dot clock can be output with high accuracy for each region. By recording an image according to this dot clock, it is possible to record an image with high accuracy as a result.

In particular, according to the fourth embodiment, the process of counting the number of clocks of the reference clock in the area and the process of outputting the dot clock can be executed in parallel.

Drawings

Fig. 1 is a schematic plan view of an image recording apparatus according to an embodiment.

Fig. 2 is a side view of the image recording apparatus.

Fig. 3 is a block diagram showing the configuration of the image recording apparatus.

Fig. 4 is a diagram conceptually showing an internal circuit configuration of the control unit.

Fig. 5 is a timing chart of signals processed by the control section.

Fig. 6 is a flowchart showing a process performed by the synchronous output circuit.

Fig. 7 is a flowchart of the clock generation process of the control section.

Fig. 8 is a flowchart of the clock generation process of the control section.

[ description of symbols ]

1: an image recording device;

9: printing plates;

10: a drum;

10A, 10B: a clamping member;

11: a recording head;

12: a control unit;

20: a drum rotating section;

21. 23, 34, 36: a timing pulley;

22. 35: a timing belt;

24. 37: a motor;

25: an encoder;

30: a head moving section;

31. 32: a guide rail;

33: a ball screw;

40: an input section;

120: a system clock;

121: a counting circuit;

122: a region count circuit;

123: a storage circuit;

123A：RAM；

124: a Dot _ count calculating circuit;

125: a synchronous output circuit;

clk, ENC _ Z, sys.clk: a waveform;

dot _ count, Sys _ count: the number of clocks;

S1-S5, S11-S14, S21-S24: and (5) carrying out the following steps.

Detailed Description

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, an image recording apparatus for recording an image on a printing plate as a recording medium will be described. This image recording apparatus includes the "clock generation apparatus" of the present invention, and executes the "clock generation method" of the present invention.

<1. Structure of image recording apparatus >

Fig. 1 is a schematic plan view of an image recording apparatus 1 according to the present embodiment. Fig. 2 is a side view of the image recording apparatus 1. Fig. 3 is a block diagram showing the configuration of the image recording apparatus 1.

The image recording apparatus 1 is an apparatus (CTP apparatus) that records an image on the printing plate 9 by exposing the recording surface of the printing plate 9 based on input image data. In a commercial color printing process, the image recording apparatus 1 is used to produce printing plates 9 corresponding to monochrome images constituting a color image. Next, the images of the respective printing plates 9 are superimposed (overprinting) on the printing paper, thereby forming a color image on the surface of the printing paper.

The image recording apparatus 1 includes a drum 10, a recording head 11, a control unit 12, a drum rotating unit 20, a head moving unit 30, and an input unit 40.

The input unit 40 is an interface (interface) for inputting image data of an image recorded on the printing plate 9 and necessary data (resolution and the like). The input unit 40 may be an interface for receiving an operation by a user, or may be an interface for connecting to a Network such as a Local Area Network (LAN) or a Wide Area Network (WAN).

The drum 10 is a cylindrical rotating body, and is a scanning unit that holds the printing plate 9 on the outer circumferential surface and scans along the rotational direction (main scanning direction). The printing plate 9 is, for example, a rectangular metal plate, and a photosensitive material is coated in advance on one surface thereof, i.e., a recording surface. The printing plate 9 is set at a predetermined position in the image recording apparatus 1 by an automatic supply device or a user not shown. Next, the printing plate 9 is supplied to the drum 10 by a mechanism not shown. A pair of clamping

members

10A and 10B are provided on the outer peripheral surface of the drum 10. Both end portions of the printing plate 9 supplied to the drum 10 are clamped by a pair of clamping

members

10A, 10B and attached to the outer peripheral surface of the drum 10.

The drum rotating unit 20 rotates the drum 10 around the axial center. The drum rotating portion 20 includes a timing pulley (timing pulley)21, a timing belt (timing belt)22, a timing pulley 23, a motor 24, and an encoder 25. The timing pulley 21 is provided at one end of the axial center of the drum 10. The timing pulley 21 is connected to a motor 24 via a timing belt 22 and a timing pulley 23. Thereby, the drum 10 is driven by the motor 24 to rotate about the axial center thereof.

The encoder 25 is provided at the other end of the axial center of the drum 10. The encoder 25 generates a continuous pulse signal based on the rotation angle of the drum 10. The encoder 25 outputs a Z-phase signal indicating that the drum 10 is at the origin position and a continuous pulse signal synchronized with the rotation of the drum 10. The encoder 25 of the present embodiment periodically outputs an on pulse based on the rotation angle of the drum 10.

The recording head 11 is an image recording unit that irradiates recording light such as laser light to the outer peripheral surface of the drum 10. The recording head 11 can be moved by the head moving unit 30 in a direction (sub-scanning direction) parallel to the axis of the drum 10. When recording an image on the printing plate 9, the recording head 11 is moved by the head moving unit 30 while the drum 10 on which the printing plate 9 is mounted is rotated, and laser light is irradiated from the recording head 11 to the recording surface of the printing plate 9. Thereby, an exposure area corresponding to a monochrome image is formed on the recording surface of the printing plate 9.

The head moving unit 30 moves the recording head 11 in a direction parallel to the axis of the drum 10. The head moving unit 30 includes a pair of

guide rails

31 and 32. The guide rails 31 and 32 are arranged along the outer peripheral surface of the drum 10 in parallel with the axial center of the drum 10. The recording head 11 moves in a direction parallel to the axial center of the drum 10 by moving on the pair of

guide rails

31 and 32.

The head moving unit 30 includes a ball screw (ball screw)33, a timing pulley 34, a timing belt 35, a timing pulley 36, and a motor 37. The ball screw 33 extends in a direction parallel to the axial center of the drum 10, and is disposed between the pair of

guide rails

31 and 32. The ball screw 33 is connected to a motor 37 via a timing pulley 34, a timing belt 35, and a timing pulley 36. The ball screw 33 is rotated by the driving of the motor 37. The recording head 11 is coupled to the ball screw 33, and slides on the pair of

guide rails

31 and 32 by rotation of the ball screw 33.

The control unit 12 includes a control board on which a Programmable integrated circuit (Field-Programmable Gate Array) is mounted, for example. The control unit 12 is electrically connected to each unit of the image recording apparatus 1, and controls the operation of each unit in the image recording apparatus 1. The control unit 12 functions as an "area setting unit", a "counting unit", a "clock number calculating unit", an "output unit", and an "area length calculating unit" in the present invention by programming the FPGA.

The control unit 12 generates a dot clock based on the resolution input from the input unit 40, for example. The dot clock is a pulse signal to locate pixels of a recorded image. The control unit 12 outputs the generated dot clock to the recording head 11. The recording head 11 irradiates the recording surface of the printing plate 9 with laser light at the timing of the dot clock input.

The control unit 12 generates a scanning pulse signal based on the continuous pulse signal output from the encoder 25, and outputs the scanning pulse signal to the motor 37 of the head moving unit 30. The head moving unit 30 moves the recording head 11 in a direction parallel to the axis of the drum 10 based on the scanning pulse signal.

<2 > regarding the circuit configuration of the control unit 12

Fig. 4 is a diagram conceptually showing an internal circuit configuration of the control unit 12. Fig. 5 is a timing chart of signals processed by the control unit 12.

The control unit 12 includes a system clock 120, a counter circuit 121, a region counter circuit 122, a memory circuit 123, a Dot _ count calculation circuit 124, and a synchronization output circuit 125.

The system clock 120 outputs the reference clock as shown by waveform sys.clk of fig. 5. The reference clock has a frequency higher than the frequency of the dot clock based on the inputted resolution (for example, a frequency 5 to 6 times).

The dot clock is generated by the control unit 12 based on the resolution of the recorded image input from the input unit 40. The resolution is in units of "dpi (dots per inch)". The number of dots required for 1 inch (the number of driving pulses of the recording head 11) is determined according to this resolution. The number of dots required in 1 inch is the number of driving pulses of the recording head 11 required in 1 inch, i.e., the number of clocks of the dot clock. For example, in the case where the resolution is 2400dpi, the number of clocks of dot clocks required in 1 inch is 2400. In other words, the number of clocks of the dot clock required in 1mm is 2400/25.4.

The continuous pulse signal shown by the waveform ENC in fig. 5 is input from the encoder 25 to the counter circuit 121. The counter circuit 121 counts the clock count Sys _ count of the reference clock generated by the system clock 120 from the rising timing of the continuous pulse signal to the next rising timing.

The continuous pulse signal is input from the encoder 25 to the area count circuit 122. The area count circuit 122 sets an area from the rising timing of the input continuous pulse signal to the next rising timing as "one area of the drum 10", and counts the number of areas of the area. For example, when the encoder 25 outputs 1000 pulses when the drum 10 rotates one revolution, the area counting circuit 122 sets an area from the area a (0) to the area a (999) on the outer peripheral surface of the drum 10, and counts the number of areas in the area. Hereinafter, a case where the areas a (0) to a (999) are set on the outer peripheral surface of the drum 10 will be described.

The area count circuit 122 counts the time when the Z-phase signal shown by the waveform ENC _ Z in fig. 5 is received from the encoder 25 as the area a (0).

The memory circuit 123 stores the clock number Sys _ count counted by the counter circuit 121 in a Random Access Memory (RAM) 123A, with an area a (N) (N is an integer of 0 to 999) counted by the area counter circuit 122 as an address (address). Thus, the RAM123A sequentially stores the clock count Sys _ count of the reference clock corresponding to each of the areas a (0) to a (999).

The Dot _ count calculation circuit 124 calculates the number of clocks Dot _ count of Dot clocks satisfying the resolution for one area based on the resolution-based Dot clock. Clk is a waveform of a dot clock in fig. 5.

Here, due to the encoder 25 employed by the image recording apparatus 1, the number of pulses output by the encoder 25 is determined when the drum 10 rotates one revolution. That is, the number of areas (1000 in this example) set on the outer peripheral surface of the drum 10 is determined. The outer circumference of the drum 10 can also be calculated from the diameter and the circumference ratio pi of the drum 10. From these values, the circumferential length (region length) of the drum 10 corresponding to one region of the drum 10 can be calculated. For example, where the circumference of the drum 10 is 400 π, the zone length is 400 π/1000.

The Dot _ count calculation circuit 124 calculates the number of clocks Dot _ count of Dot clocks required to satisfy the resolution for one area of the drum 10, based on the calculated area length and resolution. Here, the radius of the drum 10 is denoted by R, the input resolution is denoted by Dp, and the number of output pulses of the encoder 25 when the drum 10 rotates one revolution is denoted by Pc. In this case, the clock count Dot _ count of the Dot clock can be calculated by the following equation.

Dot_count＝(2Rπ/Pc)＊Dp/25.4…(1)

The Dot _ count calculating circuit 124 stores the calculated clock count Dot _ count in a register (register) or the like.

The synchronization output circuit 125 obtains the clock count Sys _ count of the area stored in the storage circuit 123 and the clock count Dot _ count stored in the Dot _ count calculation circuit 124, and calculates the clock count of the reference clock for each Dot clock. Next, as shown by the waveform dot.clk in fig. 5, the clock of the reference clock is counted by the counted number of clocks, and then the dot clock is output to the recording head 11. For example, the clock count Sys _ count of the reference clock counted in one area is 5000, and the clock count Dot _ count of the Dot clock in one area is 1000. In this case, the control unit 12 outputs one dot clock after five clocks have been generated from the reference clock. By repeating this 1000 times, the control unit 12 can output 1000 dot clocks to the recording head 11 in one area. By outputting the dot clock in synchronization with the reference clock in this way, the clock count of the dot clock required for one area of the drum 10 can be generated.

The processing performed by the synchronization output circuit 125 will be described in detail below. Fig. 6 is a flowchart showing a process performed by the synchronization output circuit 125.

The synchronization output circuit 125 substitutes the clock number Sys _ count of the reference clock into the variable X (step S1). Next, the synchronous output circuit 125 substitutes the result of subtracting the clock count Dot _ count from the variable X into the variable X again (step S2). The control unit 12 determines whether the variable X is equal to or greater than the clock count Dot _ count (step S3). When X is equal to or greater than Dot _ count (Yes in step S3), the synchronization output circuit 125 substitutes the result of subtracting the clock count Dot _ count from the variable X into the variable X again. If X.gtoreq.dot _ count is not reached (NO in step S3), the synchronization output circuit 125 outputs one clock of Dot clocks to the head 11 (step S4).

Next, the synchronous output circuit 125 adds the clock count Sys _ count to the variable X, and substitutes the result of subtracting the clock count Dot _ count into the variable X again (step S5). Then, the process of step S3 is executed.

The synchronous output circuit 125 performs the processing from step S2 to step S5 at the clock of the reference clock. For example, as in the case of the example used in the above description, the number of clocks of the reference clock counted in one area is 5000, and the number of clocks Dot _ count of the Dot clock in one area is 1000.

In this case, in the first clock of the reference clocks, X is 5000 ≧ 1000 (YES at step S3). In the second clock, X is 4000-. In the third clock, X is 3000-1000 ≧ 1000 (YES at step S3). In the fourth clock, X ≧ 2000 ≧ 1000 (YES at step S3). In the fifth clock, X is 1000-. That is, in step S4, the dot clock is output in the fifth clock of the reference clock.

The processing of fig. 6 is sequentially executed for each of the areas a (0) to a (999). Thus, the dot clock is output to the recording head 11 at a clock obtained by dividing the reference clock for each region. The result is a clock count that is capable of producing the dot clock required for one area of the drum 10.

Further, the sync output circuit 125 can perform processing of outputting the dot clock only for the region in which the clock count Sys _ count is counted by the counting circuit 121. For example, when the counter circuit 121 processes the area a (2), the sync output circuit 125 does not process the area a (2). In addition, when the counter circuit 121 processes the area a (2), the process of the sync output circuit 125 may be ended earlier than the process of the counter circuit 121 after the sync output circuit 125 performs the process on the area a (1). In this case, the sync output circuit 125 cannot execute the process for the next area a (2) after the process for the area a (1) is completed.

Therefore, in the present embodiment, the synchronization output circuit 125 sequentially executes the processing for the first two areas of the area on which the processing is executed by the counter circuit 121. That is, the sync output circuit 125 does not perform the processing until the count circuit 121 counts the clock number Sys _ count of the area a (2). This enables the processing of the counter circuit 121 and the processing of the synchronization output circuit 125 to be executed in parallel.

<3 > operation of the control unit 12

Fig. 7 and 8 are flowcharts of the clock generation process of the control unit 12. Fig. 7 is a process of counting and storing the clock number Sys _ cont for one area. Fig. 8 is a process of outputting dot clocks in synchronization with a reference clock. The control unit 12 executes the processing of fig. 7 and the processing of fig. 8 in parallel.

In fig. 7, the control unit 12 sets the area a (n) (step S512) after the continuous pulse signal is input from the encoder 25 (step S11). The initial value of N is "0". The control unit 12 sets the time when the Z-phase signal is received to the area a (0). The control unit 12 counts the clock count Sys _ count of the reference clock in the area a (n) (step S12), and stores the clock count Sys _ count in the RAM (step S14). The control unit 12 repeatedly executes the processing of step S12 to step S14 for the area a (0) to the area a (999).

In fig. 8, the control unit 12 determines whether or not the region a (2) is set in step S12 of fig. 7 (step S21). When the area a (2) is not set (no in step S21), the control unit 12 waits until the area a (2) is set. When the area a (2) is set (yes in step S21), for example, when an increase in the pulse corresponding to the area a (2) is detected in the continuous pulse signal output from the encoder 25, the control unit 12 acquires the clock count Sys _ count of the area a (n) from the RAM (step S22). The initial value of N is "0".

The control unit 12 calculates the number of clocks of the reference clock for each Dot clock based on the clock number Sys _ count and the clock number Dot _ count of the Dot clock of one area (step S23). The timing at which the clock count Dot _ count is calculated and stored is not particularly limited. At least before step S23 of fig. 8 is performed for the first time.

The control unit 12 outputs the dot clock to the recording head 11 at the timing of the reference clock in which the calculated number of clocks is counted (step S24). The control unit 12 repeatedly executes the processing of step S22 to step S24 for the area a (0) to the area a (999).

As described above, the dot clock is outputted to the recording head 11 in synchronization with the reference clock, and thus, even if there is a variation in the continuous pulse signal from the encoder, the dot clock can be outputted with high accuracy by region. As a result, the image can be recorded to the printing plate 9 with high accuracy.

<4. modified example >

The main embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments.

In the above embodiment, the image recording apparatus 1 that records an image by exposing the printing plate 9 has been described, but an ink-jet (ink-jet) type image recording apparatus may be used.

In addition, although an FPGA is described as an example of the control unit 12, another integrated circuit may be used.

In the case of a configuration in which the encoder 25 periodically outputs the off pulse based on the rotation angle of the drum 10, the control unit 12 may set a region from the falling timing of the input continuous pulse signal to the next falling timing as "one region of the drum 10".

In the above embodiment, the process of fig. 6 is performed to calculate the number of clocks of the reference clock for each clock of the Dot clock, but the number of clocks of the reference clock for each clock of the Dot clock may be calculated from the ratio of the number Sys _ count of the reference clock of one area to the number Dot _ count of the Dot clock of one area, that is, Dot _ count/Sys _ count.

The detailed structure of the image recording apparatus 1 may be different from those shown in the drawings of the present application. In addition, the respective members shown in the above embodiments and modifications may be appropriately combined within a range in which contradiction does not occur.

Claims

1. A clock generation device that outputs a dot clock based on a resolution of a recorded image, comprising:

an area setting unit that sets a plurality of areas based on the continuous pulse signal output from the encoder;

a counting unit configured to count a clock count of a reference clock having a higher frequency than the dot clock for each of the plurality of areas;

a clock count calculation unit that calculates the number of clocks of the dot clock required to satisfy the resolution for each of the plurality of regions; and

an output unit that outputs the dot clock for each of the plurality of regions based on the number of clocks of the reference clock for each of the dot clocks calculated based on the number of clocks counted by the counting unit and the number of clocks calculated by the number-of-clocks calculating unit; and is

The encoder generates a pulse signal based on a rotational angle of a drum holding a recording medium on an outer circumferential surface thereof,

the area setting unit sets a plurality of areas in a rotation direction of the drum.

2. The clock generation apparatus of claim 1, wherein:

the region setting unit sets one region from a rising timing of the continuous pulse signal to a next rising timing or from a falling timing of the continuous pulse signal to a next falling timing.

3. The clock generation apparatus according to claim 1 or 2, wherein:

further comprising a region length calculating unit for calculating the region length of each of the plurality of regions,

the clock count calculation unit calculates the clock count of the dot clock based on a multiplication result of the area length and the resolution.

4. The clock generation apparatus according to claim 1 or 2, wherein:

the counting unit counts the number of clocks for each of the plurality of regions in the order in which the regions are set by the region setting unit,

further comprising a storage unit that continuously stores the number of clocks in correspondence with the area every time the counting unit counts the number of clocks,

the output unit outputs the dot clock to the first two areas of the area in which the count unit counts the number of clocks.

5. A clock generation method that outputs a dot clock based on a resolution of a recorded image, characterized by comprising:

a) setting a plurality of regions based on a continuous pulse signal output from an encoder;

b) counting the number of clocks of a reference clock having a higher frequency than the dot clock for each of the plurality of areas;

c) calculating the number of clocks of the dot clock required to satisfy the resolution for each of the plurality of areas; and

d) outputting the dot clock for each of the plurality of areas based on the number of clocks of the reference clock for each dot clock calculated from the number of clocks counted in the step b) and the number of clocks calculated in the step c); and is

the step a) sets a plurality of regions in the rotation direction of the drum.

6. An image recording apparatus for recording an image on a recording medium, comprising:

a scanning unit for scanning the recording medium;

an image recording unit that records an image on the recording medium scanned by the scanning unit;

an encoder that outputs a continuous pulse signal based on a scanning amount of the recording medium by the scanning unit;

a counting unit that counts, for each of the plurality of areas, the number of clocks of a reference clock having a frequency higher than a dot clock based on a resolution of a recorded image;