CN108599749A - The two poles of the earth clamp circuit for the protection of half-bridge circuit gate pole and its application - Google Patents
The two poles of the earth clamp circuit for the protection of half-bridge circuit gate pole and its application Download PDFInfo
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- CN108599749A CN108599749A CN201810886065.9A CN201810886065A CN108599749A CN 108599749 A CN108599749 A CN 108599749A CN 201810886065 A CN201810886065 A CN 201810886065A CN 108599749 A CN108599749 A CN 108599749A
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- 239000004065 semiconductor Substances 0.000 claims description 27
- 230000003071 parasitic effect Effects 0.000 claims description 19
- 230000024241 parasitism Effects 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- 230000005611 electricity Effects 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 4
- 230000001052 transient effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- VMXJCRHCUWKQCB-UHFFFAOYSA-N NPNP Chemical group NPNP VMXJCRHCUWKQCB-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0036—Means reducing energy consumption
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The present invention discloses the two poles of the earth clamp circuit for the protection of half-bridge circuit gate pole, and the mode of gate pole clamper is done by the way that 2 switching tubes S2, S3 are arranged on traditional half-bridge circuit, increases the anti-DVDT performances of transistor gates, and protection gate pole is operated within safe range.
Description
Technical field
The present invention relates to a circuit drives field, more particularly to one the two poles of the earth clamp circuits for the protection of half-bridge circuit gate pole
And its application, the anti-dvdt interference performances for being arranged to add to gate pole of the two poles of the earth clamp circuit, mitigate parasitic miller capacitance
Caused parasitic turn-on effect, protection gate pole are operated within safe range.
Background technology
Half-bridge circuit includes the low side drive module and high-side driver mould of driving each bottom transistor and top transistor
Block, each drive module are electric charge capture circuit, charge of the low and middle-end drive module in parasitic miller capacitance load
Driving low side transistor and high-side driver module alternately recharge the parasitism miller capacitance when being driven by high-voltage power supply
Load.
However transistor, such as IGBT and SIC MOSFET, it can generally be suffered a problem that in switch：Parasitic Miller electricity
The Miller effect caused by holding.Influence of the Miller effect in single supply gate-drive is fairly obvious, is visited based on transistor
Coupling between pole and collector will produce a prodigious transient state dv/dt during transistor turns off, and the transient changing meeting
Cause another transistor gate interpolar voltage to change, and is affected.In other words, transistor gate pole electricity when shutdown
Pressure is a certain fixed value, and dv/dt is influenced when being easy to be switched by other pipes.
Fig. 1 is the circuit topology figure of traditional half-bridge circuit：
Wherein S1 is switching tube, and Q1 and Q2 are metal-oxide-semiconductor, and R1 is resistance, and CRSSQ2 is the parasitic miller capacitance of Q2 parasitisms, the
The drain series of the source electrode and the second metal-oxide-semiconductor of one metal-oxide-semiconductor Q1.
When Q1 is open-minded, the voltage drop at the both ends Q1 will produce the dv/dt of variation at this time as low as 0V, and dvdt at this time will pass through
The parasitic miller capacitance CRSSQ2 of Q2 itself parasitisms passes to A points, and solid arrow direction is that dv/dt generates electricity on CRSSQ2 in figure
The direction of stream, due to the presence of resistance R1, A points voltage reaches VEE1 as shown in Figure 2 at this time, when the gate-drive thresholding more than Q2
When threshold value, parasitic turn-on will occur for Q2, and system is caused to break down.
Analogously, when Q1 is turned off, the dv/dt generated at this time will be by the parasitic miller capacitance of Q2 itself parasitisms
CRSSQ2 passes to A points, and dotted arrow direction is that dv/dt generates current direction on CRSSQ2 in figure, due to resistance R1 there are A
Point following Fig. 2 of voltage reaches VEE2, and when VEE2, which is more than that Q2 gate poles are minimum, bears voltage, Q2 will fail, and system is caused to go out
Existing failure.
The method that the prior art solves the Miller effect mainly has：Change gate electrode resistance, transistor gate pole and emitter-base bandgap grading it
Between increase parasitic miller capacitance, driven using negative pressure, also most simple and effective gate pole clamp technology.At present most simply and effectively
Gate pole clamp technology is to be opened by way of making gate pole and emitter-base bandgap grading short circuit to inhibit unexpected caused by parasitic miller capacitance
Logical, specific method is realized by increasing triode between gate pole and emitter-base bandgap grading, when VGE voltages reach some value, door
Triode between pole and emitter-base bandgap grading will trigger work, flow through so parasitic miller capacitance electric current will by transistor circuit without
As for the gate pole for flowing to transistor.However, this gate pole clamp technology remains complexity, and its for circuit design
The effect of clamper is influenced big by transistor circuit, and causes its practical inhibition that can not meet all half-bridge circuits.
Invention content
The two poles of the earth clamp circuit and its application that the purpose of the present invention is to provide one for the protection of half-bridge circuit gate pole, i.e., originally
Invention provides the two poles of the earth clamp circuit for the protection of half-bridge circuit gate pole, which is applied to traditional half-bridge electricity
In road, to inhibit the transistor caused by parasitic Miller capacitance effect to mislead phenomenon, solving transistor transient state dv/dt can
The problem of capable of making thrashing, increases the anti-dvdt interference performances of gate pole, and protection gate pole is operated within safe range, reduces crystal
The switching loss of pipe extends the service life of transistor, and the application of the two poles of the earth clamp circuit can be such that device performance obtains fully
It utilizes, the switching frequency of system can be improved, reduce whole system volume, power density is provided, cost is reduced.
For the goal of the invention more than realizing, the present invention provides the two poles of the earth clamper electricity for the protection of half-bridge circuit gate pole
Road, including first voltage type driving transistor Q1, second voltage formula driving transistor Q2, wherein second voltage formula driving is brilliant
There are a parasitic miller capacitance CRSSQ1, one end of the parasitism miller capacitance CRSSQ2 to be connected to the second voltage in body pipe Q2
The collector of type driving transistor Q2, the other end are connected to the gate pole of the second voltage type driving transistor Q2, form first simultaneously
Conjuncted, the drain electrode of the second voltage type driving transistor Q2 connects with the source series of the first voltage type driving transistor Q1
It connects, the drain electrode of the second voltage type driving transistor Q2 connects low level, the leakage of the first voltage type driving transistor Q1
Pole connects high voltage, including：
First switch pipe S1, second switch pipe S2, third switching tube S3 and first resistor R1,
The wherein described first switch pipe S1 is connected in series with after the first resistor R1 and is connected in parallel with second switch pipe S2, shape
At the second part in parallel, described second part in parallel one end connects negative level VEE, and the other end is connected in series with the described first part in parallel, institute
The one end for stating third switching tube S3 is also connected with the described first part in parallel, other end ground connection.
In some embodiments, the first voltage type driving transistor Q1 and second voltage type driving transistor Q2
Selection include but not limited to IGBT pipe and metal-oxide-semiconductor.
In some embodiments, the selection of the switching tube (S1/S2/S3) includes but not limited to mosfet and three poles
Pipe.
In some embodiments, gate poles of the negative voltage VEE more than the second voltage type driving transistor Q2 is born
Negative pressure is less than 0V.
In some embodiments, when the first voltage type driving transistor Q1 is opened, the second voltage type driving
When transistor Q2 shutdowns, second switch pipe is opened.
In some embodiments, when the first voltage type driving transistor Q1 is opened, the second voltage type driving
When transistor Q2 shutdowns, first switch pipe S1 and second switch pipe S2 is turned off, third switching tube S3 is opened.
In some embodiments, the first voltage type driving transistor Q1, second voltage formula driving transistor Q2 are N ditches
Road depletion type MOS tube.
Description of the drawings
Fig. 1 is the circuit topological structure figure of traditional half-bridge circuit.
Fig. 2 corresponds to the signal voltage change schematic diagram of transistor in the half-bridge circuit of Fig. 1.
Fig. 3 is that the circuit of the two poles of the earth clamp circuit for the protection of half-bridge circuit gate pole of an embodiment according to the present invention is opened up
Flutter structure chart.
Fig. 4 corresponds to the signal voltage change schematic diagram of the transistor in the two poles of the earth clamp circuit of Fig. 3.
Fig. 5 is the oscillogram of traditional half-bridge circuit in no clamper.
Fig. 6 A to Fig. 6 C are the applications of the two poles of the earth clamp circuit according to the present invention for the protection of half-bridge circuit gate pole
Figure.
In figure：First switch pipe S1, second switch pipe S2 and third switching tube S3, first voltage type driving transistor Q1
It is first resistor with second voltage type driving transistor Q2, R1, CRSSQ2 is the parasitic miller capacitance of Q2.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, the every other embodiment that those of ordinary skill in the art are obtained belong to what the present invention protected
Range.
It will be understood by those skilled in the art that the present invention exposure in, term " longitudinal direction ", " transverse direction ", "upper",
The orientation of the instructions such as "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom" "inner", "outside" or position are closed
System is to be based on the orientation or positional relationship shown in the drawings, and is merely for convenience of description of the present invention and simplification of the description, without referring to
Show or imply that signified device or element must have a particular orientation, with specific azimuth configuration and operation, therefore above-mentioned art
Language is not considered as limiting the invention.
It is understood that term " one " is interpreted as " at least one " or " one or more ", i.e., in one embodiment,
The quantity of one element can be one, and in a further embodiment, the quantity of the element can be multiple, and term " one " is no
It can be interpreted as the limitation to quantity.
Specifically, the two poles of the earth clamp circuit for the protection of half-bridge circuit gate pole of the present invention is in existing half-bridge circuit
It increases 2 switching tubes S2, S3 and does gate pole clamper.
Metal-oxide-semiconductor is also known as field-effect tube (FET), is the abbreviation of MOSFET pipes, and effect is that the variation of input voltage is converted
Gain for the variation of output current, FET is equal to its mutual conductance, and the variation and input voltage for being defined as output current change it
Than drawing drain electrode, gate pole and source electrode.
IGBT, insulated gate bipolar transistor are by BJT (double pole triode) and MOS (insulating gate type field effect tube)
The compound full-control type voltage driven type power semiconductor of composition, has the low conducting of the high input impedance and GTR of MOSFET concurrently
Advantage of both pressure drop, IGBT are that NPN rows MOSFET increases a P knot, i.e. NPNP structures in structure, are in principle
The p-type BJT that MOS is pushed, draws gate pole, emitter and collector respectively.
IGBT and MOS is full-controlled device, is voltage-type driving, i.e., is switched on or off device by controlling grid voltage,
It is referred to as voltage-type driving transistor in an embodiment of the present invention.The source electrode of metal-oxide-semiconductor corresponds to the emitter of IGBT pipes, metal-oxide-semiconductor
Source electrode correspond to the collectors of IGBT pipes.
Triode is also known as transistor, is one of semiconductor basic device, has Current amplifier effect, is electronics electricity
The core element on road.Triode is the PN junction that two close proximities are made on a block semiconductor substrate, and two PN junctions are positive block
Semiconductor is divided into three parts, and middle section is base area, and two side portions are emitter region and collecting zone, and arrangement mode has PNP and NPN two
Kind, draw corresponding electrode, respectively base stage, emitter-base bandgap grading and collector from three areas.
Switching tube, the shape of switching transistor is identical as common triode shape, it works in cut-off region and saturation region, phase
When in the cut-out and conducting of circuit.Since it has the function of completing open circuit and connecting, it is widely used in various switching circuits
In.
Circuit topology figure as shown in Figure 3, wherein S1~S3 are switching tube, are respectively defined as first switch pipe S1, the
Two switching tube S2 and third switching tube S3, Q1, Q2 are voltage-type driving transistor, including but not limited to IGBT, Sic
Mosfet, it is first resistor to be respectively defined as first voltage type driving transistor Q1 and second voltage type driving transistor Q2, R1,
CRSSQ2 is the parasitic miller capacitance of Q2.
In the fig. 3 embodiment, selection Q1 and Q2 is that metal-oxide-semiconductor illustrates.It is the first metal-oxide-semiconductor Q1 in this embodiment
With the second metal-oxide-semiconductor Q2, as shown, the drain electrode of the first metal-oxide-semiconductor Q1 connects high voltage, the source electrode and the second metal-oxide-semiconductor of the first metal-oxide-semiconductor Q1
The drain series of Q2 connect, and the source electrode of the second metal-oxide-semiconductor Q2 connects low-voltage.The first voltage type driving transistor Q1, the
Two voltage-type driving transistor Q2 are N-channel depletion type MOS tube.
Parasitic miller capacitance CRSSQ2 is connected in parallel in the second metal-oxide-semiconductor Q2, forms the first part in parallel, specifically,
One end of the parasitism miller capacitance CRSSQ2 is connected to the collector of the second metal-oxide-semiconductor Q2, and the other end is connected to described second
The gate pole of metal-oxide-semiconductor Q2.
It is connected in parallel with second switch pipe S2 after first switch pipe S1 connects with first resistor R1, forms the second part in parallel,
Described second part in parallel one end connects voltage VEE, and the other end is connected in series with the described first part in parallel, and VEE is negative pressure.
In addition, one end of third switching tube S3 is also connected with the described first part in parallel, other end ground connection connects OV.That is,
It connects with the third switching tube S3 after the parasitism miller capacitance CRSSQ2 and the second metal-oxide-semiconductor Q2 parallel connections, the third
One end of switching tube S3 is connected to the gate terminal of the second metal-oxide-semiconductor Q2, the other end ground connection of the third switching tube S3 connects
OV。
At this point, being equivalent to second doublet and the third switching tube S3 is connected to the side of first doublet
Two electric paths are formed, an access connects voltage VEE, a path ground, to form the two poles of the earth clamp circuit to half-bridge electricity
The gate pole on road is protected.
In the additional embodiment of the present invention, the first metal-oxide-semiconductor Q1 can be selected as the first IGBT pipe Q1, and described second
Metal-oxide-semiconductor Q2 can also be selected as the 2nd IGBT pipes Q2, it might even be possible to select the combination of metal-oxide-semiconductor and IGBT pipes.
The two poles of the earth clamp circuit of offer according to the present invention, as shown in figure 4, working as the first voltage type driving transistor Q1
When opening, when the second voltage type driving transistor Q2 is turned off, the voltage at the both ends the first voltage type driving transistor Q1
It is reduced to 0V, will produce the dv/dt of instantaneous variation at this time, dvdt at this time will pass through the parasitic miller capacitance of Q2 itself parasitisms
CRSSQ2 passes to A points, and solid arrow direction is that dv/dt generates sense of current on CRSSQ2 in figure, at this time second switch pipe
S2 is open-minded, and electric current is through S2 to VEE, and after S2 conductings, A point voltages are equal to VEE, and VEE is generated by power supply, is a stable electricity
Pressure ensures gate-drive of the voltage no more than second voltage type driving transistor Q2 at A points by controlling the size of VEE voltages
Threshold value ensures that Q2 will not be opened.
When first voltage type driving transistor Q1 shutdowns are logical, the second voltage type driving transistor Q2 shutdowns
When, the dv/dt that generates at this time will pass to A points by the parasitic miller capacitance CRSSQ2 of Q2 itself parasitisms, dotted arrow side in figure
Current direction is generated on CRSSQ2 to for dv/dt, is turned off first switch pipe S1 and second switch pipe S2 at this time, is opened third
Switching tube S3, electric current flow through S3 to 0V, and A point voltages are equal to 0V, ensure that Q2 gate voltages are in 0V, it is ensured that Q2, which is in, to close
Disconnected state, and the voltage of 0V will not cause Q2 to fail.
What is particularly worth mentioning is that gate poles of the negative voltage VEE more than the second voltage type driving transistor Q2 is held
By negative pressure, it is less than 0V.
As shown in figure 5, CH1 is the gate pole waveform of first voltage type driving transistor Q1 in figure, CH2 is that first voltage type drives
The current waveform of the drain electrode of dynamic transistor Q1, CH2 is the current waveform of the gate pole of first voltage type driving transistor Q1, and CH4 is
The gate pole waveform of second voltage type driving transistor Q2, as seen from the figure, the channels CH4 are all protruded up and down, i.e., corresponding circuits by
Loss.And the two poles of the earth clamp circuit provided by the invention can inhibit waveform situation as shown in Figure 5 well.
It can be applied in a variety of circuits provided by the present invention for the two poles of the earth clamp circuit of half-bridge circuit gate pole protection, such as
Shown in Fig. 6, which can be applied to two level circuits, in T-type level circuit and I type tri-level circuits, and
The stability in use for improving level circuit reduces whole system volume, it is close to provide power to improve the switching frequency of system
Degree, reduces cost.
The present invention is not limited to above-mentioned preferred forms, anyone can show that other are various under the inspiration of the present invention
The product of form, however, make any variation in its shape or structure, it is every that there is skill identical or similar to the present application
Art scheme, is within the scope of the present invention.
Claims (9)
1. for the two poles of the earth clamp circuit of half-bridge circuit gate pole protection, including first voltage type driving transistor Q1, second voltage
Formula driving transistor Q2, wherein have a parasitic miller capacitance CRSSQ1 in the second voltage formula driving transistor Q2, it is described to post
One end of raw miller capacitance CRSSQ2 is connected to the collector of the second voltage type driving transistor Q2, and the other end is connected to described
The gate pole of second voltage type driving transistor Q2 forms the first doublet, the drain electrode of the second voltage type driving transistor Q2
It is connect with the source series of the first voltage type driving transistor Q1, the drain electrode of the second voltage type driving transistor Q2 connects
Low level is connect, the drain electrode of the first voltage type driving transistor Q1 connects high voltage, which is characterized in that including：
First switch pipe S1, second switch pipe S2, third switching tube S3 and first resistor R1,
The wherein described first switch pipe S1 is connected in series with after the first resistor R1 and second switch pipe S2 is connected in parallel, and forms the
Two parts in parallel, described second part in parallel one end connect negative level VEE, and the other end is connected in series with the described first part in parallel, and described the
One end of three switching tube S3 is also connected with the described first part in parallel, other end ground connection.
2. the two poles of the earth clamp circuit according to claim 1 for the protection of half-bridge circuit gate pole, which is characterized in that described the
The selection of one voltage-type driving transistor Q1 and the second voltage type driving transistor Q2 include but not limited to IGBT pipe and
Metal-oxide-semiconductor.
3. the two poles of the earth clamp circuit according to claim 2 for the protection of half-bridge circuit gate pole, which is characterized in that described to open
The selection for closing pipe (S1/S2/S3) includes but not limited to mosfet and triode.
4. the two poles of the earth clamp circuit according to claim 3 for the protection of half-bridge gate pole, which is characterized in that the negative voltage
Gate poles of the VEE more than the second voltage type driving transistor Q2 bears negative pressure and is less than 0V.
5. the two poles of the earth clamp circuit according to claim 4 for the protection of half-bridge gate pole, which is characterized in that described first
When voltage-type driving transistor Q1 is opened, when the second voltage type driving transistor Q2 is turned off, second switch pipe is opened.
6. the two poles of the earth clamp circuit according to claim 4 for the protection of half-bridge gate pole, which is characterized in that described first
When voltage-type driving transistor Q1 is opened, when second voltage type driving transistor Q2 shutdown, shutdown first switch pipe S1 with
And second switch pipe S2, open third switching tube S3.
7. according to any the two poles of the earth clamp circuit for the protection of half-bridge circuit gate pole of claim 2 to 6, feature exists
In the first voltage type driving transistor Q1, second voltage formula driving transistor Q2 are N-channel depletion type MOS tube.
8. according to the application of any the two poles of the earth clamp circuit for the protection of half-bridge circuit gate pole of claim 1 to 6.
9. the application of the two poles of the earth clamp circuit according to claim 7 for the protection of half-bridge circuit gate pole.
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| CN201810886065.9A CN108599749B (en) | 2018-08-06 | 2018-08-06 | Two-pole clamping circuit for half-bridge circuit gate protection and application thereof |
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Cited By (3)
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| WO2020228202A1 (en) * | 2019-05-16 | 2020-11-19 | 东南大学 | Gate electrode driving circuit for reducing reverse recovery current of power component |
| CN112817363A (en) * | 2021-01-06 | 2021-05-18 | 中国华能集团清洁能源技术研究院有限公司 | Series IGBT voltage-sharing control circuit and method |
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| 工匠中国: "如何减轻米勒电容所引起的寄生导通效应", pages 1 - 3, Retrieved from the Internet <URL:http://qrs.crafcn.com/hangye/2018/0803/85732.html> * |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020228202A1 (en) * | 2019-05-16 | 2020-11-19 | 东南大学 | Gate electrode driving circuit for reducing reverse recovery current of power component |
| CN110224696A (en) * | 2019-07-11 | 2019-09-10 | 珠海格力电器股份有限公司 | Drive Protecting Circuit |
| CN112817363A (en) * | 2021-01-06 | 2021-05-18 | 中国华能集团清洁能源技术研究院有限公司 | Series IGBT voltage-sharing control circuit and method |
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| CN108599749B (en) | 2023-09-08 |
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