CN108550609B - Display panel, manufacturing method thereof and display device - Google Patents
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- CN108550609B CN108550609B CN201810457405.6A CN201810457405A CN108550609B CN 108550609 B CN108550609 B CN 108550609B CN 201810457405 A CN201810457405 A CN 201810457405A CN 108550609 B CN108550609 B CN 108550609B
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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Abstract
The invention relates to a display panel, a manufacturing method thereof and a display device. The application provides a display panel, including display area and slotted zone, the display area has multirow pixel, the pixel is formed through the organic light emitting layer of coating by vaporization at the opening part of display area pixel definition layer, the pixel definition layer aperture ratio of slotted zone is zero. The application provides a display panel sets up TFT backplate structure simultaneously to display area and fluting district, and through the mode that makes the pixel definition layer aperture ratio that the fluting district corresponds be zero, the load of the scanning signal line of the pixel line of guaranteeing the fluting district place is the same with the load of the scanning signal line of other pixel lines, has guaranteed the synchronism when data signal line pair pixel write in data to the homogeneity that display panel shows has been guaranteed.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel, a manufacturing method of the display panel and a display device.
Background
With the development of display technology, in order to realize functions of mobile electronic devices, such as self-photographing and video call, a slot is usually formed in the upper portion of the display panel for installing a camera and a peripheral driving circuit. The area of the display panel for realizing image display is a display area, and the slotted area of the display panel is a non-display area. The pixels distributed in an array mode in the display area are connected with a scanning signal line and a data signal line through a switch element, a scanning signal output by the scanning signal line is used for controlling the switch element to be turned on and off, and a data signal output by the data signal line is used for driving the pixels to display a certain gray scale. When the display area is a regular rectangle, the number of pixels in each row is the same, and one row of pixels is driven by one scanning line at the same time.
In carrying out the conventional techniques, the applicant has found that at least the following problems exist: the display panel is slotted, so that the display area is no longer a regular rectangle, the slotted area does not contain pixels and corresponding driving circuits, the number of pixels in each row is different, the load of scanning signal lines for driving the pixels in different rows is no longer the same, and the data signal lines are asynchronous when writing data into the pixels, thereby affecting the uniformity of the display panel.
Disclosure of Invention
In view of the above, it is desirable to provide a display panel, a method of manufacturing the same, and a display device.
The application provides a display panel, including display area and fluting district, the display area has multirow pixel, the pixel is formed through the organic light emitting layer of coating by vaporization at the opening part of display area pixel definition layer, the pixel definition layer aperture ratio of fluting district is zero.
In one embodiment, the slotted region and the display region include:
a substrate base plate;
a polysilicon layer formed on the substrate base plate, the polysilicon layer being used for conducting current;
an intermediate layer formed on the polysilicon layer;
a pixel defining layer formed on the intermediate layer, wherein an opening is formed on the pixel defining layer and is used for evaporating an organic light-emitting layer;
and a supporting layer formed at the opening is not arranged on the pixel defining layer of the slotted area and the pixel defining layer of the display area.
In one embodiment, the slotted zone comprises:
a substrate base plate;
the middle layer is formed in the area corresponding to the groove forming area on the substrate base plate;
a pixel defining layer formed on the intermediate layer;
a support layer formed on the pixel defining layer.
In one embodiment thereof, the intermediate layer comprises:
a gate insulating layer;
a first metal layer formed on the gate insulating layer;
an interlayer insulating layer formed on the first metal layer;
a second metal layer formed on the interlayer insulating layer;
a passivation layer formed on the second metal layer;
a third metal layer formed on the passivation layer
A planarization layer formed on the third metal layer;
an anode layer formed on the planarization layer.
In one embodiment, the slotted region is disposed at any one of a top, side, or bottom of the display panel.
The application provides a manufacturing method of a display panel, wherein the display panel comprises a display area and a slotted area, and the method comprises the following steps:
providing a substrate base plate;
depositing a polycrystalline silicon layer on the substrate base plate, and patterning the polycrystalline silicon layer through photoetching and etching;
forming an intermediate layer on the polysilicon layer;
depositing a pixel defining layer on the middle layer, patterning the pixel defining layer corresponding to the display area through photoetching and etching, and forming an opening on the pixel defining layer corresponding to the display area, wherein the opening is used for evaporating an organic light-emitting layer;
and forming a supporting layer on the pixel definition layer of the slotted area and the pixel definition layer of the display area without arranging an opening.
In one embodiment, the depositing a polysilicon layer on the substrate base plate, and the patterning the polysilicon layer by photolithography and etching includes:
and depositing a polycrystalline silicon layer on the substrate base plate in the area corresponding to the display area, and patterning the polycrystalline silicon layer through photoetching and etching.
The application also provides a display device comprising the display panel.
In one embodiment, the device further comprises an image acquisition mechanism, wherein the image acquisition mechanism is arranged in the slotted zone.
In one embodiment, the display panel further comprises at least one of an earphone, a microphone, a light sensor, a distance sensor and a fingerprint sensor in the slotted area.
According to the display panel, the manufacturing method of the display panel and the display device, the TFT backboard structure is arranged in the display area and the slotting area at the same time, the load of the scanning signal line of the pixel row where the slotting area is located is the same as the load of the scanning signal line of other pixel rows in a mode that the aperture ratio of the pixel definition layer corresponding to the slotting area is zero, the synchronism of the data signal line when the data is written into the pixel is ensured, and the display uniformity of the display panel is ensured.
Drawings
Fig. 1 is a schematic diagram of a pixel distribution of a display panel according to an embodiment of the present application;
fig. 2 is a schematic cross-sectional structure (partial) of a display area of a display panel according to an embodiment of the present application;
fig. 3 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure.
100 slotted zone 101TFT backplate structure
200 display area 201 first display area
202 second display area 203 opening
301 substrate 302 polysilicon layer
303 a gate insulation layer 304 first metal layer
305 interlayer insulating layer 306 second metal layer
307 passivation layer 308 third metal layer
309 planarizing layer 310 anode layer
311 pixel definition layer 312 support layer
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In order to realize the functions of self-timer, video call, etc. of the mobile electronic device, the display panel usually needs to be provided with a slotted area for accommodating the related components and peripheral driving circuits. The slotted area does not contain pixels and corresponding driving circuits, the number of the pixels in each row of the display panel is not the same, and the signal line loads of the pixels in each row are different, so that the display uniformity of the display panel is influenced.
One embodiment of the present application provides a display panel, as shown in fig. 1, including a display area 200 and a grooved area 100, the display area 200 having a plurality of rows of pixels formed by evaporating an organic light emitting layer at an opening 203 of a pixel defining layer 311 of the display area 200, and the pixel defining layer aperture ratio of the grooved area 100 being zero.
Wherein the display area 200 comprises a first display area 201 and a second display area 202. The first display area 201 is a special-shaped display area disposed at both sides of the slotted area 100, and the second display area 202 is a normal display area. No pixels are distributed in the slotted region 100, and the pixels in the first display region 201 and the second display region 202 are regularly arranged in an array. Therefore, the number of pixels in any row in the first display area 201 is smaller than the number of pixels in any row in the second display area 202. Each pixel comprises three sub-pixels, namely an R sub-pixel, a G sub-pixel and a B sub-pixel. Each sub-pixel can display different gray scales under the control of the driving circuit, so that the display panel can display color images.
Specifically, the pixels of the display area 200 are formed by providing openings 203 on the pixel defining layer included in the TFT backplane structure 101 thereof, and evaporating an organic light emitting layer at the openings 203. The TFT backplane structure 101 includes a load of a driving circuit corresponding to a pixel. The difference between the grooved area 100 and the display area 200 is that the grooved area 100 is provided with the TFT backplane structure 101, but the pixel definition layer included in the TFT backplane structure 101 is not provided with the opening 203, that is, the aperture ratio of the pixel definition layer is zero. In addition, the pixel defining layer of the trench area 100 does not evaporate the organic light emitting layer, that is, there is no pixel distribution in the trench area 100. Although the slotted region 100 has no pixel distribution, the slotted region 100 still includes the TFT backplane structure 101, and thus the slotted region 100 includes the load of the driving circuit corresponding to the pixel. Therefore, although the display panel is provided with the slotted regions, the loads of the driving signal lines corresponding to the pixel rows of the first display region 201 are the same as the loads of the driving signal lines corresponding to the pixel rows of the second display region 202.
The display panel provided in the above embodiment has the TFT backplane structure 101 simultaneously disposed in the display area 200 and the trench area 100, and by making the aperture ratio of the pixel definition layer corresponding to the trench area 100 zero, it is ensured that the load of the scanning signal line of the pixel row in which the trench area 100 is located is the same as the load of the scanning signal line of other pixel rows, and the synchronization of the data signal line when writing data to the pixel is ensured, thereby ensuring the uniformity of the display panel.
In one embodiment provided in the present application, as shown in fig. 2, the slotted region 100 and the display region 200 of the display panel include: a base substrate 301; a polysilicon layer 302 formed on the substrate 301 in a region corresponding to the display region 200, the polysilicon layer 302 being used for conducting current; an intermediate layer formed on the polysilicon layer 302; a pixel defining layer 311 formed on the intermediate layer, wherein an opening 203 is formed on the pixel defining layer 311, and the opening 203 is used for evaporating an organic light emitting layer; the support layer 312 formed at the opening is not disposed on the pixel defining layer 311 of the trench region 100 and the pixel defining layer 311 of the display region 200.
Specifically, the base substrate 301 is generally formed by depositing Polyimide (PI) on a glass substrate. To prevent metal ions in the glass, such as: aluminum ions, barium ions, sodium ions, etc. diffuse into the polysilicon layer 302 during processing, and the substrate base plate 301 generally further includes a buffer layer disposed between the polysilicon layer 302 and the polyimide. The buffer layer is made of SiOx, SiNx or their mixture, and the quality of the polycrystalline silicon formed by recrystallization can be improved by changing the thickness of the buffer layer or the deposition condition of the buffer layer. Ions (such as phosphorus ions or boron ions) are respectively implanted into two ends of a polysilicon layer 302 deposited on a substrate base plate 301 to perform doping to form a source region and a drain region of a Thin Film Transistor (TFT), and the polysilicon layer 302 between the source and the drain can form a conductive channel to play a role in conducting current. The intermediate layer fabricated on the polysilicon layer 302 is mainly used to form the complete thin film transistor and storage capacitor. The pixel defining layer 311 formed on the intermediate layer serves to define the positions of the pixels, and separation regions are formed between different pixels. The pixel defining layer 311 is provided with an opening 203, and the organic light emitting layer is evaporated at the opening 203 to form a pixel. In the process of evaporating the organic light emitting layer, the supporting layer 312 formed at the pixel defining layer 311 of the slotted region 100 and the pixel defining layer 311 of the display region 200 without the opening is used for supporting the TFT backplane structure and protecting the integrity of the pixel defining layer 311; and on the other hand, the mask plate is also used for protecting the organic luminescent material.
The display panel provided by the above embodiment realizes the conduction of current in the whole TFT backplane structure through the polysilicon layer 302 formed on the substrate 301 corresponding to the display region 200, thereby realizing the driving of the pixel and enabling the pixel to emit light normally.
In one embodiment provided herein, the slotted region 100 of the display panel includes: a base substrate 301; an intermediate layer formed in a region corresponding to the trench region 100 on the substrate base plate 301; a pixel defining layer 311 formed on the intermediate layer; a support layer 312 formed on the pixel defining layer 311.
Specifically, the base substrate 301 is generally formed by depositing Polyimide (PI) on a glass substrate. To prevent metal ions in the glass, such as: aluminum ions, barium ions, sodium ions, etc. diffuse into the polysilicon layer 302 during processing, and the substrate base plate 301 generally further includes a buffer layer disposed between the polysilicon layer 302 and the polyimide. The buffer layer is made of SiOx, SiNx or their mixture, and the quality of the polycrystalline silicon formed by recrystallization can be improved by changing the thickness of the buffer layer or the deposition condition of the buffer layer. The intermediate layer formed on the substrate base plate 301 in the region corresponding to the trench region 100 is mainly used to form a complete thin film transistor and a storage capacitor. The pixel defining layer 311 formed on the intermediate layer does not have an opening in the trench area 100, and the pixel defining layer 311 in the trench area 100 does not evaporate an organic light emitting layer, that is, there is no pixel distribution in the trench area 100. The support layer 312 formed on the pixel defining layer 311 is used for supporting the TFT backplane structure 101 and protecting the integrity of the pixel defining layer 311 in the process of evaporating the organic light emitting layer; and on the other hand, the mask plate is also used for protecting the organic luminescent material. It can be seen that the difference between the trench area 100 and the display area 200 in the present embodiment is that the polysilicon layer 302 is no longer deposited in the trench area 100, so that no current is conducted in the TFT backplane structure 101 corresponding to the trench area 100, thereby reducing the power consumption of the trench area 100.
The display panel provided by the above embodiment does not deposit the polysilicon layer 302 on the substrate 301 corresponding to the trench area 100, so that the current in the TFT backplane structure corresponding to the trench area 100 cannot be conducted, thereby reducing the power consumption of the trench area 100.
In one embodiment provided by the present application, as shown in fig. 2, the intermediate layer of the display panel includes: a gate insulating layer 303; a first metal layer 304 formed on the gate insulating layer 303; an interlayer insulating layer 305 formed on the first metal layer 304; a second metal layer 306 formed on the interlayer insulating layer 305; a passivation layer 307 formed on the second metal layer 306; a third metal layer 308 formed on the passivation layer 307; a planarization layer 309 formed on the third metal layer 308; an anode layer 310 formed over the planarization layer 309.
Specifically, the gate insulating layer 303 serves to insulate between the first metal layer 304 and the polysilicon layer 302. The gate insulating layer 303, the first metal layer 304, and the gate insulating layer 303 together form a gate-controlled capacitor structure of the thin film transistor. The material of the gate insulating layer 303 may be silicon oxide, silicon nitride, or a mixture of silicon oxide and silicon nitride. The first metal layer 304 formed on the gate insulating layer 303 serves as a gate of the thin film transistor and one plate of the storage capacitor. The interlayer insulating layer 305 formed on the first metal layer 304 serves as an insulating dielectric of the storage capacitor. The second metal layer 306 formed on the interlayer insulating layer 305 serves as the other plate of the storage capacitor, that is, the first metal layer 304, the interlayer insulating layer 305, and the second metal layer 306 together form the storage capacitor. Meanwhile, the interlayer insulating layer 305 is also used to achieve insulation between the first metal layer 304 and the third metal layer 308. A passivation layer 307 formed over the second metal layer 306 is used to define the location of the openings so that the third metal layer 308 can be connected to the source and drain regions over the polysilicon layer 302 through the openings to form the gate and drain. Meanwhile, the passivation layer 307 also serves to achieve insulation between the second metal layer 306 and the third metal layer 308. The planarization layer 309 formed on the third metal layer 308 serves to planarize the layer structure formed on the base substrate 301, facilitating uniform evaporation of the organic light emitting layer. The anode layer 310 formed on the planarization is used to form an organic light emitting device.
The display panel provided by the above embodiment forms a complete thin film transistor and a storage capacitor through the intermediate layer, provides a load for the slotted region 100, ensures that the load of the scanning signal line of the pixel row where the slotted region 100 is located is the same as the load of the scanning signal line of other pixel rows, ensures the synchronism of the data signal line when writing data into the pixel, and thus ensures the display uniformity of the display panel.
In one embodiment provided herein, the slotted region 100 is disposed at any of the top, side, or bottom of the display panel.
An embodiment of the present application provides a method for manufacturing a display panel, as shown in fig. 3, the display panel includes a display area 200 and a trench area 100, and the method includes the following steps:
and S100, providing a substrate base plate.
Among them, the base substrate 301 is generally formed by depositing Polyimide (PI) on a glass substrate. To prevent metal ions in the glass, such as: aluminum ions, barium ions, sodium ions, etc. diffuse into the polysilicon layer 302 during processing, and the substrate base plate 301 generally further includes a buffer layer disposed between the polysilicon layer 302 and the polyimide. In addition, the buffer layer can slow down the cooling rate of silicon heated by laser during excimer laser annealing, the material for recrystallizing amorphous silicon into the polycrystalline silicon buffer layer is generally SiOx, SiNx or a mixture thereof, and the quality of polycrystalline silicon formed by recrystallization can be improved by changing the thickness of the buffer layer or the deposition condition of the buffer layer.
S200, depositing a polycrystalline silicon layer on the substrate base plate, and patterning the polycrystalline silicon layer through photoetching and etching.
Specifically, an amorphous silicon (a-Si) layer is deposited on the substrate 301, and the amorphous silicon layer is converted into a polycrystalline silicon (poly-Si) layer through an Excimer Laser Annealing (ELA) process. After crystallization is completed, the polysilicon layer 302 is subjected to photolithography and etching, and a pattern designed in advance on a reticle is formed on the polysilicon layer 302.
And S300, forming an intermediate layer on the polycrystalline silicon layer.
Wherein the intermediate layer comprises: a gate insulating layer 303; a first metal layer 304 formed on the gate insulating layer 303; an interlayer insulating layer 305 formed on the first metal layer 304; a second metal layer 306 formed on the interlayer insulating layer 305; a passivation layer 307 formed on the second metal layer 306; a third metal layer 308 formed on the passivation layer 307; a planarization layer 309 formed on the third metal layer 308; an anode layer 310 formed over the planarization layer 309.
Specifically, a gate insulating layer 303 is deposited on the polysilicon layer 302. A first metal layer 304 is deposited on the gate insulating layer 303, and a pattern on a mask is formed on the first metal layer 304 by photolithography and etching. An interlayer insulating layer 305 is deposited on the first metal layer 304. A second metal layer 306 is deposited on the interlayer insulating layer 305, and a pattern on a corresponding mask is formed on the second metal layer 306 by photolithography and etching. A passivation layer 307 is deposited on the second metal layer 306, and a corresponding pattern on the mask is formed on the passivation layer 307 by photolithography and etching. A third metal layer 308 is deposited on the passivation layer 307, and a pattern on the mask is formed on the third metal layer 308 by photolithography and etching. A planarization layer 309 is deposited on the third metal layer 308, and a pattern on the corresponding mask is formed on the planarization layer 309 by photolithography and etching. An anode layer 310 is deposited over the planarization layer 309 and a corresponding pattern on the mask is formed over the anode layer 310 by photolithography and etching.
S400, depositing a pixel definition layer on the middle layer, and patterning the pixel definition layer corresponding to the display area through photoetching and etching to form an opening on the pixel definition layer corresponding to the display area.
Specifically, a pixel defining layer 311 is deposited on the intermediate layer, the pixel defining layer 311 corresponding to the display region is subjected to photolithography and etching, and an opening 203 is formed on the pixel defining layer 311 corresponding to the display region for evaporating an organic light emitting layer to form a pixel. The pixel defining layer 311 corresponding to the slotted region 100 is not provided with the opening 203, and is not evaporated with an organic light emitting layer.
And S500, forming a supporting layer on the pixel definition layer of the slotted area and the pixel definition layer of the display area without an opening.
On one hand, the support layer 312 is used for supporting the TFT backplane structure 101 and protecting the integrity of the pixel definition layer 311; and on the other hand, the mask plate is also used for protecting the organic luminescent material. Specifically, the supporting layer 312 is deposited on the pixel defining layer 311 of the trench area 100 and the pixel defining layer 311 of the display area 200 without openings, and corresponding patterns on the mask are formed on the supporting layer 312 by photolithography and etching.
In the manufacturing method of the display panel provided in the above embodiment, the TFT backplane structures are simultaneously disposed in the display area 200 and the trench area 100, and the load of the scanning signal line of the pixel row in which the trench area 100 is located is ensured to be the same as the load of the scanning signal line of other pixel rows by making the aperture ratio of the pixel definition layer corresponding to the trench area 100 zero, so that the synchronization of the data signal line when writing data into the pixel is ensured, thereby ensuring the uniformity backplane displayed by the display panel. Meanwhile, the TFT backplane structure of the display area 200 and the TFT backplane structure of the slotted area 100 are manufactured synchronously, so that the complexity of the process is greatly reduced, which is beneficial to reducing the cost.
In one embodiment provided herein, depositing a polysilicon layer 302 on a substrate base plate 301, patterning the polysilicon layer 302 by photolithography and etching comprises:
a polysilicon layer 302 is deposited on the substrate base plate 301 in the area corresponding to the display area 200, and the polysilicon layer 302 is patterned by photolithography and etching.
Specifically, when the polysilicon layer 302 is formed on the substrate base plate 301, the polysilicon layer 302 is deposited only on the substrate base plate 301 corresponding to the display area 200, and the polysilicon layer 302 is not deposited on the substrate base plate 301 corresponding to the trench opening area 100, so that no current is conducted in the TFT backplane structure 101 corresponding to the trench opening area 100, and the power consumption of the trench opening area 100 is reduced.
In the manufacturing method of the display panel provided by the above embodiment, the polysilicon layer 302 is not deposited on the substrate base plate 301 corresponding to the trench area 100, so that the current in the TFT backplane structure corresponding to the trench area 100 cannot be conducted, thereby reducing the power consumption of the trench area 100.
An embodiment of the present application provides a display device including the display panel as described above.
Specifically, the display device includes, but is not limited to, a mobile phone, a tablet computer, a notebook computer, and a wearable electronic device with a display function. According to the display device, the shared compensation unit is arranged, so that the load of the signal line of the special-shaped display area 200 is compensated, the width of a frame is reduced as much as possible, the screen occupation ratio is improved, and full-screen display is realized.
In one embodiment provided herein, the display device further comprises an image capturing mechanism disposed within the slotted region 100.
In particular, the image acquisition mechanism may be a camera. The camera is disposed in a slotted region 100 of the display panel. The display device can realize the functions of camera shooting, video call and the like through the image acquisition mechanism.
In one embodiment provided herein, the display device further comprises at least one of an earpiece, a microphone, a light sensor, a distance sensor, and a fingerprint recognition sensor within the slotted zone 100.
Specifically, the receiver is used for realizing voice output when a call is made or a voice message is played. The microphone is used for voice input when talking or recording voice messages. The light sensor is used for detecting the light intensity in the environment and adjusting the display parameters of the display panel according to the ambient light. The distance sensor is used for preventing misoperation of the display panel, such as automatically turning off the screen of the display panel during conversation or automatically waking up the display panel in a pocket. The fingerprint identification sensor is used for identifying the identity of the user so as to unlock the display device.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. The display panel is characterized by comprising a display area and a groove opening area, wherein the display area and the groove opening area both comprise a TFT backboard structure, the display area is provided with a plurality of rows of pixels, the pixels are formed by evaporating an organic light-emitting layer at an opening of a pixel defining layer of the display area, the opening ratio of the pixel defining layer of the groove opening area is zero, and a polycrystalline silicon layer is not deposited on a substrate base plate corresponding to the groove opening area.
2. The display panel according to claim 1, wherein the notch region and the display region comprise:
a substrate base plate;
a polycrystalline silicon layer formed on the substrate corresponding to the display region, the polycrystalline silicon layer being used for conducting current;
an intermediate layer formed on the polysilicon layer;
a pixel defining layer formed on the intermediate layer, wherein an opening is formed on the pixel defining layer corresponding to the display area, and the opening is used for evaporating an organic light-emitting layer; and a supporting layer formed at the opening is not arranged on the pixel defining layer of the slotted area and the pixel defining layer of the display area.
3. The display panel of claim 1, wherein the slotted region comprises:
a substrate base plate;
the middle layer is formed in the area corresponding to the groove forming area on the substrate base plate;
a pixel defining layer formed on the intermediate layer;
a support layer formed on the pixel defining layer.
4. A display panel as claimed in claim 2 or 3 characterized in that the intermediate layer comprises:
a gate insulating layer;
a first metal layer formed on the gate insulating layer;
an interlayer insulating layer formed on the first metal layer;
a second metal layer formed on the interlayer insulating layer;
a passivation layer formed on the second metal layer;
a third metal layer formed on the passivation layer;
a planarization layer formed on the third metal layer;
an anode layer formed on the planarization layer.
5. The display panel of claim 1, wherein the slotted region is disposed at any of a top, a side, or a bottom of the display panel.
6. A manufacturing method of a display panel, wherein the display panel comprises a display area and a slotted area, is characterized by comprising the following steps:
providing a substrate base plate;
depositing a polycrystalline silicon layer on the substrate base plate, and patterning the polycrystalline silicon layer through photoetching and etching;
forming an intermediate layer on the polysilicon layer;
depositing a pixel defining layer on the middle layer, patterning the pixel defining layer corresponding to the display area through photoetching and etching, and forming an opening on the pixel defining layer corresponding to the display area, wherein the opening is used for evaporating an organic light-emitting layer;
and forming a supporting layer on the pixel definition layer of the slotted area and the pixel definition layer of the display area without arranging an opening.
7. The method of claim 6, wherein depositing a polysilicon layer on the substrate base plate, and patterning the polysilicon layer by photolithography and etching comprises:
and depositing a polycrystalline silicon layer on the substrate base plate in the area corresponding to the display area, and patterning the polycrystalline silicon layer through photoetching and etching.
8. A display device characterized by comprising the display panel according to any one of claims 1 to 5.
9. The display device of claim 8, further comprising an image capture mechanism disposed within the slotted region.
10. The display device of claim 8, wherein the slotted region of the display panel further comprises at least one of an earpiece, a microphone, a light sensor, a distance sensor, a fingerprint recognition sensor.
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|---|---|---|---|---|
| CN109411523B (en) * | 2018-12-03 | 2020-12-04 | 武汉天马微电子有限公司 | Display panel and display device |
| CN109801947B (en) * | 2019-01-31 | 2021-08-10 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
| CN110767705B (en) * | 2019-01-31 | 2022-04-05 | 昆山国显光电有限公司 | Display substrate, display panel and display device |
| CN110060575B (en) * | 2019-04-26 | 2021-04-06 | 上海天马有机发光显示技术有限公司 | Display panel and display device comprising same |
| CN110600611A (en) * | 2019-08-29 | 2019-12-20 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
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| CN108550609A (en) | 2018-09-18 |
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