CN108511343A - Production method and thin film transistor (TFT), the display module of thin film transistor (TFT) - Google Patents
Production method and thin film transistor (TFT), the display module of thin film transistor (TFT) Download PDFInfo
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- CN108511343A CN108511343A CN201810055650.4A CN201810055650A CN108511343A CN 108511343 A CN108511343 A CN 108511343A CN 201810055650 A CN201810055650 A CN 201810055650A CN 108511343 A CN108511343 A CN 108511343A
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- 239000010409 thin film Substances 0.000 title claims abstract description 63
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 77
- 229920005591 polysilicon Polymers 0.000 claims abstract description 77
- 239000004065 semiconductor Substances 0.000 claims abstract description 70
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 54
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 28
- 229910052733 gallium Inorganic materials 0.000 claims description 28
- 239000011787 zinc oxide Substances 0.000 claims description 27
- 229910052738 indium Inorganic materials 0.000 claims description 26
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical group [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 13
- 230000008859 change Effects 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 229910002601 GaN Inorganic materials 0.000 claims description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 abstract description 11
- 239000010408 film Substances 0.000 description 16
- 230000037230 mobility Effects 0.000 description 15
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- 230000005533 two-dimensional electron gas Effects 0.000 description 7
- 238000009825 accumulation Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- -1 IGZO) Substances 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
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- 238000003860 storage Methods 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
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- 150000002500 ions Chemical class 0.000 description 2
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- 230000000149 penetrating effect Effects 0.000 description 2
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- 239000010936 titanium Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 241001634884 Cochlicopa lubricella Species 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78681—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- Thin Film Transistor (AREA)
Abstract
The present invention relates to display technology fields, production method and thin film transistor (TFT), display module more particularly to a kind of thin film transistor (TFT).Wherein, thin film transistor (TFT) includes：Grid layer, insulating layer, semiconductor layer, drain electrode, source electrode, the polysilicon layer contacted with semiconductor layer.Since polysilicon layer can improve the electron mobility of semiconductor layer, to lifting switch speed and the power consumption for reducing thin film transistor (TFT).
Description
Technical field
The present invention relates to display technology fields, more particularly to the production method and film crystal of a kind of thin film transistor (TFT)
Pipe, display module.
Background technology
The type of display technology is more, including liquid crystal display (Liquid Crystal Display, LCD) and organic light emission
Diode is shown (organic light-emitting diode, OLED) etc..
OLED show have many advantages, such as self-luminous show, frivolous power saving, also Flexible Displays can be made based on flexible material
Device, can be curled, fold or as wearable device a part.The principle of luminosity of OLED is heavy between two electrodes
The very thin luminous organic material of product, electric current is passed to luminous organic material, by carrier injection and compound and luminous.Tradition
The switching transistor switching speed of OLED technology is slow, causes the resolution ratio of display module not high.
Invention content
One of the embodiment of the present invention is designed to provide the production method of a kind of thin film transistor (TFT) and thin film transistor (TFT), aobvious
Show module, solves the slow technical problem of pixel switch speed of traditional technology.
In a first aspect, the embodiment of the present invention provides a kind of thin film transistor (TFT), the thin film transistor (TFT) includes：Grid layer,
Insulating layer, semiconductor layer, drain electrode, source electrode, the polysilicon layer contacted with the semiconductor layer.
Optionally, the semiconductor layer is indium gallium zinc oxide or gallium nitride.
Optionally, the polysilicon layer is intrinsically polysilicon layer.
Optionally, the insulating layer is formed on the grid layer；
The polysilicon layer is formed on the insulating layer；
The semiconductor layer is formed on the polysilicon layer；
The source electrode is formed in the side of the polysilicon layer, and is contacted with the semiconductor layer；
Described drain is formed in the other side of the polysilicon layer, and is contacted with the semiconductor layer.
Optionally, the semiconductor layer forms hetero-junctions with polysilicon layer.
In second aspect, the embodiment of the present invention provides a kind of production method of thin film transistor (TFT), the method includes：
One grid layer, insulating layer, semiconductor layer, drain electrode, source electrode and the polysilicon layer contacted with the semiconductor layer are provided；
Thin film transistor (TFT) is made according to the grid layer, insulating layer, semiconductor layer, drain electrode, source electrode and polysilicon layer.
Optionally, the semiconductor layer is indium gallium zinc oxide or gallium nitride.
Optionally, it is intrinsically polysilicon layer to state polysilicon layer.
Optionally, described that film is made according to the grid layer, insulating layer, semiconductor layer, drain electrode, source electrode and polysilicon layer
Transistor, including：
The insulating layer is formed on the grid layer；
The polysilicon layer is formed on the insulating layer；
The semiconductor layer is formed on the polysilicon layer；
The source electrode is formed with the drain electrode on the semiconductor layer and the polysilicon layer.
In the third aspect, the embodiment of the present invention provides a kind of display module, and the display module includes any one of them
Thin film transistor (TFT).
In each embodiment of the present invention, thin film transistor (TFT) includes：Grid layer, insulating layer, semiconductor layer, drain electrode, source electrode,
The polysilicon layer contacted with semiconductor layer is opened since polysilicon layer can improve the electron mobility of semiconductor layer to be promoted
It closes speed and reduces the power consumption of thin film transistor (TFT).
Above description is only the general introduction of technical solution of the present invention, in order to better understand the technical means of the present invention,
And can be implemented in accordance with the contents of the specification, and in order to allow the above and other objects, features and advantages of the present invention can
It is clearer and more comprehensible, it is special below to lift preferred embodiment, and coordinate attached drawing, detailed description are as follows.
Description of the drawings
Fig. 1 provides a kind of structural representation for the TFT driving circuits in AMOLED display units for the embodiment of the present invention
Figure；
Fig. 2 is that the embodiment of the present invention provides a kind of production method of thin film transistor (TFT)；
Fig. 3 is that the embodiment of the present invention provides a kind of structural schematic diagram of thin film transistor (TFT)；
Fig. 4 is that the electron transfer that the embodiment of the present invention is provided between a kind of indium gallium zinc oxide layer and layer polysilicon film is former
Manage model schematic；
Fig. 5 is that another embodiment of the present invention provides a kind of structural schematic diagram of thin film transistor (TFT).
Specific implementation mode
It is of the invention to reach the technological means and effect that predetermined goal of the invention is taken further to illustrate, below in conjunction with
Attached drawing and preferred embodiment, production method and thin film transistor (TFT), display module to the thin film transistor (TFT) proposed according to the present invention
And its specific implementation mode, method, step, structure, feature and effect, it is described in detail as after.
For the present invention aforementioned and other technology contents, feature and effect, in following cooperation with reference to the preferable reality of schema
Applying in the detailed description of example to be clearly presented.It is predetermined when that can reach to the present invention by the explanation of specific implementation mode
The technological means and effect that purpose is taken be able to more deeply and it is specific understand, however institute's accompanying drawings be only to provide with reference to
Purposes of discussion is not intended to limit the present invention.
The chief component of thin film transistor (TFT) (Thin Film Transistor, TFT) includes electrode layer, semiconductor
Layer, insulating layer etc., electrode layer includes grid layer, source layer and drain electrode layer, and semiconductor layer includes semiconductor layer.Film crystal
The operation principle of pipe is similar to mos field effect transistor (metal-oxide-semiconductor), and difference lies in thin with metal-oxide-semiconductor
Film transistor is the raceway groove being made of the accumulation layer that majority carrier is formed, and metal-oxide-semiconductor is the transoid formed by minority carrier
The raceway groove that layer is constituted.
Thin film transistor (TFT) can be applied to liquid crystal display (LCD) and organic light emitting display (OLED).Wherein, OLED packets
Include passive matrix OLED (PMOLED) and Activematric OLED (AMOLED).AMOLED has self-luminous, bright in luster, contrast
Height, fast response time, it is low in energy consumption the advantages that.
As shown in Figure 1, in AMOLED, the driving circuit of display unit includes a TFT and drive for search switch
Dynamic TFT.The grid connection row electrode (scan line) of search switch TFT, source electrode connect row electrode, and drain electrode connects storage capacitance and drives
The grid of dynamic TFT.The source electrode of TFT is driven to connect row electrode, drain electrode connection OLED.When scan line input signal, search switch
TFT is opened, and electric current is generated in drain electrode and is charged to storage capacitance and opens driving TFT.After scanning signal disappears, storage
Capacitance is driving TFT electric discharges, so that it is kept it turned on, while OLED being driven to shine.
In AMOLED, the thin film transistor (TFT) TFT technology of AMOLED can be divided into a-Si (non-crystalline silicon), LTPS (low-temperature polysilicons
Silicon) and oxide semiconductor, such as：Indium gallium zinc oxide.Since a-Si mobilities are too low, the big face of the electrology characteristic of LTPS
Product uniformity is poor, limits applications of the silicon substrate TFT in large scale AMOLED panel, and indium gallium zinc oxide has mobility
Relatively high, the advantages that uniformity is good, and manufacturing cost is cheap, therefore, large scale AMOLED may be implemented in indium gallium zinc oxide.So
And the electron mobility of indium gallium zinc oxide layer is in 10cm2/ VS or so, it is difficult to be promoted.
In the implementation of the present invention, inventor has found that the switching speed of each TFT of traditional technology is slow, causes
The resolution ratio of display module is not high, and power consumption is high.
It is that the embodiment of the present invention provides a kind of production method of thin film transistor (TFT), Fig. 3 also referring to Fig. 2 and Fig. 3, Fig. 2
It is that the embodiment of the present invention provides a kind of structural schematic diagram of thin film transistor (TFT).As shown in Figure 2 and Figure 3, wherein the thin film transistor (TFT)
Production method 20 include：
Step S21, one underlay substrate is provided；
As shown in figure 3, in the present embodiment, glass substrate may be used in underlay substrate 31, can be P-type wafer,
In, the P-type silicon of heavy doping is as the grid for preparing thin film transistor (TFT).When making, deposition substrate is cleaned up first,
Then it dries up spare.
Step S22, a grid layer is formed on underlay substrate；
As shown in figure 3, in the present embodiment, grid layer 32 can be a kind of following metal or various metals set：Molybdenum
(Mo), aluminium (AI), copper (Cu), titanium (Ti), chromium (Cr).
Physical gas-phase deposite method (PVD) may be used in depositing layers 32 on underlay substrate 31 in grid layer 32, and
Graphical treatment grid layer.Wherein, PVD is to generate solid particles by processes such as evaporation, ionization or sputterings and be deposited on silicon chip table
Face continues to obtain required film with gas reaction.
Step S23, an insulating layer is formed on grid layer and underlay substrate；
As shown in figure 3, in the present embodiment, insulating layer 33 includes silicon oxide layer, silicon nitride layer etc..Insulating layer 33 can be with
It is deposited on underlay substrate 31 in grid layer 32 using chemical vapor deposition method (CVD), after having deposited, then using figure
Shape handles the insulating layer 33, such as：It is punched on the insulating layer 33.In some embodiments, domain when practical application is walked
Line etc. need to consider actual circuit situation, determine the punching situation of insulating layer 33.
CVD is in reative cell, and gaseous reactant after chemical reaction generates solid matter and is deposited on silicon chip surface
Film deposition techniques.
Step S24, a polysilicon layer is formed on insulating layer；
Two-dimensional electron gas (Two-dimensional electron gas, 2DEG) refers to that electron gas can be freely in two dimension
Direction is moved, and the phenomenon that being restricted in the third dimension, in general, two-dimensional electron gas is easy to obtain in heterojunction structure.If
The doping situation for controlling abrupt heterojunction both sides, i.e., undope (being intrinsic semiconductor) in the semiconductor on thin pillar one side,
And alms giver is mixed in the semiconductor on the different energy gap one side of width, then there is electronics gesture in the intrinsic semiconductor side near heterojunction boundary
Trap, and have electronic barrier in doped semiconductor side, wherein accumulation has two-dimensional electron gas (all by the doping of another side in potential well
Semiconductor is provided).
The generating principle of two-dimensional electron gas：When two energy gaps semi-conducting material of different size just starts contact, broad-band gap
The fermi level of material is higher than the fermi level of low bandgap material.As a result electronics is overflowed from wide bandgap material, keeps it only remaining
Positive charge, i.e. donor ion.These space charges generate electrostatic potential, it will cause interface band curvature.Different materials after balance
The fermi level of material is equal.In interface, there are one sharp peak, (fermi level of electronics enters and leads the density of electronics there
In band), form a thin conductive layer, commonly known as two-dimensional electron gas.In two-dimensional electron gas, typical electron concentration model
It encloses for 2 × 1011/cm2~2 × 1012/cm2.
As shown in figure 3, in the present embodiment, polysilicon layer 34 includes intrinsic polysilicon film layer, a polysilicon is being formed
Layer when on the insulating layer, can by using chemical vapor deposition method in deposition of amorphous silicon films layer on insulating layer 33,
Amorphous thin Film layers crystallization is formed into layer polysilicon film, graphical treatment layer polysilicon film.
In some embodiments, polysilicon layer 34 is formed in the region residing for thin film transistor (TFT).
Step S25, semi-conductor layer is formed on polysilicon layer；
As shown in figure 3, in the present embodiment, which includes indium gallium zinc oxide layer (indiumgallium
Zinc oxide, IGZO), semi-conductor layer 35 is being formed when on polysilicon layer 34, and physical gas-phase deposite method may be used
In depositing the indium gallium zinc oxide layer, the graphical treatment indium gallium zinc oxide layer on polysilicon layer 34.
If using indium gallium zinc oxide layer as the use of film crystal switching tube, the switch speed of film crystal switching tube
Degree, resolution ratio and power consumption can be affected.But in embodiments of the present invention, polysilicon layer 34 can be utilized to improve indium
The electron mobility of gallium zinc oxide layer.Concrete operating principle is as follows：Also referring to Fig. 3 and Fig. 4, because of indium gallium zinc oxide layer
Energy gap be much larger than intrinsic polysilicon, also, indium gallium zinc oxide layer fermi level be higher than intrinsic polysilicon, therefore, this
The two of sign polysilicon and indium gallium zinc oxide layer forms hetero-junctions and electronics is strapped in potential well, accumulation electronics (i.e. two dimension electricity
Sub- gas), conducting channel is formed, since electron accumulation is in the side of intrinsic polysilicon, dissipating there is no ionized impurity center at this
The effect of penetrating, therefore, these electronics will be very high along the mobility that in-plane moves, by grid voltage change potential well width and
Depth is to control electron concentration, to control drain current.Semiconductor layer is not limited to indium gallium zinc oxide layer, can also be nitrogen
Change gallium layer etc..
Step S26, a source electrode and a drain electrode are formed on semiconductor layer and polysilicon layer.
As shown in figure 3, in the present embodiment, forming a source electrode 36 and one drain electrode 37 in semiconductor layer 35 and polysilicon layer
When on 34, mask process is carried out to semiconductor layer 35 first, finally, on the exposure area of semiconductor layer 35 and polysilicon layer 34
Ion heavily doped polysilicon processing is carried out, source electrode 36 and drain electrode 37 are formed.
It can be understood that：Thin film transistor (TFT) production method provided in an embodiment of the present invention is not limited to such as Fig. 2 and Fig. 3
Shown step and structure can also be the thin film transistor (TFT) of top gate structure, the thin film transistor (TFT) of bottom grating structure or other
The thin film transistor (TFT) of structure.Those of ordinary skill in the art are understood that：Anyone content instructed and guided according to the present embodiment is adopted
With " by the way that polysilicon layer is arranged on the semiconductor layer, to improve the electron mobility of semiconductor layer, and then control drain electrode and source electrode
Between electron transfer " such mode, should fall within the protection domain of the embodiment of the present invention, thus be not limited to
Fig. 2 step and structure as shown in figure 3.In some embodiments, certain steps can be omitted in Fig. 2, certain structures in Fig. 3
It can also be omitted or exchange.
In general, to those skilled in the art, as long as according to " according to grid layer, insulating layer, semiconductor
Layer, drain electrode, source electrode and the polysilicon layer making thin film transistor (TFT) contacted with semiconductor layer ", should all fall into implementation of the present invention
Within the protection domain of example.
In each embodiment of the present invention, the electron mobility of indium gallium zinc oxide layer is improved by polysilicon layer 34, from
And improve the switching speed of thin film transistor (TFT).Since polysilicon layer 34 can improve the effective electron number of conduction electric current, also, shadow
The mobility principal element " scattering at ionized impurity center " for ringing indium gallium zinc oxide layer is effectively canceled, and is realizing switch work
Used time can relatively reduce the loss of invalid electronic, can also reduce switching power loss.Further, due to polycrystalline
Silicon layer 34 improves the electron mobility of indium gallium zinc oxide layer, and each thin film transistor (TFT) is thin in the case where realizing equivalent switching function
Film transistor can be produced ground smaller, and then therefore each pixel making ground smaller can be improved resolution by it
Rate.
As the another aspect of the embodiment of the present invention, the embodiment of the present invention provides a kind of thin film transistor (TFT).As shown in figure 5,
The thin film transistor (TFT) 50 includes：Underlay substrate 51, grid layer 52, insulating layer 53, polysilicon layer 54, semiconductor layer 55, source electrode 56
And drain electrode 57.Grid layer 52 is formed on the underlay substrate 51, and insulating layer 53 is formed on grid layer 52 and underlay substrate 51,
Polysilicon layer 54 is formed on insulating layer 53, and semiconductor layer 55 is formed on polysilicon layer 54, and source electrode 56 is formed in polysilicon layer
54 side, and being contacted with semiconductor layer 55, drain electrode 57 are formed in the other side of polysilicon layer 54, and with semiconductor layer 55
Contact.
In each embodiment of the present invention, the electron mobility of semiconductor layer 55 is improved by polysilicon layer 54, to carry
The switching speed of high thin film transistor (TFT) reduces switching power loss and improves resolution ratio.
It is understood that thin film transistor (TFT) provided in an embodiment of the present invention is not limited to structure as shown in Figure 5,
It can also be the thin film transistor (TFT) of the thin film transistor (TFT) of top gate structure, the thin film transistor (TFT) of bottom grating structure or other structures.This
Field those of ordinary skill is understood that：Anyone content instructed and guided according to the present embodiment, using " by the semiconductor layer
Polysilicon layer is set, to improve the electron mobility of semiconductor layer, and then controls the electron transfer between drain electrode and source electrode " this
Class mode should be fallen within the protection domain of the embodiment of the present invention, thus be not limited to structure shown in fig. 5.One
In a little embodiments, certain structures in Fig. 5 can also be omitted or exchange.
In general, to those skilled in the art, as long as according to " according to grid layer, insulating layer, semiconductor
Layer, drain electrode, source electrode and the polysilicon layer making thin film transistor (TFT) contacted with semiconductor layer ", should all fall into implementation of the present invention
Within the protection domain of example.
In some embodiments, which is formed in the region residing for thin film transistor (TFT), wherein polysilicon layer 54
Including intrinsic polysilicon film layer.
In some embodiments, semiconductor layer 55 includes indium gallium zinc oxide layer.It in embodiments of the present invention, being capable of profit
The electron mobility of indium gallium zinc oxide layer is improved with polysilicon layer 54.Concrete operating principle is as follows：Because of indium gallium zinc oxide layer
Energy gap be much larger than intrinsic polysilicon, also, indium gallium zinc oxide layer fermi level be higher than intrinsic polysilicon, therefore, this
The two of sign polysilicon and indium gallium zinc oxide layer forms hetero-junctions and electronics is strapped in potential well, accumulation electronics (i.e. two dimension electricity
Sub- gas), conducting channel is formed, since electron accumulation is in the side of intrinsic polysilicon, dissipating there is no ionized impurity center at this
The effect of penetrating, therefore, these electronics will be very high along the mobility that in-plane moves, by grid voltage change potential well width and
Depth is to control electron concentration, to control drain current.
Since product embodiments and embodiment of the method belong to same inventive concept, conflicting premise is not constituted in content
Under, the content that product embodiments can be illustrated with quoting method embodiment, that is,：Each embodiment related with thin film transistor (TFT)
Each embodiment of above-mentioned thin film transistor (TFT) production method can be quoted, this will not be repeated here.
As the another aspect of the embodiment of the present invention, the embodiment of the present invention provides a kind of display module.The display module
Including thin film transistor (TFT), wherein the thin film transistor (TFT) can be thin film transistor (TFT) as shown in Figure 5, and this will not be repeated here.
In embodiments of the present invention, the electron mobility that semiconductor layer is improved by polysilicon layer, to improve film crystalline substance
The switching speed of body pipe reduces switching power loss and improves resolution ratio.
The above described is only a preferred embodiment of the present invention, be not intended to limit the present invention in any form, though
So the present invention has been disclosed as a preferred embodiment, and however, it is not intended to limit the invention, any technology people for being familiar with this profession
Member, without departing from the scope of the present invention, when the technology contents using the disclosure above make a little change or modification
For the equivalent embodiment of equivalent variations, as long as be without departing from technical solution of the present invention content, it is right according to the technical essence of the invention
Any simple modification, equivalent change and modification made by above example, in the range of still falling within technical solution of the present invention.
Claims (10)
1. a kind of thin film transistor (TFT), which is characterized in that including：Grid layer, insulating layer, semiconductor layer, drain electrode, source electrode, and it is described
The polysilicon layer of semiconductor layer contact.
2. thin film transistor (TFT) according to claim 1, which is characterized in that the semiconductor layer is indium gallium zinc oxide or nitrogen
Change gallium.
3. thin film transistor (TFT) according to claim 1, which is characterized in that the polysilicon layer is intrinsically polysilicon layer.
4. thin film transistor (TFT) according to any one of claims 1 to 3, which is characterized in that
The insulating layer is formed on the grid layer；
The polysilicon layer is formed on the insulating layer；
The semiconductor layer is formed on the polysilicon layer；
The source electrode is formed in the side of the polysilicon layer, and is contacted with the semiconductor layer；
Described drain is formed in the other side of the polysilicon layer, and is contacted with the semiconductor layer.
5. thin film transistor (TFT) according to claim 1, which is characterized in that the semiconductor layer forms heterogeneous with polysilicon layer
Knot.
6. a kind of production method of thin film transistor (TFT), which is characterized in that including：
One grid layer, insulating layer, semiconductor layer, drain electrode, source electrode and the polysilicon layer contacted with the semiconductor layer are provided；
Thin film transistor (TFT) is made according to the grid layer, insulating layer, semiconductor layer, drain electrode, source electrode and polysilicon layer.
7. according to the method described in claim 6, it is characterized in that, the semiconductor layer is indium gallium zinc oxide or gallium nitride.
8. according to the method described in claim 6, it is characterized in that, the polysilicon layer is intrinsically polysilicon layer.
9. according to the method described in claim 8, it is characterized in that, it is described according to the grid layer, insulating layer, semiconductor layer,
Drain electrode, source electrode and polysilicon layer make thin film transistor (TFT), including：
The insulating layer is formed on the grid layer；
The polysilicon layer is formed on the insulating layer；
The semiconductor layer is formed on the polysilicon layer；
The source electrode is formed with the drain electrode on the semiconductor layer and the polysilicon layer.
10. a kind of display module, which is characterized in that including thin film transistor (TFT) such as described in any one of claim 1 to 5.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120146003A1 (en) * | 2010-12-09 | 2012-06-14 | Ming-Tse Chang | Thin film transistor having schottky barrier |
| CN103715269A (en) * | 2013-12-31 | 2014-04-09 | 京东方科技集团股份有限公司 | Thin film transistor, array substrate and display device |
| CN106601786A (en) * | 2016-11-26 | 2017-04-26 | 信利（惠州）智能显示有限公司 | Thin film transistor and preparation method thereof, and array substrate |
| CN106941121A (en) * | 2017-05-16 | 2017-07-11 | 厦门天马微电子有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array base palte and display device |
| CN107154407A (en) * | 2017-05-17 | 2017-09-12 | 厦门天马微电子有限公司 | Laminated film transistor device and its manufacture method, display panel and display device |
| CN107452753A (en) * | 2017-07-12 | 2017-12-08 | 深圳市华星光电半导体显示技术有限公司 | Array base palte and its manufacture method, display panel |
-
2018
- 2018-01-19 CN CN201810055650.4A patent/CN108511343A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120146003A1 (en) * | 2010-12-09 | 2012-06-14 | Ming-Tse Chang | Thin film transistor having schottky barrier |
| CN103715269A (en) * | 2013-12-31 | 2014-04-09 | 京东方科技集团股份有限公司 | Thin film transistor, array substrate and display device |
| CN106601786A (en) * | 2016-11-26 | 2017-04-26 | 信利（惠州）智能显示有限公司 | Thin film transistor and preparation method thereof, and array substrate |
| CN106941121A (en) * | 2017-05-16 | 2017-07-11 | 厦门天马微电子有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array base palte and display device |
| CN107154407A (en) * | 2017-05-17 | 2017-09-12 | 厦门天马微电子有限公司 | Laminated film transistor device and its manufacture method, display panel and display device |
| CN107452753A (en) * | 2017-07-12 | 2017-12-08 | 深圳市华星光电半导体显示技术有限公司 | Array base palte and its manufacture method, display panel |
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