CN108491933B

CN108491933B - Doped element nanowire multi-type mutual-embedding silicon carbide transistor

Info

Publication number: CN108491933B
Application number: CN201810062085.4A
Authority: CN
Inventors: 张洪涛; 张泽森
Original assignee: Hubei University of Technology
Current assignee: Hubei University of Technology
Priority date: 2018-01-23
Filing date: 2018-01-23
Publication date: 2022-12-16
Anticipated expiration: 2038-01-23
Also published as: CN108491933A

Abstract

The invention relates to a phase and Fermi-lepton qubit based on a self-excited spin single electron electromagnetic field effect transistor, which is a basic unit of a quantum computation processor. The phase and Fermi-lepton qubit based on self-excited spin one-electron electromagnetic field effect transistors is characterized in that it has a first main degree of freedom assigned to the writing operation and a second main degree of freedom assigned to the reading operation, wherein one of the first and second main degrees of freedom is a spintronic charge and the other is a phase. The qubits of the transistor of the present invention have two degrees of freedom, phase and charge, and can measure quantum signals at room temperature, which provides significant opportunities for the fabrication and operation of quantum computers. The quantum bit is based on a spin single electron electromagnetic field effect transistor, can be manufactured in a large-scale integration way, and is expected to be applied to a new generation of quantum computer or sensing equipment. The defect of low-temperature instability of the superconducting qubit is avoided.

Description

Doped element nanowire multi-type mutual-embedding silicon carbide transistor

Technical Field

The invention belongs to the field of computer science and technology, and particularly relates to a qubit device of a self-excited spin electron electromagnetic field effect transistor manufactured based on nanowire silicon carbide, which is a basic unit of a quantum computing processor.

Background

The invention belongs to the field of quantum computing, and relates to a self-excited spin electron electromagnetic field effect transistor, in which electrons possibly spinning appear, and which constitutes a basic unit of a quantum bit of production, also called a qubit (or a weighing qubit). This transistor is a physical device whose fermi-leptics (including spintrons, weyl-protons, or Ma Layao) may be such that two quantum states, e.g., a ground state and an excited state, are produced by the spintrons, which may be identified by state vectors |0> and |1>. The qubit in which this transistor operates can be in a coherent superposition state, which is expressed as:

a|0>+b|1>

wherein the coefficients a and b may take any value after state normalization.

In general, since its quantum state can be externally controlled to operate, it can perform an identity matrix U operation, where U denotes a state space of a qubit. In particular, it is necessary to prepare an arbitrary coherent superposition state a |0> + b |1> of the two quantum states of the qubit (write phase). This qubit has a coherence time long enough to allow manipulation of the state and is coupled to one or more other qubits to produce a logic gate.

Qubits can be coupled together and combined to physically perform quantum logic operations for use in quantum computer processors. Currently, two types of qubits are popular. One is based on natural quantum guests, such as atomic, ionic or nuclear spins, which have coherence times of up to a few seconds and low levels of integratability. The other is based on fabricated objects, such as superconductors and electrical circuits using microtechnology and nanotechnology, which are easy to integrate but have a very short coherence time.

The present quantum computer has photon technology, ion trap and superconductor, the former is not easy to integrate, can not reach the quantum bit required for quantum calculation, and all must work at low temperature. Furthermore, the coherence time of superconducting quantum computers is short and the qubits are fragile and destructive to environmental effects. Only adiabatic quantum computation and special algorithms can be performed, which limits the use of superconducting quantum computers. In order to overcome the defect, the invention focuses on manufacturing the qubit capable of running at room temperature, adopts the self-excitation spin single-electron electromagnetic field effect transistor which is a field effect transistor with the nanowire silicon carbide as an active region, manufactures the long-life qubit capable of running from low temperature of 1mK to room temperature, can potentially integrate the qubit on a large scale, and meets the requirements of a quantum computing processor.

Disclosure of Invention

Aiming at the special algorithm limitations that the handheld quantum computer cannot be manufactured and only adiabatic iteration can be performed due to the short coherence time, low-temperature operation and the like of the quantum computer, room-temperature unit devices of a processor of the quantum computer need to be developed. The invention displays coherent quantum dynamics by using the I-V curve resonance of the spin single electron current output by the source electrode and the drain electrode under the condition that the self-excited electromagnetic transistor applies the grid electrode voltage above the threshold value at room temperature, and the quantum bit characteristic marks a dual-energy-level system and can construct a quantum bit device. The carrier for the transistor may be one of fermi-leptons.

When the electrical characteristics of the constructed 200 element-doped nanowire multi-type mutual-embedding silicon carbide transistor are tested, a voltage-determined resonance condition is observed, which is a two-energy-level resonance phenomenon presented by the transistor. After the test circuit of the grid electrode and the source drain electrode is connected, the I-V characteristic of the transistor is tested, and the result shows that when the grid voltage exceeds a threshold value along with the rise of the source drain voltage, the source drain current generates periodic constant amplitude oscillation and changes into a sine wave shape along with time, wherein the periodic constant amplitude oscillation is anticlockwise current in a half period with strict period, and the other half period is clockwise current and is circular current. If no grid voltage is added, the source-drain electrode spin electron current cannot form constant amplitude oscillation, only very small tunneling electron current is formed under the source-drain electrode voltage, and the source-drain voltage obey ohm's law. When the gate voltage is applied to a certain value, the spin electron tunneling current will oscillate with equal amplitude and equal period. When the source-drain voltage exceeds a certain range, the source-drain current is caused to form sawtooth waves.

The time-varying current characteristic of a single transistor of the present invention can be described by the following equation:

wherein Im is the maximum spin current passing through the transistor (active region nanowire) and the extreme value is 1 pA-100 nA; v _T ＝Vg+V _substrate +Vds

V _T Source-drain voltage and effective grid voltage Vg above threshold, source-drain voltage Vds and substrate voltage V thereof _substrate The sum of (1), total voltage, which is a direct current voltage, rather than a function of time, and any one of the variables cannot be zero; phi is the initial phase angle.

When the gate capacitance exceeds a certain value but within an effective range, the relationship between the source-drain current and the voltage through the nanowire is as follows:

where Im is the maximum source-drain current,

it is at V _T Under the effective total voltage, the source-drain voltage Vds generates the maximum value V of the resonant source-drain voltage in the spin electron current _dsmax The i-th changed equivalent increment in the range belongs to the normalized valueAlso called effective source drain voltage; delta V _ds Is equivalent increment within the range of effective source-drain voltage.

V _dsmax ＝cV _T ,V _dsmax Following it V _T Increase when V is increased, but when V is increased _T ≥10V，

V _dcmax Will result in effective generation

The range of the spin electron current in constant amplitude oscillation is reduced.

It can be adjusted by c, and is made of 0-cloth-c-cloth-type

Otherwise, the equation evolves to

V(t)＝k ₀ V _T ……0≤V _T ≤V _dsM (3)

Wherein n is an integer, w _n Angular frequency, V, of transistor source leakage current corresponding to nth source-drain voltage increment in formula (2) _n Is the increment of the nth source-drain voltage.

The frequency of the electromagnetic wave emitted by the source leakage current of the transistor accords with the following relation:

△V _T the constant 1/2 represents the fractional charge and takes the value of 1/2.

The qubit is excited by radio frequency technology, so that Rabi oscillation occurs, and the Rabi frequency and the threshold voltage are in a linear relationship.

Above the threshold voltage, the transistor has a source-drain I-V curve at room temperature, which shows that the spin electrons form clockwise and counterclockwise loop currents in each half of a strict period, and the currents form constant-amplitude resonance; qubits are constructed using this property. At room temperature, radio frequency excitation transistor is adopted to generate Rabi oscillation, and the oscillation shows Rabi resonance in microsecond order or even millisecond order, which is one of the conditions of the transistor being a qubit device. The second is that the fidelity of the output data can be improved. Thirdly, the qubit device can be integrated on a substrate by semiconductor process manufacturing technology, thereby realizing large-scale integration.

In view of the above, it is an object of the present invention to provide a phase and fermi-light-sub qubit based on self-excited spin single-electron electromagnetic field effect transistors.

In order to achieve the purpose, the technical scheme adopted by the invention is as follows:

a phase and Fermi-lepton qubit based on a self-excited spin one-electron electromagnetic field effect transistor, characterized in that it has a first main degree of freedom assigned to writing operations and a second main degree of freedom assigned to reading operations, wherein one of the first and second main degrees of freedom is a spintronic charge and the other is a phase.

Further, the first main degree of freedom is assigned to a write operation for a spin electron charge, and the second main degree of freedom is assigned to a read operation for a phase.

A phase and fermi-lepton qubit based on a self-excited spin one-electron electromagnetic field effect transistor having a first principal degree of freedom assigned to writing operations and a second principal degree of freedom assigned to reading operations, wherein one of the first and second principal degrees of freedom is a spintronic charge and the other is a phase, comprising:

a self-excited spin electromagnetic single-electron transistor module comprising first and second self-excited spin electromagnetic single-electron transistors defining a closed transistor loop forming a spintronic qubit;

a write circuit comprising a transistor gate electrode (formed by a metal film in combination with an insulating layer of silicon oxide having a thickness of 20nm to 500 nm) and a doped nanowire silicon carbide polytype interdigited crystal forming a gate capacitor, the gate electrode being capacitively coupled to the active region allowing this qubit to be placed in one or the other of the two ground states of the qubit, or in a coherent superposition of these states, a bias voltage Vg from an adjustable voltage source being applied to the gate electrode;

a read circuit comprises a self-excited spin electromagnetic single-electron transistor as a read transistor, inserted in the transistor loop, whose active region has a conductivity more than twice that of the first and second transistors.

Further, the transistor loop is configured such that the transition frequency f of the qubit so formed ₀ Can be adjusted to be stationary with respect to external parameters and disturbances.

Further, it comprises elements capable of inducing an adjustable magnetic flux through the transistor loop by acting on the phase difference δ of the qubit.

Further, it comprises a read circuit independent of the write circuit, a transistor loop connected to said qubit, in addition to the read transistor, means for applying a current pulse Ib of parameterable duration and amplitude during read, and means for detecting a detected 2 pi phase transition occurring at the terminals of the read transistor as a result of the read pulse, specifically one of the two states.

Further, its parameters are the effective capacitance charge Ng composed of the DC bias Vg applied by the gate electrode and the transistor phase difference delta composed of the magnetic flux phi passing through the transistor loop and the read current Ib, at the operating point Fi, corresponding to two sets of parameters Ng and delta, where the transition frequency f of the qubit ₀ Is stationary.

Further, a read pulse sequence having a peak value Ibc is generated in the read sequence, and the means for applying a current pulse supplies a steady state current which is negative with respect to the direction of the read pulse, the peak value of which is smaller than Ibc, so that the transistor phase difference δ can be shifted by between π/2 and π when the read pulse arrives.

A multiple qubit device comprising at least a first room temperature transistor room temperature spin qubit having a primary degree of freedom assigned to the written spintronic charge and a second primary degree of freedom assigned to the read phase difference, at least a second room temperature transistor room temperature spin qubit having a primary degree of freedom assigned to the written charge and a second primary degree of freedom assigned to the read phase difference, a coupling device coupling the two, first, degrees of freedom of the room temperature spintronic charge properties of said first and second qubits.

Further, the coupling device of the multiple qubit device comprises at least one capacitor.

Compared with the prior art, the invention has the beneficial effects that:

1. the qubits of the transistor of the present invention have two degrees of freedom, phase and charge, and can measure quantum signals at room temperature, which provides significant opportunities for the fabrication and operation of quantum computers.

2. The quantum bit is based on a spin single electron electromagnetic field effect transistor, can be manufactured in a large-scale integration way, and is expected to be applied to a new generation of quantum computer or sensing equipment. The defect of low-temperature instability of the superconducting qubit is overcome.

Drawings

Fig. 1 is a block diagram of the main features of the room temperature qubit physical device of the self-excited electromagnetic spin transistor in the present invention.

Fig. 2 shows a non-adiabatic permutation of the state of a system of qubit devices in the present invention at 300K during a measurement pulse period.

Fig. 3 is a diagram of an example of a qubit based on self-exciting spin electromagnetic transistors in the present invention.

Fig. 4 is an example of a timing diagram of signals involved in the measurement or manipulation of quantum states of a qubit device in accordance with the present invention.

Fig. 5 is a Ramsey interference experimental plot of a qubit device in accordance with the present invention, showing coherence time.

Fig. 6 is a Rabi resonance of a transistor qubit of the present invention.

Fig. 7 is an example of the coupling of two embodiments of qubit devices in the present invention.

In the figure: 101. 102, 105-transistors; 121. 123-a gate electrode; 124-source drain electrodes; 125. 135-a current source; 136. 138, 143-capacitors; 122-a radio frequency source; 132. 137, 138, 145, 151, 153, 156, 161-resistor; 126-an amplifier; 147. 152, 162-low pass filter; 154-resistance divider; 155-voltage source; 110-self-excited spin single-electron electromagnetic field effect transistor loops, i.e. qubits; 127-gate voltage; 133-coils or ferromagnets generating a varying magnetic field or electromagnetic cyclotron resonance-generating components on the same substrate, which exert a magnetic flux Φ through the transistor loop; 141-an attenuator; 170-electromagnetic coupling device.

Detailed Description

The present invention will be described in further detail with reference to examples for the purpose of facilitating understanding and practice of the invention by those of ordinary skill in the art, and it is to be understood that the present invention has been described in the illustrative embodiments and is not to be construed as limited thereto.

The terms to which the invention relates are to be interpreted as follows:

fermion (fermion): fermi is named after the italian physicist fermi name. Fermi is a particle whose number of spin quanta of angular momentum is half odd integer times according to fermi-dirac statistics. It follows the principles of pauli incompatibility. According to standard theory fermi is composed of a batch of elementary fermi, which cannot be broken down into finer particles.

Basic fermi is classified into 2 types: quark and leptons. There are 12 kinds of leptons: comprises electrons (e), muons (mu), tao Zi (tau), neutrino ve, neutrino vu and neutrino vu, and 6 kinds of correspondent counter particles including 3 kinds of counter neutrino. Are not strongly interacting fermi. It also includes the weyl, majorana, seeds. In the patent of the invention, the current generated in the self-excited spin single-electron electromagnetic field effect transistor can be generated by the action of the leptons, namely, the lepton flow. The invention discloses a method for preparing a Fermi-type quantum dot by taking a spintronic charge as an example. The qubits of the self-excited single-electron electromagnetic field effect transistor of the present invention are applicable to these types of leptons.

The phase and fermi-lepton qubits based on self-excited spin one-electron electromagnetic field effect transistors provided by embodiments of the present invention are described below.

Under the condition of room temperature, after a self-excitation electromagnetic transistor applies a grid voltage exceeding a certain threshold value, a source-drain electrode I-V characteristic curve presents a two-energy-level system. Characterized in that it has a first master degree of freedom assigned to data write operations and a second master degree of freedom assigned to read operations. Wherein one of the first and second principal degrees of freedom corresponds to the spintronic charge and the other is the phase.

The output characteristics of a single such transistor, I-V over time, obey the following equation:

wherein I _sp Is the maximum spin current passing through the nanowire, the extreme value of the maximum spin current is that the amplitude is in the nA-pA level, and V _sp Is effectively the transistor source drain voltage, the gate voltage is at or above the threshold, the voltage for generating the spin electron coherent current, which may be referred to as the spin voltage,

-an initial phase. The current passing through the nanowire is generally composed of a spin current I _sp Transmission current I _trans And resistance current I _r And (4) forming.

I＝I _sp +I _trans +I _r

But here when a spin current is present, the transistor active region is suppressed on the nanowire due to a confinement mechanism, the transmission current and the resistance current, and only the spin current is present. This mechanism has not been illustrated.

The spin voltage is represented by:

Vsp(t)＝Vds(t)

wherein the DC gate bias voltage Vg and the substrate DC bias voltage V are applied when the DC bias gate voltage reaches a threshold value _substrate The source-drain voltage Vds can not generate the spin voltage Vsp at the same time, which is 0. The mechanism of spin voltage establishment remains to be studied extensively. Because the current in the nanowire is a spin single electron current, it is modulated by the spin voltage.

The single electrons possible for the carriers in the spin current are here fractional spintrons, fractional marangoni or fractional weyl electrons.

The relationship between the spin voltage V and the frequency of the I-V resonance of the transistor can be expressed as:

wherein V _sp -a value taken within the maximum value of the resulting spin voltage is constant. This indicates that the large value of the spin voltage is consistent with the system operating point. At the operating point the system is associated with this value. This value is related to the resonant frequency v ₀₁ And (4) correlating. When this value is the same as the system resonance frequency, the system operates in a quantum coherent state.

Preferably, the first main degree of freedom is the spintronic charge and the second is the phase. Thus, the invention listed in the examples consists of:

two self-excited electromagnetic transistors defining a transistor for single electron spintronic charge current, forming a qubit device; the element doping concentrations of the nanowire silicon carbide multi-type mutual embedded crystal in the source and drain active region are close. The conductivity sigma (measured when the grid voltage Vg =0, the same applies below) of the active region of the device is extremely close and is in a higher value of 0.001-300S/cm, and the capacitance value C is 10 ^-8 ～10 ^-13 F/cm ² 。

A write operation circuit is composed of a self-excited electromagnetic transistor with a floating gate electrode structure, and when a gate voltage Vg exceeds a threshold value, source and drain I-V display one or the other of two basic states of the qubit or are in coherent superposition of the two basic states. This gate voltage is adjustable. The source and drain electrodes of this transistor are applied with a source and drain voltage Vsd while a current meter is added to test the variation of Isd with the variation of the source and drain voltage Vsd. Wherein the Ids is in the picoamp to nanoamp range.

A read operation circuit is a self-excitation electromagnetic transistor with a source-drain active region nanometer silicon carbide line and a high doping element concentration, and the conductivity of the self-excitation electromagnetic transistor is more than twice of that of two transistors of a write operation circuit. The conductivity sigma of the active region of the device is more than 800S/cm. The source-drain electrode of the transistor applies source-drain voltage Vsd and adds a current meter Isd to form a reading circuit. Wherein the Ids is in the picoamp to nanoamp range.

The self-excited electromagnetic transistor loop is constructed in such a manner that the transition frequency f of the qubit is ₀ To be able to adjust to a steady state value, it is steady state for external parameters and disturbances.

According to the invention, the qubit device comprises means for inducing an adjustable magnetic flux by means of the self-exciting electromagnetic transistor loop from the phase difference δ acting on the qubit. The sense transistor has an effective conductivity sufficiently high to be less than 0.001rd for fluctuations in phase difference induced by external circuitry, taking into account the capacitance applied by the read circuit.

The doping concentration of the two transistors is close to or the same, the doping element concentration of the active region of the other transistor is higher, and the capacitance is large when the grid electrode is prepared, so that the grid electrode has slightly larger resistance. The purpose of this is to maintain sensitivity to the read signal and to decouple from the read signal or remain stationary while data is being written.

According to a preferred embodiment of the invention, the device comprises a reading circuit which is coupled to the loop of qubits by means of an electric potential, independently of the writing circuit, except for the self-exciting electromagnetic transistor, which has, on the one hand, the function of applying a current pulse Ib of determined time and amplitude during the readout phase, and, on the other hand, the capability of detecting a phase transition 2 pi at the terminals of the readout transistor, which is, as a result of the readout pulse, exclusively one of the two states of the qubit.

The invention has the advantage that the device is preset by its parameter, i.e. the threshold voltage V _T -a FET active region conductivity σ and a transistor phase difference δ, wherein the phase difference δ is generated by a magnetic flux Φ j traversing a loop of the transistor and a sense current Ib, at an operating point Fi, i =1,2,3,4, a qubit transition frequency f ₀ Corresponding to three sets of external parameters and threshold voltage V thereof _T Source-drain voltage Vds, phase of transistorThe difference δ is stationary.

The device operating point Fi can be at the qubit eigenfrequency f ₀ Three-dimensional diagram saddle point F1 (not shown), which is the FET source-drain voltage, threshold voltage V _T And the phase difference δ of the transistors.

Transition frequency f of the formed qubit ₀ May be adjusted to a value such that it remains robust when subjected to external parameters and disturbances.

When the read sequence is out of sequence, the current generator generates a peak current Ibc relative to the generated read pulse sequence, and the mechanism for applying a current pulse sends a steady state current scale of about 0.01Ibc, which is negative relative to the direction of the read pulse. When a read pulse arrives, the transistor termination current phase difference δ between π/2 to π can be changed.

The device of the present invention includes a read circuit controlled by gate voltage and source-drain voltage.

The present invention provides the possibility of operating qubit devices with much longer coherence times and high readout fidelity from low temperature (0.001K) to room temperature than do low temperature superconducting qubit devices. To do this, two main degrees of freedom are used simultaneously, namely the spintronic charge and the phase. The following is illustrated by way of example in fig. 1.

The main degree of freedom for the spintronic charge is the single electron spintronic charge of the clockwise and counterclockwise circular tunneling currents of the transistor loop shown at 110. The two

transistors

101, 102 are symmetrically connected in parallel, have a conductivity of 0.001 to 300S/cm, preferably 50 to 300S/cm, and have a capacitance C of 10 ^-8 ～10 ^-13 F/cm ² . The carrier-spintronic charge properties in the heterojunction of semiconductor silicon carbide polytype crystals are exploited for manipulating qubits by applying a voltage at the gate electrode 121 of 110. While the phase difference δ may be characterized by the conductivity σ of the active region of the transistor 105 device. This transistor 105 is comprised in a self-energizing electromagnetic transistor loop, the potential of which is coupled to 110. Which constitutes the detection unit of the read-out circuit. This transistor 105 has a conductivity more than twice as large as the 101, 102 transistors.

The main degree of freedom of the spintronic charge is changed by the voltage applied to the gate electrodes of the two

transistors

101, 102 in 110, i.e. the direct voltage Vg from the voltage source of the gate electrode 121, such that an optimum operating point is achieved with a conductivity σ =200S/cm, where σ is considered to represent a reduced number of spintronic charges; on the other hand, the write operation is completed by applying a near or equal resonant rf pulse u (t) through the rf source 122 power supply on the 110 qubit. On readout, a current pulse Ib from current source 125 is applied to transistor 105 so as to approach the critical current of the transistor. The application of an independent supply gate bias Vg3 to transistor 105 can thus reflect the phase difference phi between

transistors

101 and 102, with the transistor sigma being larger, up to 800S/cm or more, which should be accounted for at the optimum operating point of the circuit loop, without the need for the application of a radio frequency signal, and the state of the qubit being determined in the readout transistor of transistor 105 by detecting the presence or absence of one or more 2 pi phase transitions. When these phase transitions form an avalanche current signal, a read can be obtained by measuring the voltage at both terminals of the read transistor 105 using amplifier 126. The coherent state of the first two

transistors

101, 102 at write time can make transistor 105 be considered as a short circuit state due to the three transistors in the loop. This is because transistor 105 has a source-drain active region nanowire silicon carbide polytype of interdigitated crystal heavily doped concentration at least two times higher than

transistors

101 and 102. This is so that transistor 105 can be viewed as a line to decouple writing and reading during a write operation. The two states of a qubit correspond to the presence or absence of a defined voltage. When the qubit is in the writing mode, or in the hold/compute mode, this readout transistor 105 behaves like a short circuit because its active region has at least twice the conductivity and a smaller capacitance than the other two transistors.

The invention is based on a device formed by a self-excited single-electron spin electromagnetic field effect transistor with two quantum degrees of freedom, which has two different associated physical quantities, with which it is also possible to determine qubits, i.e. it is possible to use

The change in voltage (or spintronic charge) on the gate electrode of the transistor allows the two quantum states a |0> + b |1> of the qubit to be coherently superimposed or one of them to be written.

In a self-excited electromagnetic transistor, if the active region is doped multi-type nanowire silicon carbide, the measurement of this physical quantity allows the readout of the quantum state, such as the phase difference or the current in the loop formed by the active region.

The two ports of the transistors in such a loop are independent and decouple from the write qubit in the readout of the quantum state. The transistor has various conditions, can maximize the coherence time, and stably operates in the maximized coherence time.

The self-exciting electromagnetic transistor qubit circuit of the invention can also be determined by:

(1) The loop device comprises two active regions connected by a metal silver wire and self-excitation electromagnetic

field effect transistors

101 and 102 with approximate conductivity, which are prepared by deposition of a thermal resistance evaporation process, are shaped into a circular ring or a square ring, so that the loop is named. The loop is constructed in such a way that the circuit configuration allows the transition frequency of the qubit to be adjusted electrically, e.g., by both transistors passing a dc threshold voltage, including a dc gate voltage and a substrate voltage, to be invariant to external parameters and perturbations. They form clockwise and counterclockwise loop currents i in this loop device at room temperature ₀ And i ₁ 。

(2) Two transistors in the loop respectively construct two

gates

121 and 123 of two external power supplies, the two gates are generally the same or close in process parameter, which refers to the gate structure of the field effect transistor and the gate and substrate voltage, and construct a source-drain electrode 124, the two electrodes are combined into one and are shown in fig. 1, and the source-drain electrode of the transistor 105 is not shown and is located on the connecting line of the source-drain electrode of the transistor 105. These circuit configurations allow for accurate tuning of the transition frequency between two states of a qubit, the two gates placing the quantum in a quantum coherent superposition state of the two states during a write phase.

(3) The qubit circuit loop further comprises a third self-energising electromagnetic transistor 105 having a gate electrode Vg3 and source and drain electrodes, not shown, located above the source and drain electrode connections of transistor 105. The conductivity of the nano semiconductor in the active area is more than twice of that of the nano semiconductor in the active area, namely 101 and 102. Its capacitance is larger than the first two in order to keep the transistor in high impedance for the read-out of information, which during the write phase or hold phase operates as an open circuit, while during the phase read-out operation the transistor operates as a threshold detector for reading out the output state.

(4) The qubit also includes a read-out circuit, independent of the write circuit, embodied in a self-exciting electromagnetic transistor loop of the qubit, coupled by a voltage; a current source 125 connected in parallel to the transistor 105 for outputting a quantum state readout, which is used in the readout information operation step, and is operable to apply a pulse current Ib with an adjustable duration pulse width and amplitude; while the integrated operational amplifier 126 device is connected to the circuit for the purpose of detecting the read pulse at both terminals of the read transistor 105 and the phase transition due to the conjugation effect of the qubit states.

(5) The qubit circuit also includes 133 and 135 elements, which may be Electron Spin Resonance (ESR) next to the transistor loop, for applying a magnetic flux phi to the transistor loop, this circuit configuration allowing accurate tuning of the transition frequency f between the two states of the qubit ₀ 。

The whole circuit structure comprising the two transistors needs to be designed symmetrically, and the aim is that when the qubit runs, the circuit can be placed in an induction state to maintain the coherence between the qubits under the condition of meeting the running condition, and the energy of the qubit is not dispersed into the circuit as much as possible to keep the coherent state.

From the foregoing, it is an object of the present invention to maintain coherence of qubits using mutual induction:

1) The relationship of the two transistor dc gate voltages Vg and Vg1 applied to 121,123 and the transition frequencies of the two quantum states for the steady state values of the magnetic flux through the qubit can be adjusted to achieve a uniform stable transition frequency for the system before operation of the qubit and during manipulation of the quantum states.

2) All current flowing in the loop of the actual qubit is eliminated by the specific combination of magnetic flux and current in the read transistor 105 during the write phase (steering the quantum state).

3) The gates are in a spintronic charge biased state by the power supply of the two coupled

gate electrodes

121, 123 applying a gate voltage that is close or equal. The read pulse Ib at a certain moment determines the state of the read circuit, so it is not continuously active.

It can be seen that the gate dc biases Vg and Vg1 actually determine the resonance frequency of the loop formed by the qubits, and therefore the input sequence of resonance voltages u (t) of a certain number and a certain amplitude, which are close to or equal to the resonance frequency, bring the qubit into the coherent superposition state a |0> + b |1> of the two quantum states.

The two

transistors

101 and 102 are constructed in such a way that the concentration of the multi-type mutual embedded doping of the nano silicon carbide in the active area is close to or equal, and the conductivity is between 0.0010 and 300S/cm. Here, the gate electrode construction of each transistor is separated from the nanowire silicon carbide by an insulating dielectric. Belonging to the MOSFET structure. The voltages applied to the two gate electrodes are generally simultaneous and above the threshold and at the system operating point. And the voltage of the source and the drain is gradually increased. Between each transistor gate, the phase difference imposed by the readout current pulse causes a current to flow in a loop of qubits depending on their state.

The conductivities of the two

transistors

101, 102 are as close or equal as possible, with equal and synchronous gate voltages and equal and synchronous source-drain voltages. Together they form a self-exciting electromagnetic transistor loop, the entire assembly forming the actual qubit. In practice, the loop also includes a transistor 105 having a larger impurity concentration and a different gate voltage and source-drain voltage. Its function is to make the read circuit act as a short circuit for the transistor circuit during the non-read period.

From the above, the transition frequency of a qubit depends on external parameters, which can be summarized as the spin-electron charge induced by the bias voltage on the gate and the magnetic flux through the loop. Thus, the spin electron charge noise orMagnetic charge noise tends to cause the transition frequency to change during manipulation of the qubit and thus also induces random phase drift, causing the qubit to decoherently. Therefore, when the system noise and the system stability are examined, the system has the lowest operating points of sensitivity to the noise, namely operating points F1, F2, F3 and F4 (not shown), which are four in total, as shown in the figure after the relation between the system transition frequency and the noise sensitivity is examined. The transition frequency f of the system at this time ₀ And the external parameters are in a steady state. These operating points belong to the preferred points. In the three-dimensional diagram, the lowest operating points are distributed over the saddle points, i.e. the possible operating point of a qubit of the system is located at one of the saddle points. In one case, when the system takes values of Ng =1/4, modulo 1, δ =0, modulo 2 pi, the lowest point takes the value of F1, and within 2 pi F2 and F3, F4 are the peak points thereof. The qubit operating point can be adjusted by the number Ng of charges distributed on the gate capacitance. This involves a problem of the readout and optimization of the quantum bit states. Since the qubit states need to be significantly different at the operating point, the choice is made to ensure that the readout pulse determines the associated state |0 by the magnetic flux of the transistor loop when the system is at the operating point>And |1>Loop current i ₀ And i ₁ . But this condition is limited by a magnetic flux required by the read sequence, in order to compensate the magnetic flux of this corresponding circuit operating point Fi and keep the phase difference to 0, the read current generator sends a non-zero steady-state current; if the system is in a non-readout sequence phase, the current generator emits a steady-state current having an amplitude of about one-tenth of the readout pulse current in the direction of the peak-invariant readout current pulse, the phase shift of the qubit circuit phase difference δ during the readout pulse will be between π/2 and π.

By carefully adjusting the values of Vg, vg1, vds2 to eliminate the phase of the combination of the two transistor ends, no current is generated in the entire loop.

The states to be input or read out of a qubit require recording of a state or a coherent superposition of states, which can be done by a sequence of variable voltages u (t) input on the gate, typically of amplitude and

the coupled spintronic charge of (1/2) is related, here the fractional charge is taken to be 1/2.

Then how are the states of the qubits read out? By using the current source 125 in parallel with the transistor 105 as described above, it generates a pulse Ib as shown in fig. 5. Its intensity and duration are adjustable, typically 0.5us. The two transistors each have an inductance, and have a phase difference of θ 1 and θ 2.

During the occurrence of a pulse Ib, this current source 125 induces a transistor-to-transistor phase difference γ at the terminals of the transistor 105, which phase difference together with the phase difference δ at the terminals of the first two

transistors

101, 102 in the transistor loop, and the magnetic flux Φ through the transistor loop satisfies the equation:

the quantities here are absolute values whose modulus is 2 π, φ ₀ Is a quantum of magnetic flux.

Through the phase test of the system, the phase difference gamma of the operating point Fi undergoes a change in the period of the reading pulse current Ib, which induces the replacement of a phase delta. The phase difference of the readout transistor 105 is about γ = π/2.

The bias current Ib is selected to keep the circuit at a selected operating point when the system is not sensing phase differences. The pulse current needs to be close to the critical current of the readout transistor of transistor 105 when the system is in readout, which is done to be able to measure the transition rates close to 0% and 100% for the two states of the qubit, respectively. Thus, by optimizing the magnetic flux φ coupled to the transistor loop, the circuit is placed in a sense pulse generation and defined period of time, state |0>And state |1>Associated loop current i ₀ And i ₁ The behavior varies, thereby significantly distinguishing the states of the qubits.

Yet another problem is that the transistors decouple the qubits during readout. The structure and dimensions of the readout transistor 105 differ greatly from those of the

transistors

101, 102, and this separation of the eigenfrequency and dimensions of the qubit from the readout transistor already exists. By adding more than one capacitor 136 to the terminals of the readout transistor 105, the read loop is made to have an eigenmode frequency as far away as possible from the eigenfrequency of the actual qubit to prevent relaxation of the qubit towards its fundamental state |0> see fig. 7.

The maintenance of system coherence is one of the requirements of the present invention, and the coherence of qubits is maintained by satisfying 3 conditions:

1) The first condition is to eliminate the effect of noise on the transistor due to spintronic charge on the source and drain. In contrast to the measured transistor spintronic charge mode, selecting transistors with high conductivity active regions can ensure harmonicity of the energy spectrum, make the transition frequency less sensitive to spintronic charge noise, and manipulate the state of the qubit by applying a radio frequency voltage to the gate electrodes of

transistors

101 and 102.

2) The second condition is to limit qubit relaxation. This relaxation helps decoherence when the qubit is placed in the excited state of |1>. This is because a qubit can be de-energized by rapidly transferring energy into the environment, referred to herein as the entire circuit. More particularly, this energy transfer is effected by the

true portions

138 and 161 of equivalent electrical impedance, as shown in FIG. 3. This impedance will not be zero even when it is minimal. In order for this energy transfer to be zero, it is necessary to impose the condition that no current flows in the loop of the qubit. This condition must be satisfied during writing or maintaining the phase difference, regardless of the qubit state, and regardless of the flux being cancelled. By combining the current of the measurement transistor and a magnetic flux through the qubit loop, the phase difference at the end of the combination of the two

transistors

101, 102 of the qubit can be exactly cancelled to satisfy the above condition. This magnetic flux can be ESR, electron spin resonance, deposited on the same substrate, or can be an induction coil.

3) Factors in the circuit that limit decoherence are considered. The qubit stacking state can be represented as:

|ψ(t＝0)>＝|0>+|1>

ideally, at the qubit transition frequency f ₀ Above, component |0 thereof>And |1>Relative phase shift drift occurs, and this state evolves freely according to the following formula:

|ψ(t＝0)>＝|0>+exp(2iπf ₀ )|1>

if the transition frequency f ₀ Influenced by an external parameter, expressed as a general variable x, whose noise can be described by the fluctuation of the transition frequency and, therefore, also by the component |0>And |1>The random error of the relative phase difference drift indicates that this is a decoherence phenomenon. Therefore, when the transition frequency corresponding to the external variable x is stationary, the decoherence is maintained at a minimum value, that is, the following condition is satisfied,

in the present invention, the external parameters of the transition frequency dependent and general variable x are essentially three quantities, namely the gate bias voltage Vg and the substrate bias voltage Vsubstrate applied to the two

transistors

101, 102, where the same voltage is applied, and the gate voltage and the substrate voltage are combined to the threshold voltage V _T It is reasonable to adjust the source-drain voltage Vds and the magnetic flux phi, V through the transistor loop that constitutes the actual qubit as a factor in the generation of the qubit by the circuit _T Vds, and Φ so that the following three conditions are met simultaneously, minimizing decoherence in the superposition state of the qubit:

from a practical point of view, a qubit may be coupled to more than one other qubit that also has a self-exciting electromagnetic double transistor. As shown in fig. 7, the two qubits through which an electromagnetic coupling device 170 couples on the corresponding module should have device structure, source-drain voltage, and conductivity parameters that remain the same or symmetrical. Preferably, this device is a capacitor that couples two

successive qubits

201, 202.

The robustness of the spin current allows its coherence to be maintained to the maximum extent without energy being dissipated into the circuit. A transistor with a thin-film metal strip made of silver connecting the loops is a good choice.

One constraint is that the gate voltage be above a threshold. This is related to the microstructure in the active region of the nanowire heterojunction, which is composed of silicon carbide polytypes embedded in each other. Then what is the reason why the robustness of the qubit is maintained at room temperature? The quantum bit inevitably emits energy to a circuit because the quantum bit is required to exchange energy with the environment, and the reason is complex, and the inventor speculates that a dissipation effect is generated in the dynamic system, namely the dynamic system establishes a mechanism after exceeding a threshold voltage, such as active alternating voltage and magnetic field, and a stable resonance like a spin single electron is generated in the transistor under the action of source and drain voltage. The threshold voltage and the source-drain voltage appear to be the energy sources for maintaining the dissipative effect to date.

The quantum nature of the spin-electron charge of the doped nanowire silicon carbide in the active region of the self-actuating

electromagnetic transistor

101, 102, controlled by the gate voltage, of the insulating layer of the gate, have similar characteristics.

The self-excitation electromagnetic transistor has two characteristics, namely, the doped nanowire silicon carbide, and the nanowire silicon carbide crystal is formed by mutually stacking and embedding doped element rhythm distributed polytypes. The diameter of the nano-wire is limited within 0.5-100 nm, and the length-diameter ratio is larger than 10. The conductivity is between 0.0010 and 300S/cm. This transistor loop is formed by the former and a readout self-energizing electro-magnetic transistor 105 being closed. The latter has a higher conductivity, at least more than twice that of the former, and can be considered as a virtual short for the qubit when the non-measurement step is performed. This is because its active region is more conductive, approaching more than twice as much.

This loop is constrained by an adjustable magnetic flux Φ, which is generated by a current source 135 through a 133 coil. It can also be considered to be generated by a variety of methods, such as permanent magnets placed in the vicinity of the loop, energized coils, or ESR [ electron cyclotron resonance ] fabricated on the same substrate as the qubit. This flux can adjust the operating point, allowing a negative steady state current to be generated in transistor 105 in special cases.

At the same time, the phase difference δ is kept at the preferred value point at the preferred point. This combination of the magnetic flux through the loop and the negative steady state current of the measurement transistor 105 increases the legibility of the 0 and 1 states during readout: this is because the magnitude of the current Ib used in the sensing has to be increased to cause an increase in the switching amplitude of the sense transistor, see fig. 3, causing the substitution of the phase difference during one sensing to tend towards those values, the current difference i in the loop of which ₀ -i ₁ Greater than the difference between zero flux and zero steady state current.

A particular embodiment of the invention is shown in figure 3.

The circuit can be made of any broadband nano semiconductor material, such as nano silicon carbide material, nano gallium nitride, aluminum nitride, diamond, and the like, and in a special case, the circuit is an organic polymer semiconductor. Depositing on the Si/SiO2 substrate by using a vacuum electron beam technology or a PECVD technology. The active regions of the

transistors

101, 102 and 105 are heavily doped metal nano silicon carbide multi-type interdigited crystal lines deposited by PECVD technology, the diameter is 0.5-100 nm, and the length-diameter ratio is more than 10. The nano wires are aligned in parallel and are spaced between 1nm and 120 nm. At least two identical or different polytype mutually embedded silicon carbide crystals grow periodically or non-periodically, and the crystals can be doped in different types of polytype crystals or can be periodically and repeatedly grown along (001) to form a nanowire by the same polytype crystal segment with a certain length of a pure semiconductor. In the example, the 4H-SiC nanowire is doped in the same polytype and different types, 4H-SiC (N)/4H-SiC (B), and the symbols in brackets respectively represent N nitrogen element and boron element. The self-excited single electron spin electromagnetic field effect transistor is configured in this manner.

Another construction process of the self-excited spin single electron electromagnetic field effect transistor is as follows: on an SOI substrate, nanowire silicon carbide is deposited, which is doped with nitrogen (B, boron) and is mutually embedded with a cubic lattice crystal of undoped silicon carbide to form periodical mutual embedding of an N (or P) type semiconductor and a pure semiconductor. The structure is that the unit grows into a multi-type embedded nanowire crystal with 3-15 periods along the [001] direction, so that the nanowire silicon carbide transistor is constructed.

The third nanowire silicon carbide transistor is constructed in the following manner: when the nanowire silicon carbide is doped with N element, the nanowire silicon carbide is simultaneously doped with metal element Yb to form an N vacancy center and form a combined mechanism with the vacancy of the metal Yb.

The concentration of the nanowire doping elements in the active regions of the

transistors

101 and 102 belongs to light doping, and the conductivity is 10-300S/cm under the condition of no grid voltage; while the nanowire silicon carbide multi-type interdigitating crystal of the active region of the transistor 105 is moderately doped, and the conductivity is above 800S/cm under the condition of no grid voltage. Depositing and covering a layer of SiO with the thickness of 100-500 nm on the surface by using an electron beam technology ₂ And etching partial windows of crystals at two ends of the nanowire silicon carbide by adopting a photoetching technology, depositing a palladium metal film, etching the metal films of other parts by adopting a further photoetching technology, and keeping the correct connection of a source electrode and a drain electrode between the transistors to form a transistor loop. The insulating layer is provided with a grid, and the metal and the bare nanowire semiconductor contact two etching windows which are source and drain electrodes; the thickness of the insulating layer between the nanowire and the gate metal film is the same, and then the SiNx film is deposited. The gate, source and drain lead devices are then constructed on top of this to form a transistor qubit read-write loop. Then depositing a permanent magnet film, and connecting a lead with a power supply.

The qubit operating temperature of the invention can still maintain the robustness of the qubit at room temperature of 300K or even higher. But can also operate at low temperature, and the quantum information fidelity is higher.

The bias source Vg of the transistor 110 pair is coupled to a low pass filter 147 and the resistor 132 ensures impedance matching to a 100ohm coaxial cable, the control gate electrode of 110.

The rf source 122 is coupled to an attenuator, a capacitor 143 and a control gate electrode having a resistance matched to 50 ohms and 110 ohms.

The transistor loop, formed by

transistors

101, 102 and readout transistor 105, is filtered by capacitor 136, which allows the frequency of the readout loop to be significantly away from the frequency of the qubit.

Resistor 161 and capacitor 138 are the real and imaginary parts of the qubit seen impedance, respectively. The magnetic flux Φ may be regulated by a variable current source 135 coupled to the coil to apply a uniform magnetic flux to the entire qubit.

In practice, the read current source 125 is composed of a voltage source 155 having an input voltage V, a resistance divider 154 divided by a factor of 200, a low pass filter 152, and a series resistor 151 having a resistance of 3k Ω. Both 50 Ω

resistors

153 and 156 are used to allow the resistive divider 154 to operate and match the lines to a 50 Ω impedance.

Finally, the switching of the readout transistor 105 is detected by a resistor 161, which increases the impedance of the circuit located downstream. The circuit includes a low pass filter 162 and an amplifier 126 having a high input impedance.

FIG. 4 shows a timing diagram for the write signal u (t) in the upper portion, at or near the frequency f ₀ The duration of the pulse sequence of (a) depends on the quantum state to be recorded, and in the lower part, a timing chart for reading the current pulse Ib.

Finally, fig. 6 shows the probability Ps of finding a qubit in the |1> state after two rotation sequences separated by a variable time interval.

It should be understood that parts of the specification not set forth in detail are well within the prior art.

It should be understood that the above description of the preferred embodiments is illustrative, and not restrictive, and that various changes and modifications may be made therein by those skilled in the art without departing from the scope of the invention as defined in the appended claims.

Claims

1. A doped element nanowire polytype mutual-embedding silicon carbide transistor is characterized in that a source-drain I-V curve of the doped element nanowire polytype mutual-embedding silicon carbide transistor presents spin voltage and spin current at room temperature, single electrons in current carriers in the spin current are fractional spintrons, fractional marangoni or fractional weyl electrons, and the spin voltage is represented by the following formula:

Vsp(t)＝Vds(t) (1)

wherein the DC gate bias voltage Vg and the substrate DC bias voltage V are applied when the DC bias gate voltage reaches a threshold value _substrate The voltages cannot be 0 at the same time, and then the source-drain voltage Vds can generate a spin voltage Vsp; because the current in the nanowire is a spin single electron current, it is modulated by a spin voltage, where the spin voltage V is related to the frequency of the transistor I-V resonance by:

wherein e is the charge, h is the Planck constant, V _sp Is a value, V, taken within the maximum value of the spin-generating voltage _sp Is a constant number, V _sp The output characteristics of I-V over time of (1) follow the following equation:

wherein I _sp The maximum spin current passing through the nanowire has an extreme value of nA-pA level, V _sp Is the effective transistor source drain voltage, the gate voltage is at or above the threshold, the voltage for generating the spin electron coherent current, referred to as the spin voltage,

is an initial phase; e is a charge; h is the Planck constant; the current passing through the nanowire is composed of a spin current I _sp Transmission current I _trans And resistance current I _r The components of the composition are as follows,

I＝I _sp +I _trans +I _r (4)

but here when a spin current is present, the transistor active region is suppressed on the nanowire due to a confinement mechanism, the transmission current and the resistance current, and only the spin current is present.

2. The transistor of claim 1, wherein the time-varying current characteristic of the doped-element nanowire polytype interdigitated silicon carbide transistor is described by the equation:

wherein Im is the maximum spin current passing through the nanowire in the active region of the transistor, and the extreme value of Im is 1 pA-100 nA; v _T ＝Vg+V _substrate +Vds；

V _T Is the effective grid voltage Vg, the source-drain voltage Vds and the substrate voltage V above the source-drain voltage and the threshold value _substrate The sum of (1), total voltage, which is a direct current voltage, rather than a function of time, and any one of the variables cannot be zero; phi is a phase angle; e is a charge; h is the Planck constant;

the source-drain current through the nanowire has a relationship to voltage as follows:

where Im is the maximum source-drain current,

it is at V _T Under the effective total voltage, the source-drain voltage Vds generates the maximum value V of the resonant source-drain voltage in the spin electron current _dsmax The variation equivalent increment of the ith in the range belongs to a normalized value, and is also called as effective source-drain voltage; delta V _ds Is the equivalent increment in the effective source-drain voltage range;

V _dsmax ＝cV _T

wherein c is a proportionality coefficient, which is a constant; v _dsmax Following it V _T Increase when V is increased, but when V is increased _T ≥10V，V _dsmax Will reduce the range of the spin electron current which is effectively generated with equal amplitude oscillation;

V _dsmax regulation with c, 0<c<1；

Wherein n is an integer, w _n Angular frequency, V, of transistor source leakage current corresponding to nth source-drain voltage increment in equation (5) _n Is the increment of the nth source-drain voltage, e is the charge, and h is the Planck constant.

3. The transistor of claim 1, wherein the frequency of the electromagnetic wave emitted by the source leakage current of the doped-element nanowire polytype of interdigitated silicon carbide transistors satisfies the relationship:

△V _T the constant 1/2 represents fractional charge and takes the value of 1/2;

4. The transistor of claim 1 having source and drain I-V curves at room temperature above the threshold voltage showing that spintronic formation clockwise and counterclockwise loop currents for each half of a strictly periodic cycle and the currents forming constant amplitude resonance, utilizes this property to construct qubits.