CN108462558A - A kind of polarization code SCL interpretation methods, device and electronic equipment - Google Patents

A kind of polarization code SCL interpretation methods, device and electronic equipment Download PDF

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CN108462558A
CN108462558A CN201810173286.1A CN201810173286A CN108462558A CN 108462558 A CN108462558 A CN 108462558A CN 201810173286 A CN201810173286 A CN 201810173286A CN 108462558 A CN108462558 A CN 108462558A
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path
decoding
candidate
bit
sequence
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CN108462558B (en
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邢莉娟
李卓
魏红丽
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Xidian University
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Xidian University
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0052Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes

Abstract

The embodiment of the invention discloses a kind of polarization code SCL interpretation methods, device and electronic equipments, belong to the channel coding technology field of digital communication, and this method includes:The channel output bit sequence received is initialized;Current bit in bit sequence is exported to the channel and carries out binaryzation bit estimation, estimates to obtain metric according to the bit path candidate is ranked up;It is at war with respectively to the path candidate after the sequence and path length judgement is handled, obtain qualified candidate decoding path;FC verifications are carried out to the qualified candidate decoding path, the maximum decoding path of path selection metric is as decoding result from the candidate decoding path after verification.By the scheme of the application, the performance of decoding is improved.

Description

A kind of polarization code SCL interpretation methods, device and electronic equipment
Technical field
The invention belongs to the channel coding technology field of digital communication, more particularly to Fletcher is based in a kind of polarization code The SCL decoding algorithms examined and assisted.
Background technology
Polarization code (Polar Codes) is that E.Arikan was proposed in 2009 based on channel-polarization phenomenon, for arbitrary Given symmetric binary input discrete memoryless channel(DMC) (Binary-input Discrete Memoryless Channel, B-DMC), in the case where serially offsetting (Successive Cancellation, SC) decoding algorithm, it is that the first is mathematically tight Lattice prove the channel coding schemes for reaching shannon capacity, are an important breakthroughs of field of channel coding.Due to its uniqueness Algebraic Structure and lower encoding and decoding complexity, it becomes letter once proposing in the communications field to produce strong influence One of the research hotspot of road coding field in recent years.In November, 2016, in international wireless standard mechanism third generation affiliate In the 87th meeting of RAN1 for planning (3GPP), the polarization code scheme that Huawei promotes mainly becomes the 5th third-generation mobile communication technology (5G) enhances the encoding scheme of control channel under mobile broadband (Enhance Mobile Broadband, eMBB) scene.
SC decoding algorithms are a kind of Depth Priority Algorithms, are the algorithms based on local optimum, however, in limited code length Under, the performance of the SC decoding algorithms of polarization code is unsatisfactory.As the improvement of SC decoding algorithms, list is serially offset (Successive Cancellation List, SCL) decoding algorithm is suggested, and decoding performance is close to maximum likelihood (Maximum Likelihood, ML) is decoded.In order to further enhance the decoding performance of polarization code, Ido Tal et al. will be recycled Redundancy check (Cyclic Redundancy Check, CRC) is used in SCL decoding algorithms (SCL-CRC), in coding side, to original Beginning information sequence carries out CRC and encodes to obtain CRC check sequence, and by sacrificing multi-bit information position, CRC check sequence is attached to original The end of beginning information sequence, the two form source information sequence inputting encoder and carry out polarization code coding;At decoding end, first carry out SCL is decoded, and when SCL decodings proceed to final stage, is carried out CRC check to L item candidate's decoding paths, will not passed through the schools CRC The path tested directly filters out, and then selects metric maximum one from all candidate decoding paths for meeting CRC check again Paths are as decoding result.In worst case, i.e., L items decode path candidate all not over CRC check, then from L items The maximum paths of metric are selected in candidate decoding path as decoding as a result, under specific code length and code check, are decoded Performance be even more than some low density parity check codes (Low-density Parity-check Codes, LDPC) with Turbo code.
In consideration of it, the application proposes a kind of new polarization code SCL decoding schemes.
Invention content
In view of this, an embodiment of the present invention provides a kind of polarization code SCL interpretation methods, device and electronic equipments, at least Partial solution problems of the prior art.
In a first aspect, an embodiment of the present invention provides a kind of polarization code SCL interpretation methods, including:
The channel output bit sequence received is initialized;
Current bit in bit sequence is exported to the channel and carries out binaryzation bit estimation, is estimated according to the bit Metric is obtained to be ranked up path candidate;
It is at war with respectively to the path candidate after the sequence and path length judgement is handled, obtain qualified time Select decoding path;
FC verifications are carried out to the qualified candidate decoding path, road is chosen from the candidate decoding path after verification The maximum decoding path of diameter metric is as decoding result.
A kind of concrete methods of realizing according to the ... of the embodiment of the present invention carries out the channel output bit sequence received initial Change, including:
It receives channel and exports bit sequenceThe transition probability of each bit is W (yi| xi);
The value for the number of passes L that setting decoding retains in the process, and initial path is set to dead circuit diameter.
A kind of concrete methods of realizing according to the ... of the embodiment of the present invention, it is described to the channel export bit sequence in it is current Bit carries out binaryzation bit estimation, including:
Calculate separately out the probability that current bit value is 0 and 1:With
If current bit is fixed bit,Otherwise path metric value is updated, current every path candidate is pressed Bit 0 or 1 is extended.
A kind of concrete methods of realizing according to the ... of the embodiment of the present invention, the path candidate to after the sequence carry out respectively Competition and path length judgement processing, including:
Current candidate number of passes is counted, if current candidate number of passes is less than L, current path is remained, Otherwise, retain the maximum L path candidate of path metric value in current layer, delete remaining path.
A kind of concrete methods of realizing according to the ... of the embodiment of the present invention, the path candidate to after the sequence carry out respectively Competition and path length judgement processing, including:
Judge whether current each path candidate length reaches code length N, if being equal to N, carry out FC verifications, otherwise, continue into Row bit is estimated.
A kind of concrete methods of realizing according to the ... of the embodiment of the present invention, it is described to the qualified candidate decoding path into Row FC verifications, including:
The k long raw informations estimated sequence and h long taken out respectively in candidate decoding path verifies estimated sequence, is calculated using FC Method recalculates k long raw information estimated sequences to obtain new h long verification sequences, compares h long verification estimated sequences and new h Whether long verification sequence is identical, if identical, then it is assumed that current bit estimated sequence has passed through FC verifications, otherwise, does not pass through the schools FC It tests.
A kind of concrete methods of realizing according to the ... of the embodiment of the present invention, the method further include:
If L item candidate's decoding paths are all verified not over FC, path metric is selected from L item candidate's decoding paths It is worth a maximum paths as decoding result.
Second aspect, the embodiment of the present invention additionally provide a kind of polarization code SCL code translators, including:
Initialization module is initialized for the channel output bit sequence to receiving;
Estimation module, the current bit for being exported to the channel in bit sequence carry out binaryzation bit estimation, root Estimate to obtain metric according to the bit and path candidate is ranked up;
Judgment module, for be at war with respectively to the path candidate after the sequence and path length judgement processing, obtain To qualified candidate decoding path;
Processing module is translated for carrying out FC verifications to the qualified candidate decoding path from the candidate after verification The maximum decoding path of path selection metric is as decoding result in code path.
The third aspect, the embodiment of the present invention additionally provide a kind of electronic equipment, and the electronic equipment includes:
At least one processor;And
The memory being connect at least one processor communication;Wherein,
The memory is stored with the instruction that can be executed by least one processor, and described instruction is by described at least one A processor executes, so that at least one processor is able to carry out any realization of aforementioned first aspect and first aspect Polarization code SCL interpretation methods described in mode.
Polarization code SCL interpretation methods provided in an embodiment of the present invention, device, electronic equipment add during SCL decodings Auxiliary examination code promotes the error-correcting performance of polarization code SCL decoding algorithms, not only greatly improves polarization code SCL decoding algorithms Frame error rate performance, wherein being 10 in frame error rate-3When, SCL-FC decoding algorithms improve about 0.7dB relative to SCL decoding algorithms Gain;And compared to the SCL-CRC decoding algorithms based on same thought, while reaching same decoding performance, FC algorithm operations are simple, and the time complexity ratio CRC for generating the verification sequence of equal length is low.
Description of the drawings
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to needed in the embodiment attached Figure is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for this field For those of ordinary skill, without creative efforts, other attached drawings are can also be obtained according to these attached drawings:
The route searching figure of polarization code SC decoding algorithms when Fig. 1 is N=3 provided in an embodiment of the present invention;
Fig. 2 is N=3 provided in an embodiment of the present invention, the route searching figure of polarization code SCL decoding algorithms when L=2;
Fig. 3 is the polarization code communication plan operating process side provided in an embodiment of the present invention using SCL-CRC decoding algorithms Block diagram;
Fig. 4 is that SCL-CRC provided in an embodiment of the present invention decodes process flow diagram flow chart;
Fig. 5 is the polarization code communication plan operating process box provided in an embodiment of the present invention using SCL-FC decoding algorithms Figure;
Fig. 6 is that SCL-FC provided in an embodiment of the present invention decodes process flow diagram flow chart.
Specific implementation mode
The embodiment of the present invention is described in detail below in conjunction with the accompanying drawings.
It will be appreciated that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Base Embodiment in the present invention, those of ordinary skill in the art obtained without creative efforts it is all its Its embodiment, shall fall within the protection scope of the present invention.
Fletcher is verified and (Fletcher Checksum, FC) algorithm is sharp in nineteen eighty-two by John G.Fletcher With a kind of arithmetic code error detection algorithm for operand lower than CRC check algorithm that summation technology proposes, it is the one of checksum algorithm Kind, it is the improvement of Internet protocol (IPv4) stem checksum algorithm.Brief introduction below its in data communication field be used for mistake The basic principle of detection.In transmitting terminal, first k original binary information sequences are carried out that h (h are calculated using FC algorithms For even number) bit check sequence, the end that verification sequence is attached to original binary information sequence sends jointly to receiving terminal, connects Receiving end recalculates verification sequence to the binary information sequence received and compared with the verification sequence received, if the two phase Together, then it is assumed that information transmission is correct, and otherwise, mistake occurs in information transmission.Wherein, the h bit check sequences being calculated by FC algorithms Row are made of sum1 and sum2 two parts that length is h/2, and the specific calculating process of sum1 and sum2 are as follows:
It is (when m is not integer, then last in original information sequence to be divided into m by the first step for k binary information sequences 0 is mended, it is integer to make m) block, it is denoted as S respectively0, S1..., Sm-1, every piece contains h/2 binary messages, by sum1's and sum2 Initial value is set as identical given value (0 is set as in the application).
Second step, using 1 radix-minus-one complement operation (i.e. during binary addition operation, when a high position generate spilling when, will be high-order Add to low level) sum1 and sum2 is calculated, calculation formula is as follows:
H bit check sequences are the combination of sum1 and sum2, i.e., sum2 are attached to the ends sum1.
Decoding architecture based on SCL-CRC, the application replace CRC algorithm to carry out auxiliary examination using FC algorithms, it is proposed that The polarization code SCL decoding algorithms (SCL-FC) of FC auxiliary, this method not only greatly improve the mistake frame of polarization code SCL decoding algorithms Rate performance, and compared to SCL-CRC decoding algorithms, while having reached same decoding performance, the operation letter of FC algorithms Single, the time complexity for generating the verification sequence of equal length is lower than CRC algorithm.
Polarization code is proposed based on channel-polarization phenomenon, and channel-polarization is divided into channel combination and detaches two mistakes with channel Journey, when combined channel quantity tends to infinity, by polarization, a part of channel becomes fine, is intended to noiseless channel, uses These transmission useful informations, another part channel become very poor, are intended to pure noisy communication channel, are received and dispatched with these transmissions Fix information known to Fang Jun.It following is a brief introduction of the Polarization Coding process of polarization code.
If a symmetrical B-DMC W is defined as:X → Y, X are incoming symbol collection, and Y is output symbol collection, and W (y | x) is channel Transition probability, wherein x ∈ X, y ∈ Y, X ∈ { 0,1 },If polarization code code length is N=2n(n is natural number), information Bit length is K, and fixed bit length is N-K, is combined by N number of W channels, obtains aggregate channel vector WN, channel transition probability For:
Here, W (yi|xi) be i-th of bit channel transition probability,For source bit Sequence,For sequences of code bits,Bit sequence is exported for channel Row, whereinAndWithThere is following relationship:
Here,It is the reversible generator matrix that a size is N × N-dimensional, wherein
It is expressed as gram product in the n Velcros of a matrix, BNFor bit sequence flip matrix.It detaches, obtains by channel To N number of different polarization subchannel, it is denoted asPolaron channel transition probability is:
Wherein It isSubvector.
In all polarization subchannelsIn, select K most reliable subchannel transmission information bit sequences It is information bit set,Remaining N-K unreliable subchannel transmission fixed bit sequences It is fixed bit set, isSupplementary set, andIt is known to transmitting-receiving side, information and receiving terminal is sent in transmitting terminal When restoring information,It is set as fixed value, is typically set to 0.
It is exactly basis to decode the work to be doneObtain source bit sequenceEstimation bit sequencePolarization code can be by SC decoding algorithms into row decoding, and SC decoding algorithms have lower Decoding complexity O (NlogN), but the algorithm is sequential decoding, when a bit is by mistake in judgment, the decoding in face behind It is impossible to correct this mistake in the process.WhenWhen, thenOtherwise, coding guideline is as follows:
SC decodings process can be regarded as the process in the enterprising walking along the street path search of code tree, defines and is opened from root node on decoding tree Begin to theiLayer decoding path bePath metric value is that the path exists TheiLayerValue be 0 or 1 probability beOrFrom root section Point starts, and calculates the metric for two decoding paths that descendant node is expanded successively, retains one of metric greatly every time Path, if toiWhen layer is extended,Path metric value is not calculated then, directly willValue be judged to 0.On It states path search process successively to carry out, searches for and terminate when encountering leaf node, the searching route finally obtained is to decode As a result, i.e.Fig. 1 is the route searching illustrated example of SC decoding algorithms.
SC decoding algorithms may lose the paths ML during Path extension, in order to reduce the possibility for losing correct code word Property, it is proposed that SCL decoding algorithms.The algorithm is a kind of innovatory algorithm of SC decoding algorithms, is different from SC decoding algorithms each Only retain a paths when layer Path extension, SCL decoding algorithms at most retain L path candidate, and wherein L is one just whole Number.During SCL decodings, each information bitTwo path candidates will be retained, i.e.,WithNumber of path It can double.There are one the upper limit, most L items for number of path.When number of path is not more than L, number of path can be doubled constantly;Work as number of path When more than L, trimming path operation will be carried out, only retains the maximum preceding L paths of metric, remaining path is deleted.Decoding At the end of, just select the conduct of a metric maximum path to decode as a result, SCL decoding complexities are O from L paths (LNlogN).As L=1.It is SC decoding algorithms that SCL decoding algorithms, which are just degenerated,.Fig. 2 is the route searching figure of SCL decoding algorithms Example.
During SCL is decoded, the metric of correct path is not necessarily the largest always, therefore is decoded and carried out in SCL When to a last bit, the maximum path of selectance magnitude can also cause decoding error as output on certain probability.Cause This, can be by CRC in SCL decoding algorithms (SCL-CRC), it to be a kind of improvement of SCL decoding algorithms, good using CRC Error detection capabilities, so that this algorithm is obtained more preferably decoding performance.In coding side, k original information sequences are carried out CRC encodes to obtain h CRC check sequences, and by sacrificing h information bits, CRC check sequence is attached to original information sequence End, the two form K source information sequence inputting encoders and carry out polarization code coding;At decoding end, SCL decodings are first carried out, when When SCL decodings proceed to final stage, CRC check is carried out to L item candidate's decoding paths, the path not by CRC check is straight It takes over and filters, then select the maximum paths conduct of metric from all candidate decoding paths for meeting CRC check again Decode result.In worst case, i.e., L items decode path candidate all not over CRC check then from L item candidate's decoding paths In select the maximum paths of metric as decoding result.The polarization using SCL-CRC decoding algorithms is provided first below Then code communication scheme a block diagram of the operation flow is as shown in figure 3, provide the flow chart of SCL-CRC decoding processes, as shown in Figure 4.
SCL-CRC decoding algorithms are as follows:
(I) it inputs:It receives channel and exports bit sequenceThe transition probability of each bit For W (yi|xi)。
(II) it initializes:The value for the number of passes L that setting decoding retains in the process, and initial path is set to dead circuit diameter.
(III) bit is estimated:Current every path candidate is extended by bit 0 or 1, if current bit is fixed ratio Spy, thenOtherwise path metric value is updated, that is, calculates separately out the probability that current bit value is 0 and 1:WithPath candidate is sorted by metric.
(IV) it competes:Current candidate number of passes is counted, it is if current candidate number of passes is less than L, current path is equal It remains;Otherwise retain the maximum L path candidate of path metric value in current layer, delete remaining path.
(V) judge path length:Judge whether current each path candidate length reaches code length N, if being equal to N, goes to (VI);Otherwise, it goes to (III).
(VI) CRC check:CRC check is carried out to each candidate decoding path one by one by output sequence.
(VII) it adjudicates:Maximum one of path metric value is selected from all candidate decoding paths by CRC check to translate Code path is as decoding result.If L item candidates decoding path is all not over CRC check, from L item candidate's decoding paths The maximum paths of path metric value are selected as decoding result.
For the long polarization code of middle short code using SCL decoding algorithms, still there are larger with shannon limit for error-correcting performance Gap, and this gap can not individually be made up from increase number of paths, accordingly, it is considered to be added during SCL decodings Auxiliary examination code, to promote the error-correcting performance of polarization code SCL decoding algorithms, but SCL-CRC decoding algorithms are in polarization precoding Stage first carries out CRC codings before Polarization Coding and decoding final stage carries out having used CRC algorithm in CRC check, And CRC algorithm is to be based on polynomial division operation of the coefficient on GF (2), operation is complicated, and time complexity is high.To understand The certainly above problem, the application have used FC algorithms to replace CRC algorithm, it is proposed that SCL-FC decoding algorithms, the decoding algorithm is not only Greatly improve the frame error rate performance of polarization code SCL decoding algorithms, and compared to SCL-CRC decoding algorithms, reach and its While identical decoding performance, since FC algorithms are based on simple integer summation operation, operation is simple, generates equal length Verification sequence time complexity it is lower than CRC algorithm.
Using SCL-FC decoding algorithms, in coding side, FC codings are carried out first, that is, use FC algorithms to k raw informations Sequence carries out that h FC verification sequences are calculated, and by sacrificing h information bits, FC verification sequences are attached to raw information sequence Both then the end of row forms K source information sequence inputting encoders progress polarization code codings;At decoding end, SCL is first carried out Decoding carries out FC verifications, the road that will do not verified by FC when SCL decodings proceed to final stage to L item candidate's decoding paths It takes over and filters straight, then select the maximum paths of metric from all candidate decoding paths verified by FC again and make To decode result.In worst case, i.e., L items decoding path candidate is all verified not over FC, then decodes road from L item candidates The maximum paths of metric are selected in diameter as decoding result.It is grasped using the polarization code communication plan of SCL-FC decoding algorithms Make flow diagram as shown in figure 5, SCL-FC decoding flow charts are as shown in Figure 6.
SCL-FC decoding algorithms are as follows:
(I) it inputs:It receives channel and exports bit sequenceThe transition probability of each bit is W (yi|xi)。
(II) it initializes:The value for the number of passes L that setting decoding retains in the process, and initial path is set to dead circuit diameter.
(III) bit is estimated:Current every path candidate is extended by bit 0 or 1.If current bit is fixed ratio Spy, thenOtherwise path metric value is updated, that is, calculates separately out the probability that current bit value is 0 and 1:WithPath candidate is sorted by metric.
(IV) it competes:Current candidate number of passes is counted, it is if current candidate number of passes is less than L, current path is equal It remains;Otherwise, retain the maximum L path candidate of path metric value in current layer, delete remaining path.
(V) judge path length:Judge whether current each path candidate length reaches code length N, if being equal to N, goes to (VI);Otherwise, it goes to (III).
(VI) FC is verified:FC verifications are carried out to each candidate decoding path one by one by output sequence.Every candidate decoding path FC checking procedures it is as follows:The k long raw informations estimated sequence and h long verification estimation sequences in candidate decoding path are taken out respectively Row, recalculate k long raw information estimated sequences using FC algorithms to obtain new h long verification sequences, compare h long verification estimations Whether sequence and new h long verification sequences are identical, if identical, then it is assumed that and current bit estimated sequence has passed through FC verifications, otherwise, It is not verified by FC, FC will not passed through.
(VII) it adjudicates:Maximum one of path metric value is selected from all candidate decoding paths verified by FC to translate Code path is as decoding result.If L item candidate's decoding paths are all verified not over FC, from L item candidate's decoding paths The maximum paths of path metric value are selected as decoding result.
By experiment test it is found that SCL-FC decoding algorithms greatly improve the frame error rate of polarization code SCL decoding algorithms Can, it is 10 in frame error rate-3When, SCL-FC decoding algorithms improve the gain of about 0.7dB relative to SCL decoding algorithms;And The performance of SCL-FC decoding algorithms is almost the same with the performance of SCL-CRC decoding algorithms.
During SCL-FC and SCL-CRC is decoded, FC algorithms and CRC algorithm act only on k long messages position bit, in order to More intuitively the complexity difference of both analyses, cbr (constant bit rate) R=0.5 are described using the code length N of polarization code instead of k.If raw At h bit check bits, then FC algorithms are based on simple integer summation operation, and time complexity is O (N);CRC decoding algorithms It is to be based on polynomial division operation of the coefficient on GF (2), time complexity is O (hN).Extra factor h has no effect on FC algorithms Time complexity, therefore FC algorithms are lower than the time complexity of CRC algorithm.
It should be noted that in the present invention, relational terms such as first and second and the like are used merely to one Entity or operation are distinguished with another entity or operation, without necessarily requiring or implying between these entities or operation There are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant are intended to contain Lid non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those Element, but also include other elements that are not explicitly listed, or further include for this process, method, article or equipment Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that There is also other identical elements in process, method, article or equipment including the element.
Each embodiment in this specification is all made of relevant mode and describes, identical similar portion between each embodiment Point just to refer each other, and each embodiment focuses on the differences from other embodiments.
For device embodiment, since it is substantially similar to the method embodiment, so the comparison of description is simple Single, the relevent part can refer to the partial explaination of embodiments of method.
Expression or logic and/or step described otherwise above herein in flow charts, for example, being considered use In the order list for the executable instruction for realizing logic function, may be embodied in any computer-readable medium, for Instruction execution system, device or equipment (system of such as computer based system including processor or other can be held from instruction The instruction fetch of row system, device or equipment and the system executed instruction) it uses, or combine these instruction execution systems, device or set It is standby and use.For the purpose of this specification, " computer-readable medium " can any can be included, store, communicating, propagating or passing Defeated program is for instruction execution system, device or equipment or the dress used in conjunction with these instruction execution systems, device or equipment It sets.The more specific example (non-exhaustive list) of computer-readable medium includes following:Electricity with one or more wiring Interconnecting piece (electronic device), portable computer diskette box (magnetic device), random access memory (RAM), read-only memory (ROM), erasable edit read-only storage (EPROM or flash memory), fiber device and portable optic disk is read-only deposits Reservoir (CDROM).In addition, computer-readable medium can even is that the paper that can print described program on it or other are suitable Medium, because can be for example by carrying out optical scanner to paper or other media, then into edlin, interpretation or when necessary with it His suitable method is handled electronically to obtain described program, is then stored in computer storage.
It should be appreciated that each section of the present invention can be realized with hardware, software, firmware or combination thereof.
In the above-described embodiment, multiple steps or method can use storage in memory and by suitable instruction execution The software or firmware that system executes are realized.For example, if realized with hardware, in another embodiment, can use Any one of following technology well known in the art or their combination are realized:With for realizing logic work(to data-signal The discrete logic of the logic gates of energy, the application-specific integrated circuit with suitable combinational logic gate circuit, programmable gate Array (PGA), field programmable gate array (FPGA) etc..
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any Those familiar with the art in the technical scope disclosed by the present invention, all answer by the change or replacement that can be readily occurred in It is included within the scope of the present invention.Therefore, protection scope of the present invention should be subject to the protection scope in claims.

Claims (9)

1. a kind of polarization code SCL interpretation methods, which is characterized in that including:
The channel output bit sequence received is initialized;
Current bit in bit sequence is exported to the channel and carries out binaryzation bit estimation, estimates to obtain according to the bit Metric is ranked up path candidate;
It is at war with respectively to the path candidate after the sequence and path length judgement is handled, obtain qualified candidate and translate Code path;
FC verifications, the path selection degree from the candidate decoding path after verification are carried out to the qualified candidate decoding path The maximum decoding path of magnitude is as decoding result.
2. polarization code SCL interpretation methods according to claim 1, which is characterized in that it is preferred, it is defeated to the channel received Go out bit sequence to be initialized, including:
It receives channel and exports bit sequenceThe transition probability of each bit is W (yi|xi);
The value for the number of passes L that setting decoding retains in the process, and initial path is set to dead circuit diameter.
3. polarization code SCL interpretation methods according to claim 1, which is characterized in that described to export bit to the channel Current bit in sequence carries out binaryzation bit estimation, including:
Calculate separately out the probability that current bit value is 0 and 1:With
If current bit is fixed bit,Otherwise path metric value is updated, current every path candidate is pressed into bit 0 Or 1 be extended.
4. polarization code SCL interpretation methods according to claim 3, which is characterized in that the candidate to after the sequence Path is at war with respectively to be handled with path length judgement, including:
Current candidate number of passes is counted, if current candidate number of passes is less than L, current path is remained, otherwise, Retain the maximum L path candidate of path metric value in current layer, deletes remaining path.
5. polarization code SCL interpretation methods according to claim 3, which is characterized in that the candidate to after the sequence Path is at war with respectively to be handled with path length judgement, including:
Judge whether current each path candidate length reaches code length N, if being equal to N, carries out FC verifications, otherwise, continue to compare Spy's estimation.
6. polarization code SCL interpretation methods according to claim 3, which is characterized in that described to the qualified time Decoding path is selected to carry out FC verifications, including:
The k long raw informations estimated sequence and h long taken out respectively in candidate decoding path verifies estimated sequence, uses FC algorithms pair K long raw information estimated sequences recalculate to obtain new h long verification sequences, compare h long verification estimated sequences and the schools new h long Whether identical sequence is tested, if identical, then it is assumed that current bit estimated sequence has passed through FC verifications, otherwise, is not verified by FC.
7. polarization code SCL interpretation methods according to claim 6, which is characterized in that the method further includes:
If L item candidate's decoding paths are all verified not over FC, path metric value is selected most from L item candidate's decoding paths A big paths are as decoding result.
8. a kind of polarization code SCL code translators, which is characterized in that including:
Initialization module is initialized for the channel output bit sequence to receiving;
Estimation module, the current bit for being exported to the channel in bit sequence carries out binaryzation bit estimation, according to institute It states bit and estimates to obtain metric and path candidate is ranked up;
Judgment module, for be at war with respectively to the path candidate after the sequence and path length judgement processing, accorded with The candidate decoding path of conjunction condition;
Processing module, for carrying out FC verifications to the qualified candidate decoding path, from the candidate decoding road after verification The maximum decoding path of path selection metric is as decoding result in diameter.
9. a kind of electronic equipment, which is characterized in that the electronic equipment includes:
At least one processor;And
The memory being connect at least one processor communication;Wherein,
The memory is stored with the instruction that can be executed by least one processor, and described instruction is by least one place It manages device to execute, so that at least one processor is able to carry out the polarization code SCL decodings described in aforementioned any claim 1-7 Method.
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