CN108461504A - Domain structure, pixel-driving circuit, array substrate and the display device of transistor - Google Patents
Domain structure, pixel-driving circuit, array substrate and the display device of transistor Download PDFInfo
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- CN108461504A CN108461504A CN201710095713.4A CN201710095713A CN108461504A CN 108461504 A CN108461504 A CN 108461504A CN 201710095713 A CN201710095713 A CN 201710095713A CN 108461504 A CN108461504 A CN 108461504A
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- 239000000758 substrate Substances 0.000 title claims abstract description 13
- 238000000034 method Methods 0.000 description 13
- 230000008021 deposition Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 229920001621 AMOLED Polymers 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Theoretical Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention discloses a kind of domain structure of transistor, pixel-driving circuit, array substrate and display device, which includes circuit node and the active layer that is connect with circuit node；Active layer includes the first active layer, the second active layer and third active layer；The first source electrode being connected with the first active layer, the drain electrode being connected with the second active layer, the second source electrode being connected with third active layer；First grid corresponding with the first active layer, the second active layer and third active layer, second grid and third grid respectively；The gate pattern of first grid, second grid and third grid composition is located at the top of circuit node and active layer.The embodiment of the present invention, the grid of three transistors forms the same figure, the circuit node that the drain electrode of two transistors and the source electrode of third transistor are joined together to form is located under gate patterns, the chip area of three transistors can be reduced by this design, layout design difficulty is reduced, application range is improved.
Description
Technical field
The present invention relates to display technology field more particularly to a kind of domain structure of transistor, pixel-driving circuit, arrays
Substrate and display device.
Background technology
Active matrix organic light-emitting diode (Active Matrix/Organic Light Emitting Diode,
AMOLED) display is one of the hot spot when display research field.Compared with liquid crystal display, Organic Light Emitting Diode
(Organic Light Emitting Diode, OLED) has low low energy consumption, production cost, self-luminous, wide viewing angle and response
The advantages that speed is fast.
In the implementation of the present invention, inventor has found that the prior art has the following problems：AMOLED is shown and is produced
Product, the driving thin film transistor (TFT) quantity in pixel-driving circuit is more, and area occupied or space are bigger in layout design, influences
The product design of high pixel density (Pixels Per Inch, PPI).
Invention content
It is a primary object of the present invention to propose a kind of domain structure of transistor, pixel-driving circuit, array substrate and
Display device, it is intended to solve the problems, such as of the existing technology.
To achieve the above object, first aspect of the embodiment of the present invention provides a kind of domain structure of transistor, the domain
Structure includes circuit node and the active layer that is connect with the circuit node；The active layer includes the first active layer, second
Active layer and third active layer；
The first source electrode being connected with first active layer, the drain electrode being connected with second active layer, with the third
The second connected source electrode of active layer；
Respectively first grid corresponding with first active layer, the second active layer and third active layer, second grid and
Third grid；The gate pattern of the first grid, second grid and third grid composition is located at the circuit node and institute
State the top of active layer.
In conjunction with the embodiment of the present invention in a first aspect, in the first realization method of the first aspect of the embodiment of the present invention,
First active layer and third active layer constitute inverse u shape structure；Second active layer constitutes inverted "L" shape structure.
In conjunction with the embodiment of the present invention in a first aspect, in second of realization method of the first aspect of the embodiment of the present invention,
First active layer and the second active layer are constitutedType structure；The third active layer constitutes inverted "L" shape structure.
In conjunction with the embodiment of the present invention in a first aspect, in the third realization method of the first aspect of the embodiment of the present invention,
First active layer and the second active layer constitute " n " type structure；The third active layer constitutes inverted "L" shape structure.
In conjunction with the embodiment of the present invention in a first aspect, in the 4th kind of realization method of the first aspect of the embodiment of the present invention,
The gate pattern of the first grid, second grid and third grid composition is square shape or polygon.
5th kind of realization method of the first aspect of the embodiment of the present invention, in conjunction with the of the first aspect of the embodiment of the present invention
Four kinds of realization methods, the square shape include square or rectangle.
In addition, to achieve the above object, second aspect of the embodiment of the present invention provides a kind of pixel-driving circuit, the pixel
Driving circuit includes the first driving transistor, the second driving transistor and first switch transistor；First driving transistor,
The domain structure that second driving transistor and first switch transistor are constituted is above-mentioned domain structure.
In conjunction with the second aspect of the embodiment of the present invention, in the first realization method of the second aspect of the embodiment of the present invention,
The breadth length ratio W1/L1 of first driving transistor, the breadth length ratio W2/L2 of second driving transistor, the first switch
The breadth length ratio W3/L3 of transistor meets following relationship：
W1=W2=W3, L1/L2=1, L3<L2；Or
W1=W2=W3, L1/L2>1, L3<L2；Or
W1=W2=W3, L1/L2<1, L3<L2；Or
W1=W2<W3, L1/L2=1 or L1/L2>1 or L1/L2<1, L3<L2；Or
W1=W2>W3, L1/L2=1 or L1/L2>1 or L1/L2<1, L3<L2.
In addition, to achieve the above object, the third aspect of the embodiment of the present invention provides a kind of array substrate, including above-mentioned picture
Plain driving circuit.
Furthermore to achieve the above object, fourth aspect of the embodiment of the present invention provides a kind of display device, and described device includes
Above-mentioned array substrate.
Domain structure, pixel-driving circuit, array substrate and the display device of transistor provided in an embodiment of the present invention, three
The grid of a transistor forms the same figure, and the drain electrode of two transistors and the source electrode of third transistor link together shape
At circuit node be located under gate patterns, can reduce the chip area of three transistors by this design, reduce version
G- Design difficulty improves application range.
Description of the drawings
Fig. 1 is the domain structure schematic diagram of the transistor of the embodiment of the present invention；
Fig. 2 is another schematic diagram of domain structure of the transistor of the embodiment of the present invention；
Fig. 3 is the another schematic diagram of domain structure of the transistor of the embodiment of the present invention；
Fig. 4 is the structural schematic diagram of the pixel-driving circuit of the domain structure using transistor of the embodiment of the present invention.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific implementation mode
It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
The each embodiment of the present invention is realized in description with reference to the drawings, in subsequent description, using for indicating
The suffix of such as " module ", " component " or " unit " of element is only for being conducive to the explanation of the present invention, and there is no special for itself
Fixed meaning.
The switching transistor and driving transistor used in all embodiments of the invention all can be thin film transistor (TFT) or field
Effect pipe or the identical device of other characteristics, since the source electrode of the switching transistor used here, drain electrode are symmetrical, so its
Source electrode, drain electrode can be interchanged.It in embodiments of the present invention, will wherein one to distinguish the two poles of the earth in addition to grid of transistor
Pole is known as source electrode, and another pole is known as draining.Provide that the control terminal of transistor is grid, first end is source by the form in attached drawing
Pole, second end are drain electrode.In addition switching transistor used by the embodiment of the present invention includes p-type switching transistor and N-type switch
Two kinds of transistor, wherein p-type switching transistor is connected when grid is low level, ends when grid is high level, N-type is opened
It is to be connected when grid is high level to close transistor, is ended when grid is low level.
It should be noted that all P-channel types of the switching transistor and driving transistor of pixel-driving circuit in attached drawing
Transistor, those skilled in the art are easy to show that pixel-driving circuit provided by the present invention can be all instead easily
The pixel-driving circuit of N-channel transistor npn npn.
As shown in Figure 1, first embodiment of the invention proposes that a kind of domain structure of transistor, the domain structure include circuit
Node 10 and the active layer being connect with circuit node 10.
In the present embodiment, active layer includes the first active layer 21, the second active layer 22 and third active layer 23.
Shown in please referring to Fig.1, in a kind of possible embodiment, the first active layer 21 and third active layer 23 constitute
U-typed structure；Second active layer 22 constitutes inverted "L" shape structure.
Shown in please referring to Fig.2, in alternatively possible embodiment, the first active layer 21 and the second active layer 22 are constitutedType structure；Third active layer 23 constitutes inverted "L" shape structure.
Shown in please referring to Fig.3, in alternatively possible embodiment, the first active layer 21 and the second active layer 22 are constituted
" n " type structure；Third active layer 23 constitutes inverted "L" shape structure.
It is the first source electrode 31 to be connected with the first active layer 21, and it is drain electrode 32 to be connected with the second active layer 22, with third
It is the second source electrode 33 that active layer 23, which is connected,.
Further include first grid corresponding with the first active layer 21, the second active layer 22 and third active layer 23, respectively
Two grids and third grid (not shown)；The gate pattern 40 of first grid, second grid and third grid composition
In the top of circuit node 10 and active layer.
It please refers to Fig.1 shown in-Fig. 3, in the present embodiment, 40 substantially square shape of gate pattern, such as square or long
It is rectangular；Gate pattern may be polygon, i.e., four or more line segment head and the tail are sequentially connected with formed planar graph.
It refer again to shown in Fig. 1, be channel region by the active layer that gate pattern 40 covers, the first active layer 21 is by grid
The active layer 211 (dotted line frame in figure) that pattern 40 covers is the first raceway groove, and the second active layer 22 is had by what gate pattern 40 covered
Active layer 221 (dotted line frame in figure) is the second raceway groove, and the active layer 231 that third active layer 23 is covered by gate pattern 40 is (empty in figure
Wire frame) it is third raceway groove.
First source electrode 31, the first active layer 21 and circuit node 10 can form the channel of an electric current flowing；Second source electrode 33,
Third active layer 23 and circuit node 10 can form the channel of an electric current flowing；Circuit node 10, the second active layer 22 and drain electrode
32 can form the channel of an electric current flowing.Therefore, which is equivalent to the domain of three transistors composition, i.e.,：Wherein two
The grid for the circuit node and three transistors that the drain electrode of a transistor and the source electrode of third transistor are joined together to form
Pole links together.
It should be noted that the domain structure of transistor provided in an embodiment of the present invention, is not only applicable to bottom grating structure
Transistor applies also for the transistor of top gate structure.
The transistor of top gate structure and bottom grating structure, manufacturing process exist different.Top gate structure manufacturing process flow is as follows：
S1：Buffer layer, active layer deposition and active layer graph；
S2：Gate insulating layer, gate metal layer deposition and gate metal layer are graphical；
S3：Source transistor drain electrode P+Doping.
Bottom grating structure manufacturing process flow is as follows：
S10, buffer layer, gate metal layer deposition and gate metal layer are graphical；
S11, gate insulating layer, active layer deposition and active layer graph；
S12, doping blocking layer coating, graphical, TFT source-drain electrodes P+Doping；
S13, the stripping of gate blocks layer.
The domain structure of transistor provided in an embodiment of the present invention, the domain structure of transistor are equivalent to three transistors
Grid forms same figure, the circuit section that the drain electrode of two transistors and the source electrode of third transistor are joined together to form
Point is located under gate patterns, and the chip area of three transistors can be reduced by this design, reduces layout design difficulty,
Improve application range.
Second embodiment of the invention proposes that a kind of pixel-driving circuit, the pixel-driving circuit include the first driving crystal
Pipe, the second driving transistor and first switch transistor；Wherein, the first driving transistor, the second driving transistor and first open
It is above-mentioned domain structure to close the domain structure that transistor is constituted.
In the present embodiment, the breadth length ratio W1/L1 of the first driving transistor, the second driving transistor breadth length ratio W2/L2,
The breadth length ratio W3/L3 of first switch transistor meets following relationship：
W1=W2=W3, L1/L2=1, L3<L2；Or
W1=W2=W3, L1/L2>1, L3<L2；Or
W1=W2=W3, L1/L2<1, L3<L2；Or
W1=W2<W3, L1/L2=1 or L1/L2>1 or L1/L2<1, L3<L2；Or
W1=W2>W3, L1/L2=1 or L1/L2>1 or L1/L2<1, L3<L2.
It should be noted that the breadth length ratio W2/L2 of the breadth length ratio W1/L1 of the first driving transistor, the second driving transistor,
The breadth length ratio W3/L3 designs of first switch transistor, are not limited to situation listed above, according to the embodiment of the present invention
Breadth length ratio design designed by pixel-driving circuit all should be in the scope of this patent.
It as illustratively, please check shown in Fig. 4, the pixel-driving circuit of Fig. 4 includes the first driving transistor D1, the second drive
Dynamic transistor D2 and the 4th switching transistor T4 (in figure shown in dotted line frame).The second end (drain electrode) of first driving transistor D1,
The second end (drain electrode) of 4th switching transistor T4 and the first end (source electrode) of the second driving transistor D2 are joined together to form
Circuit node；The grid of first driving transistor D1, the second driving transistor D2 and the 4th switching transistor T4 link together,
The design of its domain structure is as described above.
The grid of pixel-driving circuit provided in an embodiment of the present invention, three transistors forms the same figure, two crystalline substances
The circuit node that the drain electrode of body pipe and the source electrode of third transistor are joined together to form is located under gate patterns, passes through this
Kind design can reduce the chip area of three transistors, reduce layout design difficulty, improve application range.
The present invention further provides a kind of array substrates, including：
Extend the data signal line of arrangement along row；
Extend a plurality of control signal wire and drive signal line of arrangement along row；
The multiple pixels being arranged in the matrix form at data signal line and control signal wire crossover location；
Pixel includes above-mentioned pixel-driving circuit.
The grid of array substrate provided in an embodiment of the present invention, three transistors forms the same figure, two transistors
Drain electrode and the circuit node that is joined together to form of source electrode of third transistor be located under gate patterns, set by this
Meter can reduce the chip area of three transistors, reduce layout design difficulty, improve application range.
The present invention further provides a kind of display devices, including：Above-mentioned array substrate.In addition, display device can be with
Equipment is shown for Electronic Paper, mobile phone, TV, Digital Frame etc..
The grid of display device provided in an embodiment of the present invention, three transistors forms the same figure, two transistors
Drain electrode and the circuit node that is joined together to form of source electrode of third transistor be located under gate patterns, set by this
Meter can reduce the chip area of three transistors, reduce layout design difficulty, improve application range.
It should be noted that herein, the terms "include", "comprise" or its any other variant are intended to non-row
His property includes, so that process, method, article or device including a series of elements include not only those elements, and
And further include other elements that are not explicitly listed, or further include for this process, method, article or device institute it is intrinsic
Element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including this
There is also other identical elements in the process of element, method, article or device.
It these are only the preferred embodiment of the present invention, be not intended to limit the scope of the invention, it is every to utilize this hair
Equivalent structure or equivalent flow shift made by bright specification and accompanying drawing content is applied directly or indirectly in other relevant skills
Art field, is included within the scope of the present invention.
Claims (10)
1. a kind of domain structure of transistor, which is characterized in that the domain structure include circuit node and with the circuit
The active layer of node connection；The active layer includes the first active layer, the second active layer and third active layer；
The first source electrode being connected with first active layer, the drain electrode being connected with second active layer are active with the third
The second connected source electrode of layer；
First grid corresponding with first active layer, the second active layer and third active layer, second grid and third respectively
Grid；The gate pattern of the first grid, second grid and third grid composition is located at the circuit node and described has
The top of active layer.
2. a kind of domain structure of transistor according to claim 1, which is characterized in that first active layer and third
Active layer constitutes inverse u shape structure；Second active layer constitutes inverted "L" shape structure.
3. a kind of domain structure of transistor according to claim 1, which is characterized in that first active layer and second
Active layer is constitutedType structure；The third active layer constitutes inverted "L" shape structure.
4. a kind of domain structure of transistor according to claim 1, which is characterized in that first active layer and second
Active layer constitutes " n " type structure；The third active layer constitutes inverted "L" shape structure.
5. a kind of domain structure of transistor according to claim 1, which is characterized in that the first grid, second gate
The gate pattern of pole and third grid composition is square shape or polygon.
6. a kind of domain structure of transistor according to claim 5, which is characterized in that the square shape includes square
Or rectangle.
7. a kind of pixel-driving circuit, which is characterized in that the pixel-driving circuit includes the first driving transistor, the second driving
Transistor and first switch transistor；First driving transistor, the second driving transistor and first switch transistor are constituted
Domain structure be any domain structures of claim 1-5.
8. a kind of pixel-driving circuit according to claim 7, which is characterized in that the width of first driving transistor is long
Than W1/L1, the breadth length ratio W2/L2 of second driving transistor, the first switch transistor breadth length ratio W3/L3 meet with
Lower relationship：
W1=W2=W3, L1/L2=1, L3<L2；Or
W1=W2=W3, L1/L2>1, L3<L2；Or
W1=W2=W3, L1/L2<1, L3<L2；Or
W1=W2<W3, L1/L2=1 or L1/L2>1 or L1/L2<1, L3<L2；Or
W1=W2>W3, L1/L2=1 or L1/L2>1 or L1/L2<1, L3<L2.
9. a kind of array substrate, which is characterized in that including any pixel-driving circuits of claim 7-8.
10. a kind of display device, which is characterized in that described device includes the array substrate described in claim 9.
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710095713.4A CN108461504B (en) | 2017-02-22 | 2017-02-22 | Layout structure of transistor, pixel driving circuit, array substrate and display device |
| TW107141318A TWI696990B (en) | 2017-02-22 | 2018-02-14 | Pixel driving circuit, driving method and layout structure of transistor |
| TW107105392A TWI649739B (en) | 2017-02-22 | 2018-02-14 | Pixel driving circuit, driving method and layout structure of transistor |
| US16/324,549 US10692432B2 (en) | 2017-02-22 | 2018-02-14 | Pixel driving circuit and driving method thereof, and layout structure of transistor |
| EP18757819.0A EP3588480B1 (en) | 2017-02-22 | 2018-02-14 | Pixel driving circuit and driving method thereof, and layout structure of transistor |
| JP2019537159A JP7198206B2 (en) | 2017-02-22 | 2018-02-14 | PIXEL DRIVE CIRCUIT, DRIVING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE |
| KR1020197019778A KR102209416B1 (en) | 2017-02-22 | 2018-02-14 | Pixel driving circuit, driving method thereof, and layout structure of transistor |
| PCT/CN2018/076788 WO2018153336A1 (en) | 2017-02-22 | 2018-02-14 | Pixel driving circuit and driving method thereof, and layout structure of transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710095713.4A CN108461504B (en) | 2017-02-22 | 2017-02-22 | Layout structure of transistor, pixel driving circuit, array substrate and display device |
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| Publication Number | Publication Date |
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| CN108461504A true CN108461504A (en) | 2018-08-28 |
| CN108461504B CN108461504B (en) | 2021-02-19 |
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Cited By (5)
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| CN110085677A (en) * | 2019-03-18 | 2019-08-02 | 昆山国显光电有限公司 | Drive transistor, array substrate and display panel |
| CN110412800A (en) * | 2019-07-25 | 2019-11-05 | 深圳市华星光电半导体显示技术有限公司 | Dot structure and the display panel for using the dot structure |
| CN110491334A (en) * | 2019-08-30 | 2019-11-22 | 上海中航光电子有限公司 | Pixel circuit, the driving method of pixel circuit, display panel and display device |
| CN111383580A (en) * | 2018-12-29 | 2020-07-07 | 上海和辉光电有限公司 | Pixel compensation circuit layout structure and virtual reality display device |
| US11751450B2 (en) | 2020-08-31 | 2023-09-05 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display panel and display device |
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| CN111383580A (en) * | 2018-12-29 | 2020-07-07 | 上海和辉光电有限公司 | Pixel compensation circuit layout structure and virtual reality display device |
| CN110085677A (en) * | 2019-03-18 | 2019-08-02 | 昆山国显光电有限公司 | Drive transistor, array substrate and display panel |
| CN110085677B (en) * | 2019-03-18 | 2022-04-12 | 昆山国显光电有限公司 | Driving transistor, array substrate and display panel |
| CN110412800A (en) * | 2019-07-25 | 2019-11-05 | 深圳市华星光电半导体显示技术有限公司 | Dot structure and the display panel for using the dot structure |
| CN110491334A (en) * | 2019-08-30 | 2019-11-22 | 上海中航光电子有限公司 | Pixel circuit, the driving method of pixel circuit, display panel and display device |
| CN110491334B (en) * | 2019-08-30 | 2021-07-23 | 上海中航光电子有限公司 | Pixel circuit, driving method of pixel circuit, display panel and display device |
| US11751450B2 (en) | 2020-08-31 | 2023-09-05 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display panel and display device |
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| CN108461504B (en) | 2021-02-19 |
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