CN108461414A - A method of increasing wafer-scanning area - Google Patents
A method of increasing wafer-scanning area Download PDFInfo
- Publication number
- CN108461414A CN108461414A CN201810291737.1A CN201810291737A CN108461414A CN 108461414 A CN108461414 A CN 108461414A CN 201810291737 A CN201810291737 A CN 201810291737A CN 108461414 A CN108461414 A CN 108461414A
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- Prior art keywords
- wafer
- die
- scanning area
- scanning
- increasing
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Abstract
The present invention provides a kind of methods increasing wafer-scanning area, including：The scan data for collecting wafer establishes database source；The Die and database source for scanning the fringe region of wafer to be tested are compared, and the Die of the fringe region is less than 3.In the method provided by the invention for increasing wafer-scanning area, scan data by collecting wafer establishes database source, when the Die of the fringe region of wafer to be tested is less than 3, the Die of scanning fringe region is compared with database source, the defect situation that wafer is further confirmed that the scanning of the Die of fringe region, to increase the scan area of wafer.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of method increasing wafer-scanning area.
Background technology
In technical field of semiconductors, with the continuous development of technology, the requirement for semiconductor devices is also higher and higher,
Semiconductor fabrication process generally all includes hundreds of processing steps will cause crystalline substance as long as one of step goes wrong
The defect of entire semiconductor chip occurs on circle, the serious failure for being also possible to lead to entire chip.So that defects detection
Have become and ensures semiconductor chip one indispensable means of yield.
Industry includes sweep test for the defects detection of wafer at present, can generally be compared using adjacent unit pixel
Method captures defect, so as to being handled in time.But current existing scanning machine principle is by between Die and Die
Comparison compared to capture defect, that is, with adjacent two lateral Die, this just will appear：When positioned at wafer
One row Die of fringe region, which is less than 3, can not just carry out Defect Scanning, need to be excluded (Mask) to fall, and final this is arranged Die and do not had
Defective information can not predict Die Yield situations, increase wafer low yield extracting rate (wafer low yield) risk.Such as Fig. 1
It is shown, the method that defect is searched in comparison is carried out between Die on wafer current, target Die is compared by the Die of its both sides
Obtain the defect on Die, that is, the defect that lower section illustrates in Fig. 1.
Therefore, in order to fully increasing the area of wafer-scanning, it is ensured that the case where wafer defect, how to provide a kind of crystalline substance
Circular scan method is the direction that those skilled in the art make great efforts.
Invention content
The purpose of the present invention is to provide a kind of methods increasing wafer-scanning area, to solve in the prior art to wafer
Fringe region inconvenience detection the problem of.
In order to solve the above technical problems, the present invention provides a kind of method increasing wafer-scanning area, including：Collect wafer
Scan data establish database source；
The Die and database source for scanning the fringe region of wafer to be tested are compared, and the Die of the fringe region is less than
3.
Optionally, in the method for increasing wafer-scanning area, the scan data of 100 or more wafers is collected.
Optionally, it in the method for increasing wafer-scanning area, is carried out for the scan data of 100 or more wafers
Analytical integration establishes database source.
Optionally, it is described increase wafer-scanning area method in, the analytical integration include record defect kind and
Defective locations.
Optionally, in the method for increasing wafer-scanning area, further include：After establishing database source, confirms and integrate
The defect situation of wafer.
Optionally, in the method for increasing wafer-scanning area, if the defect situation of wafer is undesirable,
Again scan data is collected.
Optionally, in the method for increasing wafer-scanning area, divide the fringe region of Multi Slice Mode wafer to be tested
Die.
Optionally, in the method for increasing wafer-scanning area, pass through optics and/electron scanning wafer to be tested
The Die of fringe region is compared with database source.
In conclusion in the method provided by the invention for increasing wafer-scanning area, by the scanning number for collecting wafer
According to database source is established, when the Die of the fringe region of wafer to be tested is less than 3, the Die and database of fringe region are scanned
Source is compared, and the defect situation of wafer is further confirmed that the scanning of the Die of fringe region, to increase the scanning of wafer
Area.
Description of the drawings
Fig. 1 is the schematic diagram that the prior art compares defect method in wafer-scanning between Die；
Fig. 2 is the prior art two kinds of undetectable schematic diagrames of Die types in wafer-scanning；
Fig. 3 is that prior art Die Mask in wafer-scanning reduce scan area schematic diagram；
Fig. 4 is the flow chart of the method for the increase wafer-scanning area of the present invention；
Fig. 5 is the flow chart that the database source of the embodiment of the present invention is collected；
Fig. 6 is the schematic diagram of the database source Plays Die of the embodiment of the present invention；
Fig. 7 is the schematic diagram of the Die and the Die comparisons of database source Plays of the fringe region of the embodiment of the present invention.
Specific implementation mode
In order to keep objects, features and advantages of the present invention more obvious and easy to understand, attached drawing is please referred to.It should be clear that this explanation
Structure, ratio, size etc. depicted in book institute accompanying drawings, only to coordinate the revealed content of specification, for being familiar with this
The personage of technology understands and reads, and is not limited to the enforceable qualifications of the present invention, therefore does not have technical essence meaning
Justice, the modification of any structure, the change of proportionate relationship or the adjustment of size are not influencing the effect of present invention can be generated and institute
Under the purpose that can reach, should all still it fall in the range of disclosed technology contents obtain and can cover.
The method provided by the invention for increasing wafer-scanning area, for existing scanning machine by then passing through Die (envelopes
The bare die of individual unit before dress) comparison between Die captures defect, when the Die of the marginal zone of wafer is less than 3,
As shown in Fig. 2, when only 1 Die (left side in attached drawing) or only there are two when Die (in attached drawing the right), existing scanning machine
Defect Scanning can not be normally carried out so that as shown in Figure 3 the first wafer and the second wafer due to Die Mask and
Reduce scan area, only third wafer can all carry out Defect Scanning, and can realize the edge of wafer through the invention
The scanning of the Die in region.
As shown in figure 4, the present invention provides a kind of method increasing wafer-scanning area, including：
Step 1, the scan data for collecting wafer establish database source；
Step 2, the fringe region Die of scanning wafer to be tested and database source are compared, the Die of the fringe region
Less than 3.
With reference to the flow chart that database source shown in fig. 5 is collected, present disclosure is introduced in more detail.
In the present embodiment, initially set up database source, for example, can by formed a piece of virtual perfect wafer data come
As benchmark, wafer to be scanned is compared with the data source of virtual wafer and is tested, criterion numeral can be established at board end
According to library source, the scan data of wafer is collected at board end, as shown in fig. 6, the standard Die formed in database source is used for and waits for
Test wafer is compared.
Optionally, the scan data of 100 or more wafers is collected, it can Die in 100 wafer of collection respective site of system
Information, can equally establish database source collecting information such as 50,80 less than Die in 100 wafers certainly, pass through
100 or more wafers can preferably be collected into kind of the defect being likely to occur, and with the increase of wafer number, database source is got over
It is perfect, 150,200, the numbers such as 300 can be selected according to the production status of product.
In order to form better database source, number is established for the scan data progress analytical integration of 100 or more wafers
According to library source, such as 100 wafer same positions can be directed to and carry out analytical integration, analytical integration is namely to scan data into traveling
The processing of one step, a such as classification is integrated into same class defect, and according to product need carry out various analyses, can be to sweeping
It retouches data and carries out inducing classification etc., preferably to scan defect situation.
Optionally, the analytical integration includes record defect kind and defective locations, by defect kind and defective bit
The determination set can be set out important area, significant deficiency and probability of occurrence etc. and come, form preferable database source.
In the present embodiment, the method for increasing wafer-scanning area further includes：After establishing database source, confirm whole
The defect situation completion personal data library source of wafer meets after the defect situation that synthetic is justified, that is, the further verification integration of progress
Production or technique need, and can be further determined by engineer etc., and database source is made to match or be adapted to wait sweeping in producing line
Wafer is retouched, for example, there is abnormal conditions such as artificial defect or false defect etc. when collecting the scan data of wafer, artificial defect can
Can be the single defect condition due to generations such as errors, false defect does not influence the spurious defects etc. of product quality or performance as,
It can be handled when confirming the defect situation for integrating wafer.
Optionally, if the defect situation of wafer is undesirable, scan data is collected again, that is, changes a collection of crystalline substance
Circle and then the scan data for regathering wafer establish database source, prevent the influence of such as artificial defect or false defect, certainly, such as
The defect situation of fruit wafer meets the requirements, so that it may to be normally carried out the detection of wafer.
In the present embodiment, the Die for dividing the fringe region of Multi Slice Mode wafer to be tested, by between each layer of demixing scan
Defect, semiconductor devices divides Multi Slice Mode available more preferably test result by the stereochemical structure being laminated.
In scan mode, by optics and/or the Die of the fringe region of electron scanning wafer to be measured, for example, can pass through
Optical scanner obtains dimension data etc., can also pass through scanning electron microscope (SEM, Scanning Electron
Microscope the appearance structure etc. for) obtaining device, treats scanning wafer everyway by different scan modes and is examined
It surveys, meets the actual needs of different product.
As described above, in conjunction with shown in Fig. 7, after establishing database source, wafer fringe region blind area Die by with
Standard Die in source database is compared, then comparison defect (defect) can be obtained, so as to complete the inspection of wafer to be scanned
It surveys.
In conclusion in the method provided by the invention for increasing wafer-scanning area, by the scanning number for collecting wafer
According to database source is established, when the Die of the fringe region of wafer to be tested is less than 3, the Die and database of fringe region are scanned
Source is compared, and the defect situation of wafer is further confirmed that the scanning of the Die of fringe region, to increase the scanning of wafer
Area.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair
Any change, the modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims
Range.
Claims (8)
1. it is a kind of increase wafer-scanning area method, which is characterized in that it is described increase wafer-scanning area method include：
The scan data for collecting wafer establishes database source；
The Die and database source for scanning the fringe region of wafer to be tested are compared, and the Die of the fringe region is less than 3.
2. increasing the method for wafer-scanning area according to claim 1, which is characterized in that collection 100 or more wafer
Scan data.
3. increasing the method for wafer-scanning area according to claim 2, which is characterized in that for 100 or more wafers
Scan data carries out analytical integration and establishes database source.
4. increasing the method for wafer-scanning area according to claim 3, which is characterized in that the analytical integration includes record
Defect kind, defective locations and/or shortage probability.
5. increasing the method for wafer-scanning area according to claim 3, which is characterized in that the increase wafer-scanning area
Method further include：After establishing database source, the defect situation for integrating wafer is confirmed.
6. increasing the method for wafer-scanning area according to claim 5, which is characterized in that if the defect situation of wafer is not
It meets the requirements, then collects scan data again.
7. according to any one of the claim 1-6 methods for increasing wafer-scanning area, which is characterized in that a point multilayer is swept
Retouch the Die of the fringe region of wafer to be tested.
8. according to any one of the claim 1-6 methods for increasing wafer-scanning area, which is characterized in that pass through optics
And/or the Die of the fringe region of electron scanning wafer to be tested.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201810291737.1A CN108461414A (en) | 2018-03-30 | 2018-03-30 | A method of increasing wafer-scanning area |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810291737.1A CN108461414A (en) | 2018-03-30 | 2018-03-30 | A method of increasing wafer-scanning area |
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| CN108461414A true CN108461414A (en) | 2018-08-28 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111048435A (en) * | 2019-12-25 | 2020-04-21 | 上海华力微电子有限公司 | Defect monitoring method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101025563A (en) * | 2006-02-20 | 2007-08-29 | Hoya株式会社 | Method of detecting defect in photomask and photomask |
| CN103646893A (en) * | 2013-11-29 | 2014-03-19 | 上海华力微电子有限公司 | A wafer defect detecting method |
| CN104198495A (en) * | 2014-09-02 | 2014-12-10 | 上海华力微电子有限公司 | Method for detecting step evolution abnormality of semiconductor substrate |
| CN104568979A (en) * | 2013-10-23 | 2015-04-29 | 旺宏电子股份有限公司 | Image inspection method of die to database |
-
2018
- 2018-03-30 CN CN201810291737.1A patent/CN108461414A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101025563A (en) * | 2006-02-20 | 2007-08-29 | Hoya株式会社 | Method of detecting defect in photomask and photomask |
| CN104568979A (en) * | 2013-10-23 | 2015-04-29 | 旺宏电子股份有限公司 | Image inspection method of die to database |
| CN103646893A (en) * | 2013-11-29 | 2014-03-19 | 上海华力微电子有限公司 | A wafer defect detecting method |
| CN104198495A (en) * | 2014-09-02 | 2014-12-10 | 上海华力微电子有限公司 | Method for detecting step evolution abnormality of semiconductor substrate |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111048435A (en) * | 2019-12-25 | 2020-04-21 | 上海华力微电子有限公司 | Defect monitoring method |
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