CN108445800B - digital PCU power supply system - Google Patents

digital PCU power supply system Download PDF

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Publication number
CN108445800B
CN108445800B CN201810210066.1A CN201810210066A CN108445800B CN 108445800 B CN108445800 B CN 108445800B CN 201810210066 A CN201810210066 A CN 201810210066A CN 108445800 B CN108445800 B CN 108445800B
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fpga
power supply
module
supply system
digital
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CN108445800A (en
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何小斌
谢伟
蓝建宇
杨亚红
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Shanghai Institute of Space Power Sources
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Shanghai Institute of Space Power Sources
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0421—Multiprocessor system
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/22—Pc multi processor system
    • G05B2219/2231—Master slave
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/26—Pc applications
    • G05B2219/2639—Energy management, use maximum of cheap power, keep peak load low

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The invention discloses an digital PCU power supply system which comprises at least three FPGA controllers working independently, wherein any FPGA controllers are mainboard FPGA control units, any FPGA controllers in the other two FPGA controllers are used as slave board shunt FPGA controllers, another FPGA controllers are used as slave board charge and discharge FPGA controllers, and the mainboard FPGA control units, the slave board shunt FPGA controllers and the slave board charge and discharge FPGA controllers are respectively connected with an internal data bus SPI through SPI communication modules arranged on the mainboard FPGA control units, the slave board shunt FPGA controllers and the slave board charge and discharge FPGA controllers, so that data interaction is directly carried out among the mainboard FPGA control units, the slave board shunt FPGA controllers and the slave board charge and discharge FPGA controllers.

Description

digital PCU power supply system
Technical Field
The invention relates to the technical field of satellite power supply controllers, in particular to an digital PCU power supply system.
Background
The power supply system is an important part of power supply management in the satellite system, and high frequency, high efficiency, low voltage and standardization are the main development trends of the switching power supply at present.
Along with optimization of the performance of the spacecraft, diversification of orbital operation and enlargement of loads, higher requirements are provided for technologies such as management configuration, fault detection and protection of the spacecraft power supply system, and the like.
At present, power devices used in a power supply system are expensive, control circuits thereof are complicated, power loads are generally large-scale devices with high integration degree, and these devices are generally poor in resistance to electricity, heat and impact.
The protection of the power supply system is to take the safety of the load and the safety of the power supply system into consideration. Therefore, in the prior art, the protection circuit is added to the power supply system to achieve the above purpose, but this inevitably results in the increase of electronic devices in the power supply system, and the increased electronic devices affect the reliability of the power supply system. The current analog power supply controller is difficult to meet the application requirement change of the load, so that a power supply system is large and complex or needs a longer customized production period.
The system control framework applied to the field of aerospace power supply systems is an integrated framework of 'analog control + digital management', a large number of discrete devices are adopted for parameter setting, the conversion of wide voltage range input cannot be considered simultaneously, and the parameter setting cannot be changed after curing.
Disclosure of Invention
The invention aims to provide digital PCU power supply systems, which adopt a three-domain control framework mode of 'a main board and a slave board', wherein the main board and the slave board are independent working units, the main board and the slave board are respectively provided with an FPGA chip and respectively play their own roles, the slave board is controlled by the main board, and the slave board feeds back working state data to the main board so as to achieve the full-line control of the main board on the slave board, so that the digital PCU power supply system can be configured to output the characteristics of programmability, good dynamic response, high control precision and the like and perform the intelligent control of power supply management autonomously.
In order to achieve the above purpose, the invention is realized by the following technical scheme:
digital PCU power supply system comprises at least three FPGA controllers working independently, wherein any FPGA controllers are mainboard FPGA control units, any FPGA controllers in the rest two FPGA controllers are slave board shunt FPGA controllers, the other FPGA controllers are slave board charge-discharge FPGA controllers, and the mainboard FPGA control units, the slave board shunt FPGA controllers and the slave board charge-discharge FPGA controllers are respectively connected with an internal data bus SPI through SPI communication modules arranged respectively, so that data interaction is directly carried out among the mainboard FPGA control units, the slave board shunt FPGA controllers and the slave board charge-discharge FPGA controllers.
Preferably, the motherboard FPGA control unit collects a bus voltage, and compares the bus voltage with a preset bus voltage to output an MEA signal; the main board FPGA control unit collects the voltage and current of the storage battery and compares the voltage and current of the storage battery with the voltage and current of a preset storage battery to output a BEA signal; and the slave board shunting FPGA controller receives the MEA signal, compares the MEA signal with a preset working range, judges the working mode of the power supply system, and determines whether to carry out shunting operation according to the working mode. And the slave board shunting FPGA controller receives the MEA signal, compares the MEA signal with a preset working range, judges the working mode of the power supply system, and determines whether to carry out shunting operation according to the working mode.
And the slave plate charge and discharge FPGA controller receives the MEA and BEA signals, compares the MEA signals with a preset working range, judges the working mode of the power supply system, and determines to charge or discharge the storage battery according to the working mode and the BEA signals.
Preferably, the motherboard FPGA control unit includes: the system comprises an ADC interface program control module, an MEA controller, a BEA controller, a system time sequence control module, a fault monitoring and processing protection module and an SPI communication module.
Preferably, the main board FPGA control unit is provided with an external communication interface, and is connected to an upper computer located outside the digital PCU power supply system, and the upper computer is configured to configure controller parameters matched with the digital PCU power supply system to the main board FPGA control unit through the external communication interface.
Preferably, the slave board charging and discharging FPGA controller includes: the system comprises a BCR charging module, a BDR discharging module, a system time sequence control module and a fault and state monitoring module; the BCR charging module and the BDR discharging module are respectively connected with a BCDR driver used for driving the BCR charging module and the BDR discharging module to work through the PWM modulation interface module.
Preferably, the slave shunting FPGA controller includes: the system comprises a system time sequence control module, an SR control unit and an SR four-level frequency-limiting flow control module, wherein the SR four-level frequency-limiting flow control module is grounded.
Preferably, the operation modes include: a charging domain, a discharging domain and a shunting domain work modes; and a hysteresis region is arranged between the charging domain and the discharging domain, and at the moment, the working states of the slave plate shunt FPGA controller and the slave plate charging and discharging FPGA controller are kept unchanged.
Preferably, the SR four-stage frequency-limiting flow control module includes four current dividers, and the SR four-stage frequency-limiting flow control module is configured to limit the switching frequency and the switching of the switches of each current divider.
Compared with the prior art, the invention has the following advantages:
the FPGA is a power supply system control chip, and digital PCU power supply system management, a multi-path control loop algorithm and Pulse Width Modulation (PWM) multi-path driving output are realized in a programmable control mode.
The invention is also provided with an internal data SPI bus which is used for directly carrying out data interaction among the mainboard FPGA control unit, the slave board shunt FPGA controller and the slave board charging and discharging FPGA controller, thereby realizing -based management and control of the digital PCU power supply system.
The system comprises a main board FPGA control unit, a slave board Shunt (SR) FPGA controller, a slave board charge-discharge (BCDR) FPGA controller, a master board FPGA control unit, a master power control unit, a slave board FPGA control unit and a slave board charge-discharge (BCDR) FPGA controller, wherein the master board FPGA control unit is responsible for controlling and scheduling the whole digital PCU power system, collecting bus voltage and current of the whole digital PCU power system, generating and distributing MEA and BEA signals, the digital PCU power system adopts MEA and BEA control of a system , the slave board Shunt (SR) FPGA controller and the slave board charge-discharge (BCDR) FPGA controller respectively realize charge-discharge loop control and shunt loop control.
The digital PCU power supply system provided by the invention has high reliability and better portability, and can be suitable for power supply systems with different power grades.
Drawings
FIG. 1 is a block diagram of an architecture for a digital PCU power supply system according to the present invention;
fig. 2 is a schematic diagram of the digital PCU power system three-domain control modes of the present invention;
fig. 3 is a schematic diagram showing the main components of an FPGA control unit of an digital PCU power supply system according to the present invention;
fig. 4 is a schematic diagram of the main components of a slave board charging and discharging FPGA controller of the digital PCU power supply system according to the present invention;
fig. 5 is a schematic diagram showing the main components of a slave board-shunt FPGA controller of the digital PCU power supply system according to the present invention;
fig. 6 is a schematic diagram of communications among an FPGA control unit, a slave board charging and discharging FPGA controller, and a slave board shunting FPGA controller of an digital PCU power supply system according to the present invention through an SPI internal bus.
Detailed Description
The present invention will now be described in further detail by way of a detailed description of preferred embodiments, taken in conjunction with the accompanying drawings of which illustrates the invention.
As shown in FIG. 1, digital PCU power supply systems of the invention comprise at least three FPGA controllers, wherein any FPGA controllers are mainboard FPGA control units which are connected with an upper computer, of the other two FPGA controllers, FPGA controllers are shunt FPGA controllers from a slave board, and the other FPGA controllers are charge-discharge FPGA controllers from the slave board, and the mainboard FPGA control units, the shunt FPGA controllers from the slave board and the charge-discharge FPGA controllers from the slave board are in data interaction through an internal data bus SPI.
The main board FPGA control unit is responsible for controlling and scheduling the whole machine, collecting bus voltage and battery voltage and current of the whole digital PCU power supply system, generating MEA and BEA signals according to the bus voltage and the battery voltage and current, and outputting the signals to the slave board shunt FPGA controller and the slave board charge-discharge FPGA controller. And the slave board shunt FPGA controller and the slave board charging and discharging FPGA controller are used for carrying out power conversion on the digital PCU power supply system according to the received MEA and BEA signals.
In this embodiment, the slave board shunting FPGA controller and the slave board charging and discharging FPGA controller are powered by a solar array, the slave board charging and discharging FPGA controller is further connected with a storage battery, and the output of the slave board charging and discharging FPGA controller is a bus.
As shown in fig. 3, the motherboard FPGA control unit further includes an ADC module or ADC interface program control module, an MEA controller, a BEA controller, a system timing control module for controlling the motherboard FPGA control unit, a slave board shunt FPGA controller, and a slave board charge/discharge FPGA controller to synchronously operate, a fault monitoring and processing protection module, an SPI communication module, and an external communication interface.
The ADC module is used for collecting bus voltage and storage battery voltage and current of the whole digital PCU power supply system, the MEA controller and the BEA controller are respectively connected with the ADC module, the MEA controller performs difference operation according to the collected bus voltage and preset voltage, and amplifies the operation result to obtain an MEA signal. And the BEA controller performs difference operation on the acquired current or voltage of the storage battery and preset current or voltage, and amplifies the operation result to obtain a BEA signal. And the MEA controller outputs the MEA signals to the slave plate shunt FPGA controller and the slave plate charge and discharge FPGA controller respectively. And the BEA controller outputs the BEA signals to the slave plate charging and discharging FPGA controller. Therefore, a charging and discharging signal reference is provided for the slave plate charging and discharging FPGA controller, and a working mode reference is provided for the slave plate shunting FPGA controller. The mainboard FPGA control unit is connected with the upper computer through the external communication interface.
The digital PCU power supply system has the outstanding characteristics that control parameters are programmable, the programmable output of power level parameters of the power supply system is the great advantage of the digital PCU power supply system, the external communication interface is a controller parameter configuration interface and is used for configuring corresponding controller parameters through an upper computer outside, and the configurability and the high adaptability of the control system of the digital PCU power supply system are maximized.
As shown in fig. 4, the slave board charging and discharging FPGA controller is used for realizing the charging and discharging functions of the digital PCU power supply system, and further includes an SPI communication module, a BCR charging module with a PWM modulation interface module, a BDR discharging module with a PWM modulation interface module, a system timing control module, and a fault and state monitoring module.
As shown in fig. 5, the slave board shunting FPGA controller has a SR four-stage shunting function, and further includes an SPI communication module, a system timing control module, an SR control unit, and a SR four-stage frequency-limited flow control module using bang-bang control, where the SR four-stage frequency-limited flow control module is grounded, and the slave board shunting FPGA controller and the slave board charge-discharge FPGA controller judge the MEA signal after receiving the MEA signal, and determine whether to perform shunting operation according to a judgment result.
In this embodiment, as shown in fig. 2, the three-domain control architecture mode of the present invention includes: and the charging domain, the discharging domain and the shunting domain work in a three-domain mode.
The working mode of the battery system is a shunt domain when the MEA signal is in a bus voltage range of 29.3V-29.8V, the SR four-level frequency limiting flow control module of the slave plate shunt FPGA controller executes shunt operation, the SR four-level frequency limiting flow control module controls four shunts to conduct ground shunt operation, when the power generated by the solar array is highest, the four shunts can be controlled to be completely opened to conduct ground shunt, when the power generated by the solar array is not highest, any shunts or two or three shunts among the four shunts can be controlled to conduct ground shunt operation according to the current shunt requirement, the slave plate charging and discharging FPGA controller obtains the working mode of the battery system as the shunt domain according to the MEA signal, and at the moment, the slave plate charging and discharging FPGA controller controls a BCR charging module to charge a storage battery through the received BEA signal.
The working mode of the battery system is the second hysteresis zone 2 when the MEA signal is in the bus voltage range of 29.2V-29.3V, at the moment, the SR four-stage frequency-limiting flow control module of the slave plate shunt FPGA controller continues to execute shunt operation, at the moment, the power generation capacity of the solar array is reduced, any or two or three shunts of the four shunts can be controlled to conduct ground shunt operation according to the current shunt requirement, the slave plate charging and discharging FPGA controller obtains the working mode of the battery system as the second hysteresis zone 2 according to the MEA signal, and at the moment, the slave plate charging and discharging FPGA controller continues to control the BCR charging module to charge the storage battery through the received BEA signal.
When the MEA signal is 29.2V, the slave plate charging and discharging FPGA controller controls the BCR charging module to perform charging current reduction operation on the storage battery through the received BEA signal.
When the MEA signal is in a bus voltage range of 28.9V-29.8V, the working mode of the battery system is a charging domain.
The working mode of the battery system is th hysteresis zone 1 when the MEA signal is in a bus voltage range of 28.8V-28.9V, at the moment, the SR four-stage frequency-limiting flow control module of the slave plate shunt FPGA controller continues to execute shunt operation, at the moment, the power of solar burst power generation continues to be reduced, any or two or three shunts of the four shunts can be controlled to conduct ground shunt operation according to the current shunt requirement, the slave plate charging and discharging FPGA controller obtains the working mode of the battery system as th hysteresis zone 1 according to the MEA signal, and at the moment, the slave plate charging and discharging FPGA controller continues to control the BCR charging module to reduce the charging current of the storage battery through the received BEA signal.
When the MEA signal is in a bus voltage range of 28.2V-28.8V, the working mode of the battery system is a discharge domain. At this time, the SR four-stage frequency-limiting flow control module of the slave board shunting FPGA controller continues to stop executing the shunting operation. The slave plate charging and discharging FPGA controller obtains the working mode of the battery system as a discharging domain according to the MEA signal, and at the moment, the slave plate charging and discharging FPGA controller continues to control the BDR discharging module to enable the storage battery to perform discharging operation through the received BEA signal.
In summary, the slave board shunting FPGA controller and the slave board charging and discharging FPGA controller respectively receive the MEA \ BEA signal and the voltage current signal provided by the master board FPGA control unit, and enter the corresponding working mode to work after the determination of the three-domain working mode of the charging domain, the discharging domain and the shunting domain. And the normal operation of the whole digital PCU power supply system is ensured.
The system comprises a master board FPGA control unit, a slave board shunt FPGA controller, a slave board charge-discharge FPGA controller, a master board FPGA control unit and a slave board charge-discharge FPGA controller, wherein the master board FPGA control unit is responsible for controlling and scheduling the power supply system, and is used for carrying out full-line control on the slave board shunt FPGA controller and the slave board charge-discharge FPGA controller to realize -body control and management of the digital PCU power supply system.
In this embodiment, the slave shunt FPGA controller adopts a hysteresis switch control mode, and forms bang-bang control modes by setting an upper limit digital comparator and a lower limit digital comparator for each path of control according to the MEA signal range, where the upper limit value and the lower limit value respectively correspond to the on and off of the power shunt open tube, and the switching frequency of the power shunt open tube varies with the power supply state.
The SR four-stage frequency-limiting flow control module of the slave plate shunt FPGA controller is used for limiting the switching frequency to weaken the effect and enhance the reliability of the system, and solves the problems that when a hysteresis loop switching control mode is adopted, if the switching frequency is not limited by introducing frequency-limiting control, the shunt switching frequency is too high when the hysteresis loop width is improperly set or the fluctuation frequency and amplitude of an MEA signal are higher, an electronic power switching device is easily damaged, and the heat consumption of the system is high.
As shown in FIG. 6, the digital PCU power supply system adopts a structural mode of a 'mainboard + slave board' framework, an internal data bus is an indispensable part for loop control and has higher real-time requirement on data transmission, the internal data bus SPI is high-speed, full-duplex and synchronous communication buses, only four lines are occupied on pins of a chip, the pins of the chip are saved, and space is saved on the layout of a PCB.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.

Claims (6)

  1. The digital PCU power supply system is characterized by comprising at least three independently working FPGA controllers, wherein FPGA controllers are mainboard FPGA control units, and of the rest two FPGA controllers, FPGA controllers are slave board shunt FPGA controllers and FPGA controllers are slave board charge and discharge FPGA controllers;
    the main board FPGA control unit acquires bus voltage and compares the bus voltage with preset bus voltage to output an MEA signal; the main board FPGA control unit collects the voltage and current of the storage battery and compares the voltage and current of the storage battery with the voltage and current of a preset storage battery to output a BEA signal; the slave board shunting FPGA controller receives the MEA signal, compares the MEA signal with a preset working range, judges the working mode of the power supply system, and determines whether to carry out shunting operation according to the working mode;
    the slave plate charge-discharge FPGA controller receives the MEA and BEA signals, compares the MEA signals with a preset working range, judges the working mode of the power supply system, and determines to charge or discharge a storage battery according to the working mode and the BEA signals;
    the working modes comprise: a charging domain, a discharging domain and a shunting domain work modes; and a hysteresis region is arranged between the charging domain and the discharging domain, and at the moment, the working states of the slave plate shunt FPGA controller and the slave plate charging and discharging FPGA controller are kept unchanged.
  2. 2. The digital PCU power supply system according to claim 1,
    the mainboard FPGA control unit comprises: the system comprises an ADC interface program control module, an MEA controller, a BEA controller, a system time sequence control module, a fault monitoring and processing protection module and an SPI communication module.
  3. 3. Digital PCU power supply system according to claim 1 or 2,
    the main board FPGA control unit is provided with an external communication interface and is connected with an upper computer positioned outside the digital PCU power supply system, and the upper computer is used for configuring controller parameters matched with the digital PCU power supply system for the main board FPGA control unit through the external communication interface.
  4. 4. The digital PCU power supply system according to claim 1,
    the slave plate charging and discharging FPGA controller comprises: the system comprises a BCR charging module, a BDR discharging module, a system time sequence control module and a fault and state monitoring module; the BCR charging module and the BDR discharging module are respectively connected with a BCDR driver used for driving the BCR charging module and the BDR discharging module to work through the PWM modulation interface module.
  5. 5. The digital PCU power supply system according to claim 1,
    the slave shunting FPGA controller comprises: the system comprises a system time sequence control module, an SR control unit and an SR four-level frequency-limiting flow control module, wherein the SR four-level frequency-limiting flow control module is grounded.
  6. 6. The digital PCU power supply system according to claim 5,
    the SR four-stage frequency-limiting flow control module comprises four current dividers, and is used for limiting the switching frequency and the switching of the switches of the current dividers.
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CN108445800B (en) * 2018-03-14 2020-01-31 上海空间电源研究所 digital PCU power supply system
CN109738833B (en) * 2019-01-28 2021-01-12 深圳市航天新源科技有限公司 Fault diagnosis method for S4R series-type sequential switch shunt regulator

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