CN108445681B

CN108445681B - Display panel and display device

Info

Publication number: CN108445681B
Application number: CN201810090623.0A
Authority: CN
Inventors: 杨成宇
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2018-01-30
Filing date: 2018-01-30
Publication date: 2021-05-14
Anticipated expiration: 2038-01-30
Also published as: CN108445681A

Abstract

The invention discloses a display panel and a display device. The sub-pixels of the display panel comprise light-transmitting sub-pixels with light-transmitting areas and dark sub-pixels with dark areas, the pixel rows comprise first pixel rows and second pixel rows which are repeatedly and alternately arranged in a third direction, the first pixel rows comprise first sub-pixel groups which are repeatedly arranged, the first sub-pixel groups comprise three light-transmitting sub-pixels and one dark sub-pixel which are sequentially arranged in a second direction, the second pixel rows comprise second sub-pixel groups which are repeatedly arranged, and the second sub-pixel groups comprise one light-transmitting sub-pixel, one dark sub-pixel and two light-transmitting sub-pixels which are sequentially arranged in the second direction; three thin film transistors are arranged in the dark sub-pixels and respectively control the display of three photon-transmitting pixels adjacent to the dark sub-pixels; the isolation column is arranged in the dark sub-pixel. The invention can avoid light leakage caused by extruding the isolation column and can not cause the aperture opening ratio of the display panel to be reduced.

Description

Display panel and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.

Background

The lcd panel has the features of low power consumption, small size, light weight, etc., and is therefore popular among users. The liquid crystal display panel is mainly a thin film transistor liquid crystal display panel, and the liquid crystal display panel of the type includes an array substrate, a color film substrate, and a liquid crystal layer disposed between the array substrate and the color film substrate. In order to maintain a uniform box thickness height of the lcd panel, a certain number of spacers are usually disposed between the array substrate and the color filter substrate to support the array substrate and the color filter substrate, so as to maintain a uniform box thickness height of the lcd panel.

In the manufacturing process of the liquid crystal display panel, an alignment film layer is usually provided on each of the upper and lower sides of the liquid crystal layer to provide a pretilt angle for each liquid crystal molecule in the liquid crystal layer, so that the liquid crystal molecules can rapidly respond to an external electric field to deflect, and visible light provided by the backlight passes through the liquid crystal layer. The alignment films on the two sides are usually respectively formed on the surfaces of the array substrate and the color film substrate near the liquid crystal layer, so that the spacer is substantially located between the alignment films on the two sides.

The alignment films are often scratched by the isolation columns between the alignment films on the two sides, so that the problem of light leakage due to disordered liquid crystal molecule deflection occurs around the isolation columns.

Along with display panel's development, prior art provides a curved surface display panel, curved surface display panel can give better experience of user in the vision, the reason is that, people's eyeball time arch has the radian, curved surface display panel's radian can guarantee that each position is more impartial with display panel's distance on the eyeball, in order to bring better sense organ to experience, except that the different experience in the vision, curved surface display panel gives people the field of vision wider, because the edge that slightly is crooked to the user can more press close to the user, realize the same angle of vwatching basically with curved surface display panel central point, except as large size display panel, curved surface display panel's use scene also includes the cell-phone, wearable intelligence sets up and vehicle mounted display etc..

For the curved display panel, because the relative displacement between the array substrate and the color film substrate is larger, and the range of the alignment film scratched by the isolation pillars is also larger, the range of the black matrix needing to be expanded is larger, and the aperture opening ratio of the curved display panel is more seriously reduced.

Therefore, it is an urgent need in the art to provide a display panel and a display device that can reduce the decrease of the aperture ratio of the liquid crystal display panel while avoiding the problem of light exposure caused by the spacer scratching the alignment film layer.

Disclosure of Invention

In view of the above, the present invention provides a display panel and a display device, which solve the technical problem of aperture ratio reduction caused by light leakage prevention in the prior art.

In order to solve the above technical problem, the present invention provides a display panel, which includes a first substrate and a second substrate oppositely disposed in a first direction, and an isolation pillar disposed between the first substrate and the second substrate in the first direction; the first substrate is provided with thin film transistors, first signal lines which are repeatedly arranged along a third direction and extend along the second direction, and second signal lines which are repeatedly arranged along the second direction and extend along the third direction, wherein the second direction is crossed with the third direction and is vertical to the first direction; the display panel has a display area and a non-display area, and the first signal line and the second signal line intersect to define a plurality of sub-pixels in the display area; the plurality of sub-pixels are sequentially arranged in the second direction to form a pixel row; a plurality of sub-pixels are sequentially arranged in the third direction to form a pixel column; the sub-pixels comprise a light-transmitting sub-pixel with a light-transmitting area and a dark sub-pixel with a dark area; the plurality of pixel rows comprise a first pixel row and a second pixel row which are repeatedly and alternately arranged in a third direction, the first pixel row comprises a first subpixel group which is repeatedly arranged, the first subpixel group comprises three light-transmitting subpixels and one dark subpixel which are sequentially arranged in the second direction, the second pixel row comprises a second subpixel group which is repeatedly arranged, and the second subpixel group comprises one light-transmitting subpixel, one dark subpixel and two light-transmitting subpixels which are sequentially arranged in the second direction; the dark sub-pixel is internally provided with three thin film transistors which respectively control the display of three light-transmitting sub-pixels adjacent to the dark sub-pixel; the isolation column is arranged in the dark sub-pixel.

In order to solve the above technical problem, the present invention further provides a display device, which includes any one of the display panels provided by the present invention.

Compared with the prior art, the display panel and the display device provided by the invention have the beneficial effects that:

through a new pixel arrangement and design mode, every three thin film transistors in the display panel are concentrated in one dark sub-pixel, and the isolation column is also arranged in the dark sub-pixel, so that on one hand, the arrangement of the thin film transistors is only concentrated, the aperture opening ratio is not reduced, on the other hand, the dark sub-pixel can provide enough dark space size for the isolation column, and light leakage does not easily occur around the isolation column.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a schematic diagram of a pixel arrangement of a display panel provided in the prior art;

FIG. 2 is a schematic diagram of a pixel arrangement of another display panel provided in the prior art;

fig. 3 is a schematic diagram of a film structure of a display panel according to an embodiment of the present invention;

fig. 4 is a schematic diagram of a film structure of an array substrate of a display panel according to an embodiment of the present invention;

fig. 5 is a top view of a display panel according to an embodiment of the invention;

FIG. 6 is an enlarged view of region O in FIG. 5;

fig. 7 is a schematic structural diagram of a dark sub-pixel of a display panel according to an embodiment of the present invention;

FIG. 8 is a schematic structural diagram of a dark sub-pixel of another display panel according to an embodiment of the present invention;

fig. 9 is a schematic view of a film structure of a first substrate of a display panel according to an embodiment of the invention;

fig. 10 is a projection view of a thin film transistor of a display panel on a base layer of a first substrate according to an embodiment of the present invention;

fig. 11 is a schematic view of a display device provided by the present invention.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

Fig. 1 is a schematic diagram of a pixel arrangement of a display panel provided in the prior art, and fig. 2 is a schematic diagram of a pixel arrangement of another display panel provided in the prior art. As shown in fig. 1, a plurality of sub-pixels SP 'are defined by the intersection of the scan line 12' and the data line 13 'of the display panel, a pixel electrode 14' is disposed in each sub-pixel SP ', each pixel electrode 14' is correspondingly connected to a thin film transistor 11', the scan line 12' and the data line 13 'are respectively connected to the thin film transistors 11', a separation column 50 'is disposed between adjacent thin film transistors 11' in the second direction x ', in order to avoid the light leakage problem caused by the separation column 50' scratching the alignment film in the curved display panel, the width of the black matrix 21 'in the bending direction is increased in the bending direction, as shown in fig. 2, the bending direction is the third direction y', the width of the black matrix 21 'is increased in the third direction y' relative to fig. 1, in fig. 1 and 2, the difference d 'in the width of the third direction y' is larger, the expanded width d 'reduces the opening area of the sub-pixel SP', the aperture ratio of the display panel is reduced.

Based on the above, the invention provides a display panel, which can solve the problem of light leakage caused by extrusion of the isolation column, and can reduce or avoid reduction of the aperture opening ratio. The following describes a specific embodiment of the display panel according to the present invention in detail.

Fig. 3 is a schematic diagram of a film structure of a display panel according to an embodiment of the present invention, fig. 4 is a schematic diagram of a film structure of another display panel according to an embodiment of the present invention, fig. 5 is a top view of a display panel according to an embodiment of the present invention, fig. 6 is an enlarged view of a region O in fig. 5, and fig. 7 is a schematic diagram of a dark sub-pixel structure of a display panel according to an embodiment of the present invention, where the schematic diagram of the film structure of fig. 3 can be obtained along a section of a-a cut line in fig. 5, and the schematic diagram of the film structure of fig. 4 can be obtained along a section of a-C cut line in fig. 6.

In one embodiment, referring to fig. 3 to 7, the display panel includes a first substrate 10 and a second substrate 20 disposed opposite to each other in a first direction z, and a spacer 50 and a liquid crystal molecule 60 disposed between the first substrate 10 and the second substrate 20 in the first direction z, wherein a first alignment film 30 is disposed on a side of the first substrate 10 close to the liquid crystal molecule 60, and a second alignment film 40 is disposed on a side of the second substrate 20 close to the liquid crystal molecule 60, and substantially, the spacer 50 and the liquid crystal molecule 60 are disposed between the first alignment film 30 and the second alignment film 40, and a pretilt angle of the liquid crystal molecule 60 is provided by the alignment films.

Among them, a plurality of Thin Film Transistors (TFTs) 11 are disposed on the first substrate 10, so that the first substrate 10 may also be referred to as a TFT substrate, the TFT 11 includes a gate 111, a source 112, a drain 113 and an active layer 114, and when an on-voltage of the TFT 11 is applied to the gate 111, a conduction channel is formed between the source 112 and the drain 113 through the active layer 114.

The first substrate 10 is further provided with a plurality of first signal lines 12, a plurality of second signal lines 13, a common electrode (not shown in the figure) and a pixel electrode 14, wherein the plurality of first signal lines 12 are repeatedly arranged along a third direction y and extend along a second direction x, the plurality of second signal lines 13 are repeatedly arranged along the second direction x and extend along the third direction y, wherein the second direction x intersects with the third direction y and is perpendicular to the first direction z, and optionally, the second direction x is perpendicular to the third direction y. When a voltage is applied to the pixel electrode 14, an electric field is formed with the common electrode to deflect the liquid crystal molecules 60. The common electrode may be disposed on the first substrate 10 or the second substrate 20, and the pixel electrode 114 may be a strip electrode or an electrode with other shapes, which are not limited in this application.

In the first signal line 12 and the second signal line 13, one type of signal line is a scan line, and the other type of signal line is a data line, and in this embodiment, the first signal line 12 is a scan line, and the second signal line 13 is a data line. The first signal line 12 is connected to the gate 111 of the thin film transistor 11, the gate 111 is applied with a turn-on voltage of the thin film transistor 11, the second signal line 13 is connected to the source 112 of the thin film transistor 12, the pixel electrode 14 is connected to the drain 113 of the thin film transistor 11, and after a conduction channel is formed between the source 112 and the drain 113 via the active layer 114, the data line can apply a pixel voltage to the pixel electrode 14 via the thin film transistor 11, so that the pixel electrode 14 and the common electrode form an electric field, the liquid crystal molecules 60 are deflected under the electric field, the magnitudes of the pixel voltages are different, the field intensities of the formed electric fields are different, the degrees of the deflection of the liquid crystal molecules 60 are different, and the light generated by the backlight module passes through different luminous fluxes of the display panel, so as to display different gray scales.

In this embodiment, the black matrix 21 is disposed on the second substrate 20, light generated by the backlight module is firstly incident on the first substrate 10, and then exits through a liquid crystal layer formed by liquid crystal molecules at an opening of the black matrix, and the black matrix 21 may also be disposed on the first substrate 10, which is not limited in this application.

The display panel has a display area AA in which the first signal lines 12 cross the second signal lines 13 to define a plurality of sub-pixels SP, and a non-display area BA.

The plurality of sub-pixels SP are sequentially arranged in the second direction x to form a pixel row Px; the plurality of sub-pixels SP are sequentially arranged in the third direction y to form a pixel column Py; two sub-pixels SP are disposed in the display area AA, one is a light-transmitting sub-pixel SP1 having a light-transmitting area, and the other is a dark sub-pixel SP2 having a dark area. One pixel electrode 14 is disposed in each light-transmitting sub-pixel SP1, and each pixel electrode 14 is connected to one thin film transistor 11, specifically, as described above, the pixel electrode 14 is connected to the drain electrode 113 of the thin film transistor 11. In the first direction z, the pixel electrode 14 mostly overlaps the light-transmitting area, and the black matrix 21 does not overlap the light-transmitting area. For the light-transmitting sub-pixel SP1, after the liquid crystal molecules 60 are deflected, light generated by the backlight module can be emitted through the light-transmitting area, and for the dark sub-pixel SP2, the light-transmitting area is not arranged, and the whole dark area is a dark area, so that no light can be emitted at the position of the dark sub-pixel SP 2. Specifically, the formation of the dark sub-pixel SP2 may be realized by a light shielding layer provided separately from the black matrix 21, or may be formed by the black matrix 21, and optionally, in this embodiment, the black matrix 21 covers the dark sub-pixel SP2 so that the dark sub-pixel SP2 is opaque as a whole. Note that, in order to clearly illustrate the structure of the display panel, the black matrix 21 in fig. 5 is not filled.

The plurality of pixel rows Px includes a first pixel row Px1 and a second pixel row Px2 repeatedly and alternately arranged in the third direction y, the first pixel row Px1 includes a first subpixel group SPG1 repeatedly arranged, the first subpixel group SPG1 includes three light-transmitting subpixels SP1 and one dark subpixel SP2 sequentially arranged in the second direction x, the second pixel row Px2 includes a second subpixel group SPG2 repeatedly arranged, and the second subpixel group SPG2 includes one light-transmitting subpixel SP1, one dark subpixel SP2 and two light-transmitting subpixels SP1 sequentially arranged in the second direction x, in which the dark subpixels SP2 of the first subpixel group SPG1 are spaced from the dark subpixels SP2 of the second subpixel group SPG2 by one pixel Py column in the second direction x. Taking the first sub-pixel group SPG1 and the second sub-pixel group SPG2 in the region O in fig. 5 as an example, the dark sub-pixel SP2 of the first sub-pixel group SPG1 is located in the fourth column of pixels of the display panel, the dark sub-pixel SP2 of the second sub-pixel group SPG2 is located in the second column of pixels of the display panel, and the dark sub-pixels SP2 in the two sub-pixel groups are separated by one third column of pixels. Of course, the relationship between the front rows of pixel columns in fig. 5 is not fixed in the figure due to the difference in the cutting of the display panel, but the arrangement rule of the pixel groups is as described above.

Alternatively, a red color resistor, a blue color resistor and a green color resistor are disposed on the second substrate 20 at positions corresponding to the transmissive sub-pixels SP1, wherein the transmissive sub-pixel SP1 corresponding to the red color resistor is a red sub-pixel R, the transmissive sub-pixel SP1 corresponding to the blue color resistor is a blue sub-pixel B, the transmissive sub-pixel SP1 corresponding to the green color resistor is a green sub-pixel G, the first sub-pixel group SPG1 includes the red sub-pixel R, the green sub-pixel G, the blue sub-pixel B and the dark sub-pixel SP2 which are sequentially arranged in the second direction x, the second sub-pixel group SPG2 includes the blue sub-pixel B, the dark sub-pixel SP2, the red sub-pixel R and the green sub-pixel G which are sequentially arranged in the second direction x, and, in the same pixel row Py, the red sub-pixel R and the blue sub-pixel B are alternately arranged as the first pixel row Py in fig. 5; in another pixel column Py, the green sub-pixel G and the dark sub-pixel SP2 are alternately arranged, as in the second pixel column Py of fig. 5.

Three thin film transistors 11 are provided in one dark subpixel SP2, and the three thin film transistors 11 respectively control the display of three light-transmitting subpixels SP1 adjacent to the dark subpixel SP2, that is, the three thin film transistors 11 in the dark subpixel SP2 are respectively connected to the pixel electrode 14 in one light-transmitting subpixel SP1 adjacent to the dark subpixel SP2, wherein each dark subpixel SP2 is adjacent to four light-transmitting subpixels SP1, three of the light-transmitting subpixels SP1 are controlled by the three thin film transistors 11 of the dark subpixel SP2, and the other is controlled by the other dark subpixel SP2, so that, as shown in fig. 5, the thin film transistors 11 in the display panel are concentrated in one dark subpixel SP2 every three, and only the arrangement of the opening regions is changed for all the opening regions but the dark regions on the display panel, and the size of the dark regions is still capable of covering the scan lines because the area is not increased, Accordingly, the display panel provided in this embodiment has an aperture ratio substantially equal to that of the display panel shown in fig. 1, and has an aperture ratio larger than that of the display panel shown in fig. 2.

Table 1 below shows a comparison data table of the aperture ratio of a curved display panel adopting the display panel structure shown in fig. 2 in the prior art and the aperture ratio of a curved display panel adopting the display panel structure shown in the present invention, and as shown in table 1 below, no matter what density of the isolation pillars is adopted by the curved display panel, the aperture ratio of the curved display panel provided by the present invention is greater than the aperture ratio of the curved display panel in the prior art, for example, when the density of the isolation pillars is adopted and 2 isolation pillars are arranged for each pixel, the aperture ratio of the curved display panel provided by the present invention is 58.3%, the aperture ratio of the curved display panel in the prior art is 53.5%, and 4.8 percentage points are increased.

TABLE 1

In addition, the isolation column 50 is disposed in the dark sub-pixel SP2, the area of the whole dark sub-pixel SP2 is at least the area covering three thin film transistors, and when the curved display panel is bent, even if the alignment film is pressed by the isolation column 50, the liquid crystal molecules 60 around the isolation column 50 are disordered and transmit light, and the area of the dark sub-pixel SP2 is large enough, the problem of light leakage is not easy to occur.

Meanwhile, referring to table 1, the aperture ratio of the display panel in the prior art is significantly reduced with the increase of the density of the isolation pillars, and for the display panel provided by the present invention, since the isolation pillars are disposed in the dark sub-pixels, the aperture ratio of the display panel provided by the present invention is not reduced with the increase of the density of the isolation pillars, and the compression resistance of the display panel can be increased by increasing the density of the isolation pillars while the aperture ratio of the display panel is not changed.

In summary, with the display panel provided in this embodiment, through a new pixel and device arrangement and design manner, every three thin film transistors in the display panel are concentrated in one dark sub-pixel, and the isolation pillar is also disposed in the dark sub-pixel, on one hand, the arrangement of the thin film transistors is only concentrated, and the aperture ratio is not reduced, and on the other hand, the dark sub-pixel can provide a sufficient dark space size for the isolation pillar, so that light leakage around the isolation pillar is not easy to occur.

In one embodiment, with continued reference to fig. 6 and 7, the three tfts 11 in one dark sub-pixel SP2 are the first tft 11a, the second tft 11b and the third tft 11c, respectively. Wherein the first thin film transistor 11a is used for controlling the display of one light-transmitting sub-pixel SP11 (i.e. blue light-transmitting sub-pixel B in the drawing) adjacent to the dark sub-pixel SP2 in the second direction x, and with particular reference to fig. 6 and 7, the drain of the first thin film transistor 11a is connected to the pixel electrode of the blue light-transmitting sub-pixel B; the second thin film transistor 11b is used to control the display of another light-transmitting sub-pixel SP12 (i.e., a red light-transmitting sub-pixel R in the drawing) adjacent to the dark sub-pixel SP2 in the second direction x, and particularly, in conjunction with fig. 6 and 7, the drain of the second thin film transistor 11b is connected to the pixel electrode of the red light-transmitting sub-pixel R; the third thin film transistor 11c is used to control the display of one light-transmitting sub-pixel SP13 (i.e., the green light-transmitting sub-pixel G in the drawings) adjacent to the dark sub-pixel SP2 in the third direction Y, and particularly, in conjunction with fig. 6 and 7, the drain of the third thin film transistor 11c is connected to the pixel electrode of the green light-transmitting sub-pixel G.

By adopting the display panel provided by the embodiment, the three thin film transistors in the dark sub-pixels respectively control the display of one light-transmitting sub-pixel nearby, the connection wiring of the thin film transistors and the pixel electrodes is simplified, and the wiring of the dark sub-pixels is simple and the area is small.

In an embodiment, with continued reference to fig. 6 and 7, two of the three tfts 11 in one dark sub-pixel SP2 are connected to the same first signal line 12, two of the three tfts 11 are connected to the same second signal line 13, two of the three tfts 11 connected to the same first signal line 12 are connected to different second signal lines 13, and two of the three tfts 11 connected to the same second signal line 13 are connected to different first signal lines 12.

That is, of the three thin film transistors 11 in one dark sub-pixel SP2, any two thin film transistors 11 are connected to either different first signal lines 12 or different second signal lines 13, or the connected first signal lines 12 and second signal lines 13 are different, and the first signal lines 12 and second signal lines 13 to which no two thin film transistors 11 are connected are the same.

With the display panel provided by this embodiment, the first signal line and the second signal line, which are connected by any two thin film transistors, do not exist in the three thin film transistors in the dark sub-pixel, and the three thin film transistors can be controlled independently of each other, which is helpful for realizing a high PPI.

Specifically, in an embodiment, fig. 8 is a schematic structural diagram of a dark sub-pixel of another display panel according to an embodiment of the present invention, where fig. 7 shows a structure of the dark sub-pixel in the first pixel group SPG1, and fig. 8 shows a structure of the dark sub-pixel in the second pixel group SPG 2. In the dark sub-pixel, two thin film transistors of the three thin film transistors are connected with the same first signal line, two thin film transistors are connected with the same second signal line, two thin film transistors connected with the same first signal line are connected with different second signal lines, and two thin film transistors connected with the same second signal line are connected with different first signal lines.

Specifically, with continued reference to fig. 6 and 7, in the first pixel group SPG1, of the three thin film transistors 11 in the dark sub-pixel SP2, the first thin film transistor 11a and the second thin film transistor 11b are connected to the same first signal line 12-1, the first thin film transistor 11a is connected to the second signal line 13-3, the second thin film transistor 11b is connected to the second signal line 13-4, and the first thin film transistor 11a and the second thin film transistor 11b are connected to different second signal lines; the second thin film transistor 11b and the third thin film transistor 11c are connected with the same second signal line 13-4, the second thin film transistor 11b is connected with the first signal line 12-1, the third thin film transistor 11c is connected with the first signal line 12-2, and the second thin film transistor 11b and the third thin film transistor 11c are connected with different first signal lines; the first thin film transistor 11a is connected to the first signal line 12-1 and the second signal line 13-3, the third thin film transistor 11c is connected to the first signal line 12-2 and the second signal line 13-4, and the first thin film transistor 11a and the third thin film transistor 11c are connected to different second signal lines and different first signal lines.

With continued reference to fig. 6 and 8, in the second pixel group SPG2, of the three tfts 11 in the dark sub-pixel SP2, the first tft 11a and the second tft 11b are connected to the same first signal line 12-3, the first tft 11a is connected to the second signal line 13-1, the second tft 11b is connected to the second signal line 13-2, and the first tft 11a and the second tft 11b are connected to different second signal lines; the first thin film transistor 11a and the third thin film transistor 11c are connected with the same second signal line 13-1, the first thin film transistor 11a is connected with the first signal line 12-3, the third thin film transistor 11c is connected with the first signal line 12-2, and the first thin film transistor 11a and the third thin film transistor 11c are connected with different first signal lines 12; the second thin film transistor 11b is connected to the first signal line 12-3 and the second signal line 13-2, the third thin film transistor 11c is connected to the first signal line 12-2 and the second signal line 13-1, and the second thin film transistor 11b and the third thin film transistor 11c are connected to a different second signal line and a different first signal line.

That is, of the three thin film transistors 11 in one dark sub-pixel SP2, two thin film transistors 11 arranged in the second direction x, that is, the first thin film transistor 11a and the second thin film transistor 11b, are connected to the same first signal line (that is, the first signal line 12-1 or the first signal line 12-3), and the first signal line extends in the second direction x, so that the two thin film transistors 11 arranged in the second direction x are connected to the same first signal line, and the other thin film transistor 11, that is, the third thin film transistor 11c is connected to another first signal line (that is, the first signal line 12-2) closer thereto, and the connection of the three thin film transistors 11 to the first signal line is simplified in wiring.

By adopting the display panel provided by the embodiment, the wiring of the thin film transistor can be further simplified, the occupied area of the thin film transistor is reduced, namely, the area of the dark sub-pixel is reduced, and therefore the aperture opening ratio of the display panel is improved.

In an embodiment, fig. 9 is a schematic view of a film structure of a first substrate of a display panel according to an embodiment of the present invention, as shown in fig. 9, a thin film transistor 11 in a first substrate 10 includes an active layer 114, a gate electrode 111, a source electrode 112, and a drain electrode 113, a pixel electrode 14 is disposed in a light-transmitting sub-pixel, the gate electrode 111 is connected to a scan line (i.e., the first signal line 12 in fig. 9), the source electrode 112 is connected to a data line (i.e., the second signal line 13 in fig. 9), and the drain electrode 113 is connected to the pixel electrode 14.

The first substrate 10 includes film layers having: a base layer 101, which is usually a glass substrate, or a flexible material such as PI for a flexible display panel; a first metal layer 102 disposed on the base layer 101 near the second substrate, wherein the scan line (i.e. the first signal line 12 in fig. 9) and the gate 111 are disposed on the first metal layer 101, and it should be noted that fig. 9 does not show the second substrate, and actually, the position of the second substrate is located on the upper side of the first substrate 10 in the first direction z in fig. 9; a second metal layer 104 disposed on a side of the first metal layer 102 away from the substrate layer 101, wherein the data line (i.e. the second signal line 13 in fig. 9), the source 112 and the drain 113 are disposed on the second metal layer 104; the semiconductor material layer 103 is disposed between the second metal layer 104 and the base layer 101, wherein the active layer 114 is disposed on the semiconductor material layer 103, and specifically, the thin film transistor 11 in the first substrate 10 may adopt a top gate structure or a bottom gate structure, which is not limited in the present invention. When the thin film transistor 11 adopts a top gate structure, that is, the gate 111 of the thin film transistor 11 is located on the active layer 114, the semiconductor material layer 103 is disposed between the first metal layer 102 and the substrate layer 101; when the thin film transistor 11 adopts a bottom gate structure, i.e. the gate 111 of the thin film transistor 11 is located below the active layer 114, as shown in fig. 9, the semiconductor material layer 103 is disposed between the second metal layer 104 and the first metal layer 102; and a thin film conductive layer 105 disposed on the second metal layer 104 away from the base layer 101, wherein the pixel electrode 114 is disposed on the thin film conductive layer 105.

It should be noted that the film structure between the base layer 101, the first metal layer 102, the semiconductor material layer 103, the second metal layer 104 and the thin film conductive layer 105 may adopt any film structure in the prior art, which is not described herein again.

By adopting the display panel provided by the embodiment, each part of the same thin film transistor arranged in the dark sub-pixel is positioned on different film layers, and the wiring of the thin film transistor is simplified.

In an embodiment, fig. 10 is a projection view of a thin film transistor of a display panel on a base layer of a first substrate according to an embodiment of the present invention, please refer to fig. 10, an orthographic projection of an active layer of each thin film transistor on the base layer is "U" shaped, taking a first thin film transistor 11a as an example, an active layer 114a thereof includes a first leg portion 1141a, a second leg portion 1142a and a first connection portion 1143a connected between the first leg portion 1141a and the second leg portion 1142a, the first leg portion 1141a is connected to a drain electrode 113a, and the second leg portion 1142a is connected to a source electrode 112 a.

In an embodiment, please refer to fig. 9 and fig. 10, still take the first tft 11a as an example, and the other two tfts are designed in the same way. The source 112a is a part of the second signal line 13 in the dark sub-pixel, the shape of the orthographic projection of the source 112a on the base layer is also "U-shaped", the source 112a includes a third leg 1121a, a fourth leg 1122a, and a second connection portion 1123a connected between the third leg 1121a and the fourth leg 1122a, and the second thin-film transistor 11b and the third thin-film transistor 11c share the same source 112 b.

For the first thin film transistor 11a, the first leg 1141a and the second leg 1142a of the active layer 114a, the third leg 1121a and the fourth leg 1122a of the source 112 each extend in the second direction x, and the first connection portion 1143a of the active layer 114a and the second connection portion 1123a of the source 112 each extend in the third direction y; for the second thin film transistor 11b, the first leg 1141b and the second leg 1142b of the active layer 114b, the third leg 1121b and the fourth leg 1122b of the source 112 each extend in the second direction x, and the first connection portion 1143b of the active layer 114b and the second connection portion 1123b of the source 112 each extend in the third direction y; for the third thin film transistor 11c, the first leg portion 1141c and the second leg portion 1142c of the active layer 114c each extend in the third direction y, and the first connection portion 1143c of the active layer 114c extends in the second direction x.

For the first thin film transistor 11a, the first connection portion 1143a of the active layer 114a overlaps the second connection portion 1123a of the source 112a in the first direction, and the second leg portion 1142a of the active layer 114a overlaps the fourth leg portion 1122a of the source 112a in the first direction z and is connected through the first via Va; for the second thin film transistor 11b, the first connection portion 1141b of the active layer 114b overlaps the second connection portion 1143b of the source 112b in the first direction, and the second leg portion 1142b of the active layer 114b overlaps the fourth leg portion 1122b of the source 112b in the first direction z and is connected through the second via Vb; for the third thin film transistor 11c, the second leg portion 1142c of the active layer 114c and the third leg portion 1121b of the source electrode 112b are connected by a third via Vc.

The drain 113a of the first thin film transistor 11a is located within the "U-shaped" opening of the source 112a of the first thin film transistor 11a, the drain 113b of the second thin film transistor 11b is located within the "U-shaped" opening of the source 112b of the second thin film transistor 11b, and the drain 113c of the third thin film transistor 11c is located outside the "U-shaped" openings of the source 112a of the first thin film transistor 11a and the source 112b of the second thin film transistor 11 b.

By adopting the display panel provided by the embodiment, the wiring of the three thin film transistors is compact, the occupied area of the three thin film transistors is reduced, the size of the dark sub-pixel is also reduced, and the aperture opening ratio is improved.

In one embodiment, the isolation pillars are disposed within partially dark subpixels. In another embodiment, as shown in fig. 5, one isolation pillar 50 is disposed in each dark sub-pixel SP 2. For the display panel with the isolation columns arranged in each dark sub-pixel, the pressure resistance of the display panel can be improved while the aperture ratio of the display panel is not reduced.

In one embodiment, referring to FIG. 6, the isolation pillar 50 is disposed at the geometric center of the dark sub-pixel SP2, for example, for a rectangular sub-pixel, the isolation pillar 50 is disposed at the intersection of the diagonals of the rectangle. By adopting the display panel provided by the embodiment, the isolation column is arranged at the geometric center of the dark sub-pixel, so that the light leakage problem caused by extruding the isolation column in each direction can be better shielded.

In an embodiment, the display panel is a curved display panel, and the orthographic projection of the separation pillars on the display panel after the display panel is bent is in the dark sub-pixels.

The display panel provided in the embodiment of the present invention is a display device, and the display device includes any one of the display panels described above, and has the features and effects of the display panel described above, which are not described herein again. Fig. 11 is a schematic view of a display device provided by the present invention, and as shown in fig. 11, the display device provided by this embodiment may be a curved vehicle-mounted display, which includes a display panel 100. The display panel 100 is any one of the display panels provided in the above embodiments.

According to the embodiment, the display panel and the display device of the invention have the following beneficial effects:

Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display panel is characterized in that a plurality of pixels are arranged in a matrix,

the display panel comprises a first substrate and a second substrate which are oppositely arranged in a first direction, and an isolation column which is arranged between the first substrate and the second substrate in the first direction;

the first substrate is provided with thin film transistors, first signal lines which are repeatedly arranged along a third direction and extend along the second direction, and second signal lines which are repeatedly arranged along the second direction and extend along the third direction, wherein the second direction is crossed with the third direction and is vertical to the first direction;

the display panel has a display area and a non-display area, and the first signal line and the second signal line intersect to define a plurality of sub-pixels in the display area;

the plurality of sub-pixels are sequentially arranged in the second direction to form a pixel row; a plurality of sub-pixels are sequentially arranged in the third direction to form a pixel column; the sub-pixels comprise a light-transmitting sub-pixel with a light-transmitting area and a dark sub-pixel with a dark area;

the plurality of pixel rows comprise a first pixel row and a second pixel row which are repeatedly and alternately arranged in a third direction, the first pixel row comprises a first subpixel group which is repeatedly arranged, the first subpixel group comprises three light-transmitting subpixels and one dark subpixel which are sequentially arranged in the second direction, the second pixel row comprises a second subpixel group which is repeatedly arranged, and the second subpixel group comprises one light-transmitting subpixel, one dark subpixel and two light-transmitting subpixels which are sequentially arranged in the second direction; the dark subpixels of the first subpixel group are separated from the dark subpixels of the second subpixel group by one of the pixel columns in the second direction;

the dark sub-pixel is internally provided with three thin film transistors which respectively control the display of three light-transmitting sub-pixels adjacent to the dark sub-pixel;

the isolation column is arranged in the dark sub-pixel; each dark sub-pixel is provided with 2 isolating columns;

the display panel is a curved surface display panel, and the orthographic projection of the isolation column on the display panel is in the dark sub-pixel after the display panel is bent;

a black matrix disposed on the second substrate, the black matrix covering the dark sub-pixels.

2. The display panel according to claim 1,

the three thin film transistors are respectively a first thin film transistor, a second thin film transistor and a third thin film transistor, the first thin film transistor is used for controlling the display of one light-transmitting sub-pixel adjacent to the dark sub-pixel in the second direction, the second thin film transistor is used for controlling the display of the other light-transmitting sub-pixel adjacent to the dark sub-pixel in the second direction, and the third thin film transistor is used for controlling the display of one light-transmitting sub-pixel adjacent to the dark sub-pixel in the third direction.

3. The display panel according to claim 2,

three among the thin film transistor, two thin film transistor connects same root the first signal line, two thin film transistor connects same root the second signal line, and, connect same root two of first signal line thin film transistor connects differently the second signal line, connects same root two of second signal line thin film transistor connects differently the first signal line.

4. The display panel according to claim 3,

in the dark sub-pixel of the first sub-pixel group, the first thin film transistor and the second thin film transistor are connected with the same first signal line and different second signal lines, and the second thin film transistor and the third thin film transistor are connected with the same second signal line and different first signal lines;

in the dark sub-pixel of the second sub-pixel group, the first thin film transistor and the second thin film transistor are connected with the same first signal line and different second signal lines, and the first thin film transistor and the third thin film transistor are connected with the same second signal line and different first signal lines.

5. The display panel according to claim 4,

the first signal line is a scan line and the second signal line is a data line, or the first signal line is a data line and the second signal line is a scan line.

6. The display panel according to claim 5,

the thin film transistor comprises an active layer, a grid electrode, a source electrode and a drain electrode, wherein a pixel electrode is arranged in the photon-transmitting pixel, the grid electrode is connected with the scanning line, the source electrode is connected with the data line, and the drain electrode is connected with the pixel electrode; the first substrate further includes:

a base layer;

the first metal layer is arranged on one side, close to the second substrate, of the base layer, and the scanning lines and the grid electrodes are arranged on the first metal layer;

the second metal layer is arranged on one side, away from the base layer, of the first metal layer, and the data line, the source electrode and the drain electrode are arranged on the second metal layer;

a semiconductor material layer disposed between the second metal layer and the base layer, wherein the active layer is disposed on the semiconductor material layer;

and the thin film conducting layer is arranged on one side, away from the base layer, of the second metal layer, and the pixel electrode is arranged on the thin film conducting layer.

7. The display panel according to claim 6,

the active layer is in a U shape in the orthographic projection of the substrate layer, the active layer comprises a first leg, a second leg and a first connecting portion connected between the first leg and the second leg, the first leg is connected with the drain electrode, and the second leg is connected with the source electrode.

8. The display panel according to claim 7,

the first signal line is a scanning line, and the second signal line is a data line;

the source electrode is a part of the data line in the dark sub-pixel, the orthographic projection of the source electrode on the substrate layer is in a U shape, the source electrode comprises a third leg part, a fourth leg part and a second connecting part connected between the third leg part and the fourth leg part, and the second thin film transistor and the third thin film transistor share the same source electrode;

for the first and second thin film transistors, the first and second legs of the active layer, the third and fourth legs of the source electrode all extend in the second direction, and the first and second connections of the active layer and the second connection of the source electrode all extend in the third direction; for the third thin film transistor, the first and second legs of the active layer each extend in the third direction, the first connection of the active layer extends in the second direction;

for the first thin film transistor, a first connection portion of the active layer overlaps with a second connection portion of the source electrode in the first direction, and a second leg portion of the active layer overlaps with a fourth leg portion of the source electrode in the first direction and is connected through a first via; for the second thin film transistor, a first connection portion of the active layer overlaps with a second connection portion of the source electrode in the first direction, and a second leg portion of the active layer overlaps with a fourth leg portion of the source electrode in the first direction and is connected through a second via; for the third thin film transistor, the second leg of the active layer and the third leg of the source are connected by a third via.

9. The display panel according to claim 1,

the light-transmitting sub-pixel is a red sub-pixel, a green sub-pixel or a blue sub-pixel.

10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.