CN108429707B - Time trigger service repeater and method adapting to different transmission rates - Google Patents

Time trigger service repeater and method adapting to different transmission rates Download PDF

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CN108429707B
CN108429707B CN201810110044.8A CN201810110044A CN108429707B CN 108429707 B CN108429707 B CN 108429707B CN 201810110044 A CN201810110044 A CN 201810110044A CN 108429707 B CN108429707 B CN 108429707B
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module
data frame
scheduling
window
setting
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CN108429707A (en
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邱智亮
陈郝明
潘伟涛
周俊
高毅
王方圆
金守英
张式琪
张森
刘梅
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Xidian University
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Xidian University
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/24Traffic characterised by specific attributes, e.g. priority or QoS
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/32Flow control; Congestion control by discarding or delaying data units, e.g. packets or frames
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • H04L49/9084Reactions to storage capacity overflow
    • H04L49/9089Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
    • H04L49/9094Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element

Abstract

A time trigger service repeater and method adapting to different transmission rates is disclosed, wherein the repeater comprises a filtering module, a full-interconnection switching network module, a scheduling module and a buffer module. The method comprises the following steps: obtaining current window information, prefetching next window information, starting a receiving window, receiving a data frame, judging the correctness of a service identification number, writing the data frame into a cache region, circularly redundantly checking the data frame, discarding the data frame with wrong check and long frame length, closing the receiving window, reading the data frame from the cache region and outputting the data frame to the outside, and modifying the current window information. The invention filters and forwards the time-triggered service data frames with different transmission rates received by the switching node under the time-triggered Ethernet standard, and simultaneously reduces the requirement of the repeater on the input rate of external scheduling information by adopting a mode of prefetching the scheduling information of the next window.

Description

Time trigger service repeater and method adapting to different transmission rates
Technical Field
The invention belongs to the technical field of communication, and further relates to a time-triggered service repeater and a method suitable for different transmission rates in the technical field of network communication. The invention can realize the filtering and forwarding of the time-triggered service data frames with different transmission rates received by the repeater in the time-triggered Ethernet system under the time-triggered Ethernet standard.
Background
In order to meet the demand of the industrial control system for the communication capability between the nodes, it is desirable to apply the ethernet technology with low cost, high bandwidth and high flexibility to the industrial control network. However, the transmission of data packets in the ethernet standard is "best effort" and cannot guarantee the real-time and integrity of critical control data transmission. To solve this problem, the international society of automation engineers has proposed a time triggered ethernet standard, which divides the traffic in the network into time triggered traffic and event triggered traffic. Where time-triggered traffic services critical control data in the network and event-triggered traffic services non-critical data. For the time-triggered service, the system plans the transmission time and the transmission path in advance before running, and ensures that no conflict exists in the transmission process; the transmission of the event-triggered traffic is exactly the same as the normal ethernet transport service.
Time triggered ethernet is a typical switched network, and the system includes repeaters for time triggered traffic. According to the standard, the time-triggered traffic forwarder must have a schedule reading capability, and can open an input port, close the input port, and forward traffic data frames to a designated output port at a specific system time according to a time schedule. In addition, the repeater must perform filtering operations on the received time-triggered traffic, discarding data frames with illegal arrival times, illegal traffic identification numbers, and illegal data frame lengths. In addition, in order to meet the requirement of the critical control data on transmission real-time performance, the repeater must ensure lower forwarding delay and extremely low delay jitter when forwarding.
The patent document of Beijing computer technology and application research application thereof provides a highly synchronous time-triggered Ethernet device and method (application number: 201710616838.7, publication number: CN 107483135A). The device comprises a switching/control logic, a local clock, a synchronous primitive receiving module, a clock synchronization module, a time trigger, a central controller, a task scheduling control module, a data buffer area, a sending buffer area, a synchronous primitive sending module and a configuration memory, wherein the switching/control logic is used for controlling a network end system connected with the switching/control logic by a switch; the local clock is used for providing an overall working clock of the switch; the system comprises a synchronization primitive receiving module, a central controller and a clock synchronization primitive processing module, wherein the synchronization primitive receiving module is used for receiving data sent by the end system, distinguishing a clock synchronization primitive from a transmission data frame and transmitting the two parts of data to the central controller; the clock synchronization module is used for receiving a clock synchronization control command sent by the central controller, generating clock synchronization specific information and realizing clock synchronization; the time trigger is used for providing time trigger conditions and time information required by the time trigger event; the central controller is used for controlling the work of each module in the switch; the task scheduling control module is used for carrying out classification control on the data received in the switch according to the task scheduling table and putting different data into corresponding data buffers; the data buffer area is used for storing corresponding data to be sent; the sending buffer area is used for caching the data which needs to be sent currently after the task scheduling control; a synchronization primitive sending module, configured to send a synchronization primitive; and the configuration memory is used for storing the configuration information of the switch. The device has the disadvantages that the data buffer area lacks the filtering function of the overlong data frame, and the overlong data frame cannot be discarded, so that the overlong data frame excessively occupies the network bandwidth.
The method disclosed in the patent comprises the steps of firstly, electrifying, loading and initializing, and loading configuration information; secondly, receiving data and clock synchronization primitive, wherein the exchanger receives data transmitted by the network; thirdly, decomposing the synchronization primitive and the data frame; fourthly, preprocessing a clock primitive; fifthly, a time synchronization step, namely completing the clock synchronization of the switch; sixthly, a data classification caching step, namely caching the data into corresponding data queues respectively; seventhly, a data awaiting step of putting the data to be sent into a sending buffer area; eighth, primitive insertion operation inserts a clock synchronization primitive in the transmit link. The method has the defects that the data frame is cached twice, and the forwarding time delay introduced by the method is larger compared with the method of caching once because the forwarding time delay is introduced by each caching.
Gapeng flying proposed a time-triggered switching layer apparatus and method in its published paper "design of time-triggered Ethernet switch" (Western Ann electronic technology university, Master academic paper, published: 11 months 2014). The device comprises an input control module, a switching matrix module, an output control module, a scheduling module, a time synchronization module, a central monitoring unit interface and a CPU interface, wherein the input control module is used for opening a data frame receiving window and filtering a data frame with wrong arrival time according to scheduling information; the switching matrix module realizes the switching of data frames among different input and output interfaces according to the configuration information sent by the scheduling module; the output control module is used for sending the exchanged time-triggered service data frame out of the exchange layer; the scheduling module implements configuration of the switching matrix according to the content of the time scheduling table; the time synchronization module analyzes the clock synchronization frame to complete clock synchronization; the central monitoring unit interface is used for uploading parameters to be monitored in the exchange process to the CPU; and the CPU interface is used for establishing a communication channel with the CPU. The device has the defects that the inside of the exchange layer is lack of a buffer area of the data frame, and the transmission rate of the data frame cannot be changed when the data frame is transmitted in a data channel inside the repeater, so that the device cannot finish the retransmission of the data frame with different transmission rates.
The method disclosed in this paper includes the steps of first, initializing, receiving configuration data of the CPU to the scheduling module through the CPU interface; secondly, the input control module opens a receiving window of a time-triggered service exchange layer according to the scheduling information given by the scheduling module; thirdly, the switching matrix module opens a data transmission channel from the input control module to the corresponding output control module according to the scheduling information; fourthly, the output control module sends the data to be output to a network outside the exchange layer; fifthly, the scheduling module reads next piece of scheduling information and sends the information to the input control module and the exchange module. The method has the disadvantages that the scheduling module reads the next piece of scheduling information after outputting the data frame, and the next piece of scheduling information reading must be completed before the next forwarding is started, so when the time interval between two times of forwarding is short, the method requires the scheduling information to be read out at a high speed.
Disclosure of Invention
The present invention aims to address the above-mentioned deficiencies of the prior art and to provide a time triggered service repeater and method that can accommodate different transmission rates. The invention can realize the filtering and forwarding of the time-triggered service data frames with different transmission rates in the time-triggered Ethernet, and reduces the requirement of the transponder on the reading rate of the scheduling information by prefetching the scheduling information of the next window.
In order to achieve the above purpose, the idea of the invention is as follows: firstly, obtaining current window scheduling information and next window scheduling information, a full internet module strobes a data channel according to the current window scheduling information, a scheduling module opens a receiving window when a system clock value is equal to a window opening time point, a filtering module receives a data frame input from the outside and discards the data frame with an error service identification number, a full internet switching network module outputs the data frame to a buffer area module through the strobed data channel, then the buffer area module discards a cyclic redundancy check error and a overlong data frame, the writing channel rate of the buffer area is set to the rate of the data frame input from the outside, the data frame is written into the buffer area, finally the scheduling module closes the receiving window when the system clock value is equal to a sending time point, the buffer area module sets the reading channel rate of the buffer area to the rate of the data output to the outside, and the data frame is read out from the buffer area, and output to the outside to complete the forwarding.
In order to achieve the above object, the repeater of the present invention includes a buffer module, a scheduling module, a full interconnect switching network module, and a filtering module; the input end of the cache region module is connected with the output end of the full-interconnection switching network module and the output end of the scheduling module, and the output end of the cache region module is connected with the external output; the input end of the scheduling module is connected with the clock input and the scheduling information input of an external system, and the output end of the scheduling module is connected with the input end of the full-interconnection switching network module and the input end of the cache region module; the input end of the full-interconnection switching network module is connected with the output end of the filtering module and the output end of the scheduling module, and the output end of the full-interconnection network module is connected with the input end of the filtering module and the input end of the cache region module; the input end of the filter module is connected with the input end of an external data frame, and the output end of the filter module is connected with the input end of the full-interconnection switching network module; wherein:
the cache area module is used for writing all zeros into all address spaces of the storage area during initialization; judging whether the rate of the data frame input from the outside is 1000Mbps, if so, setting the clock cycle of the register writing channel to be 8ns, and setting the channel bit width to be 8bit, otherwise, setting the clock cycle of the register writing channel to be 80ns, and setting the channel bit width to be 8 bit; writing the data frame into a memory inside the module through a register writing channel; judging whether the frame length of the data frame is larger than the maximum service frame length, if so, discarding the data frame, otherwise, circularly redundantly checking the data frame; shifting the bit sequence of the data frame by 32 bits to the left, and taking the numerical value of the obtained sequence as a value to be checked; dividing 79764919 by the value to be checked, and taking the obtained remainder as the check value of the data frame; judging whether the data frame check result value is equal to 4294967295, if so, setting a write-in completion signal to be high level, otherwise, discarding the data frame; when receiving a data frame output pulse, judging whether the rate of the data frame output to the outside is 1000Mbps, if so, setting the clock period of a register reading channel in the module to be 8ns, and setting the channel bit width to be 8 bit; otherwise, setting the clock period of a register reading channel in the module to be 80ns, and setting the channel bit width to be 8 bits; opening a register reading channel, and reading out a data frame from a memory inside the module; outputting the read data frame to the outside of the repeater;
the scheduling module is used for setting the count value of the meter reading address counter to zero during initialization; setting the upper limit value of a meter reading address counter during initialization; obtaining a window closing time point by using a scheduling information acquisition method; when the current window information is obtained, the scheduling information and the window closing time point are stored in a current window information register; when next window information is obtained, storing the scheduling information and the window closing time point into a next window information register; judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero, otherwise, adding 1 to the count value of the meter reading address counter; receiving a system clock value input from the outside; when the system clock value is between the starting time point and the sending time point in the current window information, setting the window starting signal to be a high level; outputting the current window information to a full-interconnection switching network module and a cache area module; when the system clock value is equal to the register value of the current sending time point, setting the window opening signal to be a low level; judging whether the writing completion signal is in a high level, if so, generating a data frame output pulse, otherwise, not generating any pulse; storing the prefetched next window information into a current window information register;
the all-interconnection switching network module is used for acquiring the one-hot code of the serial number of the service input port by a 4-16 coding method and taking the one-hot code as a gating signal; using a data channel in the gating signal gating module, and outputting a window opening signal and a receivable service identification number to the filtering module through the data channel; outputting the data frame to a buffer module through the gated data channel;
the filtering module is used for judging whether a window opening signal of a data frame received by the filtering module and input from the outside is high level, if so, extracting bytes 5 and 6 of the data frame to be used as a service identification number of the data frame, and if not, discarding the data frame; and judging whether the service identification number of the data frame is equal to the receivable service identification number, if so, outputting the data frame to a full-interconnection switching network module, and otherwise, discarding the data frame.
The method of the invention uses a time trigger service repeater to realize the filtering and repeating functions of data frames with different transmission rates received by a time trigger service switching node, and reduces the requirement of the repeater on the input rate of external scheduling information by prefetching the next window information, and the specific steps comprise the following steps:
(1) initialization:
(1a) the cache area module writes all zeros into all address spaces of the storage area in the cache area module;
(1b) setting the count value of a meter reading address counter in a scheduling module to zero;
(1c) setting an upper limit value of a meter reading address counter;
(2) acquiring current window information:
(2a) the scheduling module obtains a window closing time point by using a scheduling information acquisition method;
(2b) storing the scheduling information and the window closing time point into a current window information register;
(2c) judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero and then executing the step (3); otherwise, executing the step (3) after adding 1 to the count value of the meter reading address counter;
(3) prefetch next window information:
(3a) the scheduling module acquires scheduling information input from the outside by using a scheduling information acquisition method and obtains a window closing time point;
(3b) storing the scheduling information and the window closing time point into a next window information register;
(3c) judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero and then executing the step (4); otherwise, executing the step (4) after adding 1 to the count value of the reading table address counter;
(4) opening a window:
(4a) the scheduling module receives a system clock value input from the outside;
(4b) when the system clock value is between the starting time point and the sending time point in the current window information, the scheduling module sets the window starting signal to be high level;
(4c) the scheduling module outputs the current window information to the full-interconnection switching network module and the cache region module;
(4d) the full-interconnection switching network module obtains the one-hot code of the serial number of the service input port by a 4-16 coding method, and uses the one-hot code as a gating signal;
(4e) the gating signal is used for gating a data channel inside the full-interconnection switching network module, and the window opening signal and the receivable service identification number are output to the filtering module through the data channel;
(5) judging whether a window opening signal of a data frame received by the filtering module and input from the outside is a high level, if so, executing the step (6); otherwise, executing the step (10) after discarding the data frame;
(6) the filtering module extracts the 5 th byte and the 6 th byte of the data frame as the service identification number of the data frame;
(7) the filtering module judges whether the service identification number of the data frame is equal to the receivable service identification number, if so, the step (8) is executed; otherwise, executing the step (10) after discarding the data frame;
(8) writing a data frame:
(8a) the filtering module outputs the data frame to the full-interconnection switching network module;
(8b) the full-interconnection switching network module outputs the data frame to the buffer area module through the gated data channel;
(8c) the cache region module judges whether the rate of the data frame input from the outside is 1000Mbps, if yes, the step (8d) is executed; otherwise, executing step (8 e);
(8d) setting the clock period of a register write channel in a cache region module to be 8ns, and setting the channel bit width to be 8 bit;
(8e) setting the clock period of a register write channel in a cache region module to be 80ns, and setting the channel bit width to be 8 bits;
(8f) writing the data frame into a memory inside the module through a register writing channel of the cache region module;
(9) the buffer area module judges whether the frame length of the data frame is larger than the maximum service frame length, if so, the step (11) is executed after the data frame is discarded; otherwise, executing step (10);
(10) cyclic redundancy check data frame:
(10a) the buffer area module shifts the bit sequence of the data frame to the left by 32 bits, and the numerical value of the obtained sequence is used as a value to be checked;
(10b) dividing 79764919 by the value to be checked, and taking the obtained remainder as the check value of the data frame;
(10c) judging whether the data frame check value is equal to 4294967295, if so, executing the step (10 e); otherwise, executing step (10 d);
(10d) the buffer area module discards the data frame;
(10e) the buffer area module sets a write-in completion signal to be a high level;
(11) and (3) closing the window:
(11a) the scheduling module receives a system clock value input from the outside;
(11b) when the system clock value is equal to the register value of the current sending time point, the scheduling module sets the window opening signal to be a low level;
(12) the scheduling module judges whether the write-in completion signal is in a high level state, if so, the scheduling module generates a data frame output pulse and then executes the step (13); otherwise, executing step (14);
(13) reading out a data frame:
(13a) when the buffer module receives the data frame output pulse, judging whether the rate of the data frame output to the outside is 1000Mbps, if so, executing the step (13 b); otherwise, executing step (13 c);
(13b) setting the clock period of a register reading channel in a cache region module to be 8ns, and setting the channel bit width to be 8 bit;
(13c) setting the clock period of a register reading channel in a cache region module to be 80ns, and setting the channel bit width to be 8 bits;
(13d) opening a register reading channel of a buffer area module, and reading a data frame from a memory inside the module;
(13e) the buffer area module outputs the read data frame to the outside of the transponder;
(14) and modifying the current window information:
the scheduling module stores the prefetched next window information into the current window information register, and the repeater completes the filtering and forwarding of the data frame.
Compared with the prior art, the invention has the following advantages:
firstly, because the buffer module in the repeater of the present invention has the function of judging whether the frame length of the data frame is greater than the maximum service frame length, if so, discarding the data frame, otherwise, checking the data frame by cyclic redundancy, the problem that the data buffer of the prior art lacks the filtering function of the overlong data frame, and cannot discard the overlong data frame, so that the overlong data frame occupies the network bandwidth excessively is overcome, and the repeater of the present invention has the advantage of avoiding the overlong data frame occupying the network bandwidth excessively.
Secondly, because the buffer module in the repeater of the invention has the function of judging whether the rate of the data frame input from the outside is 1000Mbps, if so, the clock cycle of the register writing channel is set to 8ns, and the channel bit width is set to 8bit, otherwise, the clock cycle of the register writing channel is set to 80ns, and the channel bit width is set to 8bit, the problem that the prior art lacks the buffer of the data frame, the transmission rate of the data frame cannot be changed when the data frame is transmitted in the data channel in the repeater, so that the data frame forwarding at different transmission rates cannot be completed is solved, and the repeater of the invention has the advantage of being capable of completing the data frame forwarding at different transmission rates.
Thirdly, because the method only executes once buffer area writing and once buffer area reading, the problem that the introduced forwarding time delay is larger than that of a once buffer method because the data frame is buffered twice in the prior art is solved, and the method has the advantage of small forwarding time delay.
Fourthly, after the method of the invention acquires the current window information, the scheduling module acquires the scheduling information input from the outside by using the window information acquisition method, obtains the window closing time point, and stores the scheduling information and the window closing time point into the next window information register.
Drawings
FIG. 1 is a block diagram of a repeater of the present invention;
FIG. 2 is a flow chart of the method of the present invention;
FIG. 3 is a flow chart of the step of writing a data frame in the method of the present invention;
fig. 4 is a flow chart of the step of reading out a data frame in the method of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
The transponder of the present invention is further described with reference to fig. 1.
The repeater comprises a cache area module, a scheduling module, a full-interconnection switching network module and a filtering module; the input end of the cache region module is connected with the output end of the full-interconnection switching network module and the output end of the scheduling module, and the output end of the cache region module is connected with the external output; the input end of the scheduling module is connected with the clock input and the scheduling information input of an external system, and the output end of the scheduling module is connected with the input end of the full-interconnection switching network module and the input end of the cache region module; the input end of the full-interconnection switching network module is connected with the output end of the filtering module and the output end of the scheduling module, and the output end of the full-interconnection network module is connected with the input end of the filtering module and the input end of the cache region module; the input end of the filter module is connected with the input end of the external data frame, and the output end of the filter module is connected with the input end of the full-interconnection switching network module. Wherein:
the cache area module is used for writing all zeros into all address spaces of the storage area during initialization; and judging whether the rate of the data frame input from the outside is 1000Mbps, if so, setting the clock cycle of the register writing channel to be 8ns, and setting the channel bit width to be 8bit, otherwise, setting the clock cycle of the register writing channel to be 80ns, and setting the channel bit width to be 8 bit. And writing the data frame into a memory inside the module through a register writing channel. And judging whether the frame length of the data frame is larger than the maximum service frame length, if so, discarding the data frame, and otherwise, circularly redundantly checking the data frame. And shifting the bit sequence of the data frame by 32 bits to the left, and taking the numerical value of the obtained sequence as a value to be checked. The remainder of the division 79764919 by the value to be checked is used as the data frame check value. And judging whether the data frame check result value is equal to 4294967295, if so, setting a write completion signal to be high level, and otherwise, discarding the data frame. When receiving the data frame output pulse, judging whether the rate of the data frame output to the outside is 1000Mbps, if so, setting the clock cycle of the register reading channel in the module to be 8ns, and setting the channel bit width to be 8bit, otherwise, setting the clock cycle of the register reading channel in the module to be 80ns, and setting the channel bit width to be 8 bit. And opening a register reading channel, and reading the data frame from the memory inside the module. The read data frame is output to the outside of the repeater.
And the scheduling module is used for setting the count value of the meter reading address counter to zero during initialization. And during initialization, setting the upper limit value of a meter reading address counter. And obtaining a window closing time point by using a scheduling information acquisition method. And when the current window information is acquired, the scheduling information and the window closing time point are stored in the current window information register. And when the next window information is obtained, the scheduling information and the window closing time point are stored in a next window information register. And judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero, and otherwise, adding 1 to the count value of the meter reading address counter. A system clock value input from the outside is received. And when the system clock value is positioned between the starting time point and the sending time point in the current window information, setting the window starting signal to be at a high level. And outputting the current window information to the full-interconnection switching network module and the cache area module. And when the system clock value is equal to the register value of the current sending time point, setting the window opening signal to be at a low level. And judging whether the writing completion signal is in a high level, if so, generating a data frame output pulse, and otherwise, not generating any pulse. The prefetched next window information is stored in the current window information register.
The all-interconnection switching network module is used for obtaining the one-hot code of the service input port serial number by a 4-16 coding method and using the one-hot code as a gating signal. And a data channel in the gating signal gating module is used, and the window opening signal and the receivable service identification number are output to the filtering module through the data channel. And outputting the data frame to the buffer area module through the gated data channel.
And the filtering module is used for judging whether a window opening signal of the data frame received by the filtering module from the outside is high level, if so, extracting bytes 5 and 6 of the data frame to be used as a service identification number of the data frame, and otherwise, discarding the data frame. And judging whether the service identification number of the data frame is equal to the receivable service identification number, if so, outputting the data frame to a full-interconnection switching network module, and otherwise, discarding the data frame.
The method of the invention is further described with reference to figure 2.
The method of the invention uses the time trigger service repeater to realize the filtering and repeating functions of the data frames with different transmission rates received by the time trigger service switching node, and reduces the requirement of the repeater on the input rate of the external scheduling information by prefetching the next window information.
And step 1, initializing.
The buffer area module writes all zeros into all address spaces of the storage area in the buffer area module.
And setting the count value of a reading table address counter in the scheduling module to zero.
And setting an upper limit value of a reading table address counter.
And 2, acquiring current window information.
And the scheduling module obtains a window closing time point by using a window information acquisition method.
The scheduling information comprises a window opening time point, a window length, a receivable service identification number, a service maximum frame length and a service input port sequence number.
The window information acquisition method comprises the following steps:
step 1, a scheduling module takes the count value of a meter reading address counter as a reading address and sends out a scheduling information reading request;
step 2, a scheduling module registers scheduling information acquired from the outside;
and 3, adding the window opening time point and the window length in the scheduling information by the scheduling module, and taking the obtained sum as the window closing time point.
And storing the scheduling information and the window closing time point into a current window information register.
Judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero and then executing the step 3; otherwise, step 3 is executed after the count value of the reading table address counter is added by 1.
And 3, prefetching the next window information.
The scheduling module acquires scheduling information input from the outside by using a window information acquisition method and obtains a window closing time point.
The window information acquisition method comprises the following steps:
step 1, a scheduling module takes the count value of a meter reading address counter as a reading address and sends out a scheduling information reading request;
step 2, a scheduling module registers scheduling information acquired from the outside;
and 3, adding the window opening time point and the window length in the scheduling information by the scheduling module, and taking the obtained sum as the window closing time point.
And storing the scheduling information and the window closing time point into a next window information register.
Judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero and then executing the step 4; otherwise, step 4 is executed after the count value of the reading table address counter is added by 1.
And 4, opening the window.
The scheduling module receives a system clock value input from the outside.
And when the system clock value is positioned between the starting time point and the sending time point in the current window information, the scheduling module sets the window starting signal to be at a high level.
The scheduling module outputs the current window information to the full-interconnection switching network module and the buffer area module.
The full-interconnection switching network module obtains the one-hot code of the service input port serial number through a 4-16 coding method, and the one-hot code is used as a gating signal.
The steps of the 4-16 encoding method are as follows:
step 1, opening a 16-bit coding register in a full-interconnection switching network module;
step 2, setting the initial bit code of the coding register to be all zero;
step 3, setting the bit corresponding to the input port serial number in the coding register as 1, and keeping the rest bits unchanged;
and 4, coding the bit code of the coding register as the one-hot code of the service input port serial number.
And the gating signal is used for gating a data channel in the full-interconnection switching network module, and the window opening signal and the receivable service identification number are output to the filtering module through the data channel.
Step 5, judging whether a window opening signal of a data frame received by the filtering module and input from the outside is a high level, if so, executing step 6; otherwise, step 10 is executed after discarding the data frame.
And 6, extracting the 5 th byte and the 6 th byte of the data frame by the filtering module to be used as the service identification number of the data frame.
Step 7, the filtering module judges whether the service identification number of the data frame is equal to the receivable service identification number, if so, the step 8 is executed; otherwise, step 10 is executed after discarding the data frame.
And 8, writing the data frame.
This step is described in further detail below with reference to fig. 3.
Step 1, the filtering module outputs the data frame to the full-interconnection switching network module.
And 2, the full-interconnection switching network module outputs the data frame to the buffer area module through the gated data channel.
And 3, generating an original clock by using a digital phase-locked loop, wherein the period is 8 ns.
And step 4, judging whether the rate of the data frame input from the outside is 1000Mbps by the cache area module, if so, executing the step 5, and otherwise, executing the step 6.
And 5, directly connecting the clock of the register writing channel in the cache region module with the original clock and then executing the 8 th step.
And 6, establishing a cycle counter with the original clock as an input clock, wherein the upper limit value of the counter is 9.
And 7, connecting the carry output of the counter with a clock of a register writing channel in the cache region module.
And step 8, setting the channel bit width of a register write channel in the cache region module to be 8 bits.
And 9, writing the data frame into a memory inside the buffer module through a register writing channel of the buffer module.
Step 9, the buffer module judges whether the frame length of the data frame is larger than the maximum service frame length, if so, the step 10 is executed after the data frame is discarded; otherwise, step 9 is executed.
And step 10, cyclic redundancy check data frames.
Step 1, the buffer module shifts the bit sequence of the data frame to the left by 32 bits, and the value of the obtained sequence is used as the value to be checked.
And step 2, dividing 79764919 by the value to be checked, and taking the remainder as the check value of the data frame.
Step 3, judging whether the check value of the data frame is equal to 4294967295, if so, executing step 5; otherwise, executing step 4.
And step 4, discarding the data frame by the buffer module.
And 5, setting the write-in completion signal to be high level by the buffer area module.
And step 11, closing the window.
The scheduling module receives a system clock value input from the outside.
And when the system clock value is equal to the register value of the current sending time point, the scheduling module sets the window opening signal to be at a low level.
Step 12, the scheduling module judges whether the write-in completion signal is a high level, if so, the scheduling module executes step 13 after generating a data frame output pulse; otherwise, step 14 is performed.
And step 13, reading out the data frame.
This step is described in further detail below with reference to fig. 4.
In step 1, a digital phase-locked loop is used to generate an original clock with a period of 8 ns.
And step 2, judging whether the rate of the data frame output to the outside is 1000Mbps by the cache area module, if so, executing the step 3, and otherwise, executing the step 4.
And 3, directly connecting the clock of the register read channel in the cache region module with the original clock and then executing the step 6.
And 4, establishing a cycle counter with the original clock as an input clock, wherein the upper limit value of the counter is 9.
And 5, connecting the carry output of the counter with a clock of a register reading channel in the cache region module.
And 6, setting the channel bit width of a register reading channel in the cache region module to be 8 bits.
And 7, reading the data frame from the memory inside the module through a register reading channel of the buffer area module.
And 8, outputting the read data frame to the outside of the repeater by the buffer area module.
And step 14, modifying the current window information.
The scheduling module stores the prefetched next window information into the current window information register, and the repeater completes the filtering and forwarding of the data frame.

Claims (5)

1. A time trigger service repeater suitable for different transmission rates is characterized by comprising a buffer module, a scheduling module, a full-interconnection switching network module and a filtering module; the input end of the cache region module is connected with the output end of the full-interconnection switching network module and the output end of the scheduling module, and the output end of the cache region module is connected with the external output; the input end of the scheduling module is connected with the clock input and the scheduling information input of an external system, and the output end of the scheduling module is connected with the input end of the full-interconnection switching network module and the input end of the cache region module; the input end of the full-interconnection switching network module is connected with the output end of the filtering module and the output end of the scheduling module, and the output end of the full-interconnection network module is connected with the input end of the filtering module and the input end of the cache region module; the input end of the filter module is connected with the input end of an external data frame, and the output end of the filter module is connected with the input end of the full-interconnection switching network module; wherein:
the cache area module is used for writing all zeros into all address spaces of the storage area during initialization; judging whether the rate of the data frame input from the outside is 1000Mbps, if so, setting the clock cycle of the register writing channel to be 8ns, and setting the channel bit width to be 8bit, otherwise, setting the clock cycle of the register writing channel to be 80ns, and setting the channel bit width to be 8 bit; writing the data frame into a memory inside the module through a register writing channel; judging whether the frame length of the data frame is larger than the maximum service frame length, if so, discarding the data frame, otherwise, circularly redundantly checking the data frame; shifting the bit sequence of the data frame by 32 bits to the left, and taking the numerical value of the obtained sequence as a value to be checked; dividing 79764919 by the value to be checked, and taking the obtained remainder as the check value of the data frame; judging whether the data frame check value is equal to 4294967295, if so, setting a write completion signal to be a high level, otherwise, discarding the data frame; when receiving a data frame output pulse, judging whether the rate of the data frame output to the outside is 1000Mbps, if so, setting the clock period of a register reading channel in the module to be 8ns, and setting the channel bit width to be 8 bit; otherwise, setting the clock period of a register reading channel in the module to be 80ns, and setting the channel bit width to be 8 bits; opening a register reading channel, and reading out a data frame from a memory inside the module; outputting the read data frame to the outside of the repeater;
the scheduling module is used for setting the count value of the meter reading address counter to zero during initialization; setting the upper limit value of a meter reading address counter during initialization; obtaining a window closing time point by using a scheduling information acquisition method; when the current window information is obtained, the scheduling information and the window closing time point are stored in a current window information register; when next window information is obtained, storing the scheduling information and the window closing time point into a next window information register; judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero, otherwise, adding 1 to the count value of the meter reading address counter; receiving a system clock value input from the outside; when the system clock value is between the starting time point and the sending time point in the current window information, setting the window starting signal to be a high level; outputting the current window information to a full-interconnection switching network module and a cache area module; when the system clock value is equal to the register value of the current sending time point, setting the window opening signal to be a low level; judging whether the writing completion signal is in a high level, if so, generating a data frame output pulse, otherwise, not generating any pulse; storing the prefetched next window information into a current window information register;
the all-interconnection switching network module is used for acquiring the one-hot code of the serial number of the service input port by a 4-16 coding method and taking the one-hot code as a gating signal; using a data channel in the gating signal gating module, and outputting a window opening signal and a receivable service identification number to the filtering module through the data channel; outputting the data frame to a buffer module through the gated data channel;
the filtering module is used for judging whether a window opening signal of a data frame received by the filtering module and input from the outside is high level, if so, extracting bytes 5 and 6 of the data frame to be used as a service identification number of the data frame, and if not, discarding the data frame; and judging whether the service identification number of the data frame is equal to the receivable service identification number, if so, outputting the data frame to a full-interconnection switching network module, and otherwise, discarding the data frame.
2. A time trigger service forwarding method adapting to different transmission rates is characterized in that a used time trigger service repeater realizes filtering and forwarding functions on data frames with different transmission rates received by a time trigger service switching node, and reduces the requirement of the repeater on the input rate of external scheduling information in a mode of prefetching the information of a next window, and the method comprises the following specific steps:
(1) initialization:
(1a) the cache area module writes all zeros into all address spaces of the storage area in the cache area module;
(1b) setting the count value of a meter reading address counter in a scheduling module to zero;
(1c) setting an upper limit value of a meter reading address counter;
(2) acquiring current window information:
(2a) the scheduling module obtains a window closing time point by using a scheduling information acquisition method;
(2b) storing the scheduling information and the window closing time point into a current window information register;
(2c) judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero and then executing the step (3); otherwise, executing the step (3) after adding 1 to the count value of the meter reading address counter;
(3) prefetch next window information:
(3a) the scheduling module acquires scheduling information input from the outside by using a scheduling information acquisition method and obtains a window closing time point;
(3b) storing the scheduling information and the window closing time point into a next window information register;
(3c) judging whether the count value of the meter reading address counter is greater than the upper limit value of the meter reading address counter, if so, setting the count value of the meter reading address counter to zero and then executing the step (4); otherwise, executing the step (4) after adding 1 to the count value of the reading table address counter;
(4) opening a window:
(4a) the scheduling module receives a system clock value input from the outside;
(4b) when the system clock value is between the starting time point and the sending time point in the current window information, the scheduling module sets the window starting signal to be high level;
(4c) the scheduling module outputs the current window information to the full-interconnection switching network module and the cache region module;
(4d) the full-interconnection switching network module obtains the one-hot code of the serial number of the service input port by a 4-16 coding method, and uses the one-hot code as a gating signal;
(4e) the gating signal is used for gating a data channel inside the full-interconnection switching network module, and the window opening signal and the receivable service identification number are output to the filtering module through the data channel;
(5) judging whether a window opening signal of a data frame received by the filtering module and input from the outside is a high level, if so, executing the step (6); otherwise, executing the step (10) after discarding the data frame;
(6) the filtering module extracts the 5 th byte and the 6 th byte of the data frame as the service identification number of the data frame;
(7) the filtering module judges whether the service identification number of the data frame is equal to the receivable service identification number, if so, the step (8) is executed; otherwise, executing the step (10) after discarding the data frame;
(8) writing a data frame:
(8a) the filtering module outputs the data frame to the full-interconnection switching network module;
(8b) the full-interconnection switching network module outputs the data frame to the buffer area module through the gated data channel;
(8c) the cache region module judges whether the rate of the data frame input from the outside is 1000Mbps, if yes, the step (8d) is executed; otherwise, executing step (8 e);
(8d) setting the clock period of a register write channel in a cache region module to be 8ns, and setting the channel bit width to be 8 bit;
(8e) setting the clock period of a register write channel in a cache region module to be 80ns, and setting the channel bit width to be 8 bits;
(8f) writing the data frame into a memory inside the module through a register writing channel of the cache region module;
(9) the buffer area module judges whether the frame length of the data frame is larger than the maximum service frame length, if so, the step (11) is executed after the data frame is discarded; otherwise, executing step (10);
(10) cyclic redundancy check data frame:
(10a) the buffer area module shifts the bit sequence of the data frame to the left by 32 bits, and the numerical value of the obtained sequence is used as a value to be checked;
(10b) dividing 79764919 by the value to be checked, and taking the obtained remainder as the check value of the data frame;
(10c) judging whether the data frame check value is equal to 4294967295, if so, executing the step (10 e); otherwise, executing step (10 d);
(10d) the buffer area module discards the data frame;
(10e) the buffer area module sets a write-in completion signal to be a high level;
(11) and (3) closing the window:
(11a) the scheduling module receives a system clock value input from the outside;
(11b) when the system clock value is equal to the register value of the current sending time point, the scheduling module sets the window opening signal to be a low level;
(12) the scheduling module judges whether the write-in completion signal is in a high level state, if so, the scheduling module generates a data frame output pulse and then executes the step (13); otherwise, executing step (14);
(13) reading out a data frame:
(13a) when the buffer module receives the data frame output pulse, judging whether the rate of the data frame output to the outside is 1000Mbps, if so, executing the step (13 b); otherwise, executing step (13 c);
(13b) setting the clock period of a register reading channel in a cache region module to be 8ns, and setting the channel bit width to be 8 bit;
(13c) setting the clock period of a register reading channel in a cache region module to be 80ns, and setting the channel bit width to be 8 bits;
(13d) opening a register reading channel of a buffer area module, and reading a data frame from a memory inside the module;
(13e) the buffer area module outputs the read data frame to the outside of the transponder;
(14) and modifying the current window information:
the scheduling module stores the prefetched next window information into the current window information register, and the repeater completes the filtering and forwarding of the data frame.
3. The method according to claim 2, wherein the scheduling information in step (2a) includes a window opening time point, a window length, a receivable service identification number, a maximum service frame length, and a service input port sequence number.
4. The method for forwarding time-triggered services adapting to different transmission rates as claimed in claim 2, wherein the steps of the method for acquiring scheduling information in step (2a) and step (3a) are as follows:
firstly, a scheduling module takes the count value of a meter reading address counter as a reading address and sends a scheduling information reading request;
secondly, the scheduling module registers scheduling information acquired from the outside;
and thirdly, the scheduling module adds the window opening time point and the window length in the scheduling information, and the obtained sum is used as a window closing time point.
5. The method for forwarding time-triggered services adapted to different transmission rates according to claim 2, wherein the step of the 4-16 coding method in step (4d) is as follows:
firstly, opening a 16-bit coding register in a full-interconnection switching network module;
secondly, setting the initial bit code of the coding register to be all zero;
setting the bit corresponding to the input port serial number in the coding register as 1, and keeping the rest bits unchanged;
and fourthly, coding the bit code of the coding register as the one-hot code of the service input port serial number.
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