CN108375855A - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN108375855A CN108375855A CN201810168587.5A CN201810168587A CN108375855A CN 108375855 A CN108375855 A CN 108375855A CN 201810168587 A CN201810168587 A CN 201810168587A CN 108375855 A CN108375855 A CN 108375855A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
Abstract
A kind of display panel of offer of the embodiment of the present invention and display device, are related to technical field of liquid crystal display, can reduce the power consumption of liquid crystal display panel.The display panel includes：Multiple column units, each column unit include the 1st to n data lines；In each column unit and corresponding demultplexer, demultplexer includes gating signal line, the 1st to n switching tubes and the 1st to n clock cables, the first end of switching tube is connected to data line, the second end of switching tube is connected to gating signal line, and the control terminal of switching tube is connected to clock cable；The i-th clock cable in arbitrary demultplexer is connected, and the 1st to the n-th clock cable works in multiple periods, and in each period, the 1st to the n-th clock cable is sequentially output conduction level；In the corresponding sub-pixel of each column unit, adjacent data line in the sequence that the corresponding data line of sub-pixel with same color in a line sub-pixel is the 1st to the n-th.
Description
Technical field
The present invention relates to technical field of liquid crystal display more particularly to a kind of display panel and display devices.
Background technology
In liquid crystal display panel, it is constant that the driving voltage of liquid crystal molecule cannot be fixed on some value, otherwise, of long duration
, polarization phenomena can occur for liquid crystal molecule, to gradually lose optically-active characteristic.Therefore, in order to avoid the characteristic of liquid crystal molecule meets with
Driving voltage to destruction, liquid crystal molecule must carry out reversal, this is just needed the pixel electrode in liquid crystal display panel
Voltage is divided into two kinds of polarity, and one is positive polarity, the other is negative polarity.When pixel electrode voltage is higher than public electrode voltages
When, it is known as positive polarity；When pixel electrode voltage is less than public electrode voltages, it is known as negative polarity.Either positive polarity or
Negative polarity can all have the grayscale of one group of same brightness, so when the pressure difference absolute value between pixel electrode and public electrode is solid
Periodically, the grayscale showed is the same.But under both of these case, the steering of liquid crystal molecule but completely on the contrary,
Also it can be destroyed to avoid the above-mentioned characteristic caused when liquid crystal molecule steering is permanently affixed to a direction.
Meanwhile as the resolution ratio of liquid crystal display panel and refresh rate are higher and higher, driving chip needs a large amount of in output
Pixel polarity inversion is carried out while pixel electrode voltage, it is larger so as to cause the power consumption of liquid crystal display panel.
Invention content
A kind of display panel of offer of the embodiment of the present invention and display device, can reduce the power consumption of liquid crystal display panel.
On the one hand, the embodiment of the present invention provides a kind of display panel, including：
The multiple sub-pixels limited by fine scanning line and multiple columns of data lines transposition insulator, each sub-pixel includes picture
Plain electrode and thin film transistor (TFT), the pixel electrode in each sub-pixel are connected to corresponding data by thin film transistor (TFT)
Line；
The multiple columns of data lines include multiple column units, and each column unit includes the 1st to n data lines；
The display panel further includes demultplexer corresponding with each column unit, in each column unit and
In the corresponding demultplexer, the demultplexer include gating signal line, the 1st to n switching tubes and the 1st to n when
The first end of clock signal wire, the i-th switching tube is connected to the i-th data line, and the second end of the i-th switching tube is connected to the gating signal
The control terminal of line, the i-th switching tube is connected to the i-th clock cable, and the value of i is 1 to n；
The i-th clock cable in the arbitrary demultplexer is connected, and the 1st to the n-th clock cable works in
In multiple periods, in each period, the 1st to the n-th clock cable is sequentially output conduction level；
In the corresponding sub-pixel of each column unit, with the corresponding number of sub-pixel of same color in a line sub-pixel
It is data line adjacent in the described 1st to the n-th sequence according to line.
Optionally, in each column unit, two at least adjacent data lines pair in the described 1st to the n-th sequence
The same a line sub-pixel color having the same answered and identical pixel electrode polarity.
Optionally, the corresponding sub-pixel of same column unit pixel electrode polarity having the same.
Optionally, on line direction and column direction, two sub-pixels of arbitrary neighborhood have opposite pixel electrode polarity.
Optionally, the display panel includes multiple minimum repetitive units, and each minimum repetitive unit includes two rows
Four row sub-pixels, wherein the four of the first row sub-pixel are followed successively by the first color sub-pixels, the second color sub-pixels, third color
Sub-pixel and the 4th color sub-pixels, wherein four sub-pixels of the second row are followed successively by the third color sub-pixels, described
Four color sub-pixels, first color sub-pixels and second color sub-pixels.
Optionally, first color sub-pixels are red sub-pixel, and second color sub-pixels are green sub-pixels,
The third color sub-pixels are blue subpixels, and the 4th color sub-pixels are highlighted sub-pixel.
Optionally, the data line includes the first polarity data line and the second polarity data line；
In the row direction, the every first polarity data line and the every second polarity data line are arranged alternately；
The sub-pixel includes the first polarity sub-pixel and the second polarity sub-pixel, the first polarity sub-pixel and described
Second polarity sub-pixel has opposite pixel electrode polarity；
The pixel electrode of first polarity data line described in each column and the first polarity sub-pixel in adjacent two row sub-pixel connects
It connects, the second polarity data line described in each column is connect with the pixel electrode of the second polarity sub-pixel in adjacent two row.
Optionally, column unit described in each two forms a minimum charhing unit, and each minimum charhing unit includes
Adjacent 2 × n data lines.
Optionally, the n=4.
Optionally, in a column direction, the 1st clock cable, the 2nd clock cable, the 3rd clock cable and the 4th clock
Signal wire is arranged successively；
Each demultplexer further includes the 1st connecting line, the 2nd connecting line, the 3rd connecting line and the 4th connecting line, and the 1st
Data line is connected to the 1st switching tube by the 1st connecting line, and the 2nd data line is connected to the 2nd by the 2nd connecting line and opens
Guan Guan, the 3rd data line are connected to the 3rd switching tube by the 3rd connecting line, and the 4th data line is connected by the 4th connecting line
In the 4th switching tube；
1st data line and the 1st connecting line extend in the same direction, and the 1st switching tube is located at the described 1st and counts
According on the extending direction of line, the 4th data line and the 4th connecting line extend in the same direction, and the 4th switching tube is located at
On the extending direction of 4th data line, the 3rd switching tube is located on the extending direction of the 2nd data line, and the described 2nd
Switching tube is located on the extending direction of the 3rd data line, and the 2nd connecting line and the 3rd connecting line insulation are arranged in a crossed manner.
Optionally, each demultplexer further includes the 1st connecting line, the 2nd connecting line, the 3rd connecting line and the 4th connection
Line, the 1st data line are connected to the 1st switching tube by the 1st connecting line, and the 2nd data line is connected to by the 2nd connecting line
2nd switching tube, the 3rd data line are connected to the 3rd switching tube by the 3rd connecting line, and the 4th data line is connected by the described 4th
Line is connected to the 4th switching tube；
1st data line and the 1st connecting line extend in the same direction, and the 1st switching tube is located at the described 1st and counts
According on the extending direction of line, the 2nd data line and the 2nd connecting line extend in the same direction, and the 2nd switching tube is located at
On the extending direction of 2nd data line, the 3rd data line and the 3rd connecting line extend in the same direction, and the described 3rd
Switching tube is located on the extending direction of the 3rd data line, and the 4th data line and the 4th connecting line prolong in the same direction
It stretches, the 4th switching tube is located on the extending direction of the 4th data line.
On the other hand, the embodiment of the present invention also provides a kind of display device, including above-mentioned display panel.
Display panel in the embodiment of the present invention and display device, due in the corresponding sub-pixel of each column unit, together
Adjacent data line in the sequence that the corresponding data line of the sub-pixel of same color is the 1st to the n-th in a line sub-pixel, each
In period, the 1st to the n-th clock cable is sequentially output conduction level, and for pure color picture, same color sub-pixel is required
Pixel electrode voltage is identical, and therefore, in each period, gating signal line can export same color in continuous several periods
Pixel electrode voltage corresponding to sub-pixel, and in showing picture, it will usually there are more pure color pictures, therefore, reduce
Driving chip is in the number for carrying out voltage conversion by the same interface, to reducing the power consumption of display panel.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is this hair
Some bright embodiments for those of ordinary skill in the art without having to pay creative labor, can be with
Obtain other attached drawings according to these attached drawings.
Fig. 1 is a kind of structural schematic diagram of display panel subregion in the embodiment of the present invention；
Fig. 2 is the connection relationship diagram of a column unit and corresponding sub-pixel and demultplexer in Fig. 1；
Fig. 3 is the sequence diagram of each clock cable in embodiments of the present invention in Fig. 2；
Fig. 4 is the enlarged diagram of minimum repetitive unit in Fig. 1；
Fig. 5 is the structural schematic diagram of another display panel subregion in the embodiment of the present invention；
Fig. 6 is a kind of structural schematic diagram of display device in the embodiment of the present invention.
Specific implementation mode
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
The every other embodiment obtained without creative efforts, shall fall within the protection scope of the present invention.
The term used in embodiments of the present invention is the purpose only merely for description specific embodiment, is not intended to be limiting
The present invention.In the embodiment of the present invention and "an" of singulative used in the attached claims, " described " and "the"
It is also intended to including most forms, unless context clearly shows that other meanings.
As depicted in figs. 1 and 2, Fig. 1 is a kind of structural schematic diagram of display panel subregion in the embodiment of the present invention, figure
2 be the connection relationship diagram of a column unit and corresponding sub-pixel and demultplexer in Fig. 1, and the embodiment of the present invention carries
For a kind of display panel, including：The multiple sub-pixels limited by fine scanning line 11 and 12 transposition insulator of multiple columns of data lines, each
Sub-pixel includes pixel electrode (not shown) and thin film transistor (TFT) 2, and the pixel electrode in each sub-pixel passes through film crystalline substance
Body pipe 2 is connected to corresponding data line 12；Multiple columns of data lines 12 include multiple column units 120, and each column unit 120 includes the 1st
To n data lines 12, it should be noted that the 1st to n sequence puts in order unrelated with data line in panel, and the 1st to n only uses
In distinguishing different data lines 12, how the correspondence about data line 12 and the 1st to n is arranged, and can be retouched in subsequent content
It states.For example, in Fig. 1, n=4, each column unit 120 includes the 1st data line D1, the 2nd data line D2, the 3rd data line D3 and the
4 data line D4；Display panel further includes demultplexer 3 corresponding with each column unit 120, in each column unit 120 and right
In the demultplexer 3 answered, demultplexer 3 includes gating signal line the 31, the 1st to n switching tubes and the 1st to n clock signals
In line, such as Fig. 1, each demultplexer 3 includes the 1st switch transistor T 1, the 2nd switch transistor T 2, the 3rd switch transistor T 3, the 4th switching tube
T4, the 1st clock cable CKH1, the 2nd clock cable CKH2, the 3rd clock cable CKH3 and the 4th clock cable CKH4,
The first end of i-th switching tube is connected to the i-th data line, and the second end of the i-th switching tube is connected to gating signal line 31, the i-th switch
The control terminal of pipe is connected to the i-th clock cable, and the value of i is in 1 to n, such as each demultplexer 3 of Fig. 1, and the 1st opens
It closes pipe T1 to be series between the 1st data line D1 and gating signal line 31, the 2nd switch transistor T 2 is series at the 2nd data line D2 and gating
Between signal wire 31, the 3rd switch transistor T 3 is series between the 3rd data line D3 and gating signal line 31, and the 4th switch transistor T 4 is series at
Between 4th data line D4 and gating signal line 31；The i-th clock cable in arbitrary demultplexer 3 is connected, specifically, often
A demultplexer 3 includes the 1st to n clock cables, for example, in Fig. 1, n=4, i.e. each demultplexer 3 include
1st clock cable, the 2nd clock cable, the 3rd clock cable and the 4th clock cable, in all demultplexers 3
1st clock cable is both connected to together, and the 2nd clock cable in all demultplexer devices 3 is both connected to together, is owned
The 3rd clock cable in demultplexer 3 is both connected to together, and the 4th clock cable connects in all demultplexer devices
It is connected together, as shown in figure 3, Fig. 3 is the sequence diagram of each clock cable in embodiments of the present invention in Fig. 2, when the 1st to the n-th
Clock signal wire works in multiple period t, and in each period t, the 1st to the n-th clock cable is sequentially output conduction level, example
Such as, each period t includes successively the first period t1, the second period t2, third period t3 and the 4th period t4, in the first period
T1, the 1st clock cable CKH1 export conduction level, the 2nd clock cable CKH2, the 3rd clock cable CKH3 and the 4th clock
Signal wire CKH4 exports cut-off level, and conduction level, the 1st clock signal are exported in the second period t2, the 2nd clock cable CKH2
Line CHKH1, the 3rd clock cable CKH3 and the 4th clock cable CKH4 export cut-off level, in third period t3, the 3rd clock
Signal wire CKH3 exports conduction level, the 1st clock cable CKH1, the 2nd clock cable CKH2 and the 4th clock cable CKH4
Export cut-off level；In 120 corresponding sub-pixel of each column unit, the sub-pixel with same color in a line sub-pixel corresponds to
Data line 12 be the above-mentioned 1st to the n-th sequence in adjacent data line 12, for example, column unit 120 shown in fig. 2 is right
In the sub-pixel answered, the first row sub-pixel includes two red sub-pixel R and two blue subpixels B, along line direction arrangement
First data line 12 is the 1st data line D1, and the 1st data line D1 connects with first red sub-pixel R in the first row sub-pixel
It connecing, the second data line 12 along line direction arrangement is the 3rd data line D3, the in the 3rd data line D3 and the first row sub-pixel
One blue subpixels B connection, the third data line 12 along line direction arrangement are the 2nd data line D2, the 2nd data line D2 and the
Second red sub-pixel R connection in a line sub-pixel, the Article 4 data line 12 along line direction arrangement are the 4th data line
D4, the 4th data line D4 are connect with second blue subpixels B in the first row sub-pixel, that is to say, that in the first row sub-pixel
In, the corresponding data lines 12 of two red sub-pixel R are respectively the 1st data line D1 and the 2nd data line D2 (sequences of 1 to the 4th
In adjacent data line 12), the corresponding data lines 12 of two blue subpixels B are respectively the 3rd data line D3 and the 4th data line D4
(adjacent data line in the sequence of 1 to the 4th).
Specifically, gating signal line 31 is used to connect an interface of driving chip, due to being corresponded in each column unit 120
Sub-pixel in, with the sub-pixel of same color in a line sub-pixel corresponding data line 12 be the 1st to the n-th sequence in it is adjacent
Data line 12, in each period t, the 1st to the n-th clock cable is sequentially output conduction level, identical for pure color picture
The required pixel electrode voltage of color sub-pixels is identical, and therefore, in each period t, gating signal line 31 can be continuous
The output phase is with the pixel electrode voltage corresponding to color sub-pixels in several periods, and in showing picture, it will usually exist compared with
Therefore more pure color pictures reduces driving chip in the number for carrying out voltage conversion by the same interface, to reduce
The power consumption of display panel.For example, as shown in Figures 2 and 3, for showing that picture is red pure color picture, the red son of the first row
The required pixel electrode voltages of pixel R are 5V, and the required pixel electrode voltage of other color sub-pixels is 0V.With first
For period t, conduction level, control the 1st switch transistor T 1 conducting, gating are exported in the first period t1, the 1st clock cable CKH1
Signal on signal wire 31 is transmitted to the pixel of first red sub-pixel R in the first row sub-pixel by the 1st data line D1
Electrode charges to the sub-pixel；Conduction level is exported in the second period t2, the 2nd clock cable CKH2, control the 2nd is opened
Close pipe T2 conducting, be transmitted to by the 2nd data line D2 in the first row sub-pixel second of the signal on gating signal line 31 is red
The pixel electrode of sub-pixels R charges to the sub-pixel；In third period t3, the 3rd clock cable CKH3 output conductings
Level, the 3rd switch transistor T 3 of control are connected, and the signal on gating signal line 31 is transmitted to the first row sub- picture by the 3rd data line D3
The pixel electrode of first blue subpixels B in element, charges to the sub-pixel；In the 4th period t4, the 4th clock signal
Line CKH4 exports conduction level, and the 4th switch transistor T 4 of control is connected, and the signal on gating signal line 31 passes through the 4th data line D4 and passes
The pixel electrode for transporting to second blue subpixels B in the first row sub-pixel, charges to the sub-pixel.In the first week
In phase t, the first period t1 and the second period t2 are the continuous period, and driving chip persistently exports 5V voltages, then into the
When three period t3, driving chip is transformed to output 0V voltages, and persistently exports 0V voltages in third period t3 and the 4th period t4,
During the entire process of a cycle t, driving chip only needs transformation output voltage twice.And in the prior art,
The sub-pixel of same color can charge at the time of non-adjacent in the corresponding same a line sub-pixel of same demultplexer,
For example, the corresponding same a line sub-pixel of same demultplexer includes two red sub-pixels and two blue subpixels,
In continuous four charging moments, first moment is red sub-pixel charging, second moment is blue subpixels charging, the
Three moment charge for red sub-pixel, and the 4th moment is blue subpixels, then when showing pure red picture, it is corresponding to be somebody's turn to do
The same interface of the driving chip of demultplexer needs to be sequentially output 5V voltages, 0V voltages, 5V voltages and 0V voltages, that is, drives
The same interface of dynamic chip needs to convert four output voltages, and the transformation of this output voltage will increase power consumption.
Display panel in the embodiment of the present invention, due in the corresponding sub-pixel of each column unit, with a line sub-pixel
Adjacent data line in the sequence that the corresponding data line of sub-pixel of middle same color is the 1st to the n-th, in each period, the 1st
It is sequentially output conduction level to the n-th clock cable, for pure color picture, the required pixel electrode electricity of same color sub-pixel
Press it is identical, therefore, in each period, gating signal line can in continuous several periods the output phase it is right with color sub-pixels institute
The pixel electrode voltage answered, and in showing picture, it will usually there are more pure color pictures, therefore, reduce driving chip
In the number for carrying out voltage conversion by the same interface, to reduce the power consumption of display panel.
Optionally, as shown in Fig. 2, in each column unit 120, two at least adjacent datas in the 1st to the n-th sequence
The corresponding same a line sub-pixel color having the same of line and identical pixel electrode polarity.
Specifically, the symbol "+" in Fig. 1 and Fig. 2 and symbol "-" are for indicating that pixel electrode polarity, symbol "+" indicate
There is sub-pixel the pixel electrode polarity of positive polarity, i.e. pixel electrode voltage to be higher than public electrode voltages, and symbol "-" indicates son
There is pixel the pixel electrode polarity of negative polarity, i.e. pixel electrode voltage to be less than public electrode voltages.In the structure of Fig. 2, the 1st number
It is red sub-pixel R and all has the pixel electrode of positive polarity according to line D1 and the corresponding the first row sub-pixels of the 2nd data line D2,
There are one gating signal lines 31 for the tool of the same column unit 120, and gating signal line 31 connects for connecting the same of driving chip
Mouthful, as shown in figure 3, in this way, when showing pure color picture, in the first period t1 and the second period t2 in a cycle t,
The interface of driving chip persistently exports identical 5V voltages, to reduce the same interface of driving chip voltage during driving
The number of transformation, further reduced power consumption.
Optionally, 120 corresponding sub-pixel of same column unit pixel electrode polarity having the same.
Specifically, there are one gating signal lines 31 for the tool of the same column unit 120, and gating signal line 31 drives for connecting
The same interface of chip, 120 corresponding sub-pixel of same column unit pixel electrode polarity chron having the same, the column unit
120 corresponding driving chip interfaces all only need to export same polar voltage during entire driving, to keep away
Exempt from change in polarity of the same interface of driving chip during driving, further reduced power consumption.
Optionally, on line direction and column direction, two sub-pixels of arbitrary neighborhood have opposite pixel electrode polarity.
Optionally, as shown in Figure 1 and Figure 4, Fig. 4 is the enlarged diagram of minimum repetitive unit in Fig. 1, and display panel includes
Multiple minimum repetitive units 4, each minimum repetitive unit 4 includes two rows, four row sub-pixel, wherein the four of the first row sub-pixel
The first color sub-pixels 41, the second color sub-pixels 42, third color sub-pixels 43 and the 4th color sub-pixels 44 are followed successively by,
In four sub-pixels of the second row be followed successively by third color sub-pixels 43, the 4th color sub-pixels 44, the first color sub-pixels 41
With the second color sub-pixels 42.It should be noted that the arrangement mode that minimum repetitive unit 4 here refers to sub-pixel can be with most
Small repetitive unit is that unit carries out repeating setting.
Optionally, the first color sub-pixels 41 are red sub-pixel R, and the second color sub-pixels 42 are green sub-pixels G, the
Three color sub-pixels 43 are blue subpixels B, and the 4th color sub-pixels 44 are highlighted sub-pixel W.
Specifically, it can be white sub-pixels or yellow sub-pixel to highlight sub-pixel W, and effect is for compared under power consumption
Improve display brightness.It should be noted that in the attached drawing of the embodiment of the present invention, sub-pixel is only used for signal arrangement mode, and
The features such as the opening area of unlimited stator pixel or structure.The opening area that optional j highlights sub-pixel W is less than red sub-pixel
R, any one in green sub-pixels G and blue subpixels B.Because in the RGBW dot structures including highlighting sub-pixel W,
Only red sub-pixel R, green sub-pixels G and blue subpixels B are for combining to show a kind of specific color, high transom
The effect of pixel W is to improve the brightness of the pixel, but can reduce picture while improving pixel intensity by highlighted sub-pixel W
The saturation degree of element, therefore be arranged and highlight the opening area of sub-pixel W and smaller can be reduced to picture while improving pixel intensity
The harmful effect of plain saturation degree.
Optionally, as shown in Figure 1, data line 12 (adds including the first polarity data line 121 and the second polarity data line 122
Thick data line is the first polarity data line 121, and the data line of non-overstriking is the second polarity data line 122)；In the row direction,
Every first polarity data line 121 and every second polarity data line 122 are arranged alternately；Sub-pixel includes the first polarity sub-pixel
(sub-pixel that symbol "+" is illustrated) and the second polarity sub-pixel (sub-pixel that symbol "-" is illustrated), the first polarity sub- picture
Element and the second polarity sub-pixel have opposite pixel electrode polarity；The first polarity data of each column line 121 arranges sub- picture with adjacent two
The pixel electrode of the first polarity sub-pixel in element connects, the second polarity data of each column line 122 and the second pole in adjacent two row
The pixel electrode of temper pixel connects.By taking concrete structure shown in FIG. 1 as an example, in the row direction, the first column data line 12, third
It is the first polarity data line 121 that column data line 12, the 5th column data line 12 and the 7th column data, which select the odd numbers column data lines such as 12, the
It is that two column data lines 12, the 4th column data, which select the even numbers column data lines such as the 12, the 6th column data line 12 and the 8th column data line 12,
Two polarity data lines 122, in the first row and the third line sub-pixel, first sub-pixel, third height picture in the row direction
The odd numbers sub-pixel such as element and the 5th sub-pixel is by the second polarity sub-pixel (sub-pixel that symbol "-" is illustrated), the side of being expert at
The even numbers sub-pixels such as upward second sub-pixel, the 4th sub-pixel and the 6th sub-pixel are the first polarity sub-pixel
(sub-pixel that symbol "+" is illustrated)；In the second row and fourth line sub-pixel, first sub-pixel in the row direction,
The odd numbers sub-pixel such as three sub-pixels and the 5th sub-pixel is by the first polarity sub-pixel (sub- picture that symbol "+" is illustrated
Element), the even numbers sub-pixel such as second sub-pixel, the 4th sub-pixel and the 6th sub-pixel in the row direction is the second pole
Temper pixel (sub-pixel that symbol "-" is illustrated).The first polarity data of each column line 121 with the first polarity of the left and right sides
Sub-pixel (sub-pixel that symbol "+" is illustrated) connect, the second polarity data of each column line 122 with the second polarity of the left and right sides
Sub-pixel (sub-pixel that symbol "-" is illustrated) connects.By taking Fig. 2 as an example, a line sub-pixel in the same column unit 120
In, data line 12 is connect with the sub-pixel of the same side, in adjacent another row sub-pixel, data line 12 with the other side
Sub-pixel connects, that is to say, that for two row sub-pixel of arbitrary neighborhood, is connected to two sub-pixels point of same column data line 12
Not Wei Yu the data line 12 both sides.
Specifically, same data line 12 needs the pixel electrode with a sub-pixel often in a line to connect, due to
In pixel arrangement shown in FIG. 1, same row sub-pixel simultaneously not all there is same polar pixel electrode therefore to pass through setting
First polarity data line 121 connects the first polarity sub-pixel, and the second polarity data line 122 connects the second polarity sub-pixel, driving
When dynamic sub-pixel of not going together is charged, same data line 12 can be made to export same polar voltage, electricity need not be carried out
Pressure reversion, to reduce the power consumption that voltage reversal is brought.
Optionally, each two column unit 120 forms a minimum charhing unit 123, and each minimum charhing unit 123 includes
Adjacent 2 × n data lines 12.
Specifically, adjacent eight data lines 12 form a minimum charhing unit successively from left to right such as in Fig. 1
123, in conjunction with construction described above, each minimum charhing unit 123 corresponds to two demultplexers 3, can be under this structure
Keep the position that minimum charhing unit 123 corresponds to two demultplexers 3 nearest, to save 3 corresponding cabling of demultplexer
Length saves space, and reduces the cross one another quantity of cabling, reduces and carries out bridge technique since cabling intersects
Difficulty.
Optionally, above-mentioned n=4.
Specifically, in conjunction with construction described above, including red sub-pixel R, green sub-pixels G, blue subpixels B and
In the display panel of highlighted sub-pixel W, in the row direction, 4 sub-pixels are a pixel repetitive unit, therefore as n=4,
The each two interface of driving chip can be made corresponding with two pixel repetitive units (i.e. 8 sub-pixels), in this way, driving chip
Each two interface can charge according to completely the same rule, that is to say, that in synchronization, each column unit 120 is right
The gating signal line 31 for the demultplexer 3 answered charges to the corresponding sub-pixel of same color, in this way, for driving core
The design logic of piece is simpler.And if setting n is the numerical value other than 4, need more complicated circuit design that can protect
Card driving chip interface charge according to consistent rule, if for example, setting n=3, each two interface of driving chip with
Two pixel repetitive units (i.e. 6 sub-pixels) are corresponding, then the adjacent interface of each two of driving chip cannot be according to complete
Consistent rule charges, it needs until the 4th repetitive unit can just repeat (i.e. 3 and 4 least common multiple later
12,12/3=4 repetitive units), i.e., the interface of the same driving chip needs to carry out across 12 sub-pixels in the row direction
Cabling connects, and cabling is more complicated, and increases display power consumption.
Optionally, as shown in figure 5, Fig. 5 is the structural representation of another display panel subregion in the embodiment of the present invention
Figure, in a column direction, the 1st clock cable CKH1, the 2nd clock cable CKH2, the 3rd clock cable CKH3 and the 4th clock
Signal wire CKH4 arranges successively；Each demultplexer 3 further include the 1st connecting line L1, the 2nd connecting line L2, the 3rd connecting line L3 and
4th connecting line L4, the 1st data line D1 are connected to the 1st switch transistor T 1 by the 1st connecting line L1, and the 2nd data line D2 connects by the 2nd
Wiring L2 is connected to the 2nd switch transistor T 2, and the 3rd data line D3 is connected to the 3rd switch transistor T 3, the 4th data line by the 3rd connecting line L3
D4 is connected to the 4th switch transistor T 4 by the 4th connecting line L4；1st data line D1 and the 1st connecting line L1 extend in the same direction, and the 1st
Switch transistor T 1 is located on the extending direction of the 1st data line D1, and the 4th data line D4 and the 4th connecting line L4 extend in the same direction, the
4 switch transistor Ts 4 are located on the extending direction of the 4th data line D4, and the 3rd switch transistor T 3 is located on the extending direction of the 2nd data line D2,
2nd switch transistor T 2 is located on the extending direction of the 3rd data line D3, and the 2nd connecting line L2 and the 3rd connecting line L3 insulation are arranged in a crossed manner.
If the position of each clock cable is fixed in display panel, and the logic fixation of driving chip can not be changed, then can be by changing
The connection relation for becoming part connecting line, by connecting line insulate it is arranged in a crossed manner realize structure shown in Fig. 5, to making this
Structure in inventive embodiments can be compatible with particular kind of display panel.
Optionally, as shown in Figure 1, each demultplexer 3 further includes the 1st connecting line L1, the 2nd connecting line L2, the 3rd connection
Line L3 and the 4th connecting line L4, the 1st data line D1 are connected to the 1st switch transistor T 1 by the 1st connecting line L1, and the 2nd data line D2 passes through
2nd connecting line L2 is connected to the 2nd switch transistor T 2, and the 3rd data line D3 is connected to the 3rd switch transistor T 3 by the 3rd connecting line L3, and the 4th
Data line D4 is connected to the 4th switch transistor T 4 by the 4th connecting line L4；1st data line D1 and the 1st connecting line L1 prolong in the same direction
It stretches, the 1st switch transistor T 1 is located on the extending direction of the 1st data line D1, and the 2nd data line D2 and the 2nd connecting line L2 are in the same direction
Extend, the 2nd switch transistor T 2 is located on the extending direction of the 2nd data line D2, and the 3rd data line D3 and the 3rd connecting line L3 are along same side
To extension, the 3rd switch transistor T 3 is located on the extending direction of the 3rd data line D3, and the 4th data line D4 and the 4th connecting line L4 are along same
Direction extends, and the 4th switch transistor T 4 is located on the extending direction of the 4th data line D4.
If the position of each connecting line is fixed in display panel, it is only necessary to change the logic of driving chip, you can realize in Fig. 1
Shown in structure, to allow the structure in the embodiment of the present invention to be compatible with particular kind of display panel, to reduce work
Skill difficulty saves cost.
As shown in fig. 6, Fig. 6 is a kind of structural schematic diagram of display device in the embodiment of the present invention, the embodiment of the present invention carries
For a kind of display device, including above-mentioned display panel 100.
Wherein, the concrete structure of display panel 100 and principle are same as the previously described embodiments, and details are not described herein.Display dress
It can be any with aobvious such as touch display screen, mobile phone, tablet computer, laptop, electric paper book or television set to set
Show the electronic equipment of function.
Display device in the embodiment of the present invention, due in the corresponding sub-pixel of each column unit, with a line sub-pixel
Adjacent data line in the sequence that the corresponding data line of sub-pixel of middle same color is the 1st to the n-th, in each period, the 1st
It is sequentially output conduction level to the n-th clock cable, for pure color picture, the required pixel electrode electricity of same color sub-pixel
Press it is identical, therefore, in each period, gating signal line can in continuous several periods the output phase it is right with color sub-pixels institute
The pixel electrode voltage answered, and in showing picture, it will usually there are more pure color pictures, therefore, reduce driving chip
In the number for carrying out voltage conversion by the same interface, to reduce the power consumption of display panel.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
With within principle, any modification, equivalent substitution, improvement and etc. done should be included within the scope of protection of the invention god.
Finally it should be noted that：The above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Present invention has been described in detail with reference to the aforementioned embodiments for pipe, it will be understood by those of ordinary skill in the art that：Its according to
So can with technical scheme described in the above embodiments is modified, either to which part or all technical features into
Row equivalent replacement；And these modifications or replacements, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (12)
1. a kind of display panel, which is characterized in that including：
The multiple sub-pixels limited by fine scanning line and multiple columns of data lines transposition insulator, each sub-pixel include pixel electricity
Pole and thin film transistor (TFT), the pixel electrode in each sub-pixel are connected to corresponding data line by thin film transistor (TFT)；
The multiple columns of data lines include multiple column units, and each column unit includes the 1st to n data lines；
The display panel further includes demultplexer corresponding with each column unit, in each column unit and correspondence
The demultplexer in, the demultplexer, which includes gating signal line, the 1st to n switching tubes and the 1st, to be believed to n clocks
Number line, the first end of the i-th switching tube are connected to the i-th data line, and the second end of the i-th switching tube is connected to the gating signal line,
The control terminal of i-th switching tube is connected to the i-th clock cable, and the value of i is 1 to n；
The i-th clock cable in the arbitrary demultplexer is connected, and the 1st to the n-th clock cable works in multiple
In the period, in each period, the 1st to the n-th clock cable is sequentially output conduction level；
In the corresponding sub-pixel of each column unit, with the corresponding data line of sub-pixel of same color in a line sub-pixel
For data line adjacent in the described 1st to the n-th sequence.
2. display panel according to claim 1, which is characterized in that
In each column unit, corresponding same a line of two at least adjacent data lines in the described 1st to the n-th sequence
Pixel color having the same and identical pixel electrode polarity.
3. display panel according to claim 2, which is characterized in that
The corresponding sub-pixel pixel electrode polarity having the same of the same column unit.
4. display panel according to claim 3, which is characterized in that
On line direction and column direction, two sub-pixels of arbitrary neighborhood have opposite pixel electrode polarity.
5. display panel according to claim 4, which is characterized in that
The display panel includes multiple minimum repetitive units, and each minimum repetitive unit includes two rows, four row sub-pixel,
Four sub-pixels of wherein the first row are followed successively by the first color sub-pixels, the second color sub-pixels, third color sub-pixels and
Four color sub-pixels, wherein four sub-pixels of the second row are followed successively by the third color sub-pixels, the 4th color sub- picture
Plain, described first color sub-pixels and second color sub-pixels.
6. display panel according to claim 5, which is characterized in that
First color sub-pixels are red sub-pixel, and second color sub-pixels are green sub-pixels, the third face
Sub-pixels are blue subpixels, and the 4th color sub-pixels are highlighted sub-pixel.
7. display panel according to claim 5, which is characterized in that
The data line includes the first polarity data line and the second polarity data line；
In the row direction, the every first polarity data line and the every second polarity data line are arranged alternately；
The sub-pixel includes the first polarity sub-pixel and the second polarity sub-pixel, the first polarity sub-pixel and described second
Polarity sub-pixel has opposite pixel electrode polarity；
First polarity data line described in each column is connect with the pixel electrode of the first polarity sub-pixel in adjacent two row sub-pixel, often
The second polarity data line is arranged to connect with the pixel electrode of the second polarity sub-pixel in adjacent two row.
8. display panel according to claim 7, which is characterized in that
Column unit described in each two forms a minimum charhing unit, and each the minimum charhing unit includes adjacent 2 × n items
Data line.
9. display panel according to claim 8, which is characterized in that
The n=4.
10. display panel according to claim 9, which is characterized in that
In a column direction, the 1st clock cable, the 2nd clock cable, the 3rd clock cable and the 4th clock cable are arranged successively
Cloth；
Each demultplexer further includes the 1st connecting line, the 2nd connecting line, the 3rd connecting line and the 4th connecting line, the 1st data
Line is connected to the 1st switching tube by the 1st connecting line, and the 2nd data line is connected to the 2nd switching tube by the 2nd connecting line,
3rd data line is connected to the 3rd switching tube by the 3rd connecting line, and the 4th data line is connected to the 4th by the 4th connecting line
Switching tube；
1st data line and the 1st connecting line extend in the same direction, and the 1st switching tube is located at the 1st data line
Extending direction on, the 4th data line and the 4th connecting line extend in the same direction, and the 4th switching tube is located at described
On the extending direction of 4th data line, the 3rd switching tube is located on the extending direction of the 2nd data line, the 2nd switch
For pipe on the extending direction of the 3rd data line, the 2nd connecting line and the 3rd connecting line insulation are arranged in a crossed manner.
11. display panel according to claim 9, which is characterized in that
Each demultplexer further includes the 1st connecting line, the 2nd connecting line, the 3rd connecting line and the 4th connecting line, the 1st data
Line is connected to the 1st switching tube by the 1st connecting line, and the 2nd data line is connected to the 2nd switching tube by the 2nd connecting line,
3rd data line is connected to the 3rd switching tube by the 3rd connecting line, and the 4th data line is connected to the 4th by the 4th connecting line
Switching tube；
1st data line and the 1st connecting line extend in the same direction, and the 1st switching tube is located at the 1st data line
Extending direction on, the 2nd data line and the 2nd connecting line extend in the same direction, and the 2nd switching tube is located at described
On the extending direction of 2nd data line, the 3rd data line and the 3rd connecting line extend in the same direction, the 3rd switch
Pipe is on the extending direction of the 3rd data line, and the 4th data line and the 4th connecting line extend in the same direction, institute
The 4th switching tube is stated to be located on the extending direction of the 4th data line.
12. a kind of display device, which is characterized in that include the display panel as described in any one of claim 1 to 11.
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| CN201810168587.5A CN108375855B (en) | 2018-02-28 | 2018-02-28 | Display panel and display device |
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| WO2020056900A1 (en) * | 2018-09-20 | 2020-03-26 | 武汉华星光电半导体显示技术有限公司 | Display panel and driving method thereof |
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| CN111477137A (en) * | 2020-04-08 | 2020-07-31 | 福建华佳彩有限公司 | Demux display screen structure and driving method thereof |
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| CN108375855B (en) | 2021-03-12 |
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