CN108363477A - Server power-up state monitors system and method, computer storage and equipment - Google Patents
Server power-up state monitors system and method, computer storage and equipment Download PDFInfo
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- CN108363477A CN108363477A CN201810174961.2A CN201810174961A CN108363477A CN 108363477 A CN108363477 A CN 108363477A CN 201810174961 A CN201810174961 A CN 201810174961A CN 108363477 A CN108363477 A CN 108363477A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
Abstract
A kind of server power-up state monitoring system and method for present invention offer, computer storage and equipment, the system include：The portions FPGA, the portions BMC；The portions FPGA start for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to memory；The BMC described powers on condition information for obtaining；It is powered on described in judgement and whether there is unusual condition information in condition information；If it is, recording the unusual condition information, and control the stopping of server electrifying timing sequence.Server power-up state provided by the invention monitors system, when in the portions FPGA, control server powers on, can monitor that FPGA records in memory powers on condition information, and judge wherein wrong unusual condition information, FPGA is avoided to flog a dead horse powering on the when of being abnormal, to be recorded to unusual condition information, to facilitate the later use record, the state of working on power of server is analyzed.
Description
Technical field
The present invention relates to field of computer technology, more particularly to a kind of server power-up state monitoring system and method, meter
Calculation machine memory and equipment.
Background technology
Server is as a kind of computer equipment, and on startup, the electrifying timing sequence of computer all parts is on mainboard
Power supply, the voltage adapter control source since most, the generation of CPU power supplies to the end have strictly opening sequence control
System.Upper electrical anomaly before BIOS (Basic Input Output System, basic input output system) startups is in storage system
Field is the problem for being extremely difficult to positioning, and probability of occurrence is relatively small, but analyzing and positioning cost is very high, difficult, example
Such as parts damages, power supply overvoltage, it is under-voltage can result in, if very time-consuming can only take by Hardware Engineer's measurement signal
Power, FPGA (Field-Programmable Gate Array, i.e. field programmable gate array) are controlled as electrifying timing sequence
Critical component precisely defines the sequencing of each Vital Voltage signal, if some voltage signal can not start, the voltage
Electric signal after signal also will be unable to start, to which storage system can not start.
It powers on abnormity detecting and compares and be difficult to analyze, in the epoch that storage system ownership continues to increase, how to provide
A kind of low cost, simple, accurately storage system abnormality detection mechanism avoid FPGA from flogging a dead horse powering on the when of being abnormal,
It is those skilled in the art's technical problem urgently to be resolved hurrily.
Invention content
In view of this, the purpose of the present invention is to provide a kind of server power-up state monitoring system and method, low cost,
Simply, accurately the unusual condition that powers on of server is detected, FPGA is avoided to flog a dead horse powering on the when of being abnormal.Its
Concrete scheme is as follows：
In a first aspect, the present invention provides a kind of server power-up state monitoring system, including：The portions FPGA, the portions BMC；
The portions FPGA start for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to storage
Device；
The BMC described powers on condition information for obtaining；It is powered on described in judgement in condition information with the presence or absence of abnormal shape
Condition information；If it is, recording the unusual condition information, and control the stopping of server electrifying timing sequence.
Preferably, the BMC, is additionally operable to：
It repeats acquisition n times and powers on condition information；
Judge to power on described in n times and whether there is consistent unusual condition information in condition information；
If it is, recording the unusual condition information；The N is the positive integer more than 1.
Preferably, further include：
I2C buses power on condition information for connecting the portions FPGA and the portions BMC described in transmission.
Preferably, the memory is register.
Preferably, further include：Communication device is used for transmission the unusual condition information to predeterminated position.
Second aspect, the present invention provide a kind of server power-up state monitoring method, are applied to any of the above-described kind of server
Power-up state monitors system, including：
The portions FPGA, control server electrifying timing sequence starts, and records the corresponding condition information that powers on to memory；
The BMC powers on condition information described in obtaining；
The BMC is powered in condition information described in judging with the presence or absence of unusual condition information；
If it is, the BMC records the unusual condition information, and control the stopping of server electrifying timing sequence.
Preferably, further include：
The BMC repeats acquisition n times and powers on condition information；
The BMC, which judges to power on described in n times, whether there is consistent unusual condition information in condition information；
If it is, the BMC records the unusual condition information；The N is the positive integer more than 1.
Preferably, further include：The BMC transmits the unusual condition information to predeterminated position.
The third aspect, the present invention provide a kind of computer-readable memory, calculating are stored on the computer storage
The step of machine program, the computer program realizes above-mentioned server power-up state monitoring method when being executed by processor.
Fourth aspect, the present invention provide a kind of computer equipment, including：
Memory, for storing computer program；
Processor, the step of above-mentioned server power-up state monitoring method is realized when for executing the computer program.
The present invention provides a kind of server power-up state monitoring system, including：The portions FPGA, the portions BMC；The portions FPGA use
Start in control server electrifying timing sequence, and records the corresponding condition information that powers on to memory；The BMC, for obtaining
It states and powers on condition information；It is powered on described in judgement and whether there is unusual condition information in condition information；If it is, recording described different
Normal condition information, and control the stopping of server electrifying timing sequence.Server power-up state provided by the invention monitors system, in FPGA
Portion's control server is when powering on, and can monitor that FPGA records in memory powers on condition information, and judges wherein wrong different
Normal condition information avoids FPGA from flogging a dead horse powering on the when of being abnormal, to be recorded to unusual condition information, with convenient
The later use record, analyzes the state of working on power of server, can low cost, it is simple, accurately to server
The unusual condition that powers on be detected.
A kind of server power-up state monitoring method of present invention offer is applied to above-mentioned server power-up state and monitors system,
Computer storage and equipment can run the above method, it may have above-mentioned advantageous effect, details are not described herein.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is the composition schematic diagram that the server power-up state that the specific embodiment of the invention provides monitors system；
Fig. 2 is the expansion composition schematic diagram that the server power-up state that the specific embodiment of the invention provides monitors system；
Fig. 3 is a kind of a kind of flow chart for server power-up state monitoring method that specific implementation mode provides of the present invention；
Fig. 4 is that a kind of a kind of repetition for server power-up state monitoring method that specific implementation mode provides of the present invention determines
Flow chart.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Referring to FIG. 1, the composition that the server power-up state that Fig. 1, which is the specific embodiment of the invention, to be provided monitors system shows
It is intended to.
In a kind of specific implementation mode of the present invention, the embodiment of the present invention provides a kind of server power-up state monitoring system
System 100, including：The portions FPGA 110, the portions BMC 120；
The portions FPGA 110 start for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to depositing
Reservoir 111111；
The portions BMC 120 described power on condition information for obtaining；It powers in condition information and whether there is described in judgement
Unusual condition information；If it is, recording the unusual condition information, and control the stopping of server electrifying timing sequence.
Usually, on the server in electric control, the parallel processing degree in the portions FPGA 110 is high, is suitble to abundant with trigger
Structure, therefore be suitable for completing sequential logic.Therefore, in the server, it is each using the portions FPGA 110 to control server for design
Partial electrifying condition.The portions FPGA 110 record the electrifying condition of various pieces to memory 111, the electrifying condition of each part
The space of 1 Bit is occupied, the portions FPGA 110 will store corresponding Bit and be set as 1 after which normally starts, and not actuated be set as
The electrifying condition of server various pieces is learnt by reading 111 device information of memory in 0, BMC portion 120.Server normal boot-strap
Afterwards, memory 111 each Bit good defined in the portions FPGA 110 is that 1 (electric signal each defined has started
At), if some part of server can not start, it is 0 that the portions BMC 120, which will read corresponding Bit, judges the Bit with this
Corresponding server powers on part and does not power on normally.
It is well known that the portions BMC 120 are outband management equipment, so the portions BMC 120 first start before startup of server, because
This, the portions BMC 120 are able to access that the portions FPGA 110 obtain and power on condition information, judge wherein to whether there is unusual condition information, and
Recording exceptional condition information can then facilitate the unusual condition information of record uploading to host computer, for user or technical staff
Cheng Shi checks, the specific abnormal position of Analysis server.
In a kind of specific implementation mode of the present invention, the portions BMC 120 periodically send request command to the portions FPGA 110
Obtain the 110 register memory storage of the portions FPGA powers on condition information, for example, if server electric sequence is followed successively by：S4、
P12V, P5V, P3.3V, VPP ... correspondingly set corresponding storage location title and are followed successively by：Bit1、Bit2、Bit3、Bit4、
Bit5 ..., if that the portions BMC 120 will learn that Bit3 and the positions later Bit are 0 by the rule of agreement, that is,
P3.3V (the 4th powers on position) and later electric signal do not start, the thing that the portions BMC 120 do not start record P3.3V normally
Part, user or technical staff's discovery server access the portions BMC 120 by network after not starting normally and obtain this anomalous event, from
And learn the reason of causing electrical anomaly is that P3.3V is not actuated, is inferred in conjunction with the relevant components of P3.3V for which suspicious portion
There is exception in part, to search out the basic reason of failure.
Further, in order to reduce the erroneous judgement in the portions BMC 120, the portions BMC 120 can be set, be additionally operable to：It repeats to obtain N
It is secondary to power on condition information；Judge to power on described in n times and whether there is consistent unusual condition information in condition information；If so,
Then record the unusual condition information；The N is the positive integer more than 1.
Because the portions BMC 120 obtain 110 register data of the portions FPGA by the way of periodical poll, there is accidentally alarm
The portions FPGA 110 are normally carried out power up when risk, the i.e. portions BMC 120 read data, not yet have enough time updating register (recently
Signal Bit after power on signal is that 0), and the portions BMC 120 get the register data before not updating, take for Bit
It is not set as 1 and thinks that the signal does not power on, accidentally alerted in order to avoid such, the portions BMC 120 need to obtain number to the portions FPGA 110
According to being retried, i.e., when the portions BMC 120 have detected not actuated signal, 110 data of the portions FPGA several times that obtain are more to confirm exception
No real generation, the time that the portions FPGA 110 can be obtained according to electrifying timing sequence overall time and 120 training in rotation of the portions BMC are arranged properly
Number of retries.Such as number of retries continues to send 110 register of the portions I2C acquisition request FPGA for the portions 3, BMC 120, if 3 times
The register data of acquisition all shows that the signal does not start normally, illustrates that the signal does not start really, and the portions BMC 120 record
The not actuated event of the signal.
Further, in order to transmit information between the portions FPGA 110 and the portions BMC 120, can be arranged therebetween
I2C buses power on condition information for connecting the portions FPGA 110 and the portions BMC 120 described in transmission.I2C buses be by
A kind of simple, bidirectional two-line synchronous serial bus of Philips companies exploitation.It only needs both threads that can be connected to always
Information is transmitted between device on line.Storage system hard disk controller is connected to the portions FPGA as managing apparatus by I2C
110, FPGA portions 110 provide I2C modules, Master equipment of the portions BMC 120 as I2C, Slave of the portions FPGA 110 as I2C
Equipment；The portions BMC 120 are by giving the portions FPGA 110 to send 110 register data of the portions I2C acquisition request FPGA.
The portions BMC 120 and the portions FPGA 110 appoint that the portions FPGA 110 store 111 position of electrifying timing sequence signal condition memory,
The position in 110 global storage of the portions FPGA, 111 space, specifies the position to obtain when sending I2C requests so as to the portions BMC 120 where i.e.
Get corresponding register data；The positions Bit corresponding with 110 both ends of the portions the FPGA each electric signal of agreement of the portions BMC 120.
It is worth noting that in order to facilitate the portions FPGA 110 power on the storage of condition information, the memory 111 is
Register.Register possesses very high read or write speed, so the data transmission between register is very fast.The portions FPGA 110
Configuration register opens up a segment register region for electrifying timing sequence detecting, and each electric signal setting one Bit is general general
The electrifying timing sequence signal of server has 20 or so, for example, Power Button be pressed after S4, P12V, P5V, P3.3V,
VPP ... waits electric signals to start priority, so the register of 3 bytes is needed, 1 byte, 8 Bit, 3 bytes, 24 Bit,
The corresponding positions Bit are distributed to each electric signal according to the electric sequence of electric signal, Bit represent the Bit corresponding telecommunications for 1
Number start, for 0, to represent corresponding electric signal not actuated；The portions FPGA 110 write logical program, all registers of acquiescence before powering on
Bit are 0, according to the logical process of the scheme, the phase of setting agreement before next signal starts after each signal enabling
It is 1 to answer Bit.The portions BMC 120 and the portions FPGA 110 appoint the register position in the portions FPGA 110；The portions BMC 120 pass through I2C orders
After getting entire sequential detecting register data, check which electric signal corresponding Bit of each electric signal can learn
Start, which electric signal is not actuated.
Before server booting, i.e., before 110 electrifying timing sequence of the portions FPGA starts, give tacit consent in 110 register of the portions FPGA Bit all
It is 0, for each electric signal after starting before next electric signal startup, it is 1 that the portions FPGA 110, which are arranged corresponding Bit, is illustrated
Bright, Power Button press rear electrifying timing sequence and start, and first signal is S4, the positions setting Bit0 1 after S4 starts, then P12V
The positions Bit1 1 are set, the positions setting Bit2 1 after P5V starts, it is assumed that next P3.3V is not actuated, then P3.3V is corresponded to after startup
Bit3 be 0, all electric signals behind will be unable to start, corresponding Bit all be 0；It can from the distribution of entire register
It arrives, Bit0-2 is 1, and Bit3 and the positions later Bit are all 0.
It should further be noted that the portions FPGA 110 power on shape during control server powers on when server is recorded
There are when unusual condition, control server electrifying timing sequence stops condition.The portions FPGA 110 when powering on each electric signal be according to default
The electrifying startup of good sequence one by one, the input that next signal powers on when the startup of previous signal, if some
Signal can not normally start, behind all signals will not be activated.
The present invention provides a kind of server power-up state monitoring system, including：The portions FPGA 110, the portions BMC 120；The FPGA
Portion 110 starts for controlling server electrifying timing sequence, and records the corresponding condition information that powers on to memory 111；The BMC
Portion 120 described powers on condition information for obtaining；It is powered on described in judgement and whether there is unusual condition information in condition information；Such as
Fruit is then to record the unusual condition information.Server power-up state provided by the invention monitors system, is controlled in the portions FPGA 110
When control server powers on, the condition information that powers on that the portions FPGA 110 record in memory 111 can be monitored, and judges wherein have
Accidentally unusual condition information, to facilitate the later use record, powers on server to be recorded to unusual condition information
Working condition is analyzed, can low cost, it is simple, accurately the unusual condition that powers on of server is detected.
Referring to FIG. 2, the server power-up state that Fig. 2, which is the specific embodiment of the invention, to be provided monitors the expansion group of system
At schematic diagram.
On the basis of above-mentioned specific implementation mode, in present embodiment, in order to which unusual condition information is transmitted to
It is easy in the equipment checked, can also communication device 121 be set in the portions FPGA 110, be used for transmission the unusual condition information and arrive
Predeterminated position.The portions BMC 120 are used as simple microcontroller, and supported control protocol is fairly simple, and exploitation is needed to be communicated with host computer
Serve end program；The BMC monitoring management chips of server profession are different from, 120 outband management of the portions BMC supports weaker, use
When serial mode is communicated with the portions BMC 120, user or technical staff need to be connected to storage system by Serial Port Line to storage room
The portions BMC 120.The communication modes such as network communication device, such as 4G, WiFi may be used in the communication device 121, can also use
Line interface communication mode.
The portions BMC 120 report anomalous event to host computer, and the portions BMC 120 write embedded code, start and are based on serial ports or net
The feedback of status service routine of network interface, the portions BMC 120 and host computer agreement serial ports or network interface communication protocol, agreement are sent
Order and return data format, host computer connects the portions BMC 120 by serial ports or network interface, sends the order appointed
The event of electrical anomaly, is checked for user or technician in acquisition.Technician learns that the reason of causing electrical anomaly is
When some electric signal is not actuated, it is inferred to which suspicious component has exception in conjunction with the relevant component of the electric signal, to
The basic reason of failure is searched out, component is replaced and solves the problems, such as.
Referring to FIG. 3, Fig. 3 is a kind of a kind of server power-up state monitoring method that specific implementation mode provides of the present invention
Flow chart.
In a kind of specific implementation mode of the present invention, the embodiment of the present invention provides a kind of server power-up state monitoring side
Method is applied to the server power-up state in any of the above-described kind of specific implementation mode and monitors system, including：
S11：The portions FPGA 110, control server electrifying timing sequence starts, and records the corresponding condition information that powers on to memory
111；
S12：The portions BMC 120 power on condition information described in obtaining；
S13：The portions BMC 120 judge that described power on whether there is unusual condition information in condition information；
S14：If it is, the portions BMC 120 record the unusual condition information, and controls server electrifying timing sequence and stop
Only.
In order to save flow, when unusual condition is recorded in the portions FPGA 110, that is, certain part of server is recorded
When not powering on normally, the portions FPGA 110 power on situation there are when unusual condition when server is recorded, control server
Electrifying timing sequence stops.Because if the portions FPGA 110 control server and continue to power on, server can not finally work normally.
Referring to FIG. 4, Fig. 4 is a kind of a kind of server power-up state monitoring method that specific implementation mode provides of the present invention
Repetition determine flow chart.
In order to avoid the portions BMC 120 judge by accident, the mode for being repeated several times and determining and powering on unusual condition may be used：
S21：The portions BMC 120 repeat acquisition n times and power on condition information；
S22：The portions BMC 120 judge to power on described in n times in condition information and believe with the presence or absence of consistent unusual condition
Breath；
S23：If it is, the portions BMC 120 record the unusual condition information；The N is the positive integer more than 1.
Unusual condition information is checked for convenience, the unusual condition information can be transmitted in advance in the portions BMC 120
If position.Such as unusual condition information can be transmitted in host computer or other equipment conveniently checked.The portions BMC 120
It can be communicated with host computer by serial ports, host computer knows abnormality by preset serial port command from the portions BMC 120；
If cost can be received on a small quantity to increase, it can be that the portions BMC 120 are equipped with network controller, the portions BMC are given by sending networking command
120 so that obtain unusual condition information.
In another specific implementation mode of the present invention, the embodiment of the present invention provides a kind of computer-readable memory,
Computer program is stored on the computer storage, the computer program realizes above-mentioned specific reality when being executed by processor
The step of applying the server power-up state monitoring method in mode.
In a kind of specific implementation mode of the present invention, the embodiment of the present invention provides a kind of computer equipment, including：
Memory, for storing computer program；
Processor realizes the server power-up state in above-mentioned specific implementation mode when for executing the computer program
The step of monitoring method.
It is apparent to those skilled in the art that for convenience and simplicity of description, the device of foregoing description,
The specific work process of equipment and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In several embodiments provided herein, it should be understood that disclosed device, device and method can be with
It realizes by another way.For example, apparatus embodiments described above are merely indicative, for example, the division of unit,
Only a kind of division of logic function, formula that in actual implementation, there may be another division manner, such as multiple units or component can be with
In conjunction with or be desirably integrated into another device, or some features can be ignored or not executed.Another point, it is shown or discussed
Mutual coupling, direct-coupling or communication connection can be by some interfaces, the INDIRECT COUPLING of equipment or unit or
Communication connection can be electrical, machinery or other forms.
The unit illustrated as separating component may or may not be physically separated, and be shown as unit
Component may or may not be physical unit, you can be located at a place, or may be distributed over multiple networks
On unit.Some or all of unit therein can be selected according to the actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the application can be integrated in a processing unit, it can also
It is that each unit physically exists alone, it can also be during two or more units be integrated in one unit.Above-mentioned integrated list
The form that hardware had both may be used in member is realized, can also be realized in the form of SFU software functional unit.
It, can if integrated unit is realized in the form of SFU software functional unit and when sold or used as an independent product
To be stored in a computer read/write memory medium.Based on this understanding, the technical solution of the application substantially or
Say that all or part of the part that contributes to existing technology or the technical solution can embody in the form of software products
Out, which is stored in a storage medium, including some instructions are used so that a computer equipment
(can be personal computer, funcall equipment or the network equipment etc.) executes the whole of each embodiment method of the application
Or part steps.And storage medium above-mentioned includes：USB flash disk, mobile hard disk, read-only memory (Read-Only Memory,
ROM), random access memory (Random Access Memory, RAM), magnetic disc or CD etc. are various can store program
The medium of code.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only that
A little elements, but also include other elements that are not explicitly listed, or further include for this process, method, article or
The intrinsic element of equipment.In the absence of more restrictions, the element limited by sentence "including a ...", is not arranged
Except there is also other identical elements in the process, method, article or apparatus that includes the element.
It to a kind of server power-up state monitoring system and method, computer storage provided by the present invention and sets above
Standby to be described in detail, principle and implementation of the present invention are described for specific case used herein, above
The explanation of embodiment is merely used to help understand the method and its core concept of the present invention；Meanwhile for the general skill of this field
Art personnel, according to the thought of the present invention, there will be changes in the specific implementation manner and application range, in conclusion this
Description should not be construed as limiting the invention.
Claims (10)
1. a kind of server power-up state monitors system, which is characterized in that including：The portions FPGA, the portions BMC；
The portions FPGA start for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to memory；
The BMC described powers on condition information for obtaining；It powers on described in judgement in condition information and believes with the presence or absence of unusual condition
Breath；If it is, recording the unusual condition information, and control the stopping of server electrifying timing sequence.
2. server power-up state according to claim 1 monitors system, which is characterized in that the BMC is additionally operable to：
It repeats acquisition n times and powers on condition information；
Judge to power on described in n times and whether there is consistent unusual condition information in condition information；
If it is, recording the unusual condition information；The N is the positive integer more than 1.
3. server power-up state according to claim 1 monitors system, which is characterized in that further include：
I2C buses power on condition information for connecting the portions FPGA and the portions BMC described in transmission.
4. server power-up state according to claim 1 monitors system, which is characterized in that the memory is deposit
Device.
5. server power-up state according to any one of claims 1 to 4 monitors system, which is characterized in that further include：It is logical
T unit is used for transmission the unusual condition information to predeterminated position.
6. a kind of server power-up state monitoring method is applied to server power-up state described in any one of claim 1 to 5
Monitoring system, which is characterized in that including：
The portions FPGA, control server electrifying timing sequence starts, and records the corresponding condition information that powers on to memory；
The BMC powers on condition information described in obtaining；
The BMC is powered in condition information described in judging with the presence or absence of unusual condition information；
If it is, the BMC records the unusual condition information, and control the stopping of server electrifying timing sequence.
7. server power-up state monitoring method according to claim 6, which is characterized in that further include：
The BMC repeats acquisition n times and powers on condition information；
The BMC, which judges to power on described in n times, whether there is consistent unusual condition information in condition information；
If it is, the BMC records the unusual condition information；The N is the positive integer more than 1.
8. the server power-up state detection method described according to claim 6 or 7, which is characterized in that further include：The BMC
The unusual condition information is transmitted to predeterminated position.
9. a kind of computer storage, which is characterized in that be stored with computer program, the calculating on the computer storage
It is realized when machine program is executed by processor as described in any one of claim 6 to 8 the step of server power-up state monitoring method.
10. a kind of computer equipment, which is characterized in that including：
Memory, for storing computer program；
Processor realizes the server power-up state as described in any one of claim 6 to 8 when for executing the computer program
The step of monitoring method.
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Cited By (4)
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| CN110928591A (en) * | 2019-11-22 | 2020-03-27 | 东莞市小精灵教育软件有限公司 | Method, system, equipment and storage medium for analyzing startup and shutdown states |
| CN112214373A (en) * | 2020-09-17 | 2021-01-12 | 上海金仕达软件科技有限公司 | Hardware monitoring method and device and electronic equipment |
| CN112860621A (en) * | 2021-02-10 | 2021-05-28 | 山东英信计算机技术有限公司 | FPGA embedded management system, design method and medium |
| CN113625624A (en) * | 2021-07-29 | 2021-11-09 | 南京长峰航天电子科技有限公司 | Universal substrate management control system and control method |
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| CN112214373B (en) * | 2020-09-17 | 2022-04-12 | 上海金仕达软件科技有限公司 | Hardware monitoring method and device and electronic equipment |
| CN112860621A (en) * | 2021-02-10 | 2021-05-28 | 山东英信计算机技术有限公司 | FPGA embedded management system, design method and medium |
| CN113625624A (en) * | 2021-07-29 | 2021-11-09 | 南京长峰航天电子科技有限公司 | Universal substrate management control system and control method |
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Application publication date: 20180803 |