CN108345712A - The method and apparatus for calculating the frequency and current relationship of semiconductor devices - Google Patents

Abstract

This application discloses a kind of method and apparatus for the frequency and current relationship calculating semiconductor devices, and semiconductor devices includes multiple layerings, and the method for the frequency and electric current that calculate semiconductor devices includes：Obtain the underlying parameter of semiconductor devices；The expression formula of total power consumption based on thermal diffusion angle principle according to the crust steady state heat resistance of underlying parameter calculating semiconductor devices, and according to underlying parameter acquisition semiconductor devices, expression formula is the function of junction temperature, working frequency and collector current；According to the expression formula of total power consumption, crust steady state heat resistance, it is iterated calculating using one group of preset working frequency and collector current, obtains the junction temperature of semiconductor devices；In one group of preset working frequency and collector current, working frequency corresponding with the junction temperature obtained and collector current are determined.

Description

The method and apparatus for calculating the frequency and current relationship of semiconductor devices

Technical field

This disclosure relates to semiconductor applications, more particularly, to a kind of frequency and current relationship calculating semiconductor devices Method and apparatus, be primarily adapted for use in TO encapsulation series.

Background technology

Power semiconductor is widely used in electronic equipment, such as amplifying transistor is used as in power amplifier Or it is used as switching transistor in a power.Power semiconductor includes bipolar transistor (Bipolar Junction Transistor, BJT), metal oxide semiconductor transistor (MOSFET) and insulated gate bipolar transistor (IGBT) etc..

IGBT has both the high input impedance of MOSFET and the current-carrying capability of BJT, can simplify gate driving requirement, simultaneously Enhance conducting state performance.It has the frequency range of low saturation voltage, high current density, high blocking ability and up to 100kHz The advantages that, therefore the BJT during lower-wattage can be replaced to apply rapidly and the grid clip cutout silicon control rectification in higher-power applications Body (Gate Turn-offThyristor, GTO).

As modern electronic product is constantly to light, thin, short, small trend development, as one in semi-conductor discrete device The power of a important component, transistor outline package (Transistor Out-line, TO) IGBT products also gradually increases Greatly, this heat management that IGBT products are just encapsulated to TO proposes new challenge.

TO encapsulation IGBT products are mainly used in frequency converter field, and pyrotoxin is the igbt chip inside TO encapsulation, IGBT The thermal losses and temperature of chip that chip generates, working frequency and collector it is current related, and being normally applied specification can advise The maximum junction temperature for determining igbt chip does not allow more than 175 DEG C, and maximum collector current does not allow more than 3 times of rated current, Therefore, under the limitation of the two conditions, different operating frequency can correspond to a maximum collector current, can draw out one The relation curve of working frequency and maximum collector current allows user to understand TO encapsulation IGBT products in different work frequencies Under rate, the maximum collector current of output is how many, for being referred in actual use, the collector current that is used to avoid user It is excessive, and chip temperature is caused to exceed 175 DEG C, so as to cause the service life reduction of product, or even it is quickly invalidated.

In the prior art, the test of the relation curve of working frequency and collector current has larger difficulty, and real Survey not only needs to spend manpower and materials, and test is time-consuming longer, is unfavorable for the progress of product development, therefore, just urgently one kind can With the analogue system of automatic evaluation work frequency and collector current relation curve, which provides parameterisable input Forms, user can manually select the type of corresponding TO encapsulation, and input relevant parameter.It is used according to these on the backstage of analogue system Family is selected and the parameter of input, to calculate under the conditions of different shell temperature TC (case temperature, TC), arbitrary TO envelopes The working frequency and collector current relation curve for filling IGBT products, to refer to for users to use.

Invention content

In view of this, present disclose provides a kind of method and apparatus for the frequency and electric current calculating semiconductor devices, it can be with According to the underlying parameter of acquired semiconductor devices, the relation curve of automatic evaluation work frequency and maximum collector current.

According to an aspect of the present invention, a kind of method for the frequency and current relationship calculating semiconductor devices is provided, it is described Semiconductor devices includes multiple layerings, which is characterized in that the method includes：Obtain the underlying parameter of the semiconductor devices； The crust steady state heat resistance of the semiconductor devices is calculated according to the underlying parameter based on thermal diffusion angle principle, and according to described Underlying parameter obtains the expression formula of the total power consumption of the semiconductor devices, and the expression formula is junction temperature, working frequency and collector The function of electric current；According to the expression formula of the total power consumption and the crust steady state heat resistance, using one group of preset working frequency and Collector current is iterated calculating, obtains the junction temperature of the semiconductor devices；In described one group preset working frequency sum aggregate In electrode current, working frequency corresponding with the junction temperature of the acquisition and collector current are determined.

Preferably, the underlying parameter includes test data；It is described that the semiconductor device is obtained according to the underlying parameter The expression formula of the total power consumption of part includes：Calculate the fitting parameter of the test data；According to the fitting parameter and the basis The conducting power consumption P of semiconductor devices described in gain of parameter_conExpression formula；It is obtained according to the fitting parameter and the underlying parameter Obtain the switching power loss P of the semiconductor devices_swExpression formula；The total power consumption of the semiconductor devices is obtained according to following equation P_totExpression formula：

P_tot=P_con+P_sw

Wherein P_conIndicate the conducting power consumption of the semiconductor devices, P_swIndicate the switching power loss of the semiconductor devices, P_totIndicate the total power consumption of the semiconductor devices.

Preferably, the test data includes：First test data, first test data include the semiconductor device Saturation voltage drop of the part under different test junction temperatures and different test collector currents；And second test data, described second surveys Examination data include master switch energy loss of the semiconductor devices under different test collector currents.

Preferably, the fitting parameter for calculating the test data includes：First test data is carried out twice Linear fit obtains the first fitting parameter, and quadratic polynomial fitting is carried out to second test data, obtains the second fitting ginseng Number.

It is preferably, described that first test data progress, linear fit includes twice：According to Vcesat=k*Tj'+b Linear fit is carried out to first test data, obtains multiple test collector current curves and its slope k and intercept b, In, Vcesat indicates that the saturation voltage drop, Tj ' indicate the test junction temperature；According to following equation to all test current collections Electrode current slope of a curve k and intercept b carry out linear fit, obtain the curve of slope k and the curve of intercept b and its corresponding work For Vce_k1, Vce_k2, Vce_b1 and Vce_b2 of first fitting parameter：

K=Vce_k1*Ic'+Vce_k2

B=Vce_b1*Ic'+Vce_b2

Wherein, Ic ' indicates the test collector current.

Preferably, the underlying parameter includes duty ratio and input waveform；The input waveform is square wave；It is described according to institute It states fitting parameter and obtains the conducting power consumption expression formula of the semiconductor devices with the underlying parameter and include：It is obtained by following equation Obtain the conducting power consumption P of the semiconductor devices_conExpression formula：

P_con=D*Ic*Vecsat

Vcesat=(Vce_k1*Ic+Vce_k2) * Tj+Vce_b1*Ic+Vce_b2

Wherein, D indicates that the duty ratio, Ic indicate that the collector current, Tj indicate the junction temperature, Vce_k1, Vce_ K2, Vce_b1 and Vce_b2 indicate first fitting parameter.

Preferably, described to include to second test data progress quadratic polynomial fitting：According to E_st=Est_a*Ic '²+ Est_b*Ic'+Est_c carries out quadratic polynomial fitting to second test data, obtains test collector current curve And its Est_a, Est_b and Est_c as second fitting parameter, wherein Est indicates the master switch energy damage Consumption, Ic ' indicate the test collector current.

Preferably, the underlying parameter includes；The input waveform is square wave；It is described to be obtained according to the fitting parameter The switching power loss expression formula of the semiconductor devices includes：The switching power loss of the semiconductor devices is obtained by following equation P_swExpression formula：

E_st=Est_a*Ic²+Est_b*Ic+Est_c

Wherein, fsw indicates that the working frequency, Est indicate that the master switch energy loss, g indicate that preset value, Tj indicate The junction temperature, T_{J, max}Indicate that preset maximum junction temperature, Ic indicate that the collector current, Est_a, Est_b and Est_c indicate Second fitting parameter.

Preferably, the underlying parameter includes upper frequency limit and rated current；The expression formula according to the total power consumption, The crust steady state heat resistance is iterated calculating using one group of preset working frequency and collector current, and acquisition is described partly to be led The junction temperature of body device includes：One group of preset working frequency is obtained according to the upper frequency limit；It is obtained according to the rated current One group of preset collector current；According to one group of preset working frequency, one group of preset collector current, described The expression formula of total power consumption and the crust steady state heat resistance are iterated the junction temperature for calculating and obtaining the semiconductor devices.

Preferably, described to include according to one group of preset working frequency of upper frequency limit acquisition：In the upper frequency limit With one group of centrifugal pump is chosen within the scope of preset lower-frequency limit.

Preferably, described to include according to the rated current one group of preset collector current of acquisition：With the specified electricity The upper limit of the preset multiple of stream as collector current；In the upper limit of preset collector current lower limit and the collector current One group of centrifugal pump is chosen in range.

Preferably, the expression formula according to the total power consumption, the crust steady state heat resistance, utilize one group of preset work Frequency and collector current are iterated calculating, and the junction temperature for obtaining the semiconductor devices includes：Based on preset initial junction temperature Tj⁽⁰⁾With one group of preset working frequency fsw and collector current Ic, for each in the preset working frequency fsw fsw⁽ⁱ⁾, the junction temperature Tj for calculating the semiconductor devices for meeting preset condition is iterated by following two equatioies：

Tj^(k)=P_tot ^(k-1)*Rjc

P_tot ^(k-1)=f (fws⁽ⁱ⁾,Ic^(h),Tj^(k))

The preset condition includes：

|Tj^(k)-Tj^(k-1)| ＜ 1, and | Tj-T_j,max| ＜ 1,

Wherein, Rjc indicates that crust steady state heat resistance, fsw indicate that working frequency, Ic indicate that working frequency, Tj indicate junction temperature, T_{J, max}Indicate that preset maximum junction temperature, i indicate that the iterations of working frequency, h indicate the iterations of collector current, k tables Show the iterations of junction temperature.

Preferably, the underlying parameter includes prestore parameter and user's input parameter, and the parameter that prestores includes test number According to, rated voltage, input waveform, the size of the multiple layering and the multiple size of delamination thermal coefficient at least One kind, user's input parameter include chip size, rated current, duty ratio, skin temperature, upper frequency limit, encapsulated type, At least one of the rated voltage and the input waveform；The underlying parameter packet for obtaining the semiconductor devices It includes：Establish the look-up table of prestore parameter and user's input parameter；After receiving the first instruction, user's input parameter is received, and The parameter that prestores corresponding with the user's input parameter received is obtained according to look-up table；After receiving the second instruction, complete It obtains.

Preferably, further include：It will be corresponding with the junction temperature of semiconductor devices of preset condition is met described in each acquisition The semiconductor devices working frequency and collector current export in the form of a graph.

Preferably, the look-up table is based on excel platform constructions.

Preferably, the semiconductor devices is insulated gate bipolar transistor discrete device.

Preferably, the crust for calculating the semiconductor devices according to the underlying parameter based on thermal diffusion angle principle is steady State thermal resistance includes：The thermal resistance of the multiple layering is calculated according to the underlying parameter of the multiple layering based on thermal diffusion angle principle； The crust steady state heat resistance of semiconductor devices described in thermal resistance read group total according to the multiple layering.

According to another aspect of the present invention, a kind of device for the frequency and current relationship calculating semiconductor devices, institute are provided It includes multiple layerings to state semiconductor devices, which is characterized in that described device includes：Parameter acquisition module, for obtaining described half The underlying parameter of conductor device；Thermal resistance calculation module, for being based on thermal diffusion angle principle according to described in underlying parameter calculating The crust steady state heat resistance of semiconductor devices；Expression formula acquisition module, for obtaining the semiconductor device according to the underlying parameter The expression formula of the total power consumption of part, the expression formula are the functions of junction temperature, working frequency and collector current；Junction temperature computing module, For according to the expression formula of the total power consumption and the crust steady state heat resistance, utilizing one group of preset working frequency and collector electricity Row iteration calculating is flowed into, the junction temperature of the semiconductor devices is obtained；As a result computing module, in one group of preset work In frequency and collector current, working frequency corresponding with the junction temperature of the acquisition and collector current are determined.

Preferably, the thermal resistance calculation module includes：Single layer computing module, for being based on thermal diffusion angle principle, according to institute The underlying parameter for stating multiple layerings calculates the thermal resistance of the multiple layering；And summarizing module, for according to the multiple layering Thermal resistance read group total described in semiconductor devices crust steady state heat resistance.

Preferably, the underlying parameter includes test data, and the expression formula acquisition module includes：Fitting parameter calculates mould Block, the fitting parameter for calculating the test data according to the test data；Power consumption expression formula acquisition module is connected, is used for The conducting power consumption expression formula of the semiconductor devices is obtained according to the fitting parameter and the underlying parameter；Switching power loss is expressed Formula acquisition module, the switching power loss for obtaining the semiconductor devices according to the fitting parameter and the underlying parameter are expressed Formula；And total power consumption expression formula acquisition module, for being obtained according to the conducting power consumption expression formula and the switching power loss expression formula Obtain the total power consumption expression formula.

Preferably, the underlying parameter includes upper frequency limit and rated current, and the junction temperature computing module includes：Default work Working frequency acquisition module, for obtaining one group of preset working frequency according to the upper frequency limit；Default collector current obtains Module, for obtaining one group of preset collector current according to the rated current；And junction temperature result of calculation module, it is used for root According to one group of preset working frequency, one group of preset collector current, the expression formula of the total power consumption and described Crust steady state heat resistance is iterated the junction temperature for calculating and obtaining the semiconductor devices.

Preferably, the underlying parameter includes prestore parameter and user's input parameter, and the parameter that prestores includes test number According to, rated voltage, input waveform, the size of the multiple layering and the multiple size of delamination thermal coefficient at least One kind, user's input parameter include chip size, rated current, duty ratio, skin temperature, upper frequency limit, encapsulated type, At least one of the rated voltage and the input waveform；The parameter acquisition module includes：Interactive module, for connecing Receive user's input parameter；And searching module, for being obtained with user's input parameter according to the look-up table pre-established The parameter that prestores.

Preferably, the look-up table is based on excel platform constructions.

The invention has the advantages that a kind of method and apparatus for the frequency and electric current calculating semiconductor devices are provided, The device by obtain semiconductor devices underlying parameter, and according to underlying parameter carry out thermal resistance and frequency current curve meter It calculates, which can be tabled look-up and evaluation work frequency and maximum collector automatically after obtaining user's input parameter The relation curve of electric current improves work efficiency to simplify operating process.

Description of the drawings

In order to illustrate more clearly of the technical solution of the embodiment of the present disclosure, simple be situated between will be made to the attached drawing of embodiment below It continues, it should be apparent that, the attached drawing in description below only relates to some embodiments of the present disclosure, rather than the limitation to the disclosure.

Fig. 1 shows the structural schematic diagram of the semiconductor devices according to the embodiment of the present disclosure.

Fig. 2 shows the main-process streams of the method according to the frequency and electric current of the calculating semiconductor devices of the embodiment of the present disclosure to show It is intended to.

Fig. 3 A to Fig. 3 D show the flow diagram of each section specific steps of main-process stream schematic diagram in Fig. 2.

Fig. 4 A to Fig. 4 D show the example of the look-up table according to the embodiment of the present disclosure.

Fig. 5 A and 5B show the example of the user interface according to the embodiment of the present disclosure.

Fig. 6 A and Fig. 6 B respectively illustrate the section in long and wide direction according to the semiconductor devices of the embodiment of the present disclosure Figure.

Fig. 7 shows the structural representation of the device of the frequency and electric current according to the calculating semiconductor devices of the embodiment of the present disclosure Figure.

Specific implementation mode

To keep the purpose, technical scheme and advantage of the embodiment of the present disclosure clearer, below in conjunction with the embodiment of the present disclosure Attached drawing, clear, complete description is carried out to the technical solution of the embodiment of the present disclosure.Obvious described embodiment is the disclosure A part of the embodiment, instead of all the embodiments.Based on described embodiment of the disclosure, ordinary skill people The every other embodiment that member is obtained under the premise of without creative work belongs to the range of disclosure protection.

Fig. 1 shows the structural schematic diagram of the semiconductor devices according to the embodiment of the present disclosure.

As shown in Figure 1, in the present embodiment, can have four-layer structure, that is, be followed successively by chip 1, solder from top to bottom Layer 2, copper base 3, thermal grease layer 4,4 lower section of thermal grease layer can be heat sink (not shown).However it is only above One exemplary construction of semiconductor devices, the semiconductor devices of the embodiment of the present disclosure is without being limited thereto, and semiconductor devices can basis Difference needs and has a variety of different structures.

Fig. 2 shows the main-process streams of the method according to the frequency and electric current of the calculating semiconductor devices of the embodiment of the present disclosure to show It is intended to.

As shown in Fig. 2, semiconductor devices can have multiple layerings, one of layering is chip.According to chip package The difference of type, layered structure is different, such as can have layered structure shown in FIG. 1, naturally it is also possible to have other Any desired structure.

In step S100, the underlying parameter of semiconductor devices is obtained.Wherein, underlying parameter include prestore parameter and user it is defeated Enter parameter.

As shown in Figure 3A, the underlying parameter of semiconductor devices can be obtained by following steps S101 to S105.

In step S101, look-up table is established.Look-up table can manually be established by user.Look-up table includes prestore parameter and use The table of comparisons of family input parameter, the parameter that prestores include：At least one input waveform, at least one rated voltage, at least one envelope Fill the physics such as type, test data corresponding with each encapsulated type, the size of multiple layerings, thickness, thermal coefficient The table of comparisons of parameter, user's input parameter includes：Chip size corresponding with each encapsulated type, thickness, thermal coefficient etc. Physical parameter.

Fig. 4 A to Fig. 4 D show the example of the look-up table according to the embodiment of the present disclosure.In the embodiment of Fig. 4 A to 4D, Look-up table is based on excel platform constructions.Certain embodiment of the disclosure is without being limited thereto, can also be based on as needed any Other platforms build look-up table.As shown in Fig. 4 A to 4D, by taking encapsulated type shown in FIG. 1 as an example, point under the encapsulated type Layer structure is 4 layers, is chip 1, solder layer 2, copper base 3, thermal grease layer 4 respectively, 4 lower section of thermal grease layer can be heat It is heavy.Look-up table divides quinquepartite, is respectively designated as " thermophysical parameter of TO ", " rated voltage ", " length of TO in the present embodiment Degree size ", " width dimensions of TO " and " test data ".

As shown in Figure 4 A, " thermophysical parameter of TO " partly includes the thermal coefficient K and thickness of each layering, in this implementation Example in thermal coefficient K by watt/ meter Du as unit of, thickness is in millimeters.It illustrates only and is sealed for shown in Fig. 1 in Figure 4 A The thermophysical parameter of type being respectively layered is filled, however the present embodiment is without being limited thereto, can fill in as needed for other encapsulation Each layering thermophysical parameter of type, such as can be in the column E, F, G, H of Fig. 4 A filling for each point of another encapsulated type Layer thermophysical parameter, and so on.In some preferred embodiments, for the thermal coefficient of two kinds of encapsulated type same hierarchical levels, It can be not repeated to set, because the thermal coefficient of identical material is identical, and thickness can be reset as needed.

As shown in Figure 4 B, " rated voltage " partly includes at least one rated voltage and at least one input waveform, this two Column is optional, for providing option to the user in the follow-up input rated voltage of user and input waveform, to facilitate user Selection.If the not partial data, user can be enabled to be manually entered desired load voltage value and input on a user interface Waveform.Illustrate only two alternative rated voltages and input waveform in the example of Fig. 4 B, however the implementation of the disclosure Example is without being limited thereto, can provide arbitrary alternative rated voltage and input waveform as needed.Such as it can be Fig. 4 B's Data row, which continue below, fills in other alternative load voltage values and input waveform.

As shown in Figure 4 C, " length dimension of TO " includes partly the length of each layering in a first direction, in this implementation Length can be in millimeters in example.Fig. 4 C are illustrated only to be layered in a first direction for each of encapsulated type shown in Fig. 1 Length, however embodiment of the disclosure is without being limited thereto, and each layering that can be filled in as needed for other encapsulated types exists Length on first direction, such as can insert on the column D, E, F, G of Fig. 4 C and be layered for each of another encapsulated type Length on one direction, and so on.Similar to Fig. 4 C, " width dimensions of TO " part (not shown) includes each layering the Length on two directions, in the present embodiment width can equally can as needed fill in for other in millimeters The width of each layering of encapsulated type in a second direction.

In some embodiments, above " length on first direction " and " length in second direction " can refer to square The length and width of shape layering.Certain embodiment of the present disclosure is without being limited thereto, and first direction and second direction can arbitrarily be set as needed It sets, as long as size of delamination can be embodied.

As shown in Figure 4 D, " test data " includes partly the first test data and second test data two parts.

First test data includes：In corresponding table 401, inputted in different test knots for each encapsulated type The saturation voltage drop Vcesat measured under conditions of warm Tj ' and different test collector current Ic '.Second test data includes： In corresponding table 405, inputted in specified test junction temperature Tj ', a variety of different test current collections for each encapsulated type What is measured under conditions of electrode current Ic ' opens energy loss E_onWith shutdown energy loss E_offAnd master switch energy loss E_st, Master switch energy loss Est is to open the sum of energy loss Eon and shutdown energy loss Eoff.

In step S102, enabled instruction (the first instruction) is received.It is obtained to input with the user received according to look-up table and be joined The corresponding parameter that prestores of number.

Fig. 5 A and 5B show the example of the user interface according to the embodiment of the present disclosure.

Fig. 5 A are the user interfaces for including Fig. 4 A look-up tables entitled " thermophysical parameter of TO ", and Fig. 5 B are to be named as " to calculate The user interface of the curve of TO encapsulation Ic and fsw ".

In such as user interface of Fig. 5 A, user can click " startup " button 512, so that user interface is received operation and calculate journey Sequence instructs.

In step S103, after receiving enabled instruction, interactive interface is presented to user.Fig. 5 A are shown to be implemented according to the disclosure The example of the user interface of example.As shown in Figure 5A, interactive interface has 501,502,503,504,505,506,507 and of input field Option column 508,509,510.Interactive interface is used to receive user's input parameter in underlying parameter, input field 501,502, 503 are respectively used to the length and width and thickness that user inputs chip；Input field 504,505,506,507 is respectively used to user's input half Rated current, duty ratio, skin temperature and the upper frequency limit of conductor device；Option column 508 selects desired chip for user Encapsulated type；Option column 509 selects desired chip rated voltage for user；Option column 510 selects desired for user Input waveform.

In step S104, curve computations (the second instruction) are received.When user is in interactive interface point as shown in Figure 5A It hits after " curve calculating " button 511, completes parameter acquiring.

In step S200, the crust steady state heat resistance of semiconductor devices is calculated according to underlying parameter based on thermal diffusion angle principle.

As shown in Figure 3B, the crust steady state heat resistance of semiconductor devices can be calculated by following steps S201 to S209.

In step S201, the size of multiple layerings of corresponding encapsulated type chip and multiple layerings are obtained according to look-up table Thermal coefficient.

In step S202, the size of heat source on chip is determined according to the size of chip and rated voltage.Such as it can basis The rated voltage of chip is using the preset amount of the size reduction of chip as the size of heat source.Specific reduction volume can be come as needed Arbitrary setting, such as can be arranged according to the width of chip protection ring.

In step S203, since first layer, calculated according to the size of layering and the size of thermal coefficient and heat source each The thermal diffusion angle of a layering.For example, i is initially 1, the thermal diffusion angle of the i-th layering is calculated according to following equation (1) and (2)：

Wherein, i indicates the i-th layering, and x and y indicate first direction in being layered and second direction (in the present embodiment respectively In, can be the length of layering and wide direction),K indicates that the thermal coefficient of layering, l indicate the two of heat source length / mono-, L indicate that the half of the length of layering, w indicate lift height.

In step S204, judge whether substrate and heat source are square, i.e., whether meets l_{i_x}=l_{i_y}And L_{i_x}= L_{i_y}, no to then follow the steps S206 if it is thening follow the steps S205.

In step S205, work as l_{i_x}=l_{i_y}And L_{i_x}=L_{i_y}When, the thermal resistance of the i-th layering is calculated by following equation (3) Rth_i：

Wherein α_i=α_{i_x}=α_{i_y}, l_i=l_{i_x}=l_{i_y}；α_iIt indicates in being layered at i-th layer, the angle at thermal diffusion angle, α_{i_x}Table Show in being layered at i-th layer, the component of thermal diffusion angle in a first direction, α_{i_y}It indicates in being layered at i-th layer, thermal diffusion angle is the Component on two directions, L_iIt indicates in being layered at i-th layer, the half of heat source length, l_{i_x}It indicates in being layered at i-th layer, heat The component of the half of source length in a first direction, l_{i_y}It indicates in being layered at i-th layer, the half of heat source length exists Component in second direction.

In step S206, work as l_{i_x}≠l_{i_y}And/or L_{i_x}≠L_{i_y}When by following equation (4) calculate i-th layering thermal resistance Rth_i：

Wherein,α_{i_x}It indicates in being layered at i-th layer, the component of thermal diffusion angle in a first direction, α_{i_y}Table Show in being layered at i-th layer, the component of thermal diffusion angle in a second direction, l_{i_x}It indicates in being layered at i-th layer, the two of heat source length / mono- component in a first direction, l_{i_y}It indicates in being layered at i-th layer, the half of heat source length is in a second direction Component, L_{i_x}It indicates in being layered at i-th layer, the component of the half of the length of layering in a first direction, L_{i_y}It indicates In i-th layer of layering, the component of the half of the length of layering in a second direction.

In step S207, carry out to next layering, i.e. i=i+1.

In step S208, judge whether the thermal resistance calculation for completing the last one layering, that is, whether meet i ＞ N, wherein N Indicate the sum of layering, such as the structure of Fig. 1, N=4.It sums if it is S209 is thened follow the steps, otherwise returns to step Rapid S204 continues to calculate the thermal resistance of next layering.

In step S209, by the thermal resistance Rth of layering_iSummation is to obtain the crust steady state heat resistance of entire semiconductor devices, tool The crust steady state heat resistance Rjc of semiconductor devices can be obtained to body by following equation (5)：

However embodiment of the disclosure is without being limited thereto, can use heat of other calculations from each layering as needed Resistance obtains crust steady state heat resistance, such as weighted sum of entire semiconductor devices etc..

Step S200 is described in detail below with reference to the example of Fig. 6 A and Fig. 6 B.Fig. 6 A and Fig. 6 B respectively illustrate root According to sectional view of the semiconductor devices of the embodiment of the present disclosure in long and wide direction.As shown in Figure 6 A and 6B, semiconductor devices packet Two layerings 601 and 602 are included, wherein layering 601 is chip, there is heat source 603 thereon.The thermal coefficient of layering 601 is k1, thick It is w1 to spend, and length is 2L on first direction_{1_x}, length is 2L in second direction_{1_y}.The thermal coefficient of layering 602 is k2, and thickness is W2, length is 2L on first direction_{2_x}, length is 2L in second direction_{2_y}.Length 2l on the first direction of heat source 603_x, second Length is 2l on direction_y.In this example, it is assumed that x and y indicate the length of rectangle and wide direction respectively.

It first can be according to the size of the rated voltage of chip 601 come by the long L of chip 601_{1_x}With wide L_{1_y}It reduces pre- Fixed value, using obtained result as the long l of heat source 603_xWith wide l_y.Specific reduction volume can come arbitrary setting, example as needed It can be such as arranged according to the width of chip protection ring.Then pass through the thermal diffusion of above equation (1) and (2) computing chip 601 The thermal diffusion angle α 2 of 601 lower section layering 602 of angle α 1 and chip.Judge whether chip 601 and heat source 603 are square, that is, be It is no to meet L_{1_x}=L_{1_y}And l_x=l_y, if it is, being layered come computing chip 601 and below 602 using above-mentioned equation (3) Thermal resistance Rth₁, 602 thermal resistance Rth is otherwise layered come computing chip 601 and below using above-mentioned equation (4)₂.By Rth₁With Rth₂It is cumulative to obtain the crust steady state heat resistance of entire semiconductor devices.

In step S300, total power consumption expression formula is obtained according to underlying parameter.

As shown in Figure 3 C, total power consumption expression formula can be obtained by following steps S301 to S306.In step S301, root Test data corresponding with encapsulated type is obtained according to look-up table.For example, obtaining test data as shown in Figure 4 D.

In step S302, the first fitting parameter of the first test data is calculated according to equation (6), (7), (8).

Vcesat=k*Tj'+b (6)

K=Vce_k1*Ic'+Vce_k2 (7)

B=Vce_b1*Ic'+Vce_b2 (8)

As shown in Figure 4 D, by taking the encapsulated type of TO247 as an example, the first test is obtained in the correspondence table 401 of look-up table Data, the first test data include the corresponding test respectively when it is 25 DEG C, 50 DEG C, 75 DEG C, 100 DEG C, 125 DEG C to test junction temperature Tj ' Collector current Ic ' is the saturation voltage drop Vcesat that measures under conditions of 20A, 40A, 80A.Specifically, test collector current When Ic ' is 20A, test junction temperature Tj ' is respectively for 25 DEG C, 50 DEG C, 75 DEG C, 100 DEG C, 125 DEG C of corresponding saturation voltage drop Vcesat 1.48V、1.52V、1.59V、1.66V、1.72V；When to test collector current Ic ' be 40A, test junction temperature Tj ' is 25 DEG C, 50 DEG C, 75 DEG C, 100 DEG C, 125 DEG C of corresponding saturation voltage drop Vcesat be respectively 2.02V, 2.08V, 2.18V, 2.33V, 2.44V；It surveys When examination collector current Ic ' is 80A, test junction temperature Tj ' is 25 DEG C, 50 DEG C, 75 DEG C, 100 DEG C, 125 DEG C of corresponding saturation voltage drops Vcesat is respectively 2.74V, 2.87V, 3.05V, 3.28V, 3.46V.This group of data are entered into pair as the first test data After answering table 401, three groups of test scatterplots can be obtained, respectively：(25,1.48), (50,1.52), (75,1.59), (100, 1.66)、(125,1.72)；(25,2.02), (50,2.08), (75,2.18), (100,2.33), (125,2.44)；(25, 2.74), (50,2.87), (75,3.05), (100,3.28), (125,3.46).Three groups of test scatterplots are carried out scatter plot 402 to paint Figure carries out linear fit, to obtain to the Trendline of three groups of test scatterplots respectively：

Collector current Ic is that the corresponding linear formulas of 20A 421 are

Vcesat=0.0025*Tj'+1.408

Collector current Ic is that the corresponding linear formulas of 40A 422 are

Vcesat=0.0044*Tj'+1.885

Collector current Ic is that the corresponding linear formulas of 80A 423 are

Vcesat=0.0074*Tj'+2.525

Then, summarize the slope k and intercept b in three linear formulas 421,422,423, obtain two groups of intermediate data, it is raw After table 403, two groups of test scatterplots can be obtained, respectively：(20,0.0025), (40,0.0044), (80,0.0074) and (20,1.408), (40,1.885), (80,2.525).Two groups of scatterplots are carried out scatter plots 404 to draw, by by two groups of scatterplots Trendline carry out linear fit to obtain the linear fit formula 441 of slope k and the linear fit formula 442 of intercept b,

K=8.00E_05*Ic'+0.001

B=0.0183*Ic'+1.087

To obtain the numerical value of tetra- the first fitting parameters of Vce_k1, Vce_k2, Vce_b1, Vce_b2, wherein at this In embodiment Vce_k1 be 8.00E-05, Vce_k2 0.001, Vce_b1 0.0183, Vce_b2 1.087.

In step S303, the second fitting parameter of the second test data is calculated according to equation (9).

E_st=Est_a*Ic'²+Est_b*Ic'+Est_c (9)

As shown in Figure 4 D, by taking the encapsulated type of TO247 as an example, the second test data is obtained in a lookup table, in look-up table Correspondence table 405 in obtain the second test data, the second test data includes the collector when testing junction temperature Tj '=175 DEG C Electric current Ic be 10A, 20A, 30A, 40A, 50A, 60A under conditions of, measure open energy loss Eon be respectively 0.874nJ, 1.754nJ, 2.883nJ, 4.291nJ, 6.112nJ, 8.328nJ, shutdown energy loss Eoff be respectively 0.457nJ, 1.008nJ, 1.406nJ, 1.747nJ, 2.331nJ, 3.473nJ calculate master switch energy loss E_stRespectively 1.331nJ, 2.762nJ、4.289nJ、6.038nJ、8.443nJ、11.801nJ.This group of data are entered into correspondence as the second test data After table 405, one group of test scatterplot can be obtained：(10,1.331), (20,2.762), (30,4.289), (40,6.038), (50,8.443)、(60,11.801).This group test scatterplot is subjected to scatter plot drawing, the Trendline by testing scatterplot carries out Quadratic polynomial is fitted, to obtain a test collector current Ic ' and switching energy loss E_stRelation curve 460

E_st=0.0023*Ic'²+0.0389*Ic'+0.8545

To obtain tri- the second fitting parameters of Est_a, Est_b, Est_c, wherein Est_a is in the present embodiment 0.0023, Est_b 0.0389, Est_c 0.8545.

Finally, by the correspondence number of Vce_k1, Vce_k2, Vce_b1, Vce_b2, Est_a, Est_b, Est_c fitting parameter Value, in the corresponding tables of typing Fig. 5 B 30.

The present embodiment illustrates the generation of the typing of test data and fitting parameter only by taking TO247 as an example, at some In preferred embodiment, the test data of other chip types can also be added, it, can so that user is while selecting chip type To directly obtain corresponding test data.

In the present embodiment, the step S302 and S303 of digital simulation parameter is executed after step S301, however this public affairs The embodiment opened is without being limited thereto.In other preferred embodiments, the calculating of fitting parameter can be in its before step S304 He executes the time, such as digital simulation parameter after test data can be obtained in above-mentioned steps S101, and as looking into Look for a part for table.

In step S304, conducting power consumption P is obtained according to equation (10), (11)_conExpression formula.

P_con=D*Ic*Vecsat (10)

Vcesat=(Vce_k1*Ic+Vce_k2) * Tj+Vce_b1*Ic+Vce_b2 (11)

Wherein, D is duty ratio, and Ic is collector current, and Tj is junction temperature, Vce_k1, Vce_k2, Vce_b1 and Vce_b2 For the first fitting parameter.

In step S305, switching power loss P is obtained according to equation (12), (13)_swExpression formula.

E_st=Est_a*Ic²+Est_b*Ic+Est_c (13)

Wherein, fsw is working frequency, and Est indicates master switch energy loss, and it is knot that g takes 0.04, Tj for default empirical value Temperature, T_{J, max}175 DEG C are taken for default maximum junction temperature, Ic indicates that collector current, Est_a, Est_b and Est_c are the second fitting Parameter.

In step S306, total power consumption P is obtained according to equation (14)_totExpression formula.

P_tot=P_con+P_sw=f (fsw, Ic, Tj) (14)

Wherein, P_conFor the conducting power consumption of semiconductor devices, P_swFor the switching power loss of semiconductor devices, total power consumption P_totTable It is the function of junction temperature Tj, working frequency fsw and collector current Ic up to formula.

It should be noted that in step S304 to step S306, equation (10), (12) are the inputs selected according to user What waveform determined, different input waveforms corresponds to different conducting power consumption calculation equatioies and switching power loss calculation equation, in this reality It applies in example, only by taking input waveform is square wave as an example.

Maximum collector electricity under different frequency is determined according to the expression formula of total power consumption, crust steady state heat resistance in step S400 Stream.

As shown in Figure 3D, maximum collector current under different frequency can be determined by following steps S401 to S408.

In step S401, equation is based on according to junction temperature Tj and one group of preset working frequency fsw and collector current Ic (15) total power consumption P is determined_tot：

P_tot ^(k-1)=f (fws⁽ⁱ⁾,Ic^(h),Tj^(k)) (15),

Wherein, fsw indicates that operating frequency value, Ic indicate that collector current, i indicate that working frequency iterations, h indicate collection The iterations of electrode current, k indicate the iterations of junction temperature.

Calculating initial total power consumption P_tot ⁽⁰⁾When the junction temperature Tj that uses⁽⁰⁾Interaction circle of the user via such as Fig. 5 A may be used in value The shell temperature Tc of the semiconductor devices of face input.

Above-mentioned one group of preset working frequency fsw and collector current Ic can be based on user via the interactive interface of Fig. 5 A The upper frequency limit and rated current of input obtains.For example, the lower limit that can preset working frequency is 1kHz, using in Fig. 5 A Shown in for 100kHz upper frequency limits, multiple works can be chosen in the operating frequency range of (1kHz, 100kHz) by backstage Working frequency value, fsw (1), fsw (2).For example, can be with predetermined current lower limit for 0, the upper limit is specified electricity input by user 3 times of stream, can choose multiple collector current value Ic (1), Ic (2) within this range from the background.

Obtaining the operation of one group of default working frequency fsw and collector current Ic can execute in this step, can also Any time before this step executes, such as has input upper frequency limit and specified via interactive interface shown in Fig. 5 A in user Aforesaid operations are carried out to obtain multiple centrifugal pumps of working frequency and collector current after electric current.

In step S402, junction temperature Tj is calculated according to equation (16)：

Tj^(k)=P_tot ^(k-1)*Rjc (16)

Wherein, P_totIndicate that total power consumption, Rjc indicate that crust steady state heat resistance, k indicate the iterations of junction temperature.

In step S403, by the junction temperature Tj for judging current an iteration calculating with lower inequality (17)^(k)It changes with the last time The junction temperature Tj that generation calculates^(k-1)Whether absolute value differences are less than 1, if absolute value differences, which are less than 1, carries out step S405, otherwise, carry out Step S404.

|Tj^(k)-Tj^(k-1)| ＜ 1 (17)

In step S404, the iterations k of junction temperature Tj is added 1, step S401 to S403 is repeated, until current an iteration The junction temperature Tj of calculating^(k)The junction temperature Tj calculated with last iteration^(k-1)Absolute value differences are less than 1, carry out step S405.

In step S405, by the junction temperature Tj for judging current an iteration calculating with lower inequality (18)^(k)With it is preset most High junction temperature T_j,maxWhether absolute value differences are less than 1, if absolute value differences, which are less than 1, carries out step S407, otherwise, carry out step S406, as an example, maximum junction temperature T_j, max can take 175 DEG C.

|Tj-T_j,max| ＜ 1 (18)

In step S406, the iterations h of collector current Ic is added 1, that is, is directed to next collector current, returns to step Rapid S401.

In step S407, the junction temperature Tj that current an iteration calculates is determined^(k)Corresponding working frequency fsw⁽ⁱ⁾And collector Electric current Ic^(h), collector current Ic^(h)It is exactly present operating frequency fsw⁽ⁱ⁾Corresponding maximum collector current Ic^(h), and hold Row step S408.

In step S408, the iterations i of working frequency fsw is added 1, that is, is directed to next working frequency, return to step S401, the operating frequency value until traversing all discretizations, obtains the corresponding maximum collector current of all working frequency.It can be with Working frequency and its corresponding maximum collector current are exported in the form of a graph via output interface.

Fig. 5 B show that an example of output interface is actually answered wherein illustrating only the curve graph for a junction temperature The a plurality of curve for different junction temperatures can be exported in as needed.As shown in Figure 5 B, output interface includes default work Working frequency table 10, default collector current table 20, fitting parameter table 30 and pop-up window 40 preset working frequency table 10 and pre- If collector current table 20 shows the one group of preset working frequency fsw and collector current Ic chosen when calculating, fitting Parameter list 30 is shown according to the calculated fitting parameter of test data, and result curve is shown in pop-up window 40.Export boundary The content shown in face can be arranged as needed, and in some embodiments, which can only show such as Fig. 5 B institutes Result curve is presented in the pop-up window 40 that shows.

Fig. 7 shows the structural representation of the device of the frequency and electric current according to the calculating semiconductor devices of the embodiment of the present disclosure Figure.

Semiconductor devices can have multiple layerings, and one of layering is chip.According to the difference of type of package for chips, Layered structure is different, such as can have layered structure as shown in Figure 1, naturally it is also possible to have other any desired Structure.As shown in fig. 7, the frequency of calculating semiconductor devices and the device of electric current include：Parameter acquisition module 710, thermal resistance calculation Module 720, expression formula acquisition module 730, junction temperature computing module 740 and result computing module 750.

Parameter acquisition module 710 is used to obtain the underlying parameter of semiconductor devices, wherein underlying parameter includes test number According to.Specifically, underlying parameter includes prestoring parameter and user's input parameter, the parameter that prestores includes test data, rated voltage, defeated Enter waveform, the size of multiple layerings and multiple size of delamination at least one of thermal coefficient, user's input parameter includes In chip size, rated current, duty ratio, skin temperature, upper frequency limit, encapsulated type, rated voltage and input waveform It is at least one.Parameter acquisition module 710 includes：Interactive module 711 and searching module 712, interactive module 711 is for receiving user Input parameter, searching module 712 are used for according to the look-up table and user's input parameter based on excel platform constructions pre-established To obtain the parameter that prestores.

The crust that thermal resistance calculation module 720 is used to calculate semiconductor devices according to underlying parameter based on thermal diffusion angle principle is steady State thermal resistance.Specifically, thermal resistance calculation module 720 includes single layer computing module 721 and summarizing module 722.Single layer computing module 721 For using equation (1), (2), (3), (4), multiple points to be calculated according to parameter preset and underlying parameter based on thermal diffusion angle principle The thermal resistance of layer, summarizing module 722 are used to utilize formula (5), the crust according to the thermal resistance calculation semiconductor devices of multiple layerings steady State thermal resistance.

Expression formula acquisition module 730 is used to obtain the expression formula of the total power consumption of semiconductor devices, expression according to underlying parameter Formula is the function of junction temperature, working frequency and collector current.Specifically, expression formula acquisition module 730 is calculated including fitting parameter Module 731, conducting power consumption expression formula acquisition module 732, switching power loss expression formula acquisition module 733 and total power consumption expression formula obtain Modulus block 734.Fitting parameter computing module 731 is used for according to equation (6), (7), (8), (9) to the test number in underlying parameter According to being calculated, fitting parameter is obtained, conducting power consumption expression formula acquisition module 732 is for utilizing equation (10), (11), according to quasi- The conducting power consumption expression formula that parameter obtains semiconductor devices with underlying parameter is closed, switching power loss expression formula acquisition module 733 is used for Using equation (12), (13), the switching power loss expression formula of semiconductor devices is obtained according to fitting parameter, total power consumption expression formula obtains Module 734 is used to utilize equation (14), and the total of semiconductor devices is obtained with power consumption expression formula is connected according to conducting power consumption expression formula The expression formula of power consumption.It should be noted that equation (10), (12) are determined according to the input waveform in underlying parameter, it is different Input waveform corresponds to different conducting power consumption calculation equatioies and switching power loss calculation equation, in the present embodiment, only with incoming wave For shape is square wave.

Junction temperature computing module 740 is used for expression formula and crust steady state heat resistance according to total power consumption, utilizes one group of preset work Working frequency and collector current are iterated calculating, obtain the junction temperature of semiconductor devices.Specifically, junction temperature computing module 740 wraps Include default working frequency acquisition module 741, default collector current acquisition module 742 and junction temperature result computing module 743.In advance If working frequency acquisition module 741 is used to obtain one group of preset working frequency according to upper frequency limit, default collector current obtains Modulus block 742 is used to obtain one group of preset collector current according to rated current, and junction temperature result computing module 743 is for utilizing Equation (15), (16) inequality (17), (18), according to initial junction temperature, crust steady state heat resistance and preset working frequency sum aggregate Electrode current is iterated calculating and obtains junction temperature.

As a result computing module 750 is used in one group of preset working frequency and collector current, is determined and acquisition The corresponding working frequency of junction temperature and collector current.

In some preferred embodiments, semiconductor devices is IGBT discrete devices.

Embodiment of the disclosure carries out thermal resistance and frequency by obtaining the underlying parameter of semiconductor devices based on underlying parameter The calculating of rate current curve, can after user has input underlying parameter automatic evaluation work frequency and maximum collector current Relation curve, simplify operating process, improve work efficiency.

Embodiment of the disclosure in underlying parameter by providing the test number under different junction temperatures, different collector currents According to, and the fitting parameter based on the test data subsequently derive and calculate, and can improve accuracy in computation.

Embodiment of the disclosure based on upper frequency limit and rated current by generating one group of default working frequency and current collection Electrode current calculates to be iterated, and can more accurately calculate the junction temperature of semiconductor devices.

Embodiment of the disclosure pre-establishes Parameter lookup step by being based on excel platforms so that user is passing through user After interface has input desired chip parameter, working frequency and the relationship of maximum collector current can be calculated automatically from the background Curve, and be presented to the user by user interface, while greatly improving working efficiency, brought to user easier, intuitive Operating experience.

The foregoing is merely preferred embodiment of the present disclosure, are not limited to the disclosure, for those skilled in the art For, the disclosure can have various modifications and changes.It is all within the spirit and principle of the disclosure made by any modification, equivalent Replace, improve etc., it should be included within the protection domain of the disclosure.

Claims (23)

1. a kind of method for the frequency and current relationship calculating semiconductor devices, the semiconductor devices includes multiple layerings, It is characterized in that, the method includes：

Obtain the underlying parameter of the semiconductor devices；

Calculate the crust steady state heat resistance of the semiconductor devices according to the underlying parameter based on thermal diffusion angle principle, and according to The underlying parameter obtains the expression formula of the total power consumption of the semiconductor devices, and the expression formula is junction temperature, working frequency sum aggregate The function of electrode current；

According to the expression formula of the total power consumption and the crust steady state heat resistance, one group of preset working frequency and collector electricity are utilized Row iteration calculating is flowed into, the junction temperature of the semiconductor devices is obtained；

In one group of preset working frequency and collector current, work corresponding with the junction temperature of the acquisition is determined Frequency and collector current.

2. the method for the frequency and current relationship according to claim 1 for calculating semiconductor devices, which is characterized in that described Underlying parameter includes test data；

The expression formula of the total power consumption that the semiconductor devices is obtained according to the underlying parameter includes：

Calculate the fitting parameter of the test data；

The conducting power consumption P of the semiconductor devices is obtained according to the fitting parameter and the underlying parameter_conExpression formula；

The switching power loss P of the semiconductor devices is obtained according to the fitting parameter and the underlying parameter_swExpression formula；

The total power consumption P of the semiconductor devices is obtained according to following equation_totExpression formula：

P_tot=P_con+P_sw

Wherein P_conIndicate the conducting power consumption of the semiconductor devices, P_swIndicate the switching power loss of the semiconductor devices, P_totTable Show the total power consumption of the semiconductor devices.

3. the method for the frequency and current relationship according to claim 2 for calculating semiconductor devices, which is characterized in that described Test data includes：

First test data, first test data include the semiconductor devices in different test junction temperatures and different test sets Saturation voltage drop under electrode current；And

Second test data, second test data include that the semiconductor devices is total under different test collector currents Switching energy loss.

4. the method for the frequency and current relationship according to claim 3 for calculating semiconductor devices, which is characterized in that described The fitting parameter for calculating the test data includes：

Linear fit twice is carried out to first test data, obtains the first fitting parameter, to second test data into Row quadratic polynomial is fitted, and obtains the second fitting parameter.

5. the method for the frequency and current relationship according to claim 4 for calculating semiconductor devices, which is characterized in that described Carrying out linear fit twice to first test data includes：

Linear fit is carried out to first test data according to Vcesat=k*Tj'+b, obtains multiple test collector currents Curve and its slope k and intercept b, wherein Vcesat indicates that the saturation voltage drop, Tj ' indicate the test junction temperature；

Linear fit is carried out to all test collector current slope of a curve k and intercept b according to following equation, is obtained tiltedly The curve of rate k and the curve of intercept b and its corresponding Vce_k1, Vce_k2, Vce_b1 as first fitting parameter with And Vce_b2：

K=Vce_k1*Ic'+Vce_k2

B=Vce_b1*Ic'+Vce_b2

Wherein, Ic ' indicates the test collector current.

6. the method for the frequency and current relationship according to claim 5 for calculating semiconductor devices, which is characterized in that described Underlying parameter includes duty ratio and input waveform；

The input waveform is square wave；

The conducting power consumption expression formula for obtaining the semiconductor devices with the underlying parameter according to the fitting parameter includes：

The conducting power consumption P of the semiconductor devices is obtained by following equation_conExpression formula：

P_con=D*Ic*Vecsat

Vcesat=(Vce_k1*Ic+Vce_k2) * Tj+Vce_b1*Ic+Vce_b2

Wherein, the D expressions duty ratio, the Ic expressions collector current, the Tj expressions junction temperature, Vce_k1, Vce_k2, Vce_b1 and Vce_b2 indicates first fitting parameter.

7. the method for the frequency and current relationship according to claim 4 for calculating semiconductor devices, which is characterized in that described Carrying out quadratic polynomial fitting to second test data includes：

According to E_st=Est_a*Ic'²+ Est_b*Ic'+Est_c carries out quadratic polynomial fitting to second test data, obtains To test collector current curve and its as Est_a, Est_b and Est_c of second fitting parameter, wherein Est tables Show that the master switch energy loss, Ic ' indicate the test collector current.

8. the method for the frequency and current relationship according to claim 7 for calculating semiconductor devices, which is characterized in that described Underlying parameter includes input waveform；

The input waveform is square wave；

The switching power loss expression formula for obtaining the semiconductor devices with the fitting parameter according to the underlying parameter includes：

The switching power loss P of the semiconductor devices is obtained by following equation_swExpression formula：

E_st=Est_a*Ic²+Est_b*Ic+Est_c

Wherein, fsw indicates that the working frequency, Est indicate that the master switch energy loss, g indicate preset value, described in Tj is indicated Junction temperature, T_{J, max}Indicate preset maximum junction temperature, Ic indicates the collector current, described in Est_a, Est_b and Est_c are indicated Second fitting parameter.

9. the method for the frequency and current relationship according to claim 1 for calculating semiconductor devices, which is characterized in that described Underlying parameter includes upper frequency limit and rated current；

The expression formula according to the total power consumption, the crust steady state heat resistance, utilize one group of preset working frequency and current collection Electrode current is iterated calculating, and the junction temperature for obtaining the semiconductor devices includes：

One group of preset working frequency is obtained according to the upper frequency limit；

One group of preset collector current is obtained according to the rated current；

According to the expression formula of one group of preset working frequency, one group of preset collector current, the total power consumption with And the crust steady state heat resistance is iterated the junction temperature for calculating and obtaining the semiconductor devices.

10. the method for the frequency and current relationship according to claim 9 for calculating semiconductor devices, which is characterized in that institute It states and includes according to one group of preset working frequency of upper frequency limit acquisition：In the upper frequency limit and preset lower-frequency limit model Enclose one group of centrifugal pump of interior selection.

11. the method for the frequency and current relationship according to claim 9 for calculating semiconductor devices, which is characterized in that institute It states and includes according to the rated current one group of preset collector current of acquisition：

Using the preset multiple of the rated current as the upper limit of collector current；

One group of centrifugal pump is chosen in the upper range of preset collector current lower limit and the collector current.

12. the method for the frequency and current relationship according to claim 9 for calculating semiconductor devices, which is characterized in that institute The expression formula according to the total power consumption, the crust steady state heat resistance are stated, one group of preset working frequency and collector current are utilized It is iterated calculating, the junction temperature for obtaining the semiconductor devices includes：

Based on preset initial junction temperature Tj⁽⁰⁾With one group of preset working frequency fsw and collector current Ic, preset for described Working frequency fsw in each fsw⁽ⁱ⁾, it is iterated by following two equatioies and calculates the semiconductor for meeting preset condition The junction temperature Tj of device：

Tj^(k)=P_tot ^(k-1)*Rjc

P_tot ^(k-1)=f (fws⁽ⁱ⁾,Ic^(h),Tj^(k))

The preset condition includes：

|Tj^(k)-Tj^(k-1)| ＜ 1, and | Tj-T_j,max| ＜ 1,

Wherein, Rjc indicates that crust steady state heat resistance, fsw indicate that working frequency, Ic indicate that working frequency, Tj indicate junction temperature, T_{J, max}Table Show that preset maximum junction temperature, i indicate that the iterations of working frequency, h indicate that the iterations of collector current, k indicate junction temperature Iterations.

13. the method for the frequency and current relationship according to claim 1 for calculating semiconductor devices, which is characterized in that institute It includes prestore parameter and user's input parameter to state underlying parameter, and the parameter that prestores includes test data, rated voltage, incoming wave At least one of the thermal coefficient of shape, the size of the multiple layering and the multiple size of delamination, user's input Parameter include chip size, rated current, duty ratio, skin temperature, upper frequency limit, encapsulated type, the rated voltage and At least one of described input waveform；

The underlying parameter for obtaining the semiconductor devices includes：

Establish the look-up table of prestore parameter and user's input parameter；

After receiving the first instruction, user's input parameter is received, and obtain to input with the user received according to look-up table and join The corresponding parameter that prestores of number；

After receiving the second instruction, complete to obtain.

14. the method for the frequency and current relationship according to claim 13 for calculating semiconductor devices, which is characterized in that also Including：By the semiconductor devices corresponding with the junction temperature of semiconductor devices of preset condition is met described in each acquisition Working frequency and collector current export in the form of a graph.

15. the method for the frequency and current relationship according to claim 13 for calculating semiconductor devices, which is characterized in that institute It states look-up table and is based on excel platform constructions.

16. the method for the frequency and current relationship according to claim 1 for calculating semiconductor devices, which is characterized in that institute It is insulated gate bipolar transistor discrete device to state semiconductor devices.

17. the method for the frequency and current relationship according to claim 1 for calculating semiconductor devices, which is characterized in that institute It states and calculates the crust steady state heat resistance of the semiconductor devices according to the underlying parameter based on thermal diffusion angle principle and include：

The thermal resistance of the multiple layering is calculated according to the underlying parameter of the multiple layering based on thermal diffusion angle principle；

The crust steady state heat resistance of semiconductor devices described in thermal resistance read group total according to the multiple layering.

18. a kind of device for the frequency and current relationship calculating semiconductor devices, the semiconductor devices includes multiple layerings, It is characterized in that, described device includes：

Parameter acquisition module, the underlying parameter for obtaining the semiconductor devices；

Thermal resistance calculation module, the crust for calculating the semiconductor devices according to the underlying parameter based on thermal diffusion angle principle Steady state heat resistance；

Expression formula acquisition module, the expression formula of the total power consumption for obtaining the semiconductor devices according to the underlying parameter, institute State the function that expression formula is junction temperature, working frequency and collector current；

Junction temperature computing module is used for the expression formula according to the total power consumption and the crust steady state heat resistance, preset using one group Working frequency and collector current are iterated calculating, obtain the junction temperature of the semiconductor devices；

As a result computing module, in one group of preset working frequency and collector current, determining and the acquisition The corresponding working frequency of junction temperature and collector current.

19. the device of the frequency and current relationship according to claim 18 for calculating semiconductor devices, which is characterized in that institute Stating thermal resistance calculation module includes：

Single layer computing module calculates the multiple for being based on thermal diffusion angle principle according to the underlying parameter of the multiple layering The thermal resistance of layering；And

Summarizing module, the crust steady state heat resistance for semiconductor devices described in the thermal resistance read group total according to the multiple layering.

20. the device of the frequency and current relationship according to claim 18 for calculating semiconductor devices, which is characterized in that institute It includes test data to state underlying parameter, and the expression formula acquisition module includes：

Fitting parameter computing module, the fitting parameter for calculating the test data according to the test data；

Power consumption expression formula acquisition module is connected, for obtaining the semiconductor device according to the fitting parameter and the underlying parameter The conducting power consumption expression formula of part；

Switching power loss expression formula acquisition module, for obtaining the semiconductor device according to the fitting parameter and the underlying parameter The switching power loss expression formula of part；And

Total power consumption expression formula acquisition module, for obtaining institute according to the conducting power consumption expression formula and the switching power loss expression formula State total power consumption expression formula.

21. the device of the frequency and current relationship according to claim 18 for calculating semiconductor devices, which is characterized in that institute It includes upper frequency limit and rated current to state underlying parameter, and the junction temperature computing module includes：

Default working frequency acquisition module, for obtaining one group of preset working frequency according to the upper frequency limit；

Default collector current acquisition module, for obtaining one group of preset collector current according to the rated current；And

Junction temperature result of calculation module, for according to one group of preset working frequency, one group of preset collector current, The expression formula of the total power consumption and the crust steady state heat resistance are iterated the junction temperature for calculating and obtaining the semiconductor devices.

22. the device of the frequency and current relationship according to claim 18 for calculating semiconductor devices, which is characterized in that institute It includes prestore parameter and user's input parameter to state underlying parameter, and the parameter that prestores includes test data, rated voltage, incoming wave At least one of the thermal coefficient of shape, the size of the multiple layering and the multiple size of delamination, user's input Parameter include chip size, rated current, duty ratio, skin temperature, upper frequency limit, encapsulated type, the rated voltage and At least one of described input waveform, the parameter acquisition module include：

Interactive module, for receiving user's input parameter；And

Searching module, for obtaining the parameter that prestores with user's input parameter according to the look-up table pre-established.

23. the device of the frequency and current relationship according to claim 18 for calculating semiconductor devices, which is characterized in that institute It states look-up table and is based on excel platform constructions.