CN108336135A - A kind of neodymium indium-zinc oxide thin film transistor (TFT) and preparation method thereof - Google Patents

A kind of neodymium indium-zinc oxide thin film transistor (TFT) and preparation method thereof Download PDF

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CN108336135A
CN108336135A CN201810213140.5A CN201810213140A CN108336135A CN 108336135 A CN108336135 A CN 108336135A CN 201810213140 A CN201810213140 A CN 201810213140A CN 108336135 A CN108336135 A CN 108336135A
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tft
film transistor
thin film
indium
neodymium
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CN108336135B (en
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姚日晖
郑泽科
宁洪龙
章红科
李晓庆
张啸尘
邓宇熹
周尚雄
袁炜健
彭俊彪
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South China University of Technology SCUT
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention belongs to display device technical field, a kind of neodymium indium-zinc oxide thin film transistor (TFT) and preparation method thereof is disclosed.The thin film transistor (TFT) is made of substrate, metal gates, gate insulating layer, Nd IZO semiconductor active layers, oxide-insulator passivation layer and metal source and drain electrodes.The present invention introduces a certain proportion of Nd element dopings in IZO semiconductor targets, the active layer film of Nd IZO high carrier concentrations is deposited by room temperature sputtering technology, in conjunction with ultra-thin Al2O3Passivation layer controls the carrier transport under electric field, can be with the electric property of optimised devices, to obtain high performance thin film transistor (TFT).

Description

A kind of neodymium indium-zinc oxide thin film transistor (TFT) and preparation method thereof
Technical field
The invention belongs to display device technical fields, and in particular to a kind of neodymium indium-zinc oxide thin film transistor (TFT) and its preparation Method.
Background technology
Thin film transistor (TFT) (Thin Film Transistor, abbreviation TFT), is a kind of widely used semiconductor devices, Its most important purposes is to be used to drive liquid crystal arrangement to change in the display and OLED pixel is driven to shine.Metal aoxidizes Object TFT (referred to as, MOS TFT) has many advantages, such as good mobility height, uniformity, excellent transparency, simple for process, is obtained in recent years Extensive research and quickly development.The material for being presently used for MOS TFT active layers is mostly based on indium oxide or zinc oxide (In2O3, ZnO or IZO) doping oxide semiconductor material.In2O3, ZnO or IZO all there is higher carrier concentration, because And have stronger charge transport ability, it can effectively drive TFT devices to work, be conducive to realize with low temperature or room temperature process high The MOS TFT of performance.However, its excessively high carrier concentration also brings along device stability difference and off-state current is difficult to inhibit Problem.In order to solve this problem, the mode of most mainstream is realized to carrier concentration by the doping of rare earth element in industry Inhibition, being most widely used with gallium (Ga) element doping at present.However, the incorporation of Ga elements also makes the mobility of carrier It is greatly reduced, the MOS TFT of higher performance will be difficult to realize only with low temperature or room temperature process.This is unfavorable for work The limited flexible display device of skill temperature realizes the development of higher performance.
Invention content
In place of the above shortcoming and defect of the existing technology, the primary purpose of the present invention is that providing a kind of neodymium indium Zinc oxide film transistor.Thin film transistor (TFT) of the present invention, can be in the case of room temperature process using Nd doping IZO as active layer Realize the MOS TFT of higher performance.
Another object of the present invention is to provide the preparation methods of above-mentioned neodymium indium-zinc oxide thin film transistor (TFT).This method energy It is enough that high performance neodymium indium-zinc oxide (Nd-IZO) active layer is prepared with room temperature process, improve the electric property of TFT.
The object of the invention is achieved through the following technical solutions:
The active layer of a kind of neodymium indium-zinc oxide thin film transistor (TFT), the thin film transistor (TFT) is neodymium indium-zinc oxide (Nd- IZO)。
Further, the neodymium indium-zinc oxide thin film transistor (TFT) is by substrate, metal gates, gate insulating layer, Nd-IZO Semiconductor active layer, oxide-insulator passivation layer and metal source and drain electrodes are constituted.
Further, the substrate refers to glass substrate or flexible plastic substrates.
Further, the material of the metal gates is Al, Mo or Cu.
Further, the Nd-IZO is by Nd2O3、In2O3It is constituted with ZnO component, preferably Nd2O3:In2O3:The quality of ZnO Percentage composition ratio is 1%:62.5%:36.5%.
Further, the thickness of the Nd-IZO semiconductor active layers is 9nm.
Further, the oxide-insulator passivation layer is armorphous aluminium oxide (Al2O3);Preferred oxides insulator The thickness of passivation layer is 3nm.
Further, the material of the metal source and drain electrodes is Al, Mo or Cu.
The preparation method of above-mentioned neodymium indium-zinc oxide thin film transistor (TFT), including following preparation process:
(1) TFT metal gates are prepared on substrate by d.c. sputtering at room temperature;
(2) at room temperature by anodizing by a part of gate oxidation at gate insulating layer;
(3) Nd-IZO semiconductor active layers are prepared by radio-frequency sputtering at room temperature;
(4) oxide-insulator passivation layer is prepared by radio-frequency sputtering at room temperature;
(5) metal source and drain electrodes are prepared by d.c. sputtering at room temperature.
Compared with the existing technology, the invention has the advantages that and advantageous effect:
The method of the present invention such as need not be heat-treated at the additional techniques, only need to be certain by being introduced in IZO semiconductor targets The Nd element dopings of ratio deposit the active layer films of Nd-IZO, in conjunction with ultra-thin Al by room temperature sputtering technology2O3Passivation layer is to electricity Carrier transport off field is controlled, and realizes that the oxide of high-performance (high mobility, high current switching ratio) is thin at room temperature Film transistor has embodied simple for process, time-consuming short, energy saving and suitable for Flexible Displays future development potentiality.
Description of the drawings
Fig. 1 is the structural schematic diagram of gained neodymium indium-zinc oxide thin film transistor (TFT) in the embodiment of the present invention.
Fig. 2 is the output characteristic curve figure of neodymium indium-zinc oxide thin film transistor (TFT) obtained by the embodiment of the present invention.
Fig. 3 is the transfer characteristic curve figure of neodymium indium-zinc oxide thin film transistor (TFT) obtained by the embodiment of the present invention.
Specific implementation mode
Present invention will now be described in further detail with reference to the embodiments and the accompanying drawings, but embodiments of the present invention are unlimited In this.
Embodiment
The method that a kind of room temperature of the present embodiment prepares neodymium indium-zinc oxide thin film transistor (TFT), is as follows:
(1) 300nm Al metallic films are deposited on the glass substrate by DC sputtering at room temperature and use mask pattern Change, as grid;
(2) Al of 200nm in grid is oxidized to by Al by anodizing at room temperature2O3As gate insulating layer;
(3) Nd-IZO semiconductor active layers are prepared by radio frequency sputtering method at room temperature, each material in the neodymium indium-zinc oxide Expect ingredient ratio (Nd2O3:In2O3:ZnO wt.%) it is 1:62.5:36.5wt.%.Sputtering total pressure is 3mTorr, sputtering atmosphere For Ar/O2=100/5 mixed gas, radio-frequency power supply power are 60W, sputtering time 215s;Obtain the Nd-IZO half The thickness of conductor active layer is about 9nm;
(4) ultra-thin Al is prepared by radio-frequency sputtering at room temperature2O3Passivation layer, sputtering total pressure are 1mTorr, and sputtering atmosphere is Pure Ar atmosphere, radio-frequency power supply power are 120W, sputtering time 130s;Obtain the Al2O3The thickness of passivation layer is about 3nm;
(5) 200nm Al metals are deposited by DC sputtering at room temperature and with mask pattern, as source-drain electrode, Wherein channel width is 500 μm, and channel length is 100 μm.
The structural schematic diagram of neodymium indium-zinc oxide thin film transistor (TFT) obtained by the present embodiment is as shown in Figure 1.Its structure is by substrate 01, grid 02, gate insulating layer 03, active layer 04, passivation layer 05 and source-drain electrode 06 form.
The output characteristic curve of neodymium indium-zinc oxide thin film transistor (TFT) obtained by the present embodiment as shown in Fig. 2, transfer curve such as Shown in Fig. 3.The design parameter that result calculates according to fig. 3 is as shown in table 1.
The TFT electric parameters that result calculates according to fig. 3 of table 1
As can be seen from the above results, by introducing a certain proportion of Nd element dopings in IZO semiconductor targets, pass through Room temperature sputtering technology deposits the active layer films of Nd-IZO, in conjunction with ultra-thin Al2O3Passivation layer controls the carrier transport under electric field System, can be with the electric property of optimised devices, to obtain high performance thin film transistor (TFT).
The above embodiment is a preferred embodiment of the present invention, but embodiments of the present invention are not by above-described embodiment Limitation, it is other it is any without departing from the spirit and principles of the present invention made by changes, modifications, substitutions, combinations, simplifications, Equivalent substitute mode is should be, is included within the scope of the present invention.

Claims (10)

1. a kind of neodymium indium-zinc oxide thin film transistor (TFT), it is characterised in that:The active layer of the thin film transistor (TFT) is Nd-IZO.
2. a kind of neodymium indium-zinc oxide thin film transistor (TFT) according to claim 1, it is characterised in that:The thin film transistor (TFT) It is leaked electricity by substrate, metal gates, gate insulating layer, Nd-IZO semiconductor active layers, oxide-insulator passivation layer and source metal Pole is constituted.
3. a kind of neodymium indium-zinc oxide thin film transistor (TFT) according to claim 2, it is characterised in that:The substrate refers to glass Glass substrate or flexible plastic substrates.
4. a kind of neodymium indium-zinc oxide thin film transistor (TFT) according to claim 1, it is characterised in that:The metal gates Material is Al, Mo or Cu.
5. a kind of neodymium indium-zinc oxide thin film transistor (TFT) according to claim 1, it is characterised in that:The Nd-IZO by Nd2O3、In2O3It is constituted with ZnO component.
6. a kind of neodymium indium-zinc oxide thin film transistor (TFT) according to claim 5, it is characterised in that:The Nd2O3:In2O3: The mass percentage ratio of ZnO is 1%:62.5%:36.5%.
7. a kind of neodymium indium-zinc oxide thin film transistor (TFT) according to claim 1, it is characterised in that:The Nd-IZO is partly led The thickness of body active layer is 9nm.
8. a kind of neodymium indium-zinc oxide thin film transistor (TFT) according to claim 1, it is characterised in that:The insulated by oxide Body passivation layer is armorphous aluminium oxide, and the thickness of oxide-insulator passivation layer is 3nm.
9. a kind of neodymium indium-zinc oxide thin film transistor (TFT) according to claim 1, it is characterised in that:The source metal electric leakage The material of pole is Al, Mo or Cu.
10. a kind of preparation method of neodymium indium-zinc oxide thin film transistor (TFT) of claim 2~9 any one of them, feature exist In including following preparation process:
(1) TFT metal gates are prepared on substrate by d.c. sputtering at room temperature;
(2) at room temperature by anodizing by a part of gate oxidation at gate insulating layer;
(3) Nd-IZO semiconductor active layers are prepared by radio-frequency sputtering at room temperature;
(4) oxide-insulator passivation layer is prepared by radio-frequency sputtering at room temperature;
(5) metal source and drain electrodes are prepared by d.c. sputtering at room temperature.
CN201810213140.5A 2018-03-15 2018-03-15 Neodymium-indium-zinc oxide thin film transistor and preparation method thereof Active CN108336135B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112079626A (en) * 2020-09-16 2020-12-15 韶关市欧莱高新材料有限公司 Aluminum-neodymium-indium-zinc oxide rotary target and preparation method thereof
CN112467002A (en) * 2020-11-25 2021-03-09 华南理工大学 Oxide luminous field effect transistor
WO2023184231A1 (en) * 2022-03-30 2023-10-05 京东方科技集团股份有限公司 Metal oxide thin film transistor, semiconductor device, and display apparatus

Citations (2)

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CN103545377A (en) * 2013-11-01 2014-01-29 深圳丹邦投资集团有限公司 Oxide thin film transistor and manufacturing method thereof
US20150069379A1 (en) * 2013-09-09 2015-03-12 E Ink Holdings Inc. Thin film transistor

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US20150069379A1 (en) * 2013-09-09 2015-03-12 E Ink Holdings Inc. Thin film transistor
CN103545377A (en) * 2013-11-01 2014-01-29 深圳丹邦投资集团有限公司 Oxide thin film transistor and manufacturing method thereof

Non-Patent Citations (1)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112079626A (en) * 2020-09-16 2020-12-15 韶关市欧莱高新材料有限公司 Aluminum-neodymium-indium-zinc oxide rotary target and preparation method thereof
CN112467002A (en) * 2020-11-25 2021-03-09 华南理工大学 Oxide luminous field effect transistor
CN112467002B (en) * 2020-11-25 2022-05-10 华南理工大学 Oxide luminous field effect transistor
WO2023184231A1 (en) * 2022-03-30 2023-10-05 京东方科技集团股份有限公司 Metal oxide thin film transistor, semiconductor device, and display apparatus

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