CN1083215A

CN1083215A - Microcomputerized real-time X-ray image processing and detecting system

Info

Publication number: CN1083215A
Application number: CN 92109773
Authority: CN
Inventors: 吴东流; 王树元
Original assignee: No703 Inst Ministry Of Aeronautics And Astronautics Industry
Current assignee: No703 Inst Ministry Of Aeronautics And Astronautics Industry
Priority date: 1992-08-27
Filing date: 1992-08-27
Publication date: 1994-03-02
Anticipated expiration: 2007-08-27
Also published as: CN1039163C

Abstract

A kind of microcomputer X ray real-time image that is used for Non-Destructive Testing is handled detection system, mainly is made up of real-time integrator, image acquisition storage and display unit, microcomputer, image processing unit and peripherals.Picture intelligence reduces noise by real-time integrator, outputs to the image acquisition storage and display unit after the elimination image blurring, to real-time image sampling quantification, storage, conversion, carries out the image processing conversion by image processing unit again.This system's detection sensitivity can improve 0.50%-1%, and speed and effect and minicomputer are suitable, can be widely used in the nondestructive examination detection range.

Description

Microcomputerized real-time X-ray image processing and detecting system

The present invention relates to the X ray Dynamic Non-Destruction Measurement, particularly a kind of microcomputer X ray real-time image is handled detection system.

The real-time photographic process is applied to the nondestructive examination field as a kind of new technology.Its cardinal principle is: after the X ray that X-ray production apparatus sends passes test specimen, form the X ray image that a width of cloth contains the test specimen internal information on image intensifier tube or video screen, gamma camera becomes this images conversion of signals vision signal to show on indicator screen.Maturation and development along with computer image processing, computer image processing is applied to the X ray real time imaging and detects, the vision signal of gamma camera output converts digital signal input computing machine to by A/D, thereby convert the X ray image to digital image, computing machine is handled digital image, converts vision signal displayed image on indicator screen to by D/A again.As everyone knows, the X ray real time imaging has that noise is big, the characteristics of image blurring, therefore for reducing noise, eliminating image blurring, improves image definition and detection sensitivity and resolution, must adopt real-time integration, image processing methods such as image transform, filtering and enhancing.This disposal route requires operational speed of a computer height, memory size big, has only the real-time image that adopts mainframe computer or special-purpose image processing system just can finish such complexity to handle, and can't accomplish the low microcomputer of the little arithmetic speed of memory size.Mostly adopt WAX750+MODEL75 minicomputer system at present abroad, CRYSTAL image processing dedicated system and visual workstation etc., this type of system cost is very high.For example, provide the real-time detection of a kind of X ray just to belong to this type of in the 130th page of " ray image welding in real time detects " (Weld Inspection by Real-time Radiasopy) literary composition in Dec, 1987 " material evaluation " (Material Evaluative).

The object of the present invention is to provide a kind of nondestructive examination detection system of handling with microcomputer realization X ray real-time image, its processing speed and effect can be suitable with small-size computer.

The present invention realizes by following measure: to the X ray image that obtains, real-time integrator by special setting reduces noise, after eliminating image blurring, adopt two cpu modes to carry out image processing, promptly finished the transmission and the control of pictorial data by the primary processor of microcomputer, presentation manager is finished the processing of pictorial data.According to this imagination, utilize function expansion slot intrinsic on the microcomputer as data transfer interface, following unit is set: real-time integrator, image acquisition storage and display unit, image processing unit.Wherein, under the control of microcomputer primary processor, be input to image acquisition storage and display unit take a sample quantification, storage, conversion through the picture intelligence of real-time Integral Processing, be mapped to microcomputer memory by bus then, the microcomputer primary processor is mapped to image processing unit with the memory map image data and carries out image processing, the pictorial data of finishing after the image processing is shone upon back microcomputer memory, shines upon back the image acquisition storage and display unit again by bus and shows.

Integrator mainly is made up of two video memories, two summitors, analog to digital conversion, digital-to-analog conversion and logical circuits in real time.After picture intelligence enters real-time integrator, carry out analog to digital conversion and deposit in the video memory I, picture intelligence in the video memory I and real-time image deposit in the video memory II through the addition of summitor I; Picture intelligence in the video memory II deposits in the video memory I through the addition of summitor II with real-time image again, so comes and goes and carries out addition, finishes integral operation, and logical circuit produces the read-write operation of synchronizing signal, control video memory.

The image acquisition storage and display unit mainly is made up of sampling quantification, storage, pseudocolor transformation and logical circuit.Picture intelligence from real-time integrator after quantizing, is sent in the image storage body in sampling, be mapped to microcomputer memory through the microcomputer expansion slot interface, pictorial data after the image processing is shone upon back the image acquisition storage and display unit again by microcomputer memory and is carried out pseudocolor transformation, show the operation of logical circuit control sampling quantification and image storage body behind the synthetic width of cloth pseudo-colours image.

Image processing unit mainly is made up of presentation manager, storer, I/O interface, logic control circuit.Wherein presentation manager links to each other with the microcomputer primary processor through the I/O interface, and memory stores data and relevant procedures also link to each other with presentation manager, carry out the image processing conversion, the duty of logical circuit control presentation manager and memory stores operation.

Fig. 1 is a theory diagram of the present invention;

Fig. 2 is the schematic diagram of real-time integrator;

Fig. 3 is the schematic diagram of image acquisition storage and display unit;

Fig. 4 is the schematic diagram of image processing unit;

Fig. 5 is the embodiment of the invention and common computer pattern system and the contrast of minicomputer image processing system performance;

Fig. 6 is the detection sensitivity measured result of steel;

Fig. 7 is the detection sensitivity measured result of aluminium.

Describe the present invention below in conjunction with embodiment and accompanying drawing:

With reference to Fig. 1, the present invention is made up of image intensifier tube (1), gamma camera (2), real-time integrator (3), image acquisition storage and display unit (4), microcomputer (5), image processing unit (6), color monitor (7), magnetic tape station (8).After the X ray that is sent by X-ray production apparatus passes test specimen, on video screen, form the X ray image that a width of cloth contains the test specimen internal state information by image intensifier tube (1), gamma camera (2) becomes video image signal to this images conversion of signals, through the noise of integrator (3) reduction in real time, after eliminating image blurring, input to image acquisition storage unit (4) quantification of taking a sample, storage, be mapped to the internal memory of microcomputer (5) afterwards through the BUS bus, pictorial data is mapped to image processing unit (6) through the BUS bus interface and carries out the image processing conversion in the microcomputer primary processor control internal memory, pictorial data after the processing is shone upon back in microcomputer (5) internal memory through the BUS bus, shine upon back after image acquisition storage and display unit (6) carries out pseudocolor transformation through the BUS bus then, image is gone up at color monitor (7) shown.

Referring to Fig. 2, integrator (3) is by analog-digital conversion a/d (3a), video memory I (3b), summitor ADD I (3c), video memory II (3d), summitor ADD II (3e), read-write control (3f), genlock (3g), separated in synchronization (3h), address generator I (3i), address generator II (3j), digital-to-analog conversion D/A(3k in real time) form.Video image signal enters real-time integrator (3) and after analog-digital conversion a/d (3a) becomes digital image signal first picture intelligence is deposited in the video memory I (3b), the first images signal in second width of cloth real-time image signal and the video memory I (3d) is through totalizer ADD I (3c) addition, deposit in the video memory II (3d), second width of cloth real-time image signal deposits in the video memory I (3b) after summitor ADD II (3e) addition with the middle picture intelligence of video memory II (3d) again, so come and go, finish integral operation.Separated in synchronization (3h) is separated trip (H), field synchronization (V), composite synchronizing signal (C) synchronously, row (H) is synchronously controlled A/D(3a through genlock (3g) clocking), row is (H), field synchronization (V) and clock signal control address generator I (3i) and address generator II (3j) synchronously, and the read-write operation of video memory I (3b) and video memory II (3e) is by read-write control (3f) control.At last the picture intelligence in the video memory II (3d), through digital-to-analog conversion D/A(3k) form video image signal with composite synchronizing signal after becoming simulating signal and output to image acquisition storage and display unit (4).Integration can be accomplished 256 width of cloth in real time, if do not consider that adjacent amplitude and noise acoustic correlation, integral operation speed were 25 width of cloth/seconds.Consider adjacent frame Noise Correlation; we choose integration speed was 8.3 width of cloth/seconds; by calculating and experiment thereof to signal to noise ratio (S/N ratio); usually integration 32 width of cloth noise that just can be eliminated has the sharp image of good contrast; the more clear exquisiteness of integration to 64 images; it is saturated that noise reduction is tending towards, and continues integration to 128 width of cloth again, and storage effect does not have obvious improvement.Therefore when reality is used, choose 32 width of cloth or 64 width of cloth integrations just are enough to reach noise reduction, make the image quality remarkable improvement.

For making real-time integrator (3) have stronger versatility, the separated in synchronization (3h) of design, the video image signal that genlock circuit (3g) can make various standards all can be imported real-time integral unit (3) and do Integral Processing, the video image signal that its input is identical with being output as standard.Separated in synchronization (3h) adopts 1881 chips, and phase detector output control voltage controlled oscillator is adopted in genlock (3g), realizes phase-lockedly, and voltage controlled oscillator adopts the 74LS624 chip, phase detector employing MC4D44 chip.Analog-digital conversion a/d (3a) and digital-to-analog conversion D/A(3k) be 10MHz, 8bit, two video memories are that 2 frames, 512 * 512 * 16bit, memory capacity are 1MByte.

Referring to accompanying drawing 3, image acquisition storage and display unit (4) is by analog-digital conversion a/d (4a), input gray level map table LUT(4b), visual body (4c), isolate (4d), output gray level map table LUT(4e), separated in synchronization (4f), phase-locked (4g), crystal oscillator (4h), synchronizing generator (4i), digital-to-analogue D/A(4j), data and address buffer (4k), seven mode control registers (4l) form.Video image signal by real-time integrator (3) output enters in the image acquisition storage and display unit (4), through A/D(4a) become digital signal, by input gray level map table (4b) sampling image signal quantization value is carried out conversion again, promptly the different luminance levels of picture each point are represented with digital quantity, deposit in the visual body (4c), separated in synchronization (4f), phase-locked (4g), crystal oscillator (4h) and synchronizing generator (4i) clocking and synchronizing signal control A/D(4a), D/A(4j) and the storage operation of visual body (4c), the picture intelligence of image body (4c) storage enters the inside and the address bus of image acquisition storage unit (4) through isolating (4d), on data and address buffer (4n) and BUS bus, be mapped to microcomputer (5) internal memory again, otherwise corresponding pictorial data is also shone upon back in the image acquisition storage unit (4) in microcomputer (5) internal memory, pictorial data is red through R(), G(is green), the B(orchid) three output gray level map table LUT(4e), R.G.B three way word quantized values are carried out pseudocolor transformation according to certain gray scale-color corresponding relation, form color image, through D/A(4j) conversion back constitutes the output of R.G.B three road video image signals with composite synchronizing signal (C), and form the pseudo-colours image and go up demonstration at color monitor (7).

Image body (4c) adopts the I/O communication modes with microcomputer (5) primary processor, seven programmable state control registers (4l) are arranged on the image acquisition storage unit (4), they are controlled the state of image acquisition storage unit (4) respectively and select mode of operation, microcomputer (5) is by seven I/O interfaces on the BUS bus, carries out program setting for seven mode control registers (4l) and controls the duty of image acquisition storage unit of image acquisition storage unit (4) and the selection of mode of operation.

Input gray level map table LUT(4c) is a 2K random access memory ram, write numerical value therein through data/address line, during use with address wire as input, data line is as output, the address of input and the data of output are one to one, digital signal has just been finished numerical transformation after by this 2K random access memory ram, and transformation relation is by writing this 2K numerical value decision of RAM at random.Image body (4c) is 512 * 512 * 8bit, four frame memories, and memory capacity is 1MByte, output gray level map table LUT(4e) be one to have 24bit(3 * 256) random access memory, state mode control register (4l) adopts 8255 interface chips.

Referring to Fig. 4, image processing unit (6) is by presentation manager (6a), I/O interface chip (6b), data RAM (6c), program RAM(6d), memory RAM switching controls (6e), address isolate (6f), address decoding (6g), control interpretation sign indicating number (6h), a steering logic (6i), data isolation (6j), address buffer (6k), control buffering (6l), data buffering (6m) is formed.When microcomputer (5) operation master routine, the image operation running program is input to the memory map image data in the data RAM (6c) through data buffering (6m) and data isolation (6j) by the BUS bus interface, program is loaded into program RAM(6d through address buffer (6k) and address decoding (6g)) in, by program and data that presentation manager (6a) operation and processing are loaded, microcomputer (5) is through the duty of control buffering (6l), steering logic (6i) and I/O interface (6b) control presentation manager (6a).Program and data are isolated (6f), data buffering (6m) and address buffer (6k) through data isolation (6j), address again and are shone upon back the internal memory of microcomputer (5) among the RAM after finishing the image processing computing, so that load new program and data.

In presentation manager (6a), D0 ... D15 is a parallel data bus line, A0 ... A15 is parallel address bus; DS is a data select signal, and PS is a program selecting signal, and STRB is a gating signal, and R/W is a read-write, and HOLD is for keeping input, and HOLDA is for keeping response signal; RS is a reset signal; XF is a state output signal.Programmable I/O interface (6b) has three input/output port (A mouths, the B mouth, the C mouth) main processor accesses of confession microcomputer (5), each port address has 8 peripheral data lines to be called PA0-PA7, PB0-PB7, PC0-PC7, A0A1 is for depositing a mouthful selection input signal, select working method, CS is that sheet selects input signal, the duty of presentation manager (6a) is controlled by the C mouth, PC0 control system reset (RS), the PC1 control system makes it be in (HOLD) state, at this moment the data address bus of presentation manager (6a) is unsettled, the BUS bus can be received data RAM (6c), program RAM(6d) so that load program and swap data, the duty of presentation manager (6a) is delivered to microcomputer (5) by the XF signal through PA0 mouth (being set to input state).For the data that make microcomputer (5) and address bus can and data RAM (6c), program RAM(6d) join with load module and swap data, and don't and the bus collision of presentation manager (6a), the BUS bus isolates (6f) through the address and data isolation (6j) is received on address and the data bus, these isolators are controlled by steering logic (6i) circuit, have only when presentation manager (6a) is in time-out (HOLD) state, the BUS bus just can be received system bus.This is by the PC2 signal controlling of the HOLD signal of visual device (6a) and programmable I/O interface (6b).Bus disconnects when PC2 is 1, to guarantee microcomputer (5) and presentation manager (6a) bus collision does not take place.When microcomputer (5) control store RAM, address decoding circuitry (6g) guarantees the space overlap that address ram space discord microcomputer (5) has used.Programmable I/O interface (6b) is to be controlled by the input/output port of microcomputer (5), takies 4 high-end port address of microcomputer.These addresses are translated by a control mouthful code translator (6h).

In image processing unit (6), its presentation manager (6a) adopts the TMS320C25VLSI chip, and it is as image processing CPU, and input and output I/O interface chip able to programme (6b) adopts 8255 mouthfuls of chips.When microcomputer (5) will be visited two storage unit, earlier choose 8255 C mouth effectively by C password TMS320C25 end by address decoder (6g), TMS320C25 responds this order, then the HOLDA end becomes low level, and make its address bus, data bus and control bus become three-state, TMS320C25 also therefore and with RAM separate from.Utilize the setting of HOLDA and 8255C mouth again, make data bus, address between microcomputer (5) and two storeies always be communicated with through isolator, RAM change-over switch (6d) also will be selected the control command of microcomputer (5) to two storeies simultaneously.Microcomputer this moment (5) can be visited two memory RAM, and TMS320C25 is in halted state, during this period, new program, data can be called in program storage RAM(6c with microcomputer (5)) and data RAM (6d) or from two storeies, take the data of handling away, but update routine or data, show internal register, and operation result in the middle of some.

Microcomputer (5) is finished function and is allowed TM320C25 be in power when moving, make the low level of TM320C25 cancellation HOLD after C mouth by 8255 is isolated microcomputer bus and system bus again and its RS is resetted, along with HOLDA becomes high level, TMS320C25 just can move and handle program and the data that are loaded.Treat that it finishes after the computing, 0 sends action by the XF pin to the 8255A mouth finishes signal, after microcomputer (5) receives signal, repeats said process again.

The present invention has following advantage:

1. detection sensitivity has improved 0.5%-1%. Fig. 6 and Fig. 7 have provided the measured result of the detection sensitivity of steel and aluminium bi-material, 1. are that 2. original picture sensitivity be the sensitivity after the real-time Integral Processing of 32 images.

2. speed is more many than common computer image processing raising, and can finish complicated image processing function, and speed can be suitable with minicomputer. Fig. 5 has provided comparative result.

3. cheap. Than the low 10-20 of minicomputer price doubly.

Claims

1, a kind of microcomputer X ray real-time image is handled detection system, comprise image intensifier tube, gamma camera, microcomputer, color monitor, magnetic tape station, it is characterized in that: have real-time integrator, image acquisition storage and display unit and image processing unit, wherein, under the control of microcomputer primary processor, be input to the quantification of taking a sample of image acquisition storage and display unit through the picture intelligence of real-time Integral Processing, storage, conversion, be mapped to microcomputer memory by bus then, the microcomputer primary processor is mapped to image processing unit with the memory map image data and carries out image processing, the pictorial data of finishing after the image processing is shone upon back microcomputer memory, shines upon back the image acquisition storage and display unit again by bus and shows.

2, detection system according to claim 1, it is characterized in that: integrator mainly is made up of two video memories, two summitors, analog to digital conversion, digital-to-analog conversion and logical circuits in real time, after picture intelligence enters real-time integrator, carry out analog to digital conversion and deposit in the video memory I, picture intelligence in the video memory I and real-time image deposit in the video memory II through the addition of summitor I; Picture intelligence in the video memory II deposits in the video memory I through the addition of summitor II with real-time image again, so comes and goes and carries out addition, finishes integral operation, and logical circuit produces the read-write operation of synchronizing signal, control video memory.

3, detection system according to claim 1, it is characterized in that: the image acquisition storage and display unit mainly is made up of sampling quantification, storage, pseudocolor transformation and logical circuit, picture intelligence from real-time integrator after quantizing, is sent in the image storage body in sampling, be mapped to microcomputer memory through the microcomputer expansion slot interface, shine upon back the image acquisition storage and display unit again by microcomputer memory and carry out pseudocolor transformation for finishing pictorial data after the image processing, show the operation of logical circuit control sampling quantification and image storage body behind the synthetic width of cloth pseudo-colours image.

4, detection system according to claim 1, it is characterized in that: image processing unit mainly is made up of presentation manager, storer, I/O interface, logic control circuit, wherein presentation manager links to each other with the microcomputer primary processor through the I/O interface, memory stores data and relevant procedures also link to each other with presentation manager, carry out the image processing conversion, the duty of logical circuit control presentation manager and memory stores operation.