CN108304343A - A kind of chip-on communication method of complexity SOC - Google Patents

A kind of chip-on communication method of complexity SOC Download PDF

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Publication number
CN108304343A
CN108304343A CN201810129340.2A CN201810129340A CN108304343A CN 108304343 A CN108304343 A CN 108304343A CN 201810129340 A CN201810129340 A CN 201810129340A CN 108304343 A CN108304343 A CN 108304343A
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China
Prior art keywords
opencl
communications
calling
data stored
state
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Withdrawn
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CN201810129340.2A
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Inventor
刘建
王云
邢彦文
夏丽敏
李霄
陈杰
钟晨
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Shenzhen Desay Microelectronic Technology Ltd Co
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Shenzhen Desay Microelectronic Technology Ltd Co
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Priority to CN201810129340.2A priority Critical patent/CN108304343A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42Loop networks

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The present invention relates to a kind of chip-on communication methods of complexity SOC, signal to be solved is received including primary processor, the Processing Algorithm of signal to be solved is decomposed into multiple openCL to call, and it is sent in communications and data stored reservoir, the multiple openCL received calling is sent in sequence in communications loop by communications and data stored reservoir again, multiple openCL calling return to communications and data stored reservoir after each signal processing module in communications loop is handled, and are summarized by communications and data stored reservoir and are sent in primary processor.The present invention is based on the scheduling of the unidirectional cyclic structure of communication and data stored reservoir, it can solve telecommunication management when there are a large amount of signal processing modules, the processing module in complicated SoC can be enable to ensure efficiency of transmission when being communicated, the difficulty of star and bus topology structure when chip designs is avoided, and solve multiple processing modules to complete competition when the same openCL is dispatched and collision problem.

Description

A kind of chip-on communication method of complexity SOC
Technical field
The present invention relates to communication data treatment technology more particularly to a kind of chip-on communication methods of complexity SOC.
Background technology
The fast development of semiconductor fabrication process so that more massive hardware resource can be integrated on chip, and SoC tends to In the multi-core heterogeneous system chip by a plurality of types of CPU, DSP and application oriented hardware acceleration engine, and for multiprocessing The communication of intermodule, existing star and bus topology structural plane can have competition and conflict when handling a large amount of signal processings Problem, and keep host processor load excessive, the task processing capacity of primary processor is reduced, in addition, existing communication structure Design difficulty is high, is unfavorable for extending and open, therefore is badly in need of being redesigned for SOC communications so that from based on calculating Design is changed into the design based on communication, and realizes expansible communication construction.Towards open, the standard that heterogeneous system is general Change, the communication construction of unified scheduling sum has vast potential for future development.
Invention content
In order to solve the above technical problems, The present invention provides a kind of chip-on communication methods of complexity SOC, including following step Suddenly:
S1, when primary processor receives signal to be solved, then the Processing Algorithm of signal to be solved is decomposed into multiple openCL It calls, is sent in communications and data stored reservoir;
After S2, communications and data stored reservoir receive multiple openCL calling, multiple openCL calling is sent to communication successively On loop;
OpenCL calling is passed uni-directionally on each signal processing module by S3, communications loop;
S4, signal processing module receive openCL and call and handled, and after openCL calling is handled well, re-send to communication On loop;
S5, the openCL handled well calling are returned to communications loop in communications and data stored reservoir.
Further, the chip-on communication method of the complexity SOC is described based on a kind of on chip communication architecture of complexity SOC The on chip communication architecture of complicated SOC includes primary processor, communications and data stored reservoir, the communications loop being unidirectionally closed and multiple letters Number processing module, the communications and data stored reservoir and the equal carry of multiple signal processing modules are in communications loop, the main place Reason device is connect with communications and data stored reservoir.
Signal processing module is used to run the specific calculating of openCL.
Further, the step S2 further includes:
Store the calling queue that openCL is called.
Further, further include after the step S1:
Communications and data stored reservoir is intercepted in primary processor startup, when listening to the calling queue in communications and data stored reservoir For sky when, then confirm that current all openCL calling are finished.
Further, openCL calling includes state tag, and the state tag is including being not carried out state and complete At state.
Further, in step s 2, described multiple openCL calling is sent in communications loop successively is also wrapped before It includes:
The state tag that openCL calling is arranged is to be not carried out state.
Further, in step s 4, the signal processing module receives openCL and calls and handled, when After openCL calling is handled well, further include:
It is set as the openCL state tags called that state is completed.
Further, the signal processing module includes idle state and calling state, the signal processing module processing It is calling state when openCL is called, is otherwise idle state, the communications and data stored reservoir and multiple signal processing modules For the node in communications loop;When signal processing module is in idle condition, communications loop is monitored, when being not carried out state When openCL calling is passed through, the information for intercepting openCL calling is handled, and it is to call that current demand signal processing module, which is arranged, The openCL passed through in communications loop calling will be directly transmitted to down by state when signal processing module is in calling state One node.
Further, communications and data stored reservoir reads the state tag letter called comprising openCL that communications loop returns Breath, and will be in this information update to the correspondence openCL calling called in queue.
Further, further include after the step S5:
When the calling queue in communications and data stored reservoir is empty, then confirms that current all openCL calling are finished, lead to Letter and data management pond summarize that each signal processing module handles as a result, then being communicated with primary processor.
The invention has the advantages that:
1, the communication means of complexity SoC provided by the invention can be realized in chip communicates between multi-processing module, simplifies communication Complexity, the unidirectional cyclic structure based on communication and data stored reservoir are dispatched, can be solved when there are a large amount of signal processing modules Telecommunication management, the processing module in complicated SoC can be enable to ensure efficiency of transmission when being communicated, avoid star and Difficulty of the bus topology structure when chip designs.
2, the communication means of complexity SoC provided by the invention by be based on communications and data stored reservoir by openCL call according to The secondary method by signal processing module can solve competition and punching when multiple processing modules can complete the same openCL scheduling Prominent problem, simplifies arbitration mechanism.
Description of the drawings
Fig. 1 is the on chip communication architecture schematic diagram for the complicated SOC that the present invention has 5 signal processing modules;
Fig. 2 is that an openCL is invoked at the flow chart being performed in one-way communication loop;
Fig. 3 is the operational flow diagram on one-way communication loop after the completion of an openCL calling executes.
Specific implementation mode
The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, so that advantages and features of the invention are more It is easily readily appreciated by one skilled in the art, to make apparent define to protection scope of the present invention.
Embodiment 1:
The chip-on communication method of complexity SOC in the present embodiment a kind of includes the following steps:
S1, when primary processor receives signal to be solved, then the Processing Algorithm of signal to be solved will be decomposed into multiple OpenCL is called, and is sent in communications and data stored reservoir;
After S2, communications and data stored reservoir receive multiple openCL calling, multiple openCL calling is sent to communication successively On loop;
OpenCL calling is passed uni-directionally on each signal processing module by S3, communications loop;
S4, signal processing module receive openCL and call and handled, and after openCL calling is handled well, re-send to communication On loop;
S5, the openCL handled well calling are returned to communications loop in communications and data stored reservoir.
When implementation, a signal processing job analysis is the calling of multiple openCL, all calling quilts by primary processor The openCL that primary processor sends the storage of communications and data stored reservoir to calls queue, and communications and data stored reservoir is by openCL tune With being distributed to signal processing module, signal processing module is responsible for running the specific calculating of openCL, and signal processing module can be by Standardized openCL interfaces call.
The present embodiment main purpose is that providing one kind for the multinuclear isomery processing chip with multiple processing modules is based on Standardized openCL calls encapsulation, and the chip-on communication method for calling processing module to be handled.Complicated SoC be designed to by One primary processor, a communication and data stored reservoir, a unidirectional closure communications loop and multiple signal processing models composition. Unidirectional cyclic structure based on communication and data stored reservoir is dispatched, and communication tube when there are a large amount of signal processing modules can be solved Reason, can enable the processing module in complicated SoC to ensure efficiency of transmission when being communicated, star and type trunk is avoided to open up Difficulty of the structure when chip designs is flutterred, openCL scheduling is safeguarded based on communications and data stored reservoir and processing module jointly State tag method, can solve multiple processing modules can complete competition when the same openCL is dispatched and collision problem.
Embodiment 2:
The chip-on communication method of complexity SOC in the present embodiment a kind of includes the following steps:
SA1, when primary processor receives signal to be solved, then the Processing Algorithm of signal to be solved is decomposed into multiple openCL It calls, is sent in communications and data stored reservoir;
Communications and data stored reservoir is intercepted in SA2, primary processor startup, when listening to the calling in communications and data stored reservoir When queue is empty, then confirm that current all openCL calling are finished;
After SA3, communications and data stored reservoir receive multiple openCL calling, the calling queue that storage openCL is called, and set The state tag for setting openCL calling is to be not carried out state, and then multiple openCL calling is sent in communications loop successively; OpenCL calling includes state tag, and the state tag includes being not carried out state and state being completed;
OpenCL calling is passed uni-directionally on each signal processing module by SA4, communications loop;
SA5 signal processing modules receive openCL and call and handled, and after openCL calling is handled well, openCL is called State tag be set as that state is completed, re-send in communications loop;
SA6, the openCL handled well calling are returned to communications loop in communications and data stored reservoir, and communications and data stored reservoir is read Take communications loop return comprising openCL call state tag information, and by this information update to call queue in correspondence During openCL is called.
Embodiment 3:
The chip-on communication method of complexity SOC in the present embodiment a kind of includes the following steps:
SB1, when primary processor receives signal to be solved, then the Processing Algorithm of signal to be solved is decomposed into multiple openCL It calls, is sent in communications and data stored reservoir;
After SB2, communications and data stored reservoir receive multiple openCL calling, the calling queue that storage openCL is called, and set The state tag for setting openCL calling is to be not carried out state, and then multiple openCL calling is sent in communications loop successively; OpenCL calling includes state tag, and the state tag includes being not carried out state and state being completed;
OpenCL calling is passed uni-directionally on each signal processing module by SB3, communications loop;
SB4, signal processing module receive openCL and call and handled, after openCL calling is handled well, by openCL tune State tag is set as that state is completed, and re-sends in communications loop;
SB5, the openCL handled well calling are returned to communications loop in communications and data stored reservoir, and communications and data stored reservoir is read Take communications loop return comprising openCL call state tag information, and by this information update to call queue in correspondence During openCL is called;
SB6, when the calling queue in communications and data stored reservoir is empty, then confirm that current all openCL calling have executed Finish, communications and data stored reservoir summarize the processing of each signal processing module as a result, then being communicated with primary processor.
Embodiment 4:
Based on above-described embodiment, in the present embodiment, the chip-on communication method of above-mentioned complexity SOC is based on a kind of piece of complexity SOC What upper communication structure was implemented, the on chip communication architecture of complicated SOC includes primary processor, communications and data stored reservoir, unidirectional closure Communications loop and multiple signal processing modules, communications and data stored reservoir and the equal carry of multiple signal processing modules are in communication loop On the road, primary processor is connect with communications and data stored reservoir.Above-mentioned signal processing module includes idle state and calling state, institute It is calling state to state when signal processing module processing openCL is called, and is otherwise idle state, the communications and data stored reservoir It is the node in communications loop with multiple signal processing modules;When signal processing module is in idle condition, communication loop is monitored Road, when the openCL for the state that is not carried out calling is passed through, the information for intercepting openCL calling is handled, and current letter is arranged Number processing module is calling state, when signal processing module is in calling state, will directly will be passed through in communications loop OpenCL calling is transmitted to next node.
Embodiment 5:
The chip-on communication method of complexity SOC in the present embodiment a kind of is as shown in Figure 1, describe the complexity using the present invention The complicated SoC schematic diagrames of the chip-on communication method of SoC.Complexity SoC is by a primary processor, five signal processing modules, one A communications and data stored reservoir and a unidirectional communications loop that is closed are constituted.Primary processor can access and manage communication and number According to stored reservoir.The unidirectional start node for being closed communications loop is accessed by communications and data stored reservoir, and communications and data stored reservoir is logical One way link is crossed to be connected with the signal processing module 1 of next node and carry out unidirectional information transmission, each signal processing Module is all transmitted with next signal processing module opportunity one way link into row information, the last one signal processing module passes through list The information of its own or the forwarding of other signal processing modules is received and sent to chain road direction communications and data stored reservoir chain.
Embodiment 6:
Fig. 2 is to be invoked at the flow chart being performed in one-way communication loop using an openCL of the complicated SoC of the present invention.For SoC assigned tasks to be treated are completed, the modules of SoC need to be sequentially completed following work:
First, primary processor will decompose in the task according to the design feature of complicated SoC and obtain 2 openCL calling, remember respectively For A and B, the two calling divided need to coordinate to execute that assigned tasks could be completed;A and B is pressed into communications and data management The task call queue in pond simultaneously is noted as being not carried out shape.A and B calling is sequentially transmitted unidirectional logical by communications and data stored reservoir Believe on loop;The signal processing module 1 being in idle condition intercepts A and calls;Signal processing module 1 be arranged A call label be It is executed by module 1;Thereafter, be performed flag state call A signal processing module 2 is sent to by unidirectional communications link, locate The information received is analyzed in the signal processing module 2 of idle state, detects that the label that this is called is to be performed state, that is, turns To this information to module 3;The information of tape label is by module forwards to communications and data stored reservoir;Communications and data stored reservoir according to It is state in executing that the A in queue is called in label information setting.After A is sent on one-way communication loop, B also by communication with Data management pond is sent on one-way communication loop.This time, it such as calls the repeating process of A similar, there is signal processing module 1 first The information for calling B is received, signal processing module 1 is in the state that A is called that executes at this time, directly forwards B relevant informations to letter Number processing module 2, after the signal processing module 2 being in idle condition receives information, interception B is called;Signal processing module 2 is set The label for setting B calling executes for module 2;Thereafter, be performed flag state call B letter is sent to by unidirectional communications link Number processing module 3, the signal processing module 3 being in idle condition analyze the information received, detect that the label that this is called is It is performed state, that is, goes to this information to next module;The information of tape label is by module forwards to communications and data stored reservoir; Communications and data stored reservoir is arranged according to label information calls the B in queue for state in execution.
Embodiment 7:
Fig. 3 is the operation on one-way communication loop after the completion of being executed using the openCL calling of the complicated SoC of the present invention Flow chart.Signal processing module 1 in execution task complete A call after, A call execute completion status be packaged after by Module 1 is sent to one-way communication loop, this information is transmitted to processing module 2 by unidirectional communications link, and module 2 detects this calling Label be execute completion status, go to this information to module 3, the information of tape label is by module forwards to communications and data management Pond communications and data stored reservoir executes completion status according to label information and A is cleared out of calling queue.In intercepting communication and number If it is sky to be sent according to the group processor of stored reservoir state and call queue, then it represents that all calling, which have executed, to be terminated, main place The signal processing tasks for managing device are completed.
Embodiments of the present invention are explained in detail above in conjunction with attached drawing, but the present invention is not limited to above-mentioned implementations Mode within the knowledge of a person skilled in the art can also be without departing from the purpose of the present invention Various changes can be made.

Claims (10)

1. a kind of chip-on communication method of complexity SOC, which is characterized in that include the following steps:
S1, when primary processor receives signal to be solved, then the Processing Algorithm of signal to be solved is decomposed into multiple openCL It calls, is sent in communications and data stored reservoir;
After S2, communications and data stored reservoir receive multiple openCL calling, multiple openCL calling is sent to communication successively On loop;
OpenCL calling is passed uni-directionally on each signal processing module by S3, communications loop;
S4, signal processing module receive openCL and call and handled, and after openCL calling is handled well, re-send to communication On loop;
S5, the openCL handled well calling are returned to communications loop in communications and data stored reservoir.
2. the chip-on communication method of complexity SOC according to claim 1, which is characterized in that the on piece of the complexity SOC is logical Letter method is included primary processor, is led to based on a kind of on chip communication architecture of complexity SOC, the on chip communication architecture of the complexity SOC Letter and data management pond, the communications loop that is unidirectionally closed and multiple signal processing modules, the communications and data stored reservoir and more In communications loop, the primary processor is connect a equal carry of signal processing module with communications and data stored reservoir.
3. the chip-on communication method of complexity SOC according to claim 1, which is characterized in that the step S2 further includes:
Store the calling queue that openCL is called.
4. the chip-on communication method of complexity SOC according to claim 3, which is characterized in that also wrapped after the step S1 It includes:
Communications and data stored reservoir is intercepted in primary processor startup, when listening to the calling queue in communications and data stored reservoir For sky when, then confirm that current all openCL calling are finished.
5. the chip-on communication method of complexity SOC according to claim 3, which is characterized in that the openCL, which is called, includes State tag, the state tag include being not carried out state and state being completed.
6. the chip-on communication method of complexity SOC according to claim 5, which is characterized in that in step s 2, it is described successively Further include before multiple openCL calling is sent in communications loop:
The state tag that openCL calling is arranged is to be not carried out state.
7. the chip-on communication method of complexity SOC according to claim 6, which is characterized in that in step s 4, the letter Number processing module receives openCL and calls and handled, and after openCL, which is called, to be handled well, further includes:
It is set as the openCL state tags called that state is completed.
8. the chip-on communication method of complexity SOC according to claim 5, which is characterized in that the signal processing module packet Idle state and calling state are included, the signal processing module processing openCL is calling state when calling, and is otherwise idle shape State, the communications and data stored reservoir and multiple signal processing modules are the node in communications loop;At signal processing module When idle state, communications loop is monitored, when the openCL for the state that is not carried out calling is passed through, intercepts the letter of openCL calling Breath is handled, and it is that calling state will be straight when signal processing module is in calling state that current demand signal processing module, which is arranged, It connects and the openCL passed through in communications loop calling is transmitted to next node.
9. the chip-on communication method of complexity SOC according to claim 3, which is characterized in that communications and data stored reservoir is read Take communications loop return comprising openCL call state tag information, and by this information update to call queue in correspondence During openCL is called.
10. the chip-on communication method of complexity SOC according to claim 3, which is characterized in that also wrapped after the step S5 It includes:
When the calling queue in communications and data stored reservoir is empty, then confirms that current all openCL calling are finished, lead to Letter and data management pond summarize that each signal processing module handles as a result, then being communicated with primary processor.
CN201810129340.2A 2018-02-08 2018-02-08 A kind of chip-on communication method of complexity SOC Withdrawn CN108304343A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112506851A (en) * 2020-12-02 2021-03-16 广东电网有限责任公司佛山供电局 SOC chip architecture construction method for solving multi-core access conflict

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030172189A1 (en) * 2001-07-02 2003-09-11 Globespanvirata Incorporated Communications system using rings architecture
US20030172190A1 (en) * 2001-07-02 2003-09-11 Globespanvirata Incorporated Communications system using rings architecture
CN1702858A (en) * 2004-05-28 2005-11-30 英特尔公司 Multiprocessor chip with bidirectional ring interconnection
CN101789892A (en) * 2010-03-11 2010-07-28 浙江大学 All-node virtual-channel network-on-chip ring topology data exchange method and system
CN102135950A (en) * 2011-03-10 2011-07-27 中国科学技术大学苏州研究院 On-chip heterogeneous multi-core system based on star type interconnection structure, and communication method thereof
CN102780628A (en) * 2012-07-31 2012-11-14 中国人民解放军国防科学技术大学 On-chip interconnection network routing method oriented to multi-core microprocessor
CN102999385A (en) * 2012-11-06 2013-03-27 苏州懿源宏达知识产权代理有限公司 Multiprocessor co-processing method in computation equipment
CN103106174A (en) * 2011-11-09 2013-05-15 深圳市德赛微电子技术有限公司 Complex system on-chip (SOC) communication method
CN104303174A (en) * 2012-06-25 2015-01-21 英特尔公司 Tunneling platform management messages through inter-processor interconnects
CN106209121A (en) * 2016-07-15 2016-12-07 中国科学院微电子研究所 A kind of communications baseband SoC chip of multimode multinuclear
CN107171954A (en) * 2016-03-08 2017-09-15 华为技术有限公司 Fault tolerance rout ing method, device and network-on-chip

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030172189A1 (en) * 2001-07-02 2003-09-11 Globespanvirata Incorporated Communications system using rings architecture
US20030172190A1 (en) * 2001-07-02 2003-09-11 Globespanvirata Incorporated Communications system using rings architecture
CN1702858A (en) * 2004-05-28 2005-11-30 英特尔公司 Multiprocessor chip with bidirectional ring interconnection
CN101789892A (en) * 2010-03-11 2010-07-28 浙江大学 All-node virtual-channel network-on-chip ring topology data exchange method and system
CN102135950A (en) * 2011-03-10 2011-07-27 中国科学技术大学苏州研究院 On-chip heterogeneous multi-core system based on star type interconnection structure, and communication method thereof
CN103106174A (en) * 2011-11-09 2013-05-15 深圳市德赛微电子技术有限公司 Complex system on-chip (SOC) communication method
CN104303174A (en) * 2012-06-25 2015-01-21 英特尔公司 Tunneling platform management messages through inter-processor interconnects
CN102780628A (en) * 2012-07-31 2012-11-14 中国人民解放军国防科学技术大学 On-chip interconnection network routing method oriented to multi-core microprocessor
CN102999385A (en) * 2012-11-06 2013-03-27 苏州懿源宏达知识产权代理有限公司 Multiprocessor co-processing method in computation equipment
CN107171954A (en) * 2016-03-08 2017-09-15 华为技术有限公司 Fault tolerance rout ing method, device and network-on-chip
CN106209121A (en) * 2016-07-15 2016-12-07 中国科学院微电子研究所 A kind of communications baseband SoC chip of multimode multinuclear

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
A.J.MARTIN等: "Asynchronous Techniques for System-on-Chip Design", 《PROCEEDINGS OF THE IEEE 》 *
郭桂雨: "基于片上网络多核处理器设计与协同验证", 《中国优秀硕士学位论文全文数据库 信息科技辑》 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112506851A (en) * 2020-12-02 2021-03-16 广东电网有限责任公司佛山供电局 SOC chip architecture construction method for solving multi-core access conflict
CN112506851B (en) * 2020-12-02 2022-02-11 广东电网有限责任公司佛山供电局 SOC chip architecture construction method for solving multi-core access conflict

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Application publication date: 20180720