CN108304285A - A kind of multiport UART Universal Asynchronous Receiver Transmitter test method - Google Patents
A kind of multiport UART Universal Asynchronous Receiver Transmitter test method Download PDFInfo
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- CN108304285A CN108304285A CN201810036993.6A CN201810036993A CN108304285A CN 108304285 A CN108304285 A CN 108304285A CN 201810036993 A CN201810036993 A CN 201810036993A CN 108304285 A CN108304285 A CN 108304285A
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- universal asynchronous
- asynchronous receiver
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2231—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test interrupt circuits
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
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- Maintenance And Management Of Digital Transmission (AREA)
Abstract
The invention discloses a kind of multiport UART Universal Asynchronous Receiver Transmitter test methods, including：Write-read functional test is carried out to all internal registers of the multiport UART Universal Asynchronous Receiver Transmitter, obtains internal register test result；The baud rate of test data transmission, data format, the triggering of FIFO are horizontal, and monitor, acquisition data conversion transfer function test result whether normal with the state of the relevant internal register of data conversion transfer function；Interrupt enable register is configured at least one interrupt source of determination；All interrupt sources are traversed, while monitoring, acquisition interrupt function test result whether normal with the state of the relevant internal register of interrupt function；The output and reading of various Modem signals are traversed, and monitors, acquisition Modem control logic test result whether normal with the state of the relevant internal register of Modem control functions.The present invention multiport UART Universal Asynchronous Receiver Transmitter test method have it is highly practical, using simplicity, advantage reliable for operation.
Description
Technical field
The present invention relates to units test technical fields, particularly relate to a kind of multiport UART Universal Asynchronous Receiver Transmitter test method.
Background technology
Multiport UART Universal Asynchronous Receiver Transmitter is widely used in electronic system in contemporary electronic systems, in system operation
In the process, the bulk information data needs of generation quickly carry out order transfer, therefore the communication of system in each functional unit
Function plays particularly important effect in the transmission of information data.Serial communication refers to transmission line of the data in one bit wide of single
On, the mode transmitted in order bit by bit transmits data, since serial transmission has the characteristics that save transmission line,
Communication distance farther out in the case of, it is with the obvious advantage, thus in model system computer step by step between peripheral hardware, system be
In data transmission between system, serial communication is a kind of one of main communication mode.And in order to improve model system communication
Fault-tolerant ability generally selects the asynchronous serial communication for not needing tranmitting data register and receiving clock holding stringent synchronization.And asynchronous string
Row bus controller is the Primary Component for realizing asynchronous serial communication, for being taken with other serial line interface level conversion devices
With use, such as RS232C.As each electronic system internal serial communication Primary Component, multiport UART Universal Asynchronous Receiver Transmitter
Quality directly affects the quality of electronic system data transmission, to influence the operation of whole system.Therefore multiport is general different
The test for walking transceiver is of great significance for the operation function and data transmission that ensure electronic system, is also aerospace etc.
Important industry, which escorts, to play a key effect.
Due to its function complexity and its transfer function different conditions, traditional work(can be configured to by internal register
Energy test method cannot meet the needs of to function and internal resource coverage rate.
Invention content
In view of this, it is an object of the invention to propose a kind of efficient, accurate multiport UART Universal Asynchronous Receiver Transmitter test
Method.
Based on a kind of above-mentioned purpose multiport UART Universal Asynchronous Receiver Transmitter test method provided by the invention, including：
Write-read functional test is carried out to all internal registers of the multiport UART Universal Asynchronous Receiver Transmitter, obtains internal post
Storage test result；
The baud rate of test data transmission, data format, the triggering of FIFO are horizontal, and monitor and data conversion transfer function
Whether the state of relevant internal register is normal, obtains data conversion transfer function test result；
Interrupt enable register is configured at least one interrupt source of determination；Traverse all interrupt sources, at the same monitor with
Whether the state of the relevant internal register of interrupt function is normal, obtains interrupt function test result；
The output and reading of various Modem signals are traversed, and is monitored and the relevant internal register of Modem control functions
Whether state is normal, obtains Modem control logic test results.
In some embodiments, the multiport UART Universal Asynchronous Receiver Transmitter test method further includes：
Correctly excitation is inputted to the multiport UART Universal Asynchronous Receiver Transmitter, when output pin exports preset DC parameter
When, input stimulus is remained unchanged, the multiport UART Universal Asynchronous Receiver Transmitter is made to enter quiescent operation state, it is defeated to output pin
Go out corresponding DC parameter to measure, obtains DC parameter test result.
In some embodiments, the multiport UART Universal Asynchronous Receiver Transmitter test method further includes：
Corresponding with the tested alternating-current parameter input logic saltus step of construction, also therewith according to output logic after input logic saltus step
The test order of saltus step measures the time parameter between two trip points, obtains AC parameter test result.
From the above it can be seen that multiport UART Universal Asynchronous Receiver Transmitter test method provided by the invention, highly practical,
It is reliable for operation using simplicity, it can realize the test of multiport UART Universal Asynchronous Receiver Transmitter, ensure that the covering to logic unit failure
Property, it ensure that the q＆r of electronic system communication unit.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Obtain other attached drawings according to these attached drawings.
Fig. 1 is the multiport UART Universal Asynchronous Receiver Transmitter test method flow chart of the embodiment of the present invention；
Specific implementation mode
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
Attached drawing, the present invention is described in more detail.
An embodiment of the present invention provides a kind of multiport UART Universal Asynchronous Receiver Transmitter test methods.It is real for the present invention with reference to figure 1
Apply the multiport UART Universal Asynchronous Receiver Transmitter test method flow chart of example.
The multiport UART Universal Asynchronous Receiver Transmitter test method includes mainly functional test part, includes the following steps：
Step 101, internal register test：All internal registers of the multiport UART Universal Asynchronous Receiver Transmitter are carried out
Write-read functional test obtains internal register test result.
It before completing given logical function, needs to carry out resetting and write operation to internal register, completes logic work(
It can be also required to be read corresponding registers in the process, therefore internal register is its important component.It posts inside
Storage is divided into readable writeable, read-only and only write three classes register, and all internal registers should be traversed in test, for read-only or only
The test vector that register needs reasonable design is write, is surveyed by the confirmation of internal register contents and realization logic function
Examination.
Multiport UART Universal Asynchronous Receiver Transmitter generally comprises multiple internal registers, and the access to different registers is to pass through ground
What location pin was completed, but same address may access different registers under reading and writing state, and some internal registers are only
It reads or only writes.In addition the access needs of some internal registers enter special after first being configured to the content of certain registers
Then pattern is selected, as shown in table 1 according to the state of address pin.
1 register configuration content of table table corresponding with pattern
Internal register test i.e. to register carry out write-read functional test, but can only to readable writeable register IER,
LCR, MCR, SPR, DLL, DLH, EFR, Xon1, Xon2, Xoff1, Xoff2, TCR, TLR carry out write-read test, other write or
(wherein, FIFO refers to FIFO memory, has first to enter by read-only register RHR, THR, FCR, IIR, LSR, MSR, FIFO Rdy
The characteristics of first going out First In First Out) it tests when then being configured to register in other test events.A part
It is completed by the configuration of register address and other registers when the access of register, therefore in order to accurate positioning failure
The test of point, internal register needs sequencing.Register LCR, SPR can directly be accessed by address, because
This comes front end in the testing sequence of internal register.Register DLL, DLH, EFR, Xon1, Xon2, Xoff1, Xoff2
Access need register address to be completed jointly with register LCR, therefore the testing sequence of these registers comes second.It posts
The access of individual positions of storage IER, MCR needs register address and register EFR to complete jointly, sequentially comes third position.It posts
The access of storage TCR, TLR need register address and register EFR, MCR function to complete, and register FIFO Rdy need to deposit
Device address is completed jointly with register MCR, therefore the testing sequence of register TCR, TLR, FIFO Rdy come finally.It simultaneously can
To tested register DLL, DLH, SPR, Xon1, Xon2, Xoff1, Xoff2 are not tested in function of reset, differentiation is
The content of these no registers will not change because of reset operation.
Step 102, the test of data conversion transfer function：The triggering of the baud rate, data format, FIFO of test data transmission
Level, and monitor, acquisition data conversion transmission whether normal with the state of the relevant internal register of data conversion transfer function
Functional test results.
The major function of multiport UART Universal Asynchronous Receiver Transmitter is to realize the conversion and transmission of serial data and parallel data, one
As be divided into without fifo mode, band fifo mode and interior circulation pattern.It, should be right by the test vector of reasonable design in test
The baud rate of transmission, data format, the triggering of FIFO are horizontal and whether monitor the state of each register normal, while to corresponding
It is read-only and only write internal register and tested.
The test of serial parallel converting transmission is the basic serial parallel data in order to test multiport UART Universal Asynchronous Receiver Transmitter
Converting transmission function, therefore carried out using the single byte pattern of no FIFO.Chip is reset when test first, FIFO is controlled after resetting
The reset content of register is without fifo mode, then by configuration register LCR, EFR, MCR to the frequency dividing of pre-divider
Number is configured, and is configured to the divisor that may be programmed Baud rate generator by configuration register LCR, DLL, DLH, by matching
It sets register LCR to be configured data bit, check bit, stop position, finally realizes serial data bus and parallel data bus line
Between mutual conversion, consistent tested when by comparing serial data with the content of parallel data.It simultaneously can be to inside
Register RHR, THR, the LSR not tested in register testing are tested.
Hardware controls functional test carries out under band fifo mode.Reset chip after, configuration FIFO control registers FCR into
Enter fifo mode, the hardware control modes that the EFR settings of configuration Enhanced feature register are received or sent, the horizontal deposit of configuration triggering
Device TCR, setting pre-divider, programmable Baud rate generator, data bit, check bit, stop position, then carry out serial data with
Whether the converting transmission function of parallel data, the output signal of test pin " RTS " can Normal Feedback receiver holding registers
State, when test pin " CTR " can normal control send state.
The test of software control function carries out under band fifo mode.Reset chip after, configuration FIFO control registers FCR into
Enter fifo mode, the comparison of configuration Enhanced feature register EFR setting software control models or the combination shape for sending key bytes
The substance of key bytes is compared or sends in formula, configuration register Xon1, Xon2, Xoff1, Xoff2 setting, and setting stops touching
It sends out byte number, restore triggering byte number, pre-divider, programmable Baud rate generator, data bit, check bit, stop position, then
Carry out the converting transmission function of serial data and parallel data.When testing device reception serial data, receiver holding register
When content after reaching stopping triggering byte number or restoring triggering byte number, correct key bytes content can be sent.Test
When device sends serial data, after receiving key bytes content, if can stop or restore transmission data.
Step 103, interrupt function test：Interrupt enable register is configured at least one interrupt source of determination；Traversal is all
The interrupt source, while monitoring, acquisition interrupt function test whether normal with the state of the relevant internal register of interrupt function
As a result.
Multiport UART Universal Asynchronous Receiver Transmitter in addition to realizing the logic function of conversion and transmission of serial data and parallel data,
Interrupt signal can also be generated.In test, it should configure corresponding registers by the test vector of reasonable design and realize interrupt type
Selection, and traverses all interrupt sources, while whether the state for monitoring corresponding registers is normal, realizes to corresponding read-only and only write interior
The test of portion's register.
After resetting chip, the enabled of six classes interruption is arranged in configuration interrupt enable register IER, then applies to device different
Interrupt source, the output signal of monitoring pin " INT ", test the entrance of interrupt status and restore whether with the generation of interrupt source and
Interruption is consistent reaching for recovery condition, and interrupts and identify whether the content of register IIR is consistent with interrupt type.In test
Disconnected type includes acceptance line state interrupt, reception overtime interrupt, RHR interruptions, THR interruptions, Modem state interrupts, Xoff interruption
It is interrupted with CTS, RTS.Register IIR, the MSR not tested in internal register testing can be tested simultaneously.
Step 104, Modem (modem) control logic test：The output and reading of various Modem signals are traversed,
And monitor, acquisition Modem control logic test knot whether normal with the state of the relevant internal register of Modem control functions
Fruit.
Multiport UART Universal Asynchronous Receiver Transmitter can carry out a variety of Modem letters by Modem control registers and status register
Number control and monitoring.In test, the output and reading of various Modem signals should be traversed by the test vector of reasonable design,
And whether the state for monitoring respective inner register is normal.
After resetting chip, configuration FIFO control registers FCR setting DMA (direct memory access, Direct Memory
Access pattern), and single DMA mode and block DMA mode are tested respectively.Test is when reception FIFO, transmission respectively
When the byte number of FIFO reaches specified byte number, whether pin " RXRDY ", the output signal of " TXRDY " are consistent with dma state.
The register FIFO Rdy not tested in internal register testing can be tested simultaneously.
In a preferred embodiment, with reference to figure 1, multiport UART Universal Asynchronous Receiver Transmitter test method of the invention further includes parameter
Part of detecting.The parameter testing part, includes the following steps：
Step 105, DC parameter test：Correctly excitation is inputted to the multiport UART Universal Asynchronous Receiver Transmitter, works as output
When pin exports preset DC parameter, input stimulus is remained unchanged, makes the multiport UART Universal Asynchronous Receiver Transmitter into meditation
State working condition exports corresponding DC parameter to output pin and measures, obtains DC parameter test result.
It is patrolled first by internal register test, the test of data conversion transfer function, interrupt function test, Modem controls
The operation for collecting the function testing vectors such as test inputs correctly excitation, when output pin is defeated to multiport UART Universal Asynchronous Receiver Transmitter
When going out the DC parameters such as corresponding voltage, electric current, input stimulus is remained unchanged, makes multiport UART Universal Asynchronous Receiver Transmitter into meditation
State working condition, and then the DC parameters such as corresponding voltage, electric current are exported to output pin and are measured.
Step 106, AC parameter test：Construction input logic saltus step corresponding with tested alternating-current parameter, is patrolled according to input
The output logic also test order of saltus step therewith, measures the time parameter between two trip points, obtains exchange ginseng after volume saltus step
Number test result.
It is surveyed with internal register test, the test of data conversion transfer function, interrupt function test, Modem control logics
The principle of the functional tests such as examination constructs the input logic saltus step being tested corresponding to alternating-current parameter, and after requiring input logic saltus step
Logic also saltus step therewith is exported, to measure the time parameter between two trip points.
As can be seen from the above-described embodiment, the embodiment of the present invention proposes a kind of multiport UART Universal Asynchronous Receiver Transmitter test side
Method is tested for the characteristics of different logic units, ensure that the spreadability to logic unit, and covered different
Transfer function pattern, simple transfer function can only be realized by solving existing test method, to internal resource and transmission mode
The not high technical problem of spreadability.
Those of ordinary skills in the art should understand that：The discussion of any of the above embodiment is exemplary only, not
It is intended to imply that the scope of the present disclosure (including claim) is limited to these examples；Under the thinking of the present invention, above example
Or can also be combined between the technical characteristic in different embodiments, step can be realized with random order, and be existed such as
Many other variations of the different aspect of the upper present invention, for simplicity, they are not provided in details.
In addition, to simplify explanation and discussing, and in order not to obscure the invention, it can in the attached drawing provided
To show or can not show that the well known power ground with integrated circuit (IC) chip and other components is connect.Furthermore, it is possible to
Device is shown in block diagram form, to avoid obscuring the invention, and this has also contemplated following facts, i.e., about this
The details of the embodiment of a little block diagram arrangements is the platform that height depends on to implement the present invention (that is, these details should
It is completely within the scope of the understanding of those skilled in the art).Detail (for example, circuit) is being elaborated to describe the present invention's
In the case of exemplary embodiment, it will be apparent to those skilled in the art that can be in these no details
In the case of or implement the present invention in the case that these details change.Therefore, these descriptions should be considered as explanation
Property rather than it is restrictive.
Although having been incorporated with specific embodiments of the present invention, invention has been described, according to retouching for front
It states, many replacements of these embodiments, modifications and variations will be apparent for those of ordinary skills.Example
Such as, other memory architectures (for example, dynamic ram (DRAM)) can use discussed embodiment.
The embodiment of the present invention be intended to cover fall within the broad range of appended claims it is all it is such replace,
Modifications and variations.Therefore, all within the spirits and principles of the present invention, any omission, modification, equivalent replacement, the improvement made
Deng should all be included in the protection scope of the present invention.
Claims (3)
1. a kind of multiport UART Universal Asynchronous Receiver Transmitter test method, which is characterized in that including：
Write-read functional test is carried out to all internal registers of the multiport UART Universal Asynchronous Receiver Transmitter, obtains internal register
Test result；
The baud rate of test data transmission, data format, the triggering of FIFO are horizontal, and monitor related to data conversion transfer function
Internal register state it is whether normal, obtain data conversion transfer function test result；
Interrupt enable register is configured at least one interrupt source of determination；All interrupt sources are traversed, while monitoring and interrupting
Whether the state of the relevant internal register of function is normal, obtains interrupt function test result；
The output and reading of various Modem signals are traversed, and monitors the state with the relevant internal register of Modem control functions
It is whether normal, obtain Modem control logic test results.
2. multiport UART Universal Asynchronous Receiver Transmitter test method according to claim 1, which is characterized in that further include：
Correctly excitation is inputted to the multiport UART Universal Asynchronous Receiver Transmitter, when output pin exports preset DC parameter,
Input stimulus is remained unchanged, the multiport UART Universal Asynchronous Receiver Transmitter is made to enter quiescent operation state, output pin is exported
Corresponding DC parameter measures, and obtains DC parameter test result.
3. multiport UART Universal Asynchronous Receiver Transmitter test method according to claim 1, which is characterized in that further include：
Construction input logic saltus step corresponding with tested alternating-current parameter, according to output logic also saltus step therewith after input logic saltus step
Test order, measure two trip points between time parameter, obtain AC parameter test result.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111813616A (en) * | 2020-07-06 | 2020-10-23 | 北京振兴计量测试研究所 | Test board-based universal function test method for multi-port UART (universal asynchronous receiver/transmitter) |
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